blob: 186623d8695987b04cee7f82222be4bafd7c8523 [file] [log] [blame]
Glenn Streiff3c2d7742008-02-04 20:20:45 -08001/*
Chien Tungfa6c87d2009-12-09 15:21:56 -08002 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
Glenn Streiff3c2d7742008-02-04 20:20:45 -08003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/netdevice.h>
37#include <linux/etherdevice.h>
38#include <linux/ethtool.h>
39#include <linux/mii.h>
40#include <linux/if_vlan.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090041#include <linux/slab.h>
Glenn Streiff3c2d7742008-02-04 20:20:45 -080042#include <linux/crc32.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/init.h>
47
48#include <asm/io.h>
49#include <asm/irq.h>
50#include <asm/byteorder.h>
51
52#include "nes.h"
53
54
55
56static u16 nes_read16_eeprom(void __iomem *addr, u16 offset);
57
58u32 mh_detected;
59u32 mh_pauses_sent;
60
61/**
62 * nes_read_eeprom_values -
63 */
64int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter)
65{
66 u32 mac_addr_low;
67 u16 mac_addr_high;
68 u16 eeprom_data;
69 u16 eeprom_offset;
70 u16 next_section_address;
71 u16 sw_section_ver;
72 u8 major_ver = 0;
73 u8 minor_ver = 0;
74
75 /* TODO: deal with EEPROM endian issues */
76 if (nesadapter->firmware_eeprom_offset == 0) {
77 /* Read the EEPROM Parameters */
78 eeprom_data = nes_read16_eeprom(nesdev->regs, 0);
79 nes_debug(NES_DBG_HW, "EEPROM Offset 0 = 0x%04X\n", eeprom_data);
80 eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) <<
81 ((eeprom_data & 0x0080) >> 7));
82 nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset);
83 nesadapter->firmware_eeprom_offset = eeprom_offset;
84 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
85 if (eeprom_data != 0x5746) {
86 nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data);
87 return -1;
88 }
89
90 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
91 nes_debug(NES_DBG_HW, "EEPROM Offset %u = 0x%04X\n",
92 eeprom_offset + 2, eeprom_data);
93 eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8);
94 nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset);
95 nesadapter->software_eeprom_offset = eeprom_offset;
96 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
97 if (eeprom_data != 0x5753) {
98 printk("Not a valid Software Image = 0x%04X\n", eeprom_data);
99 return -1;
100 }
101 sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset + 6);
102 nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n",
103 sw_section_ver);
104
105 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
106 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
107 eeprom_offset + 2, eeprom_data);
108 next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
109 ((eeprom_data & 0x0100) >> 8));
110 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
111 if (eeprom_data != 0x414d) {
112 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
113 eeprom_data);
114 goto no_fw_rev;
115 }
116 eeprom_offset = next_section_address;
117
118 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
119 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
120 eeprom_offset + 2, eeprom_data);
121 next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
122 ((eeprom_data & 0x0100) >> 8));
123 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
124 if (eeprom_data != 0x4f52) {
125 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n",
126 eeprom_data);
127 goto no_fw_rev;
128 }
129 eeprom_offset = next_section_address;
130
131 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
132 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
133 eeprom_offset + 2, eeprom_data);
134 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
135 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
136 if (eeprom_data != 0x5746) {
137 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n",
138 eeprom_data);
139 goto no_fw_rev;
140 }
141 eeprom_offset = next_section_address;
142
143 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
144 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
145 eeprom_offset + 2, eeprom_data);
146 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
147 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
148 if (eeprom_data != 0x5753) {
149 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n",
150 eeprom_data);
151 goto no_fw_rev;
152 }
153 eeprom_offset = next_section_address;
154
155 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
156 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
157 eeprom_offset + 2, eeprom_data);
158 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
159 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
160 if (eeprom_data != 0x414d) {
161 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
162 eeprom_data);
163 goto no_fw_rev;
164 }
165 eeprom_offset = next_section_address;
166
167 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
168 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
169 eeprom_offset + 2, eeprom_data);
170 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
171 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
172 if (eeprom_data != 0x464e) {
173 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n",
174 eeprom_data);
175 goto no_fw_rev;
176 }
177 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8);
178 printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
179 major_ver = (u8)(eeprom_data >> 8);
180 minor_ver = (u8)(eeprom_data);
181
182 if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) {
183 nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n");
184 } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) {
185 nesadapter->virtwq = 1;
186 }
Don Wood8b1c9dc2009-09-05 20:36:38 -0700187 if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3))
188 nesadapter->send_term_ok = 1;
189
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800190 nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
191 (u32)((u8)eeprom_data);
192
193no_fw_rev:
194 /* eeprom is valid */
195 eeprom_offset = nesadapter->software_eeprom_offset;
196 eeprom_offset += 8;
197 nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset);
198 eeprom_offset += 2;
199 mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset);
200 eeprom_offset += 2;
201 mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
202 eeprom_offset += 2;
203 mac_addr_low <<= 16;
204 mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
205 nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n",
206 mac_addr_high, mac_addr_low);
207 nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max);
208
209 nesadapter->mac_addr_low = mac_addr_low;
210 nesadapter->mac_addr_high = mac_addr_high;
211
212 /* Read the Phy Type array */
213 eeprom_offset += 10;
214 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
215 nesadapter->phy_type[0] = (u8)(eeprom_data >> 8);
216 nesadapter->phy_type[1] = (u8)eeprom_data;
217
218 /* Read the port array */
219 eeprom_offset += 2;
220 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
221 nesadapter->phy_type[2] = (u8)(eeprom_data >> 8);
222 nesadapter->phy_type[3] = (u8)eeprom_data;
223 /* port_count is set by soft reset reg */
224 nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u,"
225 " port 2 -> %u, port 3 -> %u\n",
226 nesadapter->port_count,
227 nesadapter->phy_type[0], nesadapter->phy_type[1],
228 nesadapter->phy_type[2], nesadapter->phy_type[3]);
229
230 /* Read PD config array */
231 eeprom_offset += 10;
232 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
233 nesadapter->pd_config_size[0] = eeprom_data;
234 eeprom_offset += 2;
235 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
236 nesadapter->pd_config_base[0] = eeprom_data;
237 nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n",
238 nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]);
239
240 eeprom_offset += 2;
241 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
242 nesadapter->pd_config_size[1] = eeprom_data;
243 eeprom_offset += 2;
244 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
245 nesadapter->pd_config_base[1] = eeprom_data;
246 nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n",
247 nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]);
248
249 eeprom_offset += 2;
250 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
251 nesadapter->pd_config_size[2] = eeprom_data;
252 eeprom_offset += 2;
253 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
254 nesadapter->pd_config_base[2] = eeprom_data;
255 nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n",
256 nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]);
257
258 eeprom_offset += 2;
259 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
260 nesadapter->pd_config_size[3] = eeprom_data;
261 eeprom_offset += 2;
262 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
263 nesadapter->pd_config_base[3] = eeprom_data;
264 nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n",
265 nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]);
266
267 /* Read Rx Pool Size */
268 eeprom_offset += 22; /* 46 */
269 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
270 eeprom_offset += 2;
271 nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) +
272 nes_read16_eeprom(nesdev->regs, eeprom_offset);
273 nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size);
274
275 eeprom_offset += 2;
276 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
277 eeprom_offset += 2;
278 nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) +
279 nes_read16_eeprom(nesdev->regs, eeprom_offset);
280 nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size);
281
282 eeprom_offset += 2;
283 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
284 eeprom_offset += 2;
285 nesadapter->rx_threshold = (((u32)eeprom_data) << 16) +
286 nes_read16_eeprom(nesdev->regs, eeprom_offset);
287 nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold);
288
289 eeprom_offset += 2;
290 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
291 eeprom_offset += 2;
292 nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) +
293 nes_read16_eeprom(nesdev->regs, eeprom_offset);
294 nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n",
295 nesadapter->tcp_timer_core_clk_divisor);
296
297 eeprom_offset += 2;
298 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
299 eeprom_offset += 2;
300 nesadapter->iwarp_config = (((u32)eeprom_data) << 16) +
301 nes_read16_eeprom(nesdev->regs, eeprom_offset);
302 nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config);
303
304 eeprom_offset += 2;
305 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
306 eeprom_offset += 2;
307 nesadapter->cm_config = (((u32)eeprom_data) << 16) +
308 nes_read16_eeprom(nesdev->regs, eeprom_offset);
309 nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config);
310
311 eeprom_offset += 2;
312 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
313 eeprom_offset += 2;
314 nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) +
315 nes_read16_eeprom(nesdev->regs, eeprom_offset);
316 nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config);
317
318 eeprom_offset += 2;
319 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
320 eeprom_offset += 2;
321 nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) +
322 nes_read16_eeprom(nesdev->regs, eeprom_offset);
323 nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1);
324
325 eeprom_offset += 2;
326 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
327 eeprom_offset += 2;
328 nesadapter->wqm_wat = (((u32)eeprom_data) << 16) +
329 nes_read16_eeprom(nesdev->regs, eeprom_offset);
330 nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat);
331
332 eeprom_offset += 2;
333 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
334 eeprom_offset += 2;
335 nesadapter->core_clock = (((u32)eeprom_data) << 16) +
336 nes_read16_eeprom(nesdev->regs, eeprom_offset);
337 nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock);
338
339 if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) {
340 eeprom_offset += 2;
341 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
342 nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8;
343 nesadapter->phy_index[1] = eeprom_data & 0x00ff;
344 eeprom_offset += 2;
345 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
346 nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8;
347 nesadapter->phy_index[3] = eeprom_data & 0x00ff;
348 } else {
349 nesadapter->phy_index[0] = 4;
350 nesadapter->phy_index[1] = 5;
351 nesadapter->phy_index[2] = 6;
352 nesadapter->phy_index[3] = 7;
353 }
354 nes_debug(NES_DBG_HW, "Phy address map = 0 > %u, 1 > %u, 2 > %u, 3 > %u\n",
355 nesadapter->phy_index[0],nesadapter->phy_index[1],
356 nesadapter->phy_index[2],nesadapter->phy_index[3]);
357 }
358
359 return 0;
360}
361
362
363/**
364 * nes_read16_eeprom
365 */
366static u16 nes_read16_eeprom(void __iomem *addr, u16 offset)
367{
368 writel(NES_EEPROM_READ_REQUEST + (offset >> 1),
369 (void __iomem *)addr + NES_EEPROM_COMMAND);
370
371 do {
372 } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) &
373 NES_EEPROM_READ_REQUEST);
374
375 return readw((void __iomem *)addr + NES_EEPROM_DATA);
376}
377
378
379/**
380 * nes_write_1G_phy_reg
381 */
382void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data)
383{
384 struct nes_adapter *nesadapter = nesdev->nesadapter;
385 u32 u32temp;
386 u32 counter;
387 unsigned long flags;
388
389 spin_lock_irqsave(&nesadapter->phy_lock, flags);
390
391 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
392 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
393 for (counter = 0; counter < 100 ; counter++) {
394 udelay(30);
395 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
396 if (u32temp & 1) {
397 /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
398 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
399 break;
400 }
401 }
402 if (!(u32temp & 1))
403 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
404 u32temp);
405
406 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
407}
408
409
410/**
411 * nes_read_1G_phy_reg
412 * This routine only issues the read, the data must be read
413 * separately.
414 */
415void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data)
416{
417 struct nes_adapter *nesadapter = nesdev->nesadapter;
418 u32 u32temp;
419 u32 counter;
420 unsigned long flags;
421
422 /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n",
423 phy_addr, nesdev->mac_index); */
424 spin_lock_irqsave(&nesadapter->phy_lock, flags);
425
426 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
427 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
428 for (counter = 0; counter < 100 ; counter++) {
429 udelay(30);
430 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
431 if (u32temp & 1) {
432 /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
433 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
434 break;
435 }
436 }
437 if (!(u32temp & 1)) {
438 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
439 u32temp);
440 *data = 0xffff;
441 } else {
442 *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
443 }
444 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
445}
446
447
448/**
449 * nes_write_10G_phy_reg
450 */
Eric Schneider0e1de5d2008-04-29 13:46:54 -0700451void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg,
452 u16 data)
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800453{
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800454 u32 port_addr;
455 u32 u32temp;
456 u32 counter;
457
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800458 port_addr = phy_addr;
459
460 /* set address */
461 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
462 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
463 for (counter = 0; counter < 100 ; counter++) {
464 udelay(30);
465 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
466 if (u32temp & 1) {
467 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
468 break;
469 }
470 }
471 if (!(u32temp & 1))
472 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
473 u32temp);
474
475 /* set data */
476 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
477 0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
478 for (counter = 0; counter < 100 ; counter++) {
479 udelay(30);
480 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
481 if (u32temp & 1) {
482 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
483 break;
484 }
485 }
486 if (!(u32temp & 1))
487 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
488 u32temp);
489}
490
491
492/**
493 * nes_read_10G_phy_reg
494 * This routine only issues the read, the data must be read
495 * separately.
496 */
Eric Schneider0e1de5d2008-04-29 13:46:54 -0700497void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg)
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800498{
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800499 u32 port_addr;
500 u32 u32temp;
501 u32 counter;
502
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800503 port_addr = phy_addr;
504
505 /* set address */
506 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
507 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
508 for (counter = 0; counter < 100 ; counter++) {
509 udelay(30);
510 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
511 if (u32temp & 1) {
512 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
513 break;
514 }
515 }
516 if (!(u32temp & 1))
517 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
518 u32temp);
519
520 /* issue read */
521 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
522 0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
523 for (counter = 0; counter < 100 ; counter++) {
524 udelay(30);
525 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
526 if (u32temp & 1) {
527 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
528 break;
529 }
530 }
531 if (!(u32temp & 1))
532 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
533 u32temp);
534}
535
536
537/**
538 * nes_get_cqp_request
539 */
540struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev)
541{
542 unsigned long flags;
543 struct nes_cqp_request *cqp_request = NULL;
544
545 if (!list_empty(&nesdev->cqp_avail_reqs)) {
546 spin_lock_irqsave(&nesdev->cqp.lock, flags);
Faisal Latiff3181a12008-11-21 20:50:55 -0600547 if (!list_empty(&nesdev->cqp_avail_reqs)) {
548 cqp_request = list_entry(nesdev->cqp_avail_reqs.next,
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800549 struct nes_cqp_request, list);
Faisal Latiff3181a12008-11-21 20:50:55 -0600550 list_del_init(&cqp_request->list);
551 }
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800552 spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
Faisal Latiff3181a12008-11-21 20:50:55 -0600553 }
554 if (cqp_request == NULL) {
Don Woodba0c5d92009-09-05 20:36:37 -0700555 cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_ATOMIC);
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800556 if (cqp_request) {
557 cqp_request->dynamic = 1;
558 INIT_LIST_HEAD(&cqp_request->list);
559 }
560 }
561
562 if (cqp_request) {
563 init_waitqueue_head(&cqp_request->waitq);
564 cqp_request->waiting = 0;
565 cqp_request->request_done = 0;
566 cqp_request->callback = 0;
567 init_waitqueue_head(&cqp_request->waitq);
568 nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n",
569 cqp_request);
570 } else
571 printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n",
Harvey Harrison33718362008-04-16 21:01:10 -0700572 __func__);
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800573
574 return cqp_request;
575}
576
Roland Dreier1ff66e82008-07-14 23:48:49 -0700577void nes_free_cqp_request(struct nes_device *nesdev,
578 struct nes_cqp_request *cqp_request)
579{
580 unsigned long flags;
581
582 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
583 cqp_request,
584 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
585
586 if (cqp_request->dynamic) {
587 kfree(cqp_request);
588 } else {
589 spin_lock_irqsave(&nesdev->cqp.lock, flags);
590 list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
591 spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
592 }
593}
594
595void nes_put_cqp_request(struct nes_device *nesdev,
596 struct nes_cqp_request *cqp_request)
597{
598 if (atomic_dec_and_test(&cqp_request->refcount))
599 nes_free_cqp_request(nesdev, cqp_request);
600}
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800601
602/**
603 * nes_post_cqp_request
604 */
605void nes_post_cqp_request(struct nes_device *nesdev,
Roland Dreier8294f292008-07-14 23:48:49 -0700606 struct nes_cqp_request *cqp_request)
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800607{
608 struct nes_hw_cqp_wqe *cqp_wqe;
609 unsigned long flags;
610 u32 cqp_head;
611 u64 u64temp;
612
613 spin_lock_irqsave(&nesdev->cqp.lock, flags);
614
615 if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) &
616 (nesdev->cqp.sq_size - 1)) != 1)
617 && (list_empty(&nesdev->cqp_pending_reqs))) {
618 cqp_head = nesdev->cqp.sq_head++;
619 nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
620 cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
621 memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe));
622 barrier();
623 u64temp = (unsigned long)cqp_request;
624 set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_SCRATCH_LOW_IDX,
625 u64temp);
626 nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ,"
627 " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u,"
628 " waiting = %d, refcount = %d.\n",
629 le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
630 le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request,
631 nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size,
632 cqp_request->waiting, atomic_read(&cqp_request->refcount));
633 barrier();
Roland Dreier8294f292008-07-14 23:48:49 -0700634
635 /* Ring doorbell (1 WQEs) */
636 nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id);
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800637
638 barrier();
639 } else {
640 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X"
641 " put on the pending queue.\n",
642 cqp_request,
643 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
644 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX]));
645 list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs);
646 }
647
648 spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
649
650 return;
651}
652
653
654/**
655 * nes_arp_table
656 */
657int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action)
658{
659 struct nes_adapter *nesadapter = nesdev->nesadapter;
660 int arp_index;
661 int err = 0;
Harvey Harrison03080e52009-01-10 21:45:42 -0800662 __be32 tmp_addr;
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800663
664 for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) {
665 if (nesadapter->arp_table[arp_index].ip_addr == ip_addr)
666 break;
667 }
668
669 if (action == NES_ARP_ADD) {
670 if (arp_index != nesadapter->arp_table_size) {
671 return -1;
672 }
673
674 arp_index = 0;
675 err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps,
676 nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index);
677 if (err) {
678 nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err);
679 return err;
680 }
681 nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index);
682
683 nesadapter->arp_table[arp_index].ip_addr = ip_addr;
684 memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN);
685 return arp_index;
686 }
687
688 /* DELETE or RESOLVE */
689 if (arp_index == nesadapter->arp_table_size) {
Harvey Harrison03080e52009-01-10 21:45:42 -0800690 tmp_addr = cpu_to_be32(ip_addr);
Harvey Harrison63779432008-10-31 00:56:00 -0700691 nes_debug(NES_DBG_NETDEV, "MAC for %pI4 not in ARP table - cannot %s\n",
Harvey Harrison03080e52009-01-10 21:45:42 -0800692 &tmp_addr, action == NES_ARP_RESOLVE ? "resolve" : "delete");
Glenn Streiff3c2d7742008-02-04 20:20:45 -0800693 return -1;
694 }
695
696 if (action == NES_ARP_RESOLVE) {
697 nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index);
698 return arp_index;
699 }
700
701 if (action == NES_ARP_DELETE) {
702 nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index);
703 nesadapter->arp_table[arp_index].ip_addr = 0;
704 memset(nesadapter->arp_table[arp_index].mac_addr, 0x00, ETH_ALEN);
705 nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index);
706 return arp_index;
707 }
708
709 return -1;
710}
711
712
713/**
714 * nes_mh_fix
715 */
716void nes_mh_fix(unsigned long parm)
717{
718 unsigned long flags;
719 struct nes_device *nesdev = (struct nes_device *)parm;
720 struct nes_adapter *nesadapter = nesdev->nesadapter;
721 struct nes_vnic *nesvnic;
722 u32 used_chunks_tx;
723 u32 temp_used_chunks_tx;
724 u32 temp_last_used_chunks_tx;
725 u32 used_chunks_mask;
726 u32 mac_tx_frames_low;
727 u32 mac_tx_frames_high;
728 u32 mac_tx_pauses;
729 u32 serdes_status;
730 u32 reset_value;
731 u32 tx_control;
732 u32 tx_config;
733 u32 tx_pause_quanta;
734 u32 rx_control;
735 u32 rx_config;
736 u32 mac_exact_match;
737 u32 mpp_debug;
738 u32 i=0;
739 u32 chunks_tx_progress = 0;
740
741 spin_lock_irqsave(&nesadapter->phy_lock, flags);
742 if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) {
743 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
744 goto no_mh_work;
745 }
746 nesadapter->mac_sw_state[0] = NES_MAC_SW_MH;
747 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
748 do {
749 mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW);
750 mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH);
751 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
752 used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX);
753 nesdev->mac_pause_frames_sent += mac_tx_pauses;
754 used_chunks_mask = 0;
755 temp_used_chunks_tx = used_chunks_tx;
756 temp_last_used_chunks_tx = nesdev->last_used_chunks_tx;
757
758 if (nesdev->netdev[0]) {
759 nesvnic = netdev_priv(nesdev->netdev[0]);
760 } else {
761 break;
762 }
763
764 for (i=0; i<4; i++) {
765 used_chunks_mask <<= 8;
766 if (nesvnic->qp_nic_index[i] != 0xff) {
767 used_chunks_mask |= 0xff;
768 if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) {
769 chunks_tx_progress = 1;
770 }
771 }
772 temp_used_chunks_tx >>= 8;
773 temp_last_used_chunks_tx >>= 8;
774 }
775 if ((mac_tx_frames_low) || (mac_tx_frames_high) ||
776 (!(used_chunks_tx&used_chunks_mask)) ||
777 (!(nesdev->last_used_chunks_tx&used_chunks_mask)) ||
778 (chunks_tx_progress) ) {
779 nesdev->last_used_chunks_tx = used_chunks_tx;
780 break;
781 }
782 nesdev->last_used_chunks_tx = used_chunks_tx;
783 barrier();
784
785 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005);
786 mh_pauses_sent++;
787 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
788 if (mac_tx_pauses) {
789 nesdev->mac_pause_frames_sent += mac_tx_pauses;
790 break;
791 }
792
793 tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL);
794 tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
795 tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA);
796 rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL);
797 rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG);
798 mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM);
799 mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG);
800
801 /* one last ditch effort to avoid a false positive */
802 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
803 if (mac_tx_pauses) {
804 nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent;
805 nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n");
806 break;
807 }
808 mh_detected++;
809
810 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000);
811 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000);
812 reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
813
814 nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d);
815
816 while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
817 & 0x00000040) != 0x00000040) && (i++ < 5000)) {
818 /* mdelay(1); */
819 }
820
821 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008);
822 serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0);
823
824 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7);
825 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000);
826 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000);
827 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000);
828 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000);
829 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000);
830 if (nesadapter->OneG_Mode) {
831 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222);
832 } else {
833 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222);
834 }
835 serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0);
836 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff);
837
838 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control);
839 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
840 nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta);
841 nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control);
842 nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config);
843 nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match);
844 nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug);
845
846 } while (0);
847
848 nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE;
849no_mh_work:
850 nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5);
851 add_timer(&nesdev->nesadapter->mh_timer);
852}
853
854/**
855 * nes_clc
856 */
857void nes_clc(unsigned long parm)
858{
859 unsigned long flags;
860 struct nes_device *nesdev = (struct nes_device *)parm;
861 struct nes_adapter *nesadapter = nesdev->nesadapter;
862
863 spin_lock_irqsave(&nesadapter->phy_lock, flags);
864 nesadapter->link_interrupt_count[0] = 0;
865 nesadapter->link_interrupt_count[1] = 0;
866 nesadapter->link_interrupt_count[2] = 0;
867 nesadapter->link_interrupt_count[3] = 0;
868 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
869
870 nesadapter->lc_timer.expires = jiffies + 3600 * HZ; /* 1 hour */
871 add_timer(&nesadapter->lc_timer);
872}
873
874
875/**
876 * nes_dump_mem
877 */
878void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length)
879{
880 char xlate[] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9',
881 'a', 'b', 'c', 'd', 'e', 'f'};
882 char *ptr;
883 char hex_buf[80];
884 char ascii_buf[20];
885 int num_char;
886 int num_ascii;
887 int num_hex;
888
889 if (!(nes_debug_level & dump_debug_level)) {
890 return;
891 }
892
893 ptr = addr;
894 if (length > 0x100) {
895 nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100);
896 length = 0x100;
897 }
898 nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", ptr, length, length);
899
900 memset(ascii_buf, 0, 20);
901 memset(hex_buf, 0, 80);
902
903 num_ascii = 0;
904 num_hex = 0;
905 for (num_char = 0; num_char < length; num_char++) {
906 if (num_ascii == 8) {
907 ascii_buf[num_ascii++] = ' ';
908 hex_buf[num_hex++] = '-';
909 hex_buf[num_hex++] = ' ';
910 }
911
912 if (*ptr < 0x20 || *ptr > 0x7e)
913 ascii_buf[num_ascii++] = '.';
914 else
915 ascii_buf[num_ascii++] = *ptr;
916 hex_buf[num_hex++] = xlate[((*ptr & 0xf0) >> 4)];
917 hex_buf[num_hex++] = xlate[*ptr & 0x0f];
918 hex_buf[num_hex++] = ' ';
919 ptr++;
920
921 if (num_ascii >= 17) {
922 /* output line and reset */
923 nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf);
924 memset(ascii_buf, 0, 20);
925 memset(hex_buf, 0, 80);
926 num_ascii = 0;
927 num_hex = 0;
928 }
929 }
930
931 /* output the rest */
932 if (num_ascii) {
933 while (num_ascii < 17) {
934 if (num_ascii == 8) {
935 hex_buf[num_hex++] = ' ';
936 hex_buf[num_hex++] = ' ';
937 }
938 hex_buf[num_hex++] = ' ';
939 hex_buf[num_hex++] = ' ';
940 hex_buf[num_hex++] = ' ';
941 num_ascii++;
942 }
943
944 nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf);
945 }
946}