blob: 98f09e6e9f8c385068d831e029d73095b15a72df [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
Zhu Yib481de92007-09-25 17:54:57 -070044#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
Zhu Yib481de92007-09-25 17:54:57 -070048#include "iwl-4965.h"
49#include "iwl-helpers.h"
50
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080051#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080052u32 iwl4965_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070053#endif
54
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080055static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
56 struct iwl4965_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080057
Zhu Yib481de92007-09-25 17:54:57 -070058/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080065static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
66static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
Ben Cahill9fbab512007-11-29 11:09:47 +080067static int iwl4965_param_disable; /* def: enable radio */
68static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
69int iwl4965_param_hwcrypto; /* def: using software encryption */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080070static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
71int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +020072int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
Zhu Yib481de92007-09-25 17:54:57 -070073
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080081#ifdef CONFIG_IWL4965_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070082#define VD "d"
83#else
84#define VD
85#endif
86
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080087#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070088#define VS "s"
89#else
90#define VS
91#endif
92
Zhu Yid1283942007-11-29 11:10:16 +080093#define IWLWIFI_VERSION "1.2.22k" VD VS
Zhu Yib481de92007-09-25 17:54:57 -070094#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95#define DRV_VERSION IWLWIFI_VERSION
96
97/* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101#define IWL4965_UCODE_API "-1"
102
103MODULE_DESCRIPTION(DRV_DESCRIPTION);
104MODULE_VERSION(DRV_VERSION);
105MODULE_AUTHOR(DRV_COPYRIGHT);
106MODULE_LICENSE("GPL");
107
108__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109{
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116}
117
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800118static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -0700120{
121 int i;
122
123 for (i = 0; i < 3; i++)
124 if (priv->modes[i].mode == mode)
125 return &priv->modes[i];
126
127 return NULL;
128}
129
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800130static int iwl4965_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700131{
132 /* Single white space is for Linksys APs */
133 if (essid_len == 1 && essid[0] == ' ')
134 return 1;
135
136 /* Otherwise, if the entire essid is 0, we assume it is hidden */
137 while (essid_len) {
138 essid_len--;
139 if (essid[essid_len] != '\0')
140 return 0;
141 }
142
143 return 1;
144}
145
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800146static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700147{
148 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
149 const char *s = essid;
150 char *d = escaped;
151
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800152 if (iwl4965_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700153 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
154 return escaped;
155 }
156
157 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
158 while (essid_len--) {
159 if (*s == '\0') {
160 *d++ = '\\';
161 *d++ = '0';
162 s++;
163 } else
164 *d++ = *s++;
165 }
166 *d = '\0';
167 return escaped;
168}
169
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800170static void iwl4965_print_hex_dump(int level, void *p, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -0700171{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800172#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800173 if (!(iwl4965_debug_level & level))
Zhu Yib481de92007-09-25 17:54:57 -0700174 return;
175
176 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
177 p, len, 1);
178#endif
179}
180
181/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
182 * DMA services
183 *
184 * Theory of operation
185 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800186 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
187 * of buffer descriptors, each of which points to one or more data buffers for
188 * the device to read from or fill. Driver and device exchange status of each
189 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
190 * entries in each circular buffer, to protect against confusing empty and full
191 * queue states.
192 *
193 * The device reads or writes the data in the queues via the device's several
194 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700195 *
196 * For Tx queue, there are low mark and high mark limits. If, after queuing
197 * the packet for Tx, free space become < low mark, Tx queue stopped. When
198 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
199 * Tx queue resumed.
200 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800201 * The 4965 operates with up to 17 queues: One receive queue, one transmit
202 * queue (#4) for sending commands to the device firmware, and 15 other
203 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
Ben Cahille3851442007-11-29 11:10:07 +0800204 *
205 * See more detailed info in iwl-4965-hw.h.
Zhu Yib481de92007-09-25 17:54:57 -0700206 ***************************************************/
207
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800208static int iwl4965_queue_space(const struct iwl4965_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700209{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800210 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700211
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800212 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700213 s -= q->n_bd;
214
215 if (s <= 0)
216 s += q->n_window;
217 /* keep some reserve to not confuse empty and full situations */
218 s -= 2;
219 if (s < 0)
220 s = 0;
221 return s;
222}
223
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800224/**
225 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
226 * @index -- current index
227 * @n_bd -- total number of entries in queue (must be power of 2)
228 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800229static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700230{
231 return ++index & (n_bd - 1);
232}
233
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800234/**
235 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
236 * @index -- current index
237 * @n_bd -- total number of entries in queue (must be power of 2)
238 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800239static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700240{
241 return --index & (n_bd - 1);
242}
243
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800244static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700245{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800246 return q->write_ptr > q->read_ptr ?
247 (i >= q->read_ptr && i < q->write_ptr) :
248 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700249}
250
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800251static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700252{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800253 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700254 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800255 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700256
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800257 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700258 return index & (q->n_window - 1);
259}
260
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800261/**
262 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
263 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800264static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700265 int count, int slots_num, u32 id)
266{
267 q->n_bd = count;
268 q->n_window = slots_num;
269 q->id = id;
270
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800271 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
272 * and iwl4965_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700273 BUG_ON(!is_power_of_2(count));
274
275 /* slots_num must be power-of-two size, otherwise
276 * get_cmd_index is broken. */
277 BUG_ON(!is_power_of_2(slots_num));
278
279 q->low_mark = q->n_window / 4;
280 if (q->low_mark < 4)
281 q->low_mark = 4;
282
283 q->high_mark = q->n_window / 8;
284 if (q->high_mark < 2)
285 q->high_mark = 2;
286
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800287 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700288
289 return 0;
290}
291
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800292/**
293 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
294 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800295static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
296 struct iwl4965_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700297{
298 struct pci_dev *dev = priv->pci_dev;
299
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800300 /* Driver private data, only for Tx (not command) queues,
301 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700302 if (id != IWL_CMD_QUEUE_NUM) {
303 txq->txb = kmalloc(sizeof(txq->txb[0]) *
304 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
305 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800306 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700307 "structures failed\n");
308 goto error;
309 }
310 } else
311 txq->txb = NULL;
312
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800313 /* Circular buffer of transmit frame descriptors (TFDs),
314 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700315 txq->bd = pci_alloc_consistent(dev,
316 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
317 &txq->q.dma_addr);
318
319 if (!txq->bd) {
320 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
321 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
322 goto error;
323 }
324 txq->q.id = id;
325
326 return 0;
327
328 error:
329 if (txq->txb) {
330 kfree(txq->txb);
331 txq->txb = NULL;
332 }
333
334 return -ENOMEM;
335}
336
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800337/**
338 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
339 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800340int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
341 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700342{
343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345 int rc = 0;
346
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800347 /*
348 * Alloc buffer array for commands (Tx or other types of commands).
349 * For the command queue (#4), allocate command space + one big
350 * command for scan, since scan command is very huge; the system will
351 * not have two scans at the same time, so only one is needed.
Tomas Winklerbb542442007-12-05 20:59:59 +0200352 * For normal Tx queues (all other queues), no super-size command
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800353 * space is needed.
354 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800355 len = sizeof(struct iwl4965_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700356 if (txq_id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
359 if (!txq->cmd)
360 return -ENOMEM;
361
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800362 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800363 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700364 if (rc) {
365 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
366
367 return -ENOMEM;
368 }
369 txq->need_update = 0;
370
371 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800372 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700373 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800374
375 /* Initialize queue's high/low-water marks, and head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800376 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700377
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800378 /* Tell device where to find queue */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800379 iwl4965_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700380
381 return 0;
382}
383
384/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800385 * iwl4965_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700386 * @txq: Transmit queue to deallocate.
387 *
388 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800389 * Free all buffers.
390 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700391 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800392void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700393{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800394 struct iwl4965_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700395 struct pci_dev *dev = priv->pci_dev;
396 int len;
397
398 if (q->n_bd == 0)
399 return;
400
401 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800402 for (; q->write_ptr != q->read_ptr;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800403 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
404 iwl4965_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700405
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800406 len = sizeof(struct iwl4965_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700407 if (q->id == IWL_CMD_QUEUE_NUM)
408 len += IWL_MAX_SCAN_SIZE;
409
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800410 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700411 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
412
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800413 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700414 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800415 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700416 txq->q.n_bd, txq->bd, txq->q.dma_addr);
417
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800418 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700419 if (txq->txb) {
420 kfree(txq->txb);
421 txq->txb = NULL;
422 }
423
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800424 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700425 memset(txq, 0, sizeof(*txq));
426}
427
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800428const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700429
430/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800431 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700432 * the functionality provided here
433 */
434
435/**************************************************************/
436
Ian Schram01ebd062007-10-25 17:15:22 +0800437#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800438/**
439 * iwl4965_remove_station - Remove driver's knowledge of station.
440 *
441 * NOTE: This does not remove station from device's station table.
442 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800443static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700444{
445 int index = IWL_INVALID_STATION;
446 int i;
447 unsigned long flags;
448
449 spin_lock_irqsave(&priv->sta_lock, flags);
450
451 if (is_ap)
452 index = IWL_AP_ID;
453 else if (is_broadcast_ether_addr(addr))
454 index = priv->hw_setting.bcast_sta_id;
455 else
456 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
457 if (priv->stations[i].used &&
458 !compare_ether_addr(priv->stations[i].sta.sta.addr,
459 addr)) {
460 index = i;
461 break;
462 }
463
464 if (unlikely(index == IWL_INVALID_STATION))
465 goto out;
466
467 if (priv->stations[index].used) {
468 priv->stations[index].used = 0;
469 priv->num_stations--;
470 }
471
472 BUG_ON(priv->num_stations < 0);
473
474out:
475 spin_unlock_irqrestore(&priv->sta_lock, flags);
476 return 0;
477}
Zhu Yi556f8db2007-09-27 11:27:33 +0800478#endif
Zhu Yib481de92007-09-25 17:54:57 -0700479
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800480/**
481 * iwl4965_clear_stations_table - Clear the driver's station table
482 *
483 * NOTE: This does not clear or otherwise alter the device's station table.
484 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800485static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700486{
487 unsigned long flags;
488
489 spin_lock_irqsave(&priv->sta_lock, flags);
490
491 priv->num_stations = 0;
492 memset(priv->stations, 0, sizeof(priv->stations));
493
494 spin_unlock_irqrestore(&priv->sta_lock, flags);
495}
496
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800497/**
498 * iwl4965_add_station_flags - Add station to tables in driver and device
499 */
Ron Rindjunsky67d62032007-11-26 16:14:40 +0200500u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
501 int is_ap, u8 flags, void *ht_data)
Zhu Yib481de92007-09-25 17:54:57 -0700502{
503 int i;
504 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800505 struct iwl4965_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700506 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700507 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -0700508
509 spin_lock_irqsave(&priv->sta_lock, flags_spin);
510 if (is_ap)
511 index = IWL_AP_ID;
512 else if (is_broadcast_ether_addr(addr))
513 index = priv->hw_setting.bcast_sta_id;
514 else
515 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
516 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
517 addr)) {
518 index = i;
519 break;
520 }
521
522 if (!priv->stations[i].used &&
523 index == IWL_INVALID_STATION)
524 index = i;
525 }
526
527
Ben Cahill9fbab512007-11-29 11:09:47 +0800528 /* These two conditions have the same outcome, but keep them separate
529 since they have different meanings */
Zhu Yib481de92007-09-25 17:54:57 -0700530 if (unlikely(index == IWL_INVALID_STATION)) {
531 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
532 return index;
533 }
534
535 if (priv->stations[index].used &&
536 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
537 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
538 return index;
539 }
540
541
Joe Perches0795af52007-10-03 17:59:30 -0700542 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700543 station = &priv->stations[index];
544 station->used = 1;
545 priv->num_stations++;
546
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800547 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800548 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700549 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
550 station->sta.mode = 0;
551 station->sta.sta.sta_id = index;
552 station->sta.station_flags = 0;
553
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800554#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -0700555 /* BCAST station and IBSS stations do not work in HT mode */
556 if (index != priv->hw_setting.bcast_sta_id &&
557 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
Ron Rindjunsky67d62032007-11-26 16:14:40 +0200558 iwl4965_set_ht_add_station(priv, index,
559 (struct ieee80211_ht_info *) ht_data);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800560#endif /*CONFIG_IWL4965_HT*/
Zhu Yib481de92007-09-25 17:54:57 -0700561
562 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800563
564 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800565 iwl4965_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700566 return index;
567
568}
569
570/*************** DRIVER STATUS FUNCTIONS *****/
571
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800572static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700573{
574 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
575 * set but EXIT_PENDING is not */
576 return test_bit(STATUS_READY, &priv->status) &&
577 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
578 !test_bit(STATUS_EXIT_PENDING, &priv->status);
579}
580
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800581static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700582{
583 return test_bit(STATUS_ALIVE, &priv->status);
584}
585
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800586static inline int iwl4965_is_init(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700587{
588 return test_bit(STATUS_INIT, &priv->status);
589}
590
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800591static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700592{
593 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
594 test_bit(STATUS_RF_KILL_SW, &priv->status);
595}
596
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800597static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700598{
599
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800600 if (iwl4965_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700601 return 0;
602
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800603 return iwl4965_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700604}
605
606/*************** HOST COMMAND QUEUE FUNCTIONS *****/
607
608#define IWL_CMD(x) case x : return #x
609
610static const char *get_cmd_string(u8 cmd)
611{
612 switch (cmd) {
613 IWL_CMD(REPLY_ALIVE);
614 IWL_CMD(REPLY_ERROR);
615 IWL_CMD(REPLY_RXON);
616 IWL_CMD(REPLY_RXON_ASSOC);
617 IWL_CMD(REPLY_QOS_PARAM);
618 IWL_CMD(REPLY_RXON_TIMING);
619 IWL_CMD(REPLY_ADD_STA);
620 IWL_CMD(REPLY_REMOVE_STA);
621 IWL_CMD(REPLY_REMOVE_ALL_STA);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
653 IWL_CMD(SENSITIVITY_CMD);
654 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
655 IWL_CMD(REPLY_RX_PHY_CMD);
656 IWL_CMD(REPLY_RX_MPDU_CMD);
657 IWL_CMD(REPLY_4965_RX);
658 IWL_CMD(REPLY_COMPRESSED_BA);
659 default:
660 return "UNKNOWN";
661
662 }
663}
664
665#define HOST_COMPLETE_TIMEOUT (HZ / 2)
666
667/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800668 * iwl4965_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700669 * @priv: device private data point
670 * @cmd: a point to the ucode command structure
671 *
672 * The function returns < 0 values to indicate the operation is
673 * failed. On success, it turns the index (> 0) of command in the
674 * command queue.
675 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800676static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700677{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800678 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
679 struct iwl4965_queue *q = &txq->q;
680 struct iwl4965_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700681 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800682 struct iwl4965_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700683 u32 idx;
684 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
685 dma_addr_t phys_addr;
686 int ret;
687 unsigned long flags;
688
689 /* If any of the command structures end up being larger than
690 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
691 * we will need to increase the size of the TFD entries */
692 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
693 !(cmd->meta.flags & CMD_SIZE_HUGE));
694
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800695 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700696 IWL_ERROR("No space for Tx\n");
697 return -ENOSPC;
698 }
699
700 spin_lock_irqsave(&priv->hcmd_lock, flags);
701
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800702 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700703 memset(tfd, 0, sizeof(*tfd));
704
705 control_flags = (u32 *) tfd;
706
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800707 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700708 out_cmd = &txq->cmd[idx];
709
710 out_cmd->hdr.cmd = cmd->id;
711 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
712 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
713
714 /* At this point, the out_cmd now has all of the incoming cmd
715 * information */
716
717 out_cmd->hdr.flags = 0;
718 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800719 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700720 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
721 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
722
723 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800724 offsetof(struct iwl4965_cmd, hdr);
725 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700726
727 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
728 "%d bytes at %d[%d]:%d\n",
729 get_cmd_string(out_cmd->hdr.cmd),
730 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800731 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700732
733 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800734
735 /* Set up entry in queue's byte count circular buffer */
Zhu Yib481de92007-09-25 17:54:57 -0700736 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800737
738 /* Increment and update queue's write index */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800739 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
740 iwl4965_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700741
742 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
743 return ret ? ret : idx;
744}
745
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800746static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700747{
748 int ret;
749
750 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
751
752 /* An asynchronous command can not expect an SKB to be set. */
753 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
754
755 /* An asynchronous command MUST have a callback. */
756 BUG_ON(!cmd->meta.u.callback);
757
758 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
759 return -EBUSY;
760
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800761 ret = iwl4965_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700762 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800763 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700764 get_cmd_string(cmd->id), ret);
765 return ret;
766 }
767 return 0;
768}
769
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800770static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700771{
772 int cmd_idx;
773 int ret;
774 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
775
776 BUG_ON(cmd->meta.flags & CMD_ASYNC);
777
778 /* A synchronous command can not have a callback set. */
779 BUG_ON(cmd->meta.u.callback != NULL);
780
781 if (atomic_xchg(&entry, 1)) {
782 IWL_ERROR("Error sending %s: Already sending a host command\n",
783 get_cmd_string(cmd->id));
784 return -EBUSY;
785 }
786
787 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
788
789 if (cmd->meta.flags & CMD_WANT_SKB)
790 cmd->meta.source = &cmd->meta;
791
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800792 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700793 if (cmd_idx < 0) {
794 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800795 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700796 get_cmd_string(cmd->id), ret);
797 goto out;
798 }
799
800 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
801 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
802 HOST_COMPLETE_TIMEOUT);
803 if (!ret) {
804 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
805 IWL_ERROR("Error sending %s: time out after %dms.\n",
806 get_cmd_string(cmd->id),
807 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
808
809 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
810 ret = -ETIMEDOUT;
811 goto cancel;
812 }
813 }
814
815 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
816 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
817 get_cmd_string(cmd->id));
818 ret = -ECANCELED;
819 goto fail;
820 }
821 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
822 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
823 get_cmd_string(cmd->id));
824 ret = -EIO;
825 goto fail;
826 }
827 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
828 IWL_ERROR("Error: Response NULL in '%s'\n",
829 get_cmd_string(cmd->id));
830 ret = -EIO;
831 goto out;
832 }
833
834 ret = 0;
835 goto out;
836
837cancel:
838 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800839 struct iwl4965_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700840
841 /* Cancel the CMD_WANT_SKB flag for the cmd in the
842 * TX cmd queue. Otherwise in case the cmd comes
843 * in later, it will possibly set an invalid
844 * address (cmd->meta.source). */
845 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
846 qcmd->meta.flags &= ~CMD_WANT_SKB;
847 }
848fail:
849 if (cmd->meta.u.skb) {
850 dev_kfree_skb_any(cmd->meta.u.skb);
851 cmd->meta.u.skb = NULL;
852 }
853out:
854 atomic_set(&entry, 0);
855 return ret;
856}
857
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800858int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700859{
Zhu Yib481de92007-09-25 17:54:57 -0700860 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800861 return iwl4965_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700862
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800863 return iwl4965_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700864}
865
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800866int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700867{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800868 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700869 .id = id,
870 .len = len,
871 .data = data,
872 };
873
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800874 return iwl4965_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700875}
876
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800877static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700878{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800879 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700880 .id = id,
881 .len = sizeof(val),
882 .data = &val,
883 };
884
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800885 return iwl4965_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700886}
887
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800888int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700889{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800890 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700891}
892
893/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800894 * iwl4965_rxon_add_station - add station into station table.
Zhu Yib481de92007-09-25 17:54:57 -0700895 *
896 * there is only one AP station with id= IWL_AP_ID
Ben Cahill9fbab512007-11-29 11:09:47 +0800897 * NOTE: mutex must be held before calling this fnction
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -0700900 const u8 *addr, int is_ap)
901{
Zhu Yi556f8db2007-09-27 11:27:33 +0800902 u8 sta_id;
Zhu Yib481de92007-09-25 17:54:57 -0700903
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800904 /* Add station to device's station table */
Ron Rindjunsky67d62032007-11-26 16:14:40 +0200905#ifdef CONFIG_IWL4965_HT
906 struct ieee80211_conf *conf = &priv->hw->conf;
907 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
908
909 if ((is_ap) &&
910 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
911 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
912 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
913 0, cur_ht_config);
914 else
915#endif /* CONFIG_IWL4965_HT */
916 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
917 0, NULL);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800918
919 /* Set up default rate scaling table in device's station table */
Zhu Yib481de92007-09-25 17:54:57 -0700920 iwl4965_add_station(priv, addr, is_ap);
921
Zhu Yi556f8db2007-09-27 11:27:33 +0800922 return sta_id;
Zhu Yib481de92007-09-25 17:54:57 -0700923}
924
925/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800926 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
Zhu Yib481de92007-09-25 17:54:57 -0700927 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
928 * @channel: Any channel valid for the requested phymode
929
930 * In addition to setting the staging RXON, priv->phymode is also set.
931 *
932 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
933 * in the staging RXON flag structure based on the phymode
934 */
Ben Cahill9fbab512007-11-29 11:09:47 +0800935static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
936 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700937{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800938 if (!iwl4965_get_channel_info(priv, phymode, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700939 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
940 channel, phymode);
941 return -EINVAL;
942 }
943
944 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
945 (priv->phymode == phymode))
946 return 0;
947
948 priv->staging_rxon.channel = cpu_to_le16(channel);
949 if (phymode == MODE_IEEE80211A)
950 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
951 else
952 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
953
954 priv->phymode = phymode;
955
956 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
957
958 return 0;
959}
960
961/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800962 * iwl4965_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700963 *
964 * NOTE: This is really only useful during development and can eventually
965 * be #ifdef'd out once the driver is stable and folks aren't actively
966 * making changes
967 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800968static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700969{
970 int error = 0;
971 int counter = 1;
972
973 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
974 error |= le32_to_cpu(rxon->flags &
975 (RXON_FLG_TGJ_NARROW_BAND_MSK |
976 RXON_FLG_RADAR_DETECT_MSK));
977 if (error)
978 IWL_WARNING("check 24G fields %d | %d\n",
979 counter++, error);
980 } else {
981 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
982 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
983 if (error)
984 IWL_WARNING("check 52 fields %d | %d\n",
985 counter++, error);
986 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
987 if (error)
988 IWL_WARNING("check 52 CCK %d | %d\n",
989 counter++, error);
990 }
991 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
992 if (error)
993 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
994
995 /* make sure basic rates 6Mbps and 1Mbps are supported */
996 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
997 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
998 if (error)
999 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1000
1001 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1002 if (error)
1003 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1004
1005 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1006 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1007 if (error)
1008 IWL_WARNING("check CCK and short slot %d | %d\n",
1009 counter++, error);
1010
1011 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1012 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1013 if (error)
1014 IWL_WARNING("check CCK & auto detect %d | %d\n",
1015 counter++, error);
1016
1017 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1018 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1019 if (error)
1020 IWL_WARNING("check TGG and auto detect %d | %d\n",
1021 counter++, error);
1022
1023 if (error)
1024 IWL_WARNING("Tuning to channel %d\n",
1025 le16_to_cpu(rxon->channel));
1026
1027 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001028 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -07001029 return -1;
1030 }
1031 return 0;
1032}
1033
1034/**
Ben Cahill9fbab512007-11-29 11:09:47 +08001035 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +08001036 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -07001037 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001038 * If the RXON structure is changing enough to require a new tune,
1039 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1040 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -07001041 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001042static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001043{
1044
1045 /* These items are only settable from the full RXON command */
1046 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1047 compare_ether_addr(priv->staging_rxon.bssid_addr,
1048 priv->active_rxon.bssid_addr) ||
1049 compare_ether_addr(priv->staging_rxon.node_addr,
1050 priv->active_rxon.node_addr) ||
1051 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1052 priv->active_rxon.wlap_bssid_addr) ||
1053 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1054 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1055 (priv->staging_rxon.air_propagation !=
1056 priv->active_rxon.air_propagation) ||
1057 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1058 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1059 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1060 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1061 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1062 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1063 return 1;
1064
1065 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1066 * be updated with the RXON_ASSOC command -- however only some
1067 * flag transitions are allowed using RXON_ASSOC */
1068
1069 /* Check if we are not switching bands */
1070 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1071 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1072 return 1;
1073
1074 /* Check if we are switching association toggle */
1075 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1076 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1077 return 1;
1078
1079 return 0;
1080}
1081
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001082static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001083{
1084 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001085 struct iwl4965_rx_packet *res = NULL;
1086 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1087 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001088 .id = REPLY_RXON_ASSOC,
1089 .len = sizeof(rxon_assoc),
1090 .meta.flags = CMD_WANT_SKB,
1091 .data = &rxon_assoc,
1092 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001093 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1094 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001095
1096 if ((rxon1->flags == rxon2->flags) &&
1097 (rxon1->filter_flags == rxon2->filter_flags) &&
1098 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1099 (rxon1->ofdm_ht_single_stream_basic_rates ==
1100 rxon2->ofdm_ht_single_stream_basic_rates) &&
1101 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1102 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1103 (rxon1->rx_chain == rxon2->rx_chain) &&
1104 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1105 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1106 return 0;
1107 }
1108
1109 rxon_assoc.flags = priv->staging_rxon.flags;
1110 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1111 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1112 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1113 rxon_assoc.reserved = 0;
1114 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1115 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1116 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1117 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1118 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1119
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001120 rc = iwl4965_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001121 if (rc)
1122 return rc;
1123
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001124 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001125 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1126 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1127 rc = -EIO;
1128 }
1129
1130 priv->alloc_rxb_skb--;
1131 dev_kfree_skb_any(cmd.meta.u.skb);
1132
1133 return rc;
1134}
1135
1136/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001137 * iwl4965_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001138 *
Ian Schram01ebd062007-10-25 17:15:22 +08001139 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001140 * the active_rxon structure is updated with the new data. This
1141 * function correctly transitions out of the RXON_ASSOC_MSK state if
1142 * a HW tune is required based on the RXON structure changes.
1143 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001144static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001145{
1146 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001147 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Joe Perches0795af52007-10-03 17:59:30 -07001148 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001149 int rc = 0;
1150
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001151 if (!iwl4965_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001152 return -1;
1153
1154 /* always get timestamp with Rx frame */
1155 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1156
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001157 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001158 if (rc) {
1159 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1160 return -EINVAL;
1161 }
1162
1163 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001164 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001165 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001166 if (!iwl4965_full_rxon_required(priv)) {
1167 rc = iwl4965_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001168 if (rc) {
1169 IWL_ERROR("Error setting RXON_ASSOC "
1170 "configuration (%d).\n", rc);
1171 return rc;
1172 }
1173
1174 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1175
1176 return 0;
1177 }
1178
1179 /* station table will be cleared */
1180 priv->assoc_station_added = 0;
1181
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001182#ifdef CONFIG_IWL4965_SENSITIVITY
Zhu Yib481de92007-09-25 17:54:57 -07001183 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1184 if (!priv->error_recovering)
1185 priv->start_calib = 0;
1186
1187 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001188#endif /* CONFIG_IWL4965_SENSITIVITY */
Zhu Yib481de92007-09-25 17:54:57 -07001189
1190 /* If we are currently associated and the new config requires
1191 * an RXON_ASSOC and the new config wants the associated mask enabled,
1192 * we must clear the associated from the active configuration
1193 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001194 if (iwl4965_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001195 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1196 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1197 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1200 sizeof(struct iwl4965_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001201 &priv->active_rxon);
1202
1203 /* If the mask clearing failed then we set
1204 * active_rxon back to what it was previously */
1205 if (rc) {
1206 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1207 IWL_ERROR("Error clearing ASSOC_MSK on current "
1208 "configuration (%d).\n", rc);
1209 return rc;
1210 }
Zhu Yib481de92007-09-25 17:54:57 -07001211 }
1212
1213 IWL_DEBUG_INFO("Sending RXON\n"
1214 "* with%s RXON_FILTER_ASSOC_MSK\n"
1215 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001216 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001217 ((priv->staging_rxon.filter_flags &
1218 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1219 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001220 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001221
1222 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001223 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1224 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001225 if (rc) {
1226 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1227 return rc;
1228 }
1229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001230 iwl4965_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001231
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001232#ifdef CONFIG_IWL4965_SENSITIVITY
Zhu Yib481de92007-09-25 17:54:57 -07001233 if (!priv->error_recovering)
1234 priv->start_calib = 0;
1235
1236 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1237 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001238#endif /* CONFIG_IWL4965_SENSITIVITY */
Zhu Yib481de92007-09-25 17:54:57 -07001239
1240 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1241
1242 /* If we issue a new RXON command which required a tune then we must
1243 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001244 rc = iwl4965_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001245 if (rc) {
1246 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1247 return rc;
1248 }
1249
1250 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001251 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001252 IWL_INVALID_STATION) {
1253 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1254 return -EIO;
1255 }
1256
1257 /* If we have set the ASSOC_MSK and we are in BSS mode then
1258 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001259 if (iwl4965_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001260 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001261 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
Zhu Yib481de92007-09-25 17:54:57 -07001262 == IWL_INVALID_STATION) {
1263 IWL_ERROR("Error adding AP address for transmit.\n");
1264 return -EIO;
1265 }
1266 priv->assoc_station_added = 1;
1267 }
1268
1269 return 0;
1270}
1271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001272static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001273{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001274 struct iwl4965_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001275 .flags = 3,
1276 .lead_time = 0xAA,
1277 .max_kill = 1,
1278 .kill_ack_mask = 0,
1279 .kill_cts_mask = 0,
1280 };
1281
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001282 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1283 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001284}
1285
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001286static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001287{
1288 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001289 struct iwl4965_rx_packet *res;
1290 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001291 .id = REPLY_SCAN_ABORT_CMD,
1292 .meta.flags = CMD_WANT_SKB,
1293 };
1294
1295 /* If there isn't a scan actively going on in the hardware
1296 * then we are in between scan bands and not actually
1297 * actively scanning, so don't send the abort command */
1298 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1299 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1300 return 0;
1301 }
1302
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 rc = iwl4965_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001304 if (rc) {
1305 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1306 return rc;
1307 }
1308
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001309 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001310 if (res->u.status != CAN_ABORT_STATUS) {
1311 /* The scan abort will return 1 for success or
1312 * 2 for "failure". A failure condition can be
1313 * due to simply not being in an active scan which
1314 * can occur if we send the scan abort before we
1315 * the microcode has notified us that a scan is
1316 * completed. */
1317 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1318 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1319 clear_bit(STATUS_SCAN_HW, &priv->status);
1320 }
1321
1322 dev_kfree_skb_any(cmd.meta.u.skb);
1323
1324 return rc;
1325}
1326
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001327static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1328 struct iwl4965_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001329 struct sk_buff *skb)
1330{
1331 return 1;
1332}
1333
1334/*
1335 * CARD_STATE_CMD
1336 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001337 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001338 *
1339 * When in the 'enable' state the card operates as normal.
1340 * When in the 'disable' state, the card enters into a low power mode.
1341 * When in the 'halt' state, the card is shut down and must be fully
1342 * restarted to come back on.
1343 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001344static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001345{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001346 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001347 .id = REPLY_CARD_STATE_CMD,
1348 .len = sizeof(u32),
1349 .data = &flags,
1350 .meta.flags = meta_flag,
1351 };
1352
1353 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001354 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001355
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001356 return iwl4965_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001357}
1358
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001359static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1360 struct iwl4965_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001361{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001362 struct iwl4965_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001363
1364 if (!skb) {
1365 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1366 return 1;
1367 }
1368
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001369 res = (struct iwl4965_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001370 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1371 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1372 res->hdr.flags);
1373 return 1;
1374 }
1375
1376 switch (res->u.add_sta.status) {
1377 case ADD_STA_SUCCESS_MSK:
1378 break;
1379 default:
1380 break;
1381 }
1382
1383 /* We didn't cache the SKB; let the caller free it */
1384 return 1;
1385}
1386
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001387int iwl4965_send_add_station(struct iwl4965_priv *priv,
1388 struct iwl4965_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001389{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001390 struct iwl4965_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001391 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001392 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001393 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001394 .len = sizeof(struct iwl4965_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001395 .meta.flags = flags,
1396 .data = sta,
1397 };
1398
1399 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001400 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001401 else
1402 cmd.meta.flags |= CMD_WANT_SKB;
1403
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001404 rc = iwl4965_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001405
1406 if (rc || (flags & CMD_ASYNC))
1407 return rc;
1408
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001409 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001410 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1411 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1412 res->hdr.flags);
1413 rc = -EIO;
1414 }
1415
1416 if (rc == 0) {
1417 switch (res->u.add_sta.status) {
1418 case ADD_STA_SUCCESS_MSK:
1419 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1420 break;
1421 default:
1422 rc = -EIO;
1423 IWL_WARNING("REPLY_ADD_STA failed\n");
1424 break;
1425 }
1426 }
1427
1428 priv->alloc_rxb_skb--;
1429 dev_kfree_skb_any(cmd.meta.u.skb);
1430
1431 return rc;
1432}
1433
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001434static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001435 struct ieee80211_key_conf *keyconf,
1436 u8 sta_id)
1437{
1438 unsigned long flags;
1439 __le16 key_flags = 0;
1440
1441 switch (keyconf->alg) {
1442 case ALG_CCMP:
1443 key_flags |= STA_KEY_FLG_CCMP;
1444 key_flags |= cpu_to_le16(
1445 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1446 key_flags &= ~STA_KEY_FLG_INVALID;
1447 break;
1448 case ALG_TKIP:
1449 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001450 default:
1451 return -EINVAL;
1452 }
1453 spin_lock_irqsave(&priv->sta_lock, flags);
1454 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1455 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1456 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1457 keyconf->keylen);
1458
1459 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1460 keyconf->keylen);
1461 priv->stations[sta_id].sta.key.key_flags = key_flags;
1462 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1463 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1464
1465 spin_unlock_irqrestore(&priv->sta_lock, flags);
1466
1467 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001468 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001469 return 0;
1470}
1471
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001472static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001473{
1474 unsigned long flags;
1475
1476 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001477 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1478 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001479 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1480 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1481 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1482 spin_unlock_irqrestore(&priv->sta_lock, flags);
1483
1484 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001485 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001486 return 0;
1487}
1488
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001489static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001490{
1491 struct list_head *element;
1492
1493 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1494 priv->frames_count);
1495
1496 while (!list_empty(&priv->free_frames)) {
1497 element = priv->free_frames.next;
1498 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001499 kfree(list_entry(element, struct iwl4965_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001500 priv->frames_count--;
1501 }
1502
1503 if (priv->frames_count) {
1504 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1505 priv->frames_count);
1506 priv->frames_count = 0;
1507 }
1508}
1509
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001510static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001511{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001512 struct iwl4965_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001513 struct list_head *element;
1514 if (list_empty(&priv->free_frames)) {
1515 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1516 if (!frame) {
1517 IWL_ERROR("Could not allocate frame!\n");
1518 return NULL;
1519 }
1520
1521 priv->frames_count++;
1522 return frame;
1523 }
1524
1525 element = priv->free_frames.next;
1526 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001527 return list_entry(element, struct iwl4965_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001528}
1529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001530static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001531{
1532 memset(frame, 0, sizeof(*frame));
1533 list_add(&frame->list, &priv->free_frames);
1534}
1535
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001536unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001537 struct ieee80211_hdr *hdr,
1538 const u8 *dest, int left)
1539{
1540
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001541 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001542 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1543 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1544 return 0;
1545
1546 if (priv->ibss_beacon->len > left)
1547 return 0;
1548
1549 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1550
1551 return priv->ibss_beacon->len;
1552}
1553
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001554int iwl4965_rate_index_from_plcp(int plcp)
Zhu Yib481de92007-09-25 17:54:57 -07001555{
1556 int i = 0;
1557
Ben Cahill77626352007-11-29 11:09:44 +08001558 /* 4965 HT rate format */
Zhu Yib481de92007-09-25 17:54:57 -07001559 if (plcp & RATE_MCS_HT_MSK) {
1560 i = (plcp & 0xff);
1561
1562 if (i >= IWL_RATE_MIMO_6M_PLCP)
1563 i = i - IWL_RATE_MIMO_6M_PLCP;
1564
1565 i += IWL_FIRST_OFDM_RATE;
1566 /* skip 9M not supported in ht*/
1567 if (i >= IWL_RATE_9M_INDEX)
1568 i += 1;
1569 if ((i >= IWL_FIRST_OFDM_RATE) &&
1570 (i <= IWL_LAST_OFDM_RATE))
1571 return i;
Ben Cahill77626352007-11-29 11:09:44 +08001572
1573 /* 4965 legacy rate format, search for match in table */
Zhu Yib481de92007-09-25 17:54:57 -07001574 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001575 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1576 if (iwl4965_rates[i].plcp == (plcp &0xFF))
Zhu Yib481de92007-09-25 17:54:57 -07001577 return i;
1578 }
1579 return -1;
1580}
1581
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001582static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001583{
1584 u8 i;
1585
1586 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001587 i = iwl4965_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001588 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001589 return iwl4965_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001590 }
1591
1592 return IWL_RATE_INVALID;
1593}
1594
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001595static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001596{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001597 struct iwl4965_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001598 unsigned int frame_size;
1599 int rc;
1600 u8 rate;
1601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001602 frame = iwl4965_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001603
1604 if (!frame) {
1605 IWL_ERROR("Could not obtain free frame buffer for beacon "
1606 "command.\n");
1607 return -ENOMEM;
1608 }
1609
1610 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001611 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001612 0xFF0);
1613 if (rate == IWL_INVALID_RATE)
1614 rate = IWL_RATE_6M_PLCP;
1615 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001616 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001617 if (rate == IWL_INVALID_RATE)
1618 rate = IWL_RATE_1M_PLCP;
1619 }
1620
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001621 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001622
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001623 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001624 &frame->u.cmd[0]);
1625
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001626 iwl4965_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001627
1628 return rc;
1629}
1630
1631/******************************************************************************
1632 *
1633 * EEPROM related functions
1634 *
1635 ******************************************************************************/
1636
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001637static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001638{
1639 memcpy(mac, priv->eeprom.mac_address, 6);
1640}
1641
1642/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001643 * iwl4965_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001644 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001645 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001646 *
1647 * NOTE: This routine uses the non-debug IO access functions.
1648 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001649int iwl4965_eeprom_init(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001650{
Al Viro0e5ce1f2007-12-22 13:45:50 -05001651 __le16 *e = (__le16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001652 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001653 u32 r;
1654 int sz = sizeof(priv->eeprom);
1655 int rc;
1656 int i;
1657 u16 addr;
1658
1659 /* The EEPROM structure has several padding buffers within it
1660 * and when adding new EEPROM maps is subject to programmer errors
1661 * which may be very difficult to identify without explicitly
1662 * checking the resulting size of the eeprom map. */
1663 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1664
1665 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1666 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1667 return -ENOENT;
1668 }
1669
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001670 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001671 rc = iwl4965_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001672 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001673 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001674 return -ENOENT;
1675 }
1676
1677 /* eeprom is an array of 16bit values */
1678 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001679 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1680 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001681
1682 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1683 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001684 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001685 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1686 break;
1687 udelay(IWL_EEPROM_ACCESS_DELAY);
1688 }
1689
1690 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1691 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1692 rc = -ETIMEDOUT;
1693 goto done;
1694 }
Al Viro0e5ce1f2007-12-22 13:45:50 -05001695 e[addr / 2] = cpu_to_le16(r >> 16);
Zhu Yib481de92007-09-25 17:54:57 -07001696 }
1697 rc = 0;
1698
1699done:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001700 iwl4965_eeprom_release_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001701 return rc;
1702}
1703
1704/******************************************************************************
1705 *
1706 * Misc. internal state and helper functions
1707 *
1708 ******************************************************************************/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001709#ifdef CONFIG_IWL4965_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07001710
1711/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001712 * iwl4965_report_frame - dump frame to syslog during debug sessions
Zhu Yib481de92007-09-25 17:54:57 -07001713 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001714 * You may hack this function to show different aspects of received frames,
Zhu Yib481de92007-09-25 17:54:57 -07001715 * including selective frame dumps.
1716 * group100 parameter selects whether to show 1 out of 100 good frames.
1717 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001718 * TODO: This was originally written for 3945, need to audit for
1719 * proper operation with 4965.
Zhu Yib481de92007-09-25 17:54:57 -07001720 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001721void iwl4965_report_frame(struct iwl4965_priv *priv,
1722 struct iwl4965_rx_packet *pkt,
Zhu Yib481de92007-09-25 17:54:57 -07001723 struct ieee80211_hdr *header, int group100)
1724{
1725 u32 to_us;
1726 u32 print_summary = 0;
1727 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1728 u32 hundred = 0;
1729 u32 dataframe = 0;
1730 u16 fc;
1731 u16 seq_ctl;
1732 u16 channel;
1733 u16 phy_flags;
1734 int rate_sym;
1735 u16 length;
1736 u16 status;
1737 u16 bcn_tmr;
1738 u32 tsf_low;
1739 u64 tsf;
1740 u8 rssi;
1741 u8 agc;
1742 u16 sig_avg;
1743 u16 noise_diff;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001744 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1745 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1746 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
Zhu Yib481de92007-09-25 17:54:57 -07001747 u8 *data = IWL_RX_DATA(pkt);
1748
1749 /* MAC header */
1750 fc = le16_to_cpu(header->frame_control);
1751 seq_ctl = le16_to_cpu(header->seq_ctrl);
1752
1753 /* metadata */
1754 channel = le16_to_cpu(rx_hdr->channel);
1755 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1756 rate_sym = rx_hdr->rate;
1757 length = le16_to_cpu(rx_hdr->len);
1758
1759 /* end-of-frame status and timestamp */
1760 status = le32_to_cpu(rx_end->status);
1761 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1762 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1763 tsf = le64_to_cpu(rx_end->timestamp);
1764
1765 /* signal statistics */
1766 rssi = rx_stats->rssi;
1767 agc = rx_stats->agc;
1768 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1769 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1770
1771 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1772
1773 /* if data frame is to us and all is good,
1774 * (optionally) print summary for only 1 out of every 100 */
1775 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1776 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1777 dataframe = 1;
1778 if (!group100)
1779 print_summary = 1; /* print each frame */
1780 else if (priv->framecnt_to_us < 100) {
1781 priv->framecnt_to_us++;
1782 print_summary = 0;
1783 } else {
1784 priv->framecnt_to_us = 0;
1785 print_summary = 1;
1786 hundred = 1;
1787 }
1788 } else {
1789 /* print summary for all other frames */
1790 print_summary = 1;
1791 }
1792
1793 if (print_summary) {
1794 char *title;
1795 u32 rate;
1796
1797 if (hundred)
1798 title = "100Frames";
1799 else if (fc & IEEE80211_FCTL_RETRY)
1800 title = "Retry";
1801 else if (ieee80211_is_assoc_response(fc))
1802 title = "AscRsp";
1803 else if (ieee80211_is_reassoc_response(fc))
1804 title = "RasRsp";
1805 else if (ieee80211_is_probe_response(fc)) {
1806 title = "PrbRsp";
1807 print_dump = 1; /* dump frame contents */
1808 } else if (ieee80211_is_beacon(fc)) {
1809 title = "Beacon";
1810 print_dump = 1; /* dump frame contents */
1811 } else if (ieee80211_is_atim(fc))
1812 title = "ATIM";
1813 else if (ieee80211_is_auth(fc))
1814 title = "Auth";
1815 else if (ieee80211_is_deauth(fc))
1816 title = "DeAuth";
1817 else if (ieee80211_is_disassoc(fc))
1818 title = "DisAssoc";
1819 else
1820 title = "Frame";
1821
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001822 rate = iwl4965_rate_index_from_plcp(rate_sym);
Zhu Yib481de92007-09-25 17:54:57 -07001823 if (rate == -1)
1824 rate = 0;
1825 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001826 rate = iwl4965_rates[rate].ieee / 2;
Zhu Yib481de92007-09-25 17:54:57 -07001827
1828 /* print frame summary.
1829 * MAC addresses show just the last byte (for brevity),
1830 * but you can hack it to show more, if you'd like to. */
1831 if (dataframe)
1832 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1833 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1834 title, fc, header->addr1[5],
1835 length, rssi, channel, rate);
1836 else {
1837 /* src/dst addresses assume managed mode */
1838 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1839 "src=0x%02x, rssi=%u, tim=%lu usec, "
1840 "phy=0x%02x, chnl=%d\n",
1841 title, fc, header->addr1[5],
1842 header->addr3[5], rssi,
1843 tsf_low - priv->scan_start_tsf,
1844 phy_flags, channel);
1845 }
1846 }
1847 if (print_dump)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001848 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
Zhu Yib481de92007-09-25 17:54:57 -07001849}
1850#endif
1851
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001852static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001853{
1854 if (priv->hw_setting.shared_virt)
1855 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001856 sizeof(struct iwl4965_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001857 priv->hw_setting.shared_virt,
1858 priv->hw_setting.shared_phys);
1859}
1860
1861/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001862 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001863 *
1864 * return : set the bit for each supported rate insert in ie
1865 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001866static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001867 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001868{
1869 u16 ret_rates = 0, bit;
1870 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001871 u8 *cnt = ie;
1872 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001873
1874 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1875 if (bit & supported_rate) {
1876 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001877 rates[*cnt] = iwl4965_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001878 ((bit & basic_rate) ? 0x80 : 0x00);
1879 (*cnt)++;
1880 (*left)--;
1881 if ((*left <= 0) ||
1882 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001883 break;
1884 }
1885 }
1886
1887 return ret_rates;
1888}
1889
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001890#ifdef CONFIG_IWL4965_HT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001891void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02001892 struct ieee80211_ht_cap *ht_cap,
1893 u8 use_current_config);
Zhu Yib481de92007-09-25 17:54:57 -07001894#endif
1895
1896/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001897 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001899static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001900 struct ieee80211_mgmt *frame,
1901 int left, int is_direct)
1902{
1903 int len = 0;
1904 u8 *pos = NULL;
mabbasbee488d2007-10-25 17:15:42 +08001905 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02001906#ifdef CONFIG_IWL4965_HT
1907 struct ieee80211_hw_mode *mode;
1908#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07001909
1910 /* Make sure there is enough space for the probe request,
1911 * two mandatory IEs and the data */
1912 left -= 24;
1913 if (left < 0)
1914 return 0;
1915 len += 24;
1916
1917 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001918 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001919 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001920 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001921 frame->seq_ctrl = 0;
1922
1923 /* fill in our indirect SSID IE */
1924 /* ...next IE... */
1925
1926 left -= 2;
1927 if (left < 0)
1928 return 0;
1929 len += 2;
1930 pos = &(frame->u.probe_req.variable[0]);
1931 *pos++ = WLAN_EID_SSID;
1932 *pos++ = 0;
1933
1934 /* fill in our direct SSID IE... */
1935 if (is_direct) {
1936 /* ...next IE... */
1937 left -= 2 + priv->essid_len;
1938 if (left < 0)
1939 return 0;
1940 /* ... fill it in... */
1941 *pos++ = WLAN_EID_SSID;
1942 *pos++ = priv->essid_len;
1943 memcpy(pos, priv->essid, priv->essid_len);
1944 pos += priv->essid_len;
1945 len += 2 + priv->essid_len;
1946 }
1947
1948 /* fill in supported rate */
1949 /* ...next IE... */
1950 left -= 2;
1951 if (left < 0)
1952 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001953
Zhu Yib481de92007-09-25 17:54:57 -07001954 /* ... fill it in... */
1955 *pos++ = WLAN_EID_SUPP_RATES;
1956 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001957
mabbasbee488d2007-10-25 17:15:42 +08001958 /* exclude 60M rate */
1959 active_rates = priv->rates_mask;
1960 active_rates &= ~IWL_RATE_60M_MASK;
1961
1962 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
Zhu Yib481de92007-09-25 17:54:57 -07001963
Tomas Winklerc7c46672007-10-18 02:04:15 +02001964 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001965 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
mabbasbee488d2007-10-25 17:15:42 +08001966 active_rate_basic, &left);
Tomas Winklerc7c46672007-10-18 02:04:15 +02001967 active_rates &= ~ret_rates;
1968
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001969 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
mabbasbee488d2007-10-25 17:15:42 +08001970 active_rate_basic, &left);
Tomas Winklerc7c46672007-10-18 02:04:15 +02001971 active_rates &= ~ret_rates;
1972
Zhu Yib481de92007-09-25 17:54:57 -07001973 len += 2 + *pos;
1974 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001975 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001976 goto fill_end;
1977
1978 /* fill in supported extended rate */
1979 /* ...next IE... */
1980 left -= 2;
1981 if (left < 0)
1982 return 0;
1983 /* ... fill it in... */
1984 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1985 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001986 iwl4965_supported_rate_to_ie(pos, active_rates,
mabbasbee488d2007-10-25 17:15:42 +08001987 active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001988 if (*pos > 0)
1989 len += 2 + *pos;
1990
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001991#ifdef CONFIG_IWL4965_HT
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02001992 mode = priv->hw->conf.mode;
1993 if (mode->ht_info.ht_supported) {
Zhu Yib481de92007-09-25 17:54:57 -07001994 pos += (*pos) + 1;
1995 *pos++ = WLAN_EID_HT_CAPABILITY;
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02001996 *pos++ = sizeof(struct ieee80211_ht_cap);
1997 iwl4965_set_ht_capab(priv->hw,
1998 (struct ieee80211_ht_cap *)pos, 0);
1999 len += 2 + sizeof(struct ieee80211_ht_cap);
Zhu Yib481de92007-09-25 17:54:57 -07002000 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002001#endif /*CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07002002
2003 fill_end:
2004 return (u16)len;
2005}
2006
2007/*
2008 * QoS support
2009*/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002010#ifdef CONFIG_IWL4965_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002011static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
2012 struct iwl4965_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07002013{
2014
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002015 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2016 sizeof(struct iwl4965_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07002017}
2018
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002019static void iwl4965_reset_qos(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002020{
2021 u16 cw_min = 15;
2022 u16 cw_max = 1023;
2023 u8 aifs = 2;
2024 u8 is_legacy = 0;
2025 unsigned long flags;
2026 int i;
2027
2028 spin_lock_irqsave(&priv->lock, flags);
2029 priv->qos_data.qos_active = 0;
2030
2031 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2032 if (priv->qos_data.qos_enable)
2033 priv->qos_data.qos_active = 1;
2034 if (!(priv->active_rate & 0xfff0)) {
2035 cw_min = 31;
2036 is_legacy = 1;
2037 }
2038 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2039 if (priv->qos_data.qos_enable)
2040 priv->qos_data.qos_active = 1;
2041 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2042 cw_min = 31;
2043 is_legacy = 1;
2044 }
2045
2046 if (priv->qos_data.qos_active)
2047 aifs = 3;
2048
2049 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2050 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2051 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2052 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2053 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2054
2055 if (priv->qos_data.qos_active) {
2056 i = 1;
2057 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2058 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2059 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2060 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2061 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2062
2063 i = 2;
2064 priv->qos_data.def_qos_parm.ac[i].cw_min =
2065 cpu_to_le16((cw_min + 1) / 2 - 1);
2066 priv->qos_data.def_qos_parm.ac[i].cw_max =
2067 cpu_to_le16(cw_max);
2068 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2069 if (is_legacy)
2070 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2071 cpu_to_le16(6016);
2072 else
2073 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2074 cpu_to_le16(3008);
2075 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2076
2077 i = 3;
2078 priv->qos_data.def_qos_parm.ac[i].cw_min =
2079 cpu_to_le16((cw_min + 1) / 4 - 1);
2080 priv->qos_data.def_qos_parm.ac[i].cw_max =
2081 cpu_to_le16((cw_max + 1) / 2 - 1);
2082 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2083 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2084 if (is_legacy)
2085 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2086 cpu_to_le16(3264);
2087 else
2088 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2089 cpu_to_le16(1504);
2090 } else {
2091 for (i = 1; i < 4; i++) {
2092 priv->qos_data.def_qos_parm.ac[i].cw_min =
2093 cpu_to_le16(cw_min);
2094 priv->qos_data.def_qos_parm.ac[i].cw_max =
2095 cpu_to_le16(cw_max);
2096 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2097 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2098 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2099 }
2100 }
2101 IWL_DEBUG_QOS("set QoS to default \n");
2102
2103 spin_unlock_irqrestore(&priv->lock, flags);
2104}
2105
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002106static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07002107{
2108 unsigned long flags;
2109
Zhu Yib481de92007-09-25 17:54:57 -07002110 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2111 return;
2112
2113 if (!priv->qos_data.qos_enable)
2114 return;
2115
2116 spin_lock_irqsave(&priv->lock, flags);
2117 priv->qos_data.def_qos_parm.qos_flags = 0;
2118
2119 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2120 !priv->qos_data.qos_cap.q_AP.txop_request)
2121 priv->qos_data.def_qos_parm.qos_flags |=
2122 QOS_PARAM_FLG_TXOP_TYPE_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07002123 if (priv->qos_data.qos_active)
2124 priv->qos_data.def_qos_parm.qos_flags |=
2125 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2126
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002127#ifdef CONFIG_IWL4965_HT
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02002128 if (priv->current_ht_config.is_ht)
Tomas Winklerf1f1f5c2007-10-25 17:15:26 +08002129 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002130#endif /* CONFIG_IWL4965_HT */
Tomas Winklerf1f1f5c2007-10-25 17:15:26 +08002131
Zhu Yib481de92007-09-25 17:54:57 -07002132 spin_unlock_irqrestore(&priv->lock, flags);
2133
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002134 if (force || iwl4965_is_associated(priv)) {
Tomas Winklerf1f1f5c2007-10-25 17:15:26 +08002135 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2136 priv->qos_data.qos_active,
2137 priv->qos_data.def_qos_parm.qos_flags);
Zhu Yib481de92007-09-25 17:54:57 -07002138
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002139 iwl4965_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002140 &(priv->qos_data.def_qos_parm));
2141 }
2142}
2143
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002144#endif /* CONFIG_IWL4965_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07002145/*
2146 * Power management (not Tx power!) functions
2147 */
2148#define MSEC_TO_USEC 1024
2149
2150#define NOSLP __constant_cpu_to_le16(0), 0, 0
2151#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2152#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2153#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2154 __constant_cpu_to_le32(X1), \
2155 __constant_cpu_to_le32(X2), \
2156 __constant_cpu_to_le32(X3), \
2157 __constant_cpu_to_le32(X4)}
2158
2159
2160/* default power management (not Tx power) table values */
2161/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002162static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002163 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2164 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2165 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2166 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2167 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2168 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2169};
2170
2171/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002172static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002173 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2174 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2175 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2176 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2177 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2178 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2179 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2180 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2181 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2182 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2183};
2184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002185int iwl4965_power_init_handle(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002186{
2187 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002188 struct iwl4965_power_mgr *pow_data;
2189 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07002190 u16 pci_pm;
2191
2192 IWL_DEBUG_POWER("Initialize power \n");
2193
2194 pow_data = &(priv->power_data);
2195
2196 memset(pow_data, 0, sizeof(*pow_data));
2197
2198 pow_data->active_index = IWL_POWER_RANGE_0;
2199 pow_data->dtim_val = 0xffff;
2200
2201 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2202 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2203
2204 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2205 if (rc != 0)
2206 return 0;
2207 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002208 struct iwl4965_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002209
2210 IWL_DEBUG_POWER("adjust power command flags\n");
2211
2212 for (i = 0; i < IWL_POWER_AC; i++) {
2213 cmd = &pow_data->pwr_range_0[i].cmd;
2214
2215 if (pci_pm & 0x1)
2216 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2217 else
2218 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2219 }
2220 }
2221 return rc;
2222}
2223
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002224static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2225 struct iwl4965_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002226{
2227 int rc = 0, i;
2228 u8 skip;
2229 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002230 struct iwl4965_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07002231 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002232 struct iwl4965_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07002233
2234 if (mode > IWL_POWER_INDEX_5) {
2235 IWL_DEBUG_POWER("Error invalid power mode \n");
2236 return -1;
2237 }
2238 pow_data = &(priv->power_data);
2239
2240 if (pow_data->active_index == IWL_POWER_RANGE_0)
2241 range = &pow_data->pwr_range_0[0];
2242 else
2243 range = &pow_data->pwr_range_1[1];
2244
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002245 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07002246
2247#ifdef IWL_MAC80211_DISABLE
2248 if (priv->assoc_network != NULL) {
2249 unsigned long flags;
2250
2251 period = priv->assoc_network->tim.tim_period;
2252 }
2253#endif /*IWL_MAC80211_DISABLE */
2254 skip = range[mode].no_dtim;
2255
2256 if (period == 0) {
2257 period = 1;
2258 skip = 0;
2259 }
2260
2261 if (skip == 0) {
2262 max_sleep = period;
2263 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2264 } else {
2265 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2266 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2267 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2268 }
2269
2270 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2271 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2272 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2273 }
2274
2275 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2276 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2277 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2278 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2279 le32_to_cpu(cmd->sleep_interval[0]),
2280 le32_to_cpu(cmd->sleep_interval[1]),
2281 le32_to_cpu(cmd->sleep_interval[2]),
2282 le32_to_cpu(cmd->sleep_interval[3]),
2283 le32_to_cpu(cmd->sleep_interval[4]));
2284
2285 return rc;
2286}
2287
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002288static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002289{
John W. Linville9a62f732007-11-15 16:27:36 -05002290 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002291 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002292 struct iwl4965_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002293
2294 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002295 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002296 * else user level */
2297 switch (mode) {
2298 case IWL_POWER_BATTERY:
2299 final_mode = IWL_POWER_INDEX_3;
2300 break;
2301 case IWL_POWER_AC:
2302 final_mode = IWL_POWER_MODE_CAM;
2303 break;
2304 default:
2305 final_mode = mode;
2306 break;
2307 }
2308
2309 cmd.keep_alive_beacons = 0;
2310
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002311 iwl4965_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002312
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002313 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002314
2315 if (final_mode == IWL_POWER_MODE_CAM)
2316 clear_bit(STATUS_POWER_PMI, &priv->status);
2317 else
2318 set_bit(STATUS_POWER_PMI, &priv->status);
2319
2320 return rc;
2321}
2322
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002323int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002324{
2325 /* Filter incoming packets to determine if they are targeted toward
2326 * this network, discarding packets coming from ourselves */
2327 switch (priv->iw_mode) {
2328 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2329 /* packets from our adapter are dropped (echo) */
2330 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2331 return 0;
2332 /* {broad,multi}cast packets to our IBSS go through */
2333 if (is_multicast_ether_addr(header->addr1))
2334 return !compare_ether_addr(header->addr3, priv->bssid);
2335 /* packets to our adapter go through */
2336 return !compare_ether_addr(header->addr1, priv->mac_addr);
2337 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2338 /* packets from our adapter are dropped (echo) */
2339 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2340 return 0;
2341 /* {broad,multi}cast packets to our BSS go through */
2342 if (is_multicast_ether_addr(header->addr1))
2343 return !compare_ether_addr(header->addr2, priv->bssid);
2344 /* packets to our adapter go through */
2345 return !compare_ether_addr(header->addr1, priv->mac_addr);
2346 }
2347
2348 return 1;
2349}
2350
2351#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2352
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002353static const char *iwl4965_get_tx_fail_reason(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07002354{
2355 switch (status & TX_STATUS_MSK) {
2356 case TX_STATUS_SUCCESS:
2357 return "SUCCESS";
2358 TX_STATUS_ENTRY(SHORT_LIMIT);
2359 TX_STATUS_ENTRY(LONG_LIMIT);
2360 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2361 TX_STATUS_ENTRY(MGMNT_ABORT);
2362 TX_STATUS_ENTRY(NEXT_FRAG);
2363 TX_STATUS_ENTRY(LIFE_EXPIRE);
2364 TX_STATUS_ENTRY(DEST_PS);
2365 TX_STATUS_ENTRY(ABORTED);
2366 TX_STATUS_ENTRY(BT_RETRY);
2367 TX_STATUS_ENTRY(STA_INVALID);
2368 TX_STATUS_ENTRY(FRAG_DROPPED);
2369 TX_STATUS_ENTRY(TID_DISABLE);
2370 TX_STATUS_ENTRY(FRAME_FLUSHED);
2371 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2372 TX_STATUS_ENTRY(TX_LOCKED);
2373 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2374 }
2375
2376 return "UNKNOWN";
2377}
2378
2379/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002380 * iwl4965_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002381 *
2382 * NOTE: priv->mutex is not required before calling this function
2383 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002384static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002385{
2386 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2387 clear_bit(STATUS_SCANNING, &priv->status);
2388 return 0;
2389 }
2390
2391 if (test_bit(STATUS_SCANNING, &priv->status)) {
2392 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2393 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2394 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2395 queue_work(priv->workqueue, &priv->abort_scan);
2396
2397 } else
2398 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2399
2400 return test_bit(STATUS_SCANNING, &priv->status);
2401 }
2402
2403 return 0;
2404}
2405
2406/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002407 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002408 * @ms: amount of time to wait (in milliseconds) for scan to abort
2409 *
2410 * NOTE: priv->mutex must be held before calling this function
2411 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002412static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002413{
2414 unsigned long now = jiffies;
2415 int ret;
2416
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002417 ret = iwl4965_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002418 if (ret && ms) {
2419 mutex_unlock(&priv->mutex);
2420 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2421 test_bit(STATUS_SCANNING, &priv->status))
2422 msleep(1);
2423 mutex_lock(&priv->mutex);
2424
2425 return test_bit(STATUS_SCANNING, &priv->status);
2426 }
2427
2428 return ret;
2429}
2430
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002431static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002432{
2433 /* Reset ieee stats */
2434
2435 /* We don't reset the net_device_stats (ieee->stats) on
2436 * re-association */
2437
2438 priv->last_seq_num = -1;
2439 priv->last_frag_num = -1;
2440 priv->last_packet_time = 0;
2441
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002442 iwl4965_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002443}
2444
2445#define MAX_UCODE_BEACON_INTERVAL 4096
2446#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2447
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002448static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002449{
2450 u16 new_val = 0;
2451 u16 beacon_factor = 0;
2452
2453 beacon_factor =
2454 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2455 / MAX_UCODE_BEACON_INTERVAL;
2456 new_val = beacon_val / beacon_factor;
2457
2458 return cpu_to_le16(new_val);
2459}
2460
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002461static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002462{
2463 u64 interval_tm_unit;
2464 u64 tsf, result;
2465 unsigned long flags;
2466 struct ieee80211_conf *conf = NULL;
2467 u16 beacon_int = 0;
2468
2469 conf = ieee80211_get_hw_conf(priv->hw);
2470
2471 spin_lock_irqsave(&priv->lock, flags);
2472 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2473 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2474
2475 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2476
2477 tsf = priv->timestamp1;
2478 tsf = ((tsf << 32) | priv->timestamp0);
2479
2480 beacon_int = priv->beacon_int;
2481 spin_unlock_irqrestore(&priv->lock, flags);
2482
2483 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2484 if (beacon_int == 0) {
2485 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2486 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2487 } else {
2488 priv->rxon_timing.beacon_interval =
2489 cpu_to_le16(beacon_int);
2490 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002491 iwl4965_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002492 le16_to_cpu(priv->rxon_timing.beacon_interval));
2493 }
2494
2495 priv->rxon_timing.atim_window = 0;
2496 } else {
2497 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002498 iwl4965_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002499 /* TODO: we need to get atim_window from upper stack
2500 * for now we set to 0 */
2501 priv->rxon_timing.atim_window = 0;
2502 }
2503
2504 interval_tm_unit =
2505 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2506 result = do_div(tsf, interval_tm_unit);
2507 priv->rxon_timing.beacon_init_val =
2508 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2509
2510 IWL_DEBUG_ASSOC
2511 ("beacon interval %d beacon timer %d beacon tim %d\n",
2512 le16_to_cpu(priv->rxon_timing.beacon_interval),
2513 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2514 le16_to_cpu(priv->rxon_timing.atim_window));
2515}
2516
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002517static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002518{
2519 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2520 IWL_ERROR("APs don't scan.\n");
2521 return 0;
2522 }
2523
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002524 if (!iwl4965_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002525 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2526 return -EIO;
2527 }
2528
2529 if (test_bit(STATUS_SCANNING, &priv->status)) {
2530 IWL_DEBUG_SCAN("Scan already in progress.\n");
2531 return -EAGAIN;
2532 }
2533
2534 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2535 IWL_DEBUG_SCAN("Scan request while abort pending. "
2536 "Queuing.\n");
2537 return -EAGAIN;
2538 }
2539
2540 IWL_DEBUG_INFO("Starting scan...\n");
2541 priv->scan_bands = 2;
2542 set_bit(STATUS_SCANNING, &priv->status);
2543 priv->scan_start = jiffies;
2544 priv->scan_pass_start = priv->scan_start;
2545
2546 queue_work(priv->workqueue, &priv->request_scan);
2547
2548 return 0;
2549}
2550
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002551static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002552{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002554
2555 if (hw_decrypt)
2556 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2557 else
2558 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2559
2560 return 0;
2561}
2562
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002563static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
Zhu Yib481de92007-09-25 17:54:57 -07002564{
2565 if (phymode == MODE_IEEE80211A) {
2566 priv->staging_rxon.flags &=
2567 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2568 | RXON_FLG_CCK_MSK);
2569 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2570 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002571 /* Copied from iwl4965_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002572 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2573 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2574 else
2575 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2576
2577 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2578 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2579
2580 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2581 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2582 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2583 }
2584}
2585
2586/*
Ian Schram01ebd062007-10-25 17:15:22 +08002587 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002588 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002589static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002590{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002591 const struct iwl4965_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002592
2593 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2594
2595 switch (priv->iw_mode) {
2596 case IEEE80211_IF_TYPE_AP:
2597 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2598 break;
2599
2600 case IEEE80211_IF_TYPE_STA:
2601 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2602 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2603 break;
2604
2605 case IEEE80211_IF_TYPE_IBSS:
2606 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2607 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2608 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2609 RXON_FILTER_ACCEPT_GRP_MSK;
2610 break;
2611
2612 case IEEE80211_IF_TYPE_MNTR:
2613 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2614 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2615 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2616 break;
2617 }
2618
2619#if 0
2620 /* TODO: Figure out when short_preamble would be set and cache from
2621 * that */
2622 if (!hw_to_local(priv->hw)->short_preamble)
2623 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2624 else
2625 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2626#endif
2627
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002628 ch_info = iwl4965_get_channel_info(priv, priv->phymode,
Zhu Yib481de92007-09-25 17:54:57 -07002629 le16_to_cpu(priv->staging_rxon.channel));
2630
2631 if (!ch_info)
2632 ch_info = &priv->channel_info[0];
2633
2634 /*
2635 * in some case A channels are all non IBSS
2636 * in this case force B/G channel
2637 */
2638 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2639 !(is_channel_ibss(ch_info)))
2640 ch_info = &priv->channel_info[0];
2641
2642 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2643 if (is_channel_a_band(ch_info))
2644 priv->phymode = MODE_IEEE80211A;
2645 else
2646 priv->phymode = MODE_IEEE80211G;
2647
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002648 iwl4965_set_flags_for_phymode(priv, priv->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07002649
2650 priv->staging_rxon.ofdm_basic_rates =
2651 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2652 priv->staging_rxon.cck_basic_rates =
2653 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2654
2655 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2656 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2657 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2658 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2659 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2660 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2661 iwl4965_set_rxon_chain(priv);
2662}
2663
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002664static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002665{
Zhu Yib481de92007-09-25 17:54:57 -07002666 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002667 const struct iwl4965_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002668
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002669 ch_info = iwl4965_get_channel_info(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002670 priv->phymode,
2671 le16_to_cpu(priv->staging_rxon.channel));
2672
2673 if (!ch_info || !is_channel_ibss(ch_info)) {
2674 IWL_ERROR("channel %d not IBSS channel\n",
2675 le16_to_cpu(priv->staging_rxon.channel));
2676 return -EINVAL;
2677 }
2678 }
2679
Zhu Yib481de92007-09-25 17:54:57 -07002680 priv->iw_mode = mode;
2681
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002682 iwl4965_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002683 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2684
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002685 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002686
Mohamed Abbasfde35712007-11-29 11:10:15 +08002687 /* dont commit rxon if rf-kill is on*/
2688 if (!iwl4965_is_ready_rf(priv))
2689 return -EAGAIN;
2690
2691 cancel_delayed_work(&priv->scan_check);
2692 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2693 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2694 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2695 return -EAGAIN;
2696 }
2697
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002698 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002699
2700 return 0;
2701}
2702
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002703static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002704 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002705 struct iwl4965_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002706 struct sk_buff *skb_frag,
2707 int last_frag)
2708{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002709 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002710
2711 switch (keyinfo->alg) {
2712 case ALG_CCMP:
2713 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2714 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2715 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2716 break;
2717
2718 case ALG_TKIP:
2719#if 0
2720 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2721
2722 if (last_frag)
2723 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2724 8);
2725 else
2726 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2727#endif
2728 break;
2729
2730 case ALG_WEP:
2731 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2732 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2733
2734 if (keyinfo->keylen == 13)
2735 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2736
2737 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2738
2739 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2740 "with key %d\n", ctl->key_idx);
2741 break;
2742
Zhu Yib481de92007-09-25 17:54:57 -07002743 default:
2744 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2745 break;
2746 }
2747}
2748
2749/*
2750 * handle build REPLY_TX command notification.
2751 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002752static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2753 struct iwl4965_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002754 struct ieee80211_tx_control *ctrl,
2755 struct ieee80211_hdr *hdr,
2756 int is_unicast, u8 std_id)
2757{
2758 __le16 *qc;
2759 u16 fc = le16_to_cpu(hdr->frame_control);
2760 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2761
2762 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2763 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2764 tx_flags |= TX_CMD_FLG_ACK_MSK;
2765 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2766 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2767 if (ieee80211_is_probe_response(fc) &&
2768 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2769 tx_flags |= TX_CMD_FLG_TSF_MSK;
2770 } else {
2771 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2772 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2773 }
2774
Tomas Winkler87e4f7d2008-01-14 17:46:16 -08002775 if (ieee80211_is_back_request(fc))
2776 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2777
2778
Zhu Yib481de92007-09-25 17:54:57 -07002779 cmd->cmd.tx.sta_id = std_id;
2780 if (ieee80211_get_morefrag(hdr))
2781 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2782
2783 qc = ieee80211_get_qos_ctrl(hdr);
2784 if (qc) {
2785 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2786 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2787 } else
2788 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2789
2790 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2791 tx_flags |= TX_CMD_FLG_RTS_MSK;
2792 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2793 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2794 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2795 tx_flags |= TX_CMD_FLG_CTS_MSK;
2796 }
2797
2798 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2799 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2800
2801 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2802 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2803 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2804 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002805 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002806 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002807 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002808 } else
2809 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2810
2811 cmd->cmd.tx.driver_txop = 0;
2812 cmd->cmd.tx.tx_flags = tx_flags;
2813 cmd->cmd.tx.next_frame_len = 0;
2814}
2815
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002816/**
2817 * iwl4965_get_sta_id - Find station's index within station table
2818 *
2819 * If new IBSS station, create new entry in station table
2820 */
Ben Cahill9fbab512007-11-29 11:09:47 +08002821static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2822 struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002823{
2824 int sta_id;
2825 u16 fc = le16_to_cpu(hdr->frame_control);
Joe Perches0795af52007-10-03 17:59:30 -07002826 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07002827
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002828 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002829 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2830 is_multicast_ether_addr(hdr->addr1))
2831 return priv->hw_setting.bcast_sta_id;
2832
2833 switch (priv->iw_mode) {
2834
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002835 /* If we are a client station in a BSS network, use the special
2836 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002837 case IEEE80211_IF_TYPE_STA:
2838 return IWL_AP_ID;
2839
2840 /* If we are an AP, then find the station, or use BCAST */
2841 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002842 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002843 if (sta_id != IWL_INVALID_STATION)
2844 return sta_id;
2845 return priv->hw_setting.bcast_sta_id;
2846
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002847 /* If this frame is going out to an IBSS network, find the station,
2848 * or create a new station table entry */
Zhu Yib481de92007-09-25 17:54:57 -07002849 case IEEE80211_IF_TYPE_IBSS:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002850 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002851 if (sta_id != IWL_INVALID_STATION)
2852 return sta_id;
2853
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002854 /* Create new station table entry */
Ron Rindjunsky67d62032007-11-26 16:14:40 +02002855 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2856 0, CMD_ASYNC, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07002857
2858 if (sta_id != IWL_INVALID_STATION)
2859 return sta_id;
2860
Joe Perches0795af52007-10-03 17:59:30 -07002861 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002862 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002863 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002864 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002865 return priv->hw_setting.bcast_sta_id;
2866
2867 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002868 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002869 return priv->hw_setting.bcast_sta_id;
2870 }
2871}
2872
2873/*
2874 * start REPLY_TX command process
2875 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002876static int iwl4965_tx_skb(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002877 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2878{
2879 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002880 struct iwl4965_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002881 u32 *control_flags;
2882 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002883 struct iwl4965_tx_queue *txq = NULL;
2884 struct iwl4965_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002885 dma_addr_t phys_addr;
2886 dma_addr_t txcmd_phys;
Tomas Winkler87e4f7d2008-01-14 17:46:16 -08002887 dma_addr_t scratch_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002888 struct iwl4965_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002889 u16 len, idx, len_org;
2890 u8 id, hdr_len, unicast;
2891 u8 sta_id;
2892 u16 seq_number = 0;
2893 u16 fc;
2894 __le16 *qc;
2895 u8 wait_write_ptr = 0;
2896 unsigned long flags;
2897 int rc;
2898
2899 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002900 if (iwl4965_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002901 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2902 goto drop_unlock;
2903 }
2904
Johannes Berg32bfd352007-12-19 01:31:26 +01002905 if (!priv->vif) {
2906 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002907 goto drop_unlock;
2908 }
2909
2910 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2911 IWL_ERROR("ERROR: No TX rate available.\n");
2912 goto drop_unlock;
2913 }
2914
2915 unicast = !is_multicast_ether_addr(hdr->addr1);
2916 id = 0;
2917
2918 fc = le16_to_cpu(hdr->frame_control);
2919
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002920#ifdef CONFIG_IWL4965_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002921 if (ieee80211_is_auth(fc))
2922 IWL_DEBUG_TX("Sending AUTH frame\n");
2923 else if (ieee80211_is_assoc_request(fc))
2924 IWL_DEBUG_TX("Sending ASSOC frame\n");
2925 else if (ieee80211_is_reassoc_request(fc))
2926 IWL_DEBUG_TX("Sending REASSOC frame\n");
2927#endif
2928
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002929 /* drop all data frame if we are not associated */
2930 if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
Zhu Yib481de92007-09-25 17:54:57 -07002931 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002932 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002933 goto drop_unlock;
2934 }
2935
2936 spin_unlock_irqrestore(&priv->lock, flags);
2937
2938 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002939
2940 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002941 sta_id = iwl4965_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002942 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002943 DECLARE_MAC_BUF(mac);
2944
2945 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2946 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002947 goto drop;
2948 }
2949
2950 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2951
2952 qc = ieee80211_get_qos_ctrl(hdr);
2953 if (qc) {
2954 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2955 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2956 IEEE80211_SCTL_SEQ;
2957 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2958 (hdr->seq_ctrl &
2959 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2960 seq_number += 0x10;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002961#ifdef CONFIG_IWL4965_HT
2962#ifdef CONFIG_IWL4965_HT_AGG
Zhu Yib481de92007-09-25 17:54:57 -07002963 /* aggregation is on for this <sta,tid> */
2964 if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
2965 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002966#endif /* CONFIG_IWL4965_HT_AGG */
2967#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07002968 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002969
2970 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002971 txq = &priv->txq[txq_id];
2972 q = &txq->q;
2973
2974 spin_lock_irqsave(&priv->lock, flags);
2975
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002976 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002977 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002978 memset(tfd, 0, sizeof(*tfd));
2979 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002980 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002981
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002982 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002983 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002984 txq->txb[q->write_ptr].skb[0] = skb;
2985 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002986 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002987
2988 /* Set up first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002989 out_cmd = &txq->cmd[idx];
2990 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2991 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002992
2993 /*
2994 * Set up the Tx-command (not MAC!) header.
2995 * Store the chosen Tx queue and TFD index within the sequence field;
2996 * after Tx, uCode's Tx response will return this value so driver can
2997 * locate the frame within the tx queue and do post-tx processing.
2998 */
Zhu Yib481de92007-09-25 17:54:57 -07002999 out_cmd->hdr.cmd = REPLY_TX;
3000 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003001 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003002
3003 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07003004 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
3005
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003006 /*
3007 * Use the first empty entry in this queue's command buffer array
3008 * to contain the Tx command and MAC header concatenated together
3009 * (payload data will be in another buffer).
3010 * Size of this varies, due to varying MAC header length.
3011 * If end is not dword aligned, we'll have 2 extra bytes at the end
3012 * of the MAC header (device reads on dword boundaries).
3013 * We'll tell device about this padding later.
3014 */
Zhu Yib481de92007-09-25 17:54:57 -07003015 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003016 sizeof(struct iwl4965_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07003017
3018 len_org = len;
3019 len = (len + 3) & ~3;
3020
3021 if (len_org != len)
3022 len_org = 1;
3023 else
3024 len_org = 0;
3025
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003026 /* Physical address of this Tx command's header (not MAC header!),
3027 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003028 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3029 offsetof(struct iwl4965_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07003030
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003031 /* Add buffer containing Tx command and MAC(!) header to TFD's
3032 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003033 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07003034
3035 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003036 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003037
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003038 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3039 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07003040 len = skb->len - hdr_len;
3041 if (len) {
3042 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3043 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003044 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07003045 }
3046
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003047 /* Tell 4965 about any 2-byte padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07003048 if (len_org)
3049 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3050
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003051 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07003052 len = (u16)skb->len;
3053 out_cmd->cmd.tx.len = cpu_to_le16(len);
3054
3055 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003056 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07003057
3058 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003059 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003060
Tomas Winkler87e4f7d2008-01-14 17:46:16 -08003061 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
3062 offsetof(struct iwl4965_tx_cmd, scratch);
3063 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
3064 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
3065
3066#ifdef CONFIG_IWL4965_HT_AGG
3067#ifdef CONFIG_IWL4965_HT
3068 /* TODO: move this functionality to rate scaling */
3069 iwl4965_tl_get_stats(priv, hdr);
3070#endif /* CONFIG_IWL4965_HT_AGG */
3071#endif /*CONFIG_IWL4965_HT */
3072
Zhu Yib481de92007-09-25 17:54:57 -07003073
3074 if (!ieee80211_get_morefrag(hdr)) {
3075 txq->need_update = 1;
3076 if (qc) {
3077 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3078 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3079 }
3080 } else {
3081 wait_write_ptr = 1;
3082 txq->need_update = 0;
3083 }
3084
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003085 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07003086 sizeof(out_cmd->cmd.tx));
3087
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003088 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07003089 ieee80211_get_hdrlen(fc));
3090
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003091 /* Set up entry for this TFD in Tx byte-count array */
Zhu Yib481de92007-09-25 17:54:57 -07003092 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3093
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003094 /* Tell device the write index *just past* this latest filled TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003095 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3096 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003097 spin_unlock_irqrestore(&priv->lock, flags);
3098
3099 if (rc)
3100 return rc;
3101
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003102 if ((iwl4965_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07003103 && priv->mac80211_registered) {
3104 if (wait_write_ptr) {
3105 spin_lock_irqsave(&priv->lock, flags);
3106 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003107 iwl4965_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003108 spin_unlock_irqrestore(&priv->lock, flags);
3109 }
3110
3111 ieee80211_stop_queue(priv->hw, ctl->queue);
3112 }
3113
3114 return 0;
3115
3116drop_unlock:
3117 spin_unlock_irqrestore(&priv->lock, flags);
3118drop:
3119 return -1;
3120}
3121
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003122static void iwl4965_set_rate(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003123{
3124 const struct ieee80211_hw_mode *hw = NULL;
3125 struct ieee80211_rate *rate;
3126 int i;
3127
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003128 hw = iwl4965_get_hw_mode(priv, priv->phymode);
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08003129 if (!hw) {
3130 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3131 return;
3132 }
Zhu Yib481de92007-09-25 17:54:57 -07003133
3134 priv->active_rate = 0;
3135 priv->active_rate_basic = 0;
3136
3137 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3138 hw->mode == MODE_IEEE80211A ?
3139 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3140
3141 for (i = 0; i < hw->num_rates; i++) {
3142 rate = &(hw->rates[i]);
3143 if ((rate->val < IWL_RATE_COUNT) &&
3144 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3145 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003146 rate->val, iwl4965_rates[rate->val].plcp,
Zhu Yib481de92007-09-25 17:54:57 -07003147 (rate->flags & IEEE80211_RATE_BASIC) ?
3148 "*" : "");
3149 priv->active_rate |= (1 << rate->val);
3150 if (rate->flags & IEEE80211_RATE_BASIC)
3151 priv->active_rate_basic |= (1 << rate->val);
3152 } else
3153 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003154 rate->val, iwl4965_rates[rate->val].plcp);
Zhu Yib481de92007-09-25 17:54:57 -07003155 }
3156
3157 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3158 priv->active_rate, priv->active_rate_basic);
3159
3160 /*
3161 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3162 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3163 * OFDM
3164 */
3165 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3166 priv->staging_rxon.cck_basic_rates =
3167 ((priv->active_rate_basic &
3168 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3169 else
3170 priv->staging_rxon.cck_basic_rates =
3171 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3172
3173 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3174 priv->staging_rxon.ofdm_basic_rates =
3175 ((priv->active_rate_basic &
3176 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3177 IWL_FIRST_OFDM_RATE) & 0xFF;
3178 else
3179 priv->staging_rxon.ofdm_basic_rates =
3180 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3181}
3182
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003183static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07003184{
3185 unsigned long flags;
3186
3187 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3188 return;
3189
3190 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3191 disable_radio ? "OFF" : "ON");
3192
3193 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003194 iwl4965_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003195 /* FIXME: This is a workaround for AP */
3196 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3197 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003198 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003199 CSR_UCODE_SW_BIT_RFKILL);
3200 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003201 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003202 set_bit(STATUS_RF_KILL_SW, &priv->status);
3203 }
3204 return;
3205 }
3206
3207 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003208 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07003209
3210 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3211 spin_unlock_irqrestore(&priv->lock, flags);
3212
3213 /* wake up ucode */
3214 msleep(10);
3215
3216 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003217 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3218 if (!iwl4965_grab_nic_access(priv))
3219 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003220 spin_unlock_irqrestore(&priv->lock, flags);
3221
3222 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3223 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3224 "disabled by HW switch\n");
3225 return;
3226 }
3227
3228 queue_work(priv->workqueue, &priv->restart);
3229 return;
3230}
3231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003232void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07003233 u32 decrypt_res, struct ieee80211_rx_status *stats)
3234{
3235 u16 fc =
3236 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3237
3238 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3239 return;
3240
3241 if (!(fc & IEEE80211_FCTL_PROTECTED))
3242 return;
3243
3244 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3245 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3246 case RX_RES_STATUS_SEC_TYPE_TKIP:
3247 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3248 RX_RES_STATUS_BAD_ICV_MIC)
3249 stats->flag |= RX_FLAG_MMIC_ERROR;
3250 case RX_RES_STATUS_SEC_TYPE_WEP:
3251 case RX_RES_STATUS_SEC_TYPE_CCMP:
3252 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3253 RX_RES_STATUS_DECRYPT_OK) {
3254 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3255 stats->flag |= RX_FLAG_DECRYPTED;
3256 }
3257 break;
3258
3259 default:
3260 break;
3261 }
3262}
3263
Zhu Yib481de92007-09-25 17:54:57 -07003264
3265#define IWL_PACKET_RETRY_TIME HZ
3266
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003267int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07003268{
3269 u16 sc = le16_to_cpu(header->seq_ctrl);
3270 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3271 u16 frag = sc & IEEE80211_SCTL_FRAG;
3272 u16 *last_seq, *last_frag;
3273 unsigned long *last_time;
3274
3275 switch (priv->iw_mode) {
3276 case IEEE80211_IF_TYPE_IBSS:{
3277 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003278 struct iwl4965_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07003279 u8 *mac = header->addr2;
3280 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3281
3282 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003283 entry = list_entry(p, struct iwl4965_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07003284 if (!compare_ether_addr(entry->mac, mac))
3285 break;
3286 }
3287 if (p == &priv->ibss_mac_hash[index]) {
3288 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3289 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003290 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07003291 return 0;
3292 }
3293 memcpy(entry->mac, mac, ETH_ALEN);
3294 entry->seq_num = seq;
3295 entry->frag_num = frag;
3296 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08003297 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07003298 return 0;
3299 }
3300 last_seq = &entry->seq_num;
3301 last_frag = &entry->frag_num;
3302 last_time = &entry->packet_time;
3303 break;
3304 }
3305 case IEEE80211_IF_TYPE_STA:
3306 last_seq = &priv->last_seq_num;
3307 last_frag = &priv->last_frag_num;
3308 last_time = &priv->last_packet_time;
3309 break;
3310 default:
3311 return 0;
3312 }
3313 if ((*last_seq == seq) &&
3314 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3315 if (*last_frag == frag)
3316 goto drop;
3317 if (*last_frag + 1 != frag)
3318 /* out-of-order fragment */
3319 goto drop;
3320 } else
3321 *last_seq = seq;
3322
3323 *last_frag = frag;
3324 *last_time = jiffies;
3325 return 0;
3326
3327 drop:
3328 return 1;
3329}
3330
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003331#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07003332
3333#include "iwl-spectrum.h"
3334
3335#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3336#define BEACON_TIME_MASK_HIGH 0xFF000000
3337#define TIME_UNIT 1024
3338
3339/*
3340 * extended beacon time format
3341 * time in usec will be changed into a 32-bit value in 8:24 format
3342 * the high 1 byte is the beacon counts
3343 * the lower 3 bytes is the time in usec within one beacon interval
3344 */
3345
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003346static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003347{
3348 u32 quot;
3349 u32 rem;
3350 u32 interval = beacon_interval * 1024;
3351
3352 if (!interval || !usec)
3353 return 0;
3354
3355 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3356 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3357
3358 return (quot << 24) + rem;
3359}
3360
3361/* base is usually what we get from ucode with each received frame,
3362 * the same as HW timer counter counting down
3363 */
3364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003365static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003366{
3367 u32 base_low = base & BEACON_TIME_MASK_LOW;
3368 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3369 u32 interval = beacon_interval * TIME_UNIT;
3370 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3371 (addon & BEACON_TIME_MASK_HIGH);
3372
3373 if (base_low > addon_low)
3374 res += base_low - addon_low;
3375 else if (base_low < addon_low) {
3376 res += interval + base_low - addon_low;
3377 res += (1 << 24);
3378 } else
3379 res += (1 << 24);
3380
3381 return cpu_to_le32(res);
3382}
3383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003384static int iwl4965_get_measurement(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003385 struct ieee80211_measurement_params *params,
3386 u8 type)
3387{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003388 struct iwl4965_spectrum_cmd spectrum;
3389 struct iwl4965_rx_packet *res;
3390 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003391 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3392 .data = (void *)&spectrum,
3393 .meta.flags = CMD_WANT_SKB,
3394 };
3395 u32 add_time = le64_to_cpu(params->start_time);
3396 int rc;
3397 int spectrum_resp_status;
3398 int duration = le16_to_cpu(params->duration);
3399
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003400 if (iwl4965_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003401 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003402 iwl4965_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003403 le64_to_cpu(params->start_time) - priv->last_tsf,
3404 le16_to_cpu(priv->rxon_timing.beacon_interval));
3405
3406 memset(&spectrum, 0, sizeof(spectrum));
3407
3408 spectrum.channel_count = cpu_to_le16(1);
3409 spectrum.flags =
3410 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3411 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3412 cmd.len = sizeof(spectrum);
3413 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3414
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003415 if (iwl4965_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003416 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003417 iwl4965_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003418 add_time,
3419 le16_to_cpu(priv->rxon_timing.beacon_interval));
3420 else
3421 spectrum.start_time = 0;
3422
3423 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3424 spectrum.channels[0].channel = params->channel;
3425 spectrum.channels[0].type = type;
3426 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3427 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3428 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3429
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003430 rc = iwl4965_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003431 if (rc)
3432 return rc;
3433
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003434 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003435 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3436 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3437 rc = -EIO;
3438 }
3439
3440 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3441 switch (spectrum_resp_status) {
3442 case 0: /* Command will be handled */
3443 if (res->u.spectrum.id != 0xff) {
3444 IWL_DEBUG_INFO
3445 ("Replaced existing measurement: %d\n",
3446 res->u.spectrum.id);
3447 priv->measurement_status &= ~MEASUREMENT_READY;
3448 }
3449 priv->measurement_status |= MEASUREMENT_ACTIVE;
3450 rc = 0;
3451 break;
3452
3453 case 1: /* Command will not be handled */
3454 rc = -EAGAIN;
3455 break;
3456 }
3457
3458 dev_kfree_skb_any(cmd.meta.u.skb);
3459
3460 return rc;
3461}
3462#endif
3463
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003464static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3465 struct iwl4965_tx_info *tx_sta)
Zhu Yib481de92007-09-25 17:54:57 -07003466{
3467
3468 tx_sta->status.ack_signal = 0;
3469 tx_sta->status.excessive_retries = 0;
3470 tx_sta->status.queue_length = 0;
3471 tx_sta->status.queue_number = 0;
3472
3473 if (in_interrupt())
3474 ieee80211_tx_status_irqsafe(priv->hw,
3475 tx_sta->skb[0], &(tx_sta->status));
3476 else
3477 ieee80211_tx_status(priv->hw,
3478 tx_sta->skb[0], &(tx_sta->status));
3479
3480 tx_sta->skb[0] = NULL;
3481}
3482
3483/**
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003484 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
Zhu Yib481de92007-09-25 17:54:57 -07003485 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003486 * When FW advances 'R' index, all entries between old and new 'R' index
3487 * need to be reclaimed. As result, some free space forms. If there is
3488 * enough free space (> low mark), wake the stack that feeds us.
Zhu Yib481de92007-09-25 17:54:57 -07003489 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003490int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
Zhu Yib481de92007-09-25 17:54:57 -07003491{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003492 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3493 struct iwl4965_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -07003494 int nfreed = 0;
3495
3496 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3497 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3498 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003499 index, q->n_bd, q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003500 return 0;
3501 }
3502
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003503 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003504 q->read_ptr != index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003505 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Zhu Yib481de92007-09-25 17:54:57 -07003506 if (txq_id != IWL_CMD_QUEUE_NUM) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003507 iwl4965_txstatus_to_ieee(priv,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003508 &(txq->txb[txq->q.read_ptr]));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003509 iwl4965_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003510 } else if (nfreed > 1) {
3511 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003512 q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003513 queue_work(priv->workqueue, &priv->restart);
3514 }
3515 nfreed++;
3516 }
3517
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003518 if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
Zhu Yib481de92007-09-25 17:54:57 -07003519 (txq_id != IWL_CMD_QUEUE_NUM) &&
3520 priv->mac80211_registered)
3521 ieee80211_wake_queue(priv->hw, txq_id);
3522
3523
3524 return nfreed;
3525}
3526
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003527static int iwl4965_is_tx_success(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07003528{
3529 status &= TX_STATUS_MSK;
3530 return (status == TX_STATUS_SUCCESS)
3531 || (status == TX_STATUS_DIRECT_DONE);
3532}
3533
3534/******************************************************************************
3535 *
3536 * Generic RX handler implementations
3537 *
3538 ******************************************************************************/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003539#ifdef CONFIG_IWL4965_HT
3540#ifdef CONFIG_IWL4965_HT_AGG
Zhu Yib481de92007-09-25 17:54:57 -07003541
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003542static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003543 struct ieee80211_hdr *hdr)
3544{
3545 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3546 return IWL_AP_ID;
3547 else {
3548 u8 *da = ieee80211_get_DA(hdr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003549 return iwl4965_hw_find_station(priv, da);
Zhu Yib481de92007-09-25 17:54:57 -07003550 }
3551}
3552
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003553static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3554 struct iwl4965_priv *priv, int txq_id, int idx)
Zhu Yib481de92007-09-25 17:54:57 -07003555{
3556 if (priv->txq[txq_id].txb[idx].skb[0])
3557 return (struct ieee80211_hdr *)priv->txq[txq_id].
3558 txb[idx].skb[0]->data;
3559 return NULL;
3560}
3561
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003562static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
Zhu Yib481de92007-09-25 17:54:57 -07003563{
3564 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3565 tx_resp->frame_count);
3566 return le32_to_cpu(*scd_ssn) & MAX_SN;
3567
3568}
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003569
3570/**
3571 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3572 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003573static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3574 struct iwl4965_ht_agg *agg,
3575 struct iwl4965_tx_resp *tx_resp,
Zhu Yib481de92007-09-25 17:54:57 -07003576 u16 start_idx)
3577{
3578 u32 status;
3579 __le32 *frame_status = &tx_resp->status;
3580 struct ieee80211_tx_status *tx_status = NULL;
3581 struct ieee80211_hdr *hdr = NULL;
3582 int i, sh;
3583 int txq_id, idx;
3584 u16 seq;
3585
3586 if (agg->wait_for_ba)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003587 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
Zhu Yib481de92007-09-25 17:54:57 -07003588
3589 agg->frame_count = tx_resp->frame_count;
3590 agg->start_idx = start_idx;
3591 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3592 agg->bitmap0 = agg->bitmap1 = 0;
3593
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003594 /* # frames attempted by Tx command */
Zhu Yib481de92007-09-25 17:54:57 -07003595 if (agg->frame_count == 1) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003596 /* Only one frame was attempted; no block-ack will arrive */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003597 struct iwl4965_tx_queue *txq ;
Zhu Yib481de92007-09-25 17:54:57 -07003598 status = le32_to_cpu(frame_status[0]);
3599
3600 txq_id = agg->txq_id;
3601 txq = &priv->txq[txq_id];
3602 /* FIXME: code repetition */
3603 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
3604 agg->frame_count, agg->start_idx);
3605
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003606 tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003607 tx_status->retry_count = tx_resp->failure_frame;
3608 tx_status->queue_number = status & 0xff;
3609 tx_status->queue_length = tx_resp->bt_kill_count;
3610 tx_status->queue_length |= tx_resp->failure_rts;
3611
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003612 tx_status->flags = iwl4965_is_tx_success(status)?
Zhu Yib481de92007-09-25 17:54:57 -07003613 IEEE80211_TX_STATUS_ACK : 0;
3614 tx_status->control.tx_rate =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003615 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
Zhu Yib481de92007-09-25 17:54:57 -07003616 /* FIXME: code repetition end */
3617
3618 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3619 status & 0xff, tx_resp->failure_frame);
3620 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003621 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
Zhu Yib481de92007-09-25 17:54:57 -07003622
3623 agg->wait_for_ba = 0;
3624 } else {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003625 /* Two or more frames were attempted; expect block-ack */
Zhu Yib481de92007-09-25 17:54:57 -07003626 u64 bitmap = 0;
3627 int start = agg->start_idx;
3628
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003629 /* Construct bit-map of pending frames within Tx window */
Zhu Yib481de92007-09-25 17:54:57 -07003630 for (i = 0; i < agg->frame_count; i++) {
3631 u16 sc;
3632 status = le32_to_cpu(frame_status[i]);
3633 seq = status >> 16;
3634 idx = SEQ_TO_INDEX(seq);
3635 txq_id = SEQ_TO_QUEUE(seq);
3636
3637 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3638 AGG_TX_STATE_ABORT_MSK))
3639 continue;
3640
3641 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3642 agg->frame_count, txq_id, idx);
3643
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003644 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
Zhu Yib481de92007-09-25 17:54:57 -07003645
3646 sc = le16_to_cpu(hdr->seq_ctrl);
3647 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3648 IWL_ERROR("BUG_ON idx doesn't match seq control"
3649 " idx=%d, seq_idx=%d, seq=%d\n",
3650 idx, SEQ_TO_SN(sc),
3651 hdr->seq_ctrl);
3652 return -1;
3653 }
3654
3655 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3656 i, idx, SEQ_TO_SN(sc));
3657
3658 sh = idx - start;
3659 if (sh > 64) {
3660 sh = (start - idx) + 0xff;
3661 bitmap = bitmap << sh;
3662 sh = 0;
3663 start = idx;
3664 } else if (sh < -64)
3665 sh = 0xff - (start - idx);
3666 else if (sh < 0) {
3667 sh = start - idx;
3668 start = idx;
3669 bitmap = bitmap << sh;
3670 sh = 0;
3671 }
3672 bitmap |= (1 << sh);
3673 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3674 start, (u32)(bitmap & 0xFFFFFFFF));
3675 }
3676
3677 agg->bitmap0 = bitmap & 0xFFFFFFFF;
3678 agg->bitmap1 = bitmap >> 32;
3679 agg->start_idx = start;
3680 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3681 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
3682 agg->frame_count, agg->start_idx,
3683 agg->bitmap0);
3684
3685 if (bitmap)
3686 agg->wait_for_ba = 1;
3687 }
3688 return 0;
3689}
3690#endif
3691#endif
3692
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003693/**
3694 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3695 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003696static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3697 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003698{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003699 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003700 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3701 int txq_id = SEQ_TO_QUEUE(sequence);
3702 int index = SEQ_TO_INDEX(sequence);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003703 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
Zhu Yib481de92007-09-25 17:54:57 -07003704 struct ieee80211_tx_status *tx_status;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003705 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Zhu Yib481de92007-09-25 17:54:57 -07003706 u32 status = le32_to_cpu(tx_resp->status);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003707#ifdef CONFIG_IWL4965_HT
3708#ifdef CONFIG_IWL4965_HT_AGG
Zhu Yib481de92007-09-25 17:54:57 -07003709 int tid, sta_id;
3710#endif
3711#endif
3712
3713 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3714 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3715 "is out of range [0-%d] %d %d\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003716 index, txq->q.n_bd, txq->q.write_ptr,
3717 txq->q.read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003718 return;
3719 }
3720
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003721#ifdef CONFIG_IWL4965_HT
3722#ifdef CONFIG_IWL4965_HT_AGG
Zhu Yib481de92007-09-25 17:54:57 -07003723 if (txq->sched_retry) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003724 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
Zhu Yib481de92007-09-25 17:54:57 -07003725 struct ieee80211_hdr *hdr =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003726 iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3727 struct iwl4965_ht_agg *agg = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07003728 __le16 *qc = ieee80211_get_qos_ctrl(hdr);
3729
3730 if (qc == NULL) {
3731 IWL_ERROR("BUG_ON qc is null!!!!\n");
3732 return;
3733 }
3734
3735 tid = le16_to_cpu(*qc) & 0xf;
3736
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003737 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07003738 if (unlikely(sta_id == IWL_INVALID_STATION)) {
3739 IWL_ERROR("Station not known for\n");
3740 return;
3741 }
3742
3743 agg = &priv->stations[sta_id].tid[tid].agg;
3744
3745 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
3746
3747 if ((tx_resp->frame_count == 1) &&
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003748 !iwl4965_is_tx_success(status)) {
Zhu Yib481de92007-09-25 17:54:57 -07003749 /* TODO: send BAR */
3750 }
3751
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003752 if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003753 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
Zhu Yib481de92007-09-25 17:54:57 -07003754 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3755 "%d index %d\n", scd_ssn , index);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003756 iwl4965_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003757 }
3758 } else {
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003759#endif /* CONFIG_IWL4965_HT_AGG */
3760#endif /* CONFIG_IWL4965_HT */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003761 tx_status = &(txq->txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003762
3763 tx_status->retry_count = tx_resp->failure_frame;
3764 tx_status->queue_number = status;
3765 tx_status->queue_length = tx_resp->bt_kill_count;
3766 tx_status->queue_length |= tx_resp->failure_rts;
3767
3768 tx_status->flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003769 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
Zhu Yib481de92007-09-25 17:54:57 -07003770
3771 tx_status->control.tx_rate =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003772 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
Zhu Yib481de92007-09-25 17:54:57 -07003773
3774 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003775 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
Zhu Yib481de92007-09-25 17:54:57 -07003776 status, le32_to_cpu(tx_resp->rate_n_flags),
3777 tx_resp->failure_frame);
3778
3779 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3780 if (index != -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003781 iwl4965_tx_queue_reclaim(priv, txq_id, index);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003782#ifdef CONFIG_IWL4965_HT
3783#ifdef CONFIG_IWL4965_HT_AGG
Zhu Yib481de92007-09-25 17:54:57 -07003784 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003785#endif /* CONFIG_IWL4965_HT_AGG */
3786#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003787
3788 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3789 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3790}
3791
3792
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003793static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3794 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003795{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003796 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3797 struct iwl4965_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003798 struct delayed_work *pwork;
3799
3800 palive = &pkt->u.alive_frame;
3801
3802 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3803 "0x%01X 0x%01X\n",
3804 palive->is_valid, palive->ver_type,
3805 palive->ver_subtype);
3806
3807 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3808 IWL_DEBUG_INFO("Initialization Alive received.\n");
3809 memcpy(&priv->card_alive_init,
3810 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003811 sizeof(struct iwl4965_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003812 pwork = &priv->init_alive_start;
3813 } else {
3814 IWL_DEBUG_INFO("Runtime Alive received.\n");
3815 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003816 sizeof(struct iwl4965_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003817 pwork = &priv->alive_start;
3818 }
3819
3820 /* We delay the ALIVE response by 5ms to
3821 * give the HW RF Kill time to activate... */
3822 if (palive->is_valid == UCODE_VALID_OK)
3823 queue_delayed_work(priv->workqueue, pwork,
3824 msecs_to_jiffies(5));
3825 else
3826 IWL_WARNING("uCode did not respond OK.\n");
3827}
3828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003829static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3830 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003831{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003832 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003833
3834 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3835 return;
3836}
3837
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003838static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3839 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003840{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003841 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003842
3843 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3844 "seq 0x%04X ser 0x%08X\n",
3845 le32_to_cpu(pkt->u.err_resp.error_type),
3846 get_cmd_string(pkt->u.err_resp.cmd_id),
3847 pkt->u.err_resp.cmd_id,
3848 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3849 le32_to_cpu(pkt->u.err_resp.error_info));
3850}
3851
3852#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3853
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003854static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003855{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003856 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3857 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3858 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003859 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3860 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3861 rxon->channel = csa->channel;
3862 priv->staging_rxon.channel = csa->channel;
3863}
3864
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003865static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3866 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003867{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003868#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003869 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3870 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003871
3872 if (!report->state) {
3873 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3874 "Spectrum Measure Notification: Start\n");
3875 return;
3876 }
3877
3878 memcpy(&priv->measure_report, report, sizeof(*report));
3879 priv->measurement_status |= MEASUREMENT_READY;
3880#endif
3881}
3882
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003883static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3884 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003885{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003886#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003887 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3888 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003889 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3890 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3891#endif
3892}
3893
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003894static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3895 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003896{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003897 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003898 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3899 "notification for %s:\n",
3900 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003901 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003902}
3903
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003904static void iwl4965_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003905{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003906 struct iwl4965_priv *priv =
3907 container_of(work, struct iwl4965_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003908 struct sk_buff *beacon;
3909
3910 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berg32bfd352007-12-19 01:31:26 +01003911 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07003912
3913 if (!beacon) {
3914 IWL_ERROR("update beacon failed\n");
3915 return;
3916 }
3917
3918 mutex_lock(&priv->mutex);
3919 /* new beacon skb is allocated every time; dispose previous.*/
3920 if (priv->ibss_beacon)
3921 dev_kfree_skb(priv->ibss_beacon);
3922
3923 priv->ibss_beacon = beacon;
3924 mutex_unlock(&priv->mutex);
3925
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003926 iwl4965_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003927}
3928
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003929static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3930 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003931{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003932#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003933 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3934 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3935 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
Zhu Yib481de92007-09-25 17:54:57 -07003936
3937 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3938 "tsf %d %d rate %d\n",
3939 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3940 beacon->beacon_notify_hdr.failure_frame,
3941 le32_to_cpu(beacon->ibss_mgr_status),
3942 le32_to_cpu(beacon->high_tsf),
3943 le32_to_cpu(beacon->low_tsf), rate);
3944#endif
3945
3946 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3947 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3948 queue_work(priv->workqueue, &priv->beacon_update);
3949}
3950
3951/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003952static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
3953 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003954{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003955#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003956 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3957 struct iwl4965_scanreq_notification *notif =
3958 (struct iwl4965_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003959
3960 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3961#endif
3962}
3963
3964/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003965static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
3966 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003967{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003968 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3969 struct iwl4965_scanstart_notification *notif =
3970 (struct iwl4965_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003971 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3972 IWL_DEBUG_SCAN("Scan start: "
3973 "%d [802.11%s] "
3974 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3975 notif->channel,
3976 notif->band ? "bg" : "a",
3977 notif->tsf_high,
3978 notif->tsf_low, notif->status, notif->beacon_timer);
3979}
3980
3981/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003982static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
3983 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003984{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003985 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3986 struct iwl4965_scanresults_notification *notif =
3987 (struct iwl4965_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003988
3989 IWL_DEBUG_SCAN("Scan ch.res: "
3990 "%d [802.11%s] "
3991 "(TSF: 0x%08X:%08X) - %d "
3992 "elapsed=%lu usec (%dms since last)\n",
3993 notif->channel,
3994 notif->band ? "bg" : "a",
3995 le32_to_cpu(notif->tsf_high),
3996 le32_to_cpu(notif->tsf_low),
3997 le32_to_cpu(notif->statistics[0]),
3998 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3999 jiffies_to_msecs(elapsed_jiffies
4000 (priv->last_scan_jiffies, jiffies)));
4001
4002 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08004003 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07004004}
4005
4006/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004007static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4008 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07004009{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004010 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4011 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07004012
4013 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4014 scan_notif->scanned_channels,
4015 scan_notif->tsf_low,
4016 scan_notif->tsf_high, scan_notif->status);
4017
4018 /* The HW is no longer scanning */
4019 clear_bit(STATUS_SCAN_HW, &priv->status);
4020
4021 /* The scan completion notification came in, so kill that timer... */
4022 cancel_delayed_work(&priv->scan_check);
4023
4024 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4025 (priv->scan_bands == 2) ? "2.4" : "5.2",
4026 jiffies_to_msecs(elapsed_jiffies
4027 (priv->scan_pass_start, jiffies)));
4028
4029 /* Remove this scanned band from the list
4030 * of pending bands to scan */
4031 priv->scan_bands--;
4032
4033 /* If a request to abort was given, or the scan did not succeed
4034 * then we reset the scan state machine and terminate,
4035 * re-queuing another scan if one has been requested */
4036 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4037 IWL_DEBUG_INFO("Aborted scan completed.\n");
4038 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4039 } else {
4040 /* If there are more bands on this scan pass reschedule */
4041 if (priv->scan_bands > 0)
4042 goto reschedule;
4043 }
4044
4045 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08004046 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07004047 IWL_DEBUG_INFO("Setting scan to off\n");
4048
4049 clear_bit(STATUS_SCANNING, &priv->status);
4050
4051 IWL_DEBUG_INFO("Scan took %dms\n",
4052 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4053
4054 queue_work(priv->workqueue, &priv->scan_completed);
4055
4056 return;
4057
4058reschedule:
4059 priv->scan_pass_start = jiffies;
4060 queue_work(priv->workqueue, &priv->request_scan);
4061}
4062
4063/* Handle notification from uCode that card's power state is changing
4064 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004065static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4066 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07004067{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004068 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004069 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4070 unsigned long status = priv->status;
4071
4072 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4073 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4074 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4075
4076 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4077 RF_CARD_DISABLED)) {
4078
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004079 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07004080 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4081
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004082 if (!iwl4965_grab_nic_access(priv)) {
4083 iwl4965_write_direct32(
Zhu Yib481de92007-09-25 17:54:57 -07004084 priv, HBUS_TARG_MBX_C,
4085 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4086
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004087 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004088 }
4089
4090 if (!(flags & RXON_CARD_DISABLED)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004091 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07004092 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004093 if (!iwl4965_grab_nic_access(priv)) {
4094 iwl4965_write_direct32(
Zhu Yib481de92007-09-25 17:54:57 -07004095 priv, HBUS_TARG_MBX_C,
4096 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4097
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004098 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004099 }
4100 }
4101
4102 if (flags & RF_CARD_DISABLED) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004103 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07004104 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004105 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4106 if (!iwl4965_grab_nic_access(priv))
4107 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004108 }
4109 }
4110
4111 if (flags & HW_CARD_DISABLED)
4112 set_bit(STATUS_RF_KILL_HW, &priv->status);
4113 else
4114 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4115
4116
4117 if (flags & SW_CARD_DISABLED)
4118 set_bit(STATUS_RF_KILL_SW, &priv->status);
4119 else
4120 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4121
4122 if (!(flags & RXON_CARD_DISABLED))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004123 iwl4965_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004124
4125 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4126 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4127 (test_bit(STATUS_RF_KILL_SW, &status) !=
4128 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4129 queue_work(priv->workqueue, &priv->rf_kill);
4130 else
4131 wake_up_interruptible(&priv->wait_command_queue);
4132}
4133
4134/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004135 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07004136 *
4137 * Setup the RX handlers for each of the reply types sent from the uCode
4138 * to the host.
4139 *
4140 * This function chains into the hardware specific files for them to setup
4141 * any hardware specific handlers as well.
4142 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004143static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004144{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004145 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4146 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4147 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4148 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07004149 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004150 iwl4965_rx_spectrum_measure_notif;
4151 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07004152 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004153 iwl4965_rx_pm_debug_statistics_notif;
4154 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07004155
Ben Cahill9fbab512007-11-29 11:09:47 +08004156 /*
4157 * The same handler is used for both the REPLY to a discrete
4158 * statistics request from the host as well as for the periodic
4159 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07004160 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004161 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4162 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07004163
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004164 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4165 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07004166 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004167 iwl4965_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07004168 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004169 iwl4965_rx_scan_complete_notif;
4170 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4171 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07004172
Ben Cahill9fbab512007-11-29 11:09:47 +08004173 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004174 iwl4965_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004175}
4176
4177/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004178 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07004179 * @rxb: Rx buffer to reclaim
4180 *
4181 * If an Rx buffer has an async callback associated with it the callback
4182 * will be executed. The attached skb (if present) will only be freed
4183 * if the callback returns 1
4184 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004185static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4186 struct iwl4965_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07004187{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004188 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004189 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4190 int txq_id = SEQ_TO_QUEUE(sequence);
4191 int index = SEQ_TO_INDEX(sequence);
4192 int huge = sequence & SEQ_HUGE_FRAME;
4193 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004194 struct iwl4965_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07004195
4196 /* If a Tx command is being handled and it isn't in the actual
4197 * command queue then there a command routing bug has been introduced
4198 * in the queue management code. */
4199 if (txq_id != IWL_CMD_QUEUE_NUM)
4200 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4201 txq_id, pkt->hdr.cmd);
4202 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4203
4204 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4205 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4206
4207 /* Input error checking is done when commands are added to queue. */
4208 if (cmd->meta.flags & CMD_WANT_SKB) {
4209 cmd->meta.source->u.skb = rxb->skb;
4210 rxb->skb = NULL;
4211 } else if (cmd->meta.u.callback &&
4212 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4213 rxb->skb = NULL;
4214
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004215 iwl4965_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07004216
4217 if (!(cmd->meta.flags & CMD_ASYNC)) {
4218 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4219 wake_up_interruptible(&priv->wait_command_queue);
4220 }
4221}
4222
4223/************************** RX-FUNCTIONS ****************************/
4224/*
4225 * Rx theory of operation
4226 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004227 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4228 * each of which point to Receive Buffers to be filled by 4965. These get
4229 * used not only for Rx frames, but for any command response or notification
4230 * from the 4965. The driver and 4965 manage the Rx buffers by means
4231 * of indexes into the circular buffer.
Zhu Yib481de92007-09-25 17:54:57 -07004232 *
4233 * Rx Queue Indexes
4234 * The host/firmware share two index registers for managing the Rx buffers.
4235 *
4236 * The READ index maps to the first position that the firmware may be writing
4237 * to -- the driver can read up to (but not including) this position and get
4238 * good data.
4239 * The READ index is managed by the firmware once the card is enabled.
4240 *
4241 * The WRITE index maps to the last position the driver has read from -- the
4242 * position preceding WRITE is the last slot the firmware can place a packet.
4243 *
4244 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4245 * WRITE = READ.
4246 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004247 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07004248 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4249 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004250 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07004251 * and fire the RX interrupt. The driver can then query the READ index and
4252 * process as many packets as possible, moving the WRITE index forward as it
4253 * resets the Rx queue buffers with new memory.
4254 *
4255 * The management in the driver is as follows:
4256 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4257 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08004258 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004259 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07004260 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4261 * 'processed' and 'read' driver indexes as well)
4262 * + A received packet is processed and handed to the kernel network stack,
4263 * detached from the iwl->rxq. The driver 'processed' index is updated.
4264 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4265 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4266 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4267 * were enough free buffers and RX_STALLED is set it is cleared.
4268 *
4269 *
4270 * Driver sequence:
4271 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004272 * iwl4965_rx_queue_alloc() Allocates rx_free
4273 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004274 * iwl4965_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08004275 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07004276 * queue, updates firmware pointers, and updates
4277 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004278 * are available, schedules iwl4965_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07004279 *
4280 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08004281 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07004282 * READ INDEX, detaching the SKB from the pool.
4283 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004284 * Calls iwl4965_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07004285 * slots.
4286 * ...
4287 *
4288 */
4289
4290/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004291 * iwl4965_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07004292 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004293static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07004294{
4295 int s = q->read - q->write;
4296 if (s <= 0)
4297 s += RX_QUEUE_SIZE;
4298 /* keep some buffer to not confuse full and empty queue */
4299 s -= 2;
4300 if (s < 0)
4301 s = 0;
4302 return s;
4303}
4304
4305/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004306 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07004307 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004308int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07004309{
4310 u32 reg = 0;
4311 int rc = 0;
4312 unsigned long flags;
4313
4314 spin_lock_irqsave(&q->lock, flags);
4315
4316 if (q->need_update == 0)
4317 goto exit_unlock;
4318
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004319 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07004320 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004321 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004322
4323 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004324 iwl4965_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004325 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4326 goto exit_unlock;
4327 }
4328
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004329 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004330 if (rc)
4331 goto exit_unlock;
4332
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004333 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004334 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07004335 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004336 iwl4965_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004337
4338 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07004339 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004340 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004341 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07004342
4343
4344 q->need_update = 0;
4345
4346 exit_unlock:
4347 spin_unlock_irqrestore(&q->lock, flags);
4348 return rc;
4349}
4350
4351/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004352 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07004353 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004354static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07004355 dma_addr_t dma_addr)
4356{
4357 return cpu_to_le32((u32)(dma_addr >> 8));
4358}
4359
4360
4361/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004362 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07004363 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004364 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07004365 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08004366 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07004367 *
4368 * This moves the 'write' index forward to catch up with 'processed', and
4369 * also updates the memory address in the firmware to reference the new
4370 * target buffer.
4371 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004372static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004373{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004374 struct iwl4965_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004375 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004376 struct iwl4965_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004377 unsigned long flags;
4378 int write, rc;
4379
4380 spin_lock_irqsave(&rxq->lock, flags);
4381 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004382 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004383 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07004384 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004385 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07004386 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004387
4388 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004389 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07004390 rxq->queue[rxq->write] = rxb;
4391 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4392 rxq->free_count--;
4393 }
4394 spin_unlock_irqrestore(&rxq->lock, flags);
4395 /* If the pre-allocated buffer pool is dropping low, schedule to
4396 * refill it */
4397 if (rxq->free_count <= RX_LOW_WATERMARK)
4398 queue_work(priv->workqueue, &priv->rx_replenish);
4399
4400
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004401 /* If we've added more space for the firmware to place data, tell it.
4402 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07004403 if ((write != (rxq->write & ~0x7))
4404 || (abs(rxq->write - rxq->read) > 7)) {
4405 spin_lock_irqsave(&rxq->lock, flags);
4406 rxq->need_update = 1;
4407 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004408 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07004409 if (rc)
4410 return rc;
4411 }
4412
4413 return 0;
4414}
4415
4416/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004417 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07004418 *
4419 * When moving to rx_free an SKB is allocated for the slot.
4420 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004421 * Also restock the Rx queue via iwl4965_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08004422 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07004423 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004424static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004425{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004426 struct iwl4965_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004427 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004428 struct iwl4965_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004429 unsigned long flags;
4430 spin_lock_irqsave(&rxq->lock, flags);
4431 while (!list_empty(&rxq->rx_used)) {
4432 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004433 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004434
4435 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07004436 rxb->skb =
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02004437 alloc_skb(priv->hw_setting.rx_buf_size,
4438 __GFP_NOWARN | GFP_ATOMIC);
Zhu Yib481de92007-09-25 17:54:57 -07004439 if (!rxb->skb) {
4440 if (net_ratelimit())
4441 printk(KERN_CRIT DRV_NAME
4442 ": Can not allocate SKB buffers\n");
4443 /* We don't reschedule replenish work here -- we will
4444 * call the restock method and if it still needs
4445 * more buffers it will schedule replenish */
4446 break;
4447 }
4448 priv->alloc_rxb_skb++;
4449 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004450
4451 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07004452 rxb->dma_addr =
4453 pci_map_single(priv->pci_dev, rxb->skb->data,
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02004454 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
Zhu Yib481de92007-09-25 17:54:57 -07004455 list_add_tail(&rxb->list, &rxq->rx_free);
4456 rxq->free_count++;
4457 }
4458 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004459}
4460
4461/*
4462 * this should be called while priv->lock is locked
4463*/
Tomas Winkler4fd1f842007-12-05 20:59:58 +02004464static void __iwl4965_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004465{
4466 struct iwl4965_priv *priv = data;
4467
4468 iwl4965_rx_allocate(priv);
4469 iwl4965_rx_queue_restock(priv);
4470}
4471
4472
4473void iwl4965_rx_replenish(void *data)
4474{
4475 struct iwl4965_priv *priv = data;
4476 unsigned long flags;
4477
4478 iwl4965_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004479
4480 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004481 iwl4965_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004482 spin_unlock_irqrestore(&priv->lock, flags);
4483}
4484
4485/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08004486 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07004487 * This free routine walks the list of POOL entries and if SKB is set to
4488 * non NULL it is unmapped and freed
4489 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004490static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004491{
4492 int i;
4493 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4494 if (rxq->pool[i].skb != NULL) {
4495 pci_unmap_single(priv->pci_dev,
4496 rxq->pool[i].dma_addr,
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02004497 priv->hw_setting.rx_buf_size,
4498 PCI_DMA_FROMDEVICE);
Zhu Yib481de92007-09-25 17:54:57 -07004499 dev_kfree_skb(rxq->pool[i].skb);
4500 }
4501 }
4502
4503 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4504 rxq->dma_addr);
4505 rxq->bd = NULL;
4506}
4507
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004508int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004509{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004510 struct iwl4965_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004511 struct pci_dev *dev = priv->pci_dev;
4512 int i;
4513
4514 spin_lock_init(&rxq->lock);
4515 INIT_LIST_HEAD(&rxq->rx_free);
4516 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004517
4518 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07004519 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4520 if (!rxq->bd)
4521 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004522
Zhu Yib481de92007-09-25 17:54:57 -07004523 /* Fill the rx_used queue with _all_ of the Rx buffers */
4524 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4525 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004526
Zhu Yib481de92007-09-25 17:54:57 -07004527 /* Set us so that we have processed and used all buffers, but have
4528 * not restocked the Rx queue with fresh buffers */
4529 rxq->read = rxq->write = 0;
4530 rxq->free_count = 0;
4531 rxq->need_update = 0;
4532 return 0;
4533}
4534
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004535void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004536{
4537 unsigned long flags;
4538 int i;
4539 spin_lock_irqsave(&rxq->lock, flags);
4540 INIT_LIST_HEAD(&rxq->rx_free);
4541 INIT_LIST_HEAD(&rxq->rx_used);
4542 /* Fill the rx_used queue with _all_ of the Rx buffers */
4543 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4544 /* In the reset function, these buffers may have been allocated
4545 * to an SKB, so we need to unmap and free potential storage */
4546 if (rxq->pool[i].skb != NULL) {
4547 pci_unmap_single(priv->pci_dev,
4548 rxq->pool[i].dma_addr,
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02004549 priv->hw_setting.rx_buf_size,
4550 PCI_DMA_FROMDEVICE);
Zhu Yib481de92007-09-25 17:54:57 -07004551 priv->alloc_rxb_skb--;
4552 dev_kfree_skb(rxq->pool[i].skb);
4553 rxq->pool[i].skb = NULL;
4554 }
4555 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4556 }
4557
4558 /* Set us so that we have processed and used all buffers, but have
4559 * not restocked the Rx queue with fresh buffers */
4560 rxq->read = rxq->write = 0;
4561 rxq->free_count = 0;
4562 spin_unlock_irqrestore(&rxq->lock, flags);
4563}
4564
4565/* Convert linear signal-to-noise ratio into dB */
4566static u8 ratio2dB[100] = {
4567/* 0 1 2 3 4 5 6 7 8 9 */
4568 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4569 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4570 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4571 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4572 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4573 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4574 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4575 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4576 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4577 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4578};
4579
4580/* Calculates a relative dB value from a ratio of linear
4581 * (i.e. not dB) signal levels.
4582 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004583int iwl4965_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07004584{
Adrian Bunkc899a572007-10-14 19:51:15 +02004585 /* 1000:1 or higher just report as 60 dB */
4586 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07004587 return 60;
4588
Adrian Bunkc899a572007-10-14 19:51:15 +02004589 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07004590 * add 20 dB to make up for divide by 10 */
Adrian Bunkc899a572007-10-14 19:51:15 +02004591 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07004592 return (20 + (int)ratio2dB[sig_ratio/10]);
4593
4594 /* We shouldn't see this */
4595 if (sig_ratio < 1)
4596 return 0;
4597
4598 /* Use table for ratios 1:1 - 99:1 */
4599 return (int)ratio2dB[sig_ratio];
4600}
4601
4602#define PERFECT_RSSI (-20) /* dBm */
4603#define WORST_RSSI (-95) /* dBm */
4604#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4605
4606/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4607 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4608 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004609int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07004610{
4611 int sig_qual;
4612 int degradation = PERFECT_RSSI - rssi_dbm;
4613
4614 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4615 * as indicator; formula is (signal dbm - noise dbm).
4616 * SNR at or above 40 is a great signal (100%).
4617 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4618 * Weakest usable signal is usually 10 - 15 dB SNR. */
4619 if (noise_dbm) {
4620 if (rssi_dbm - noise_dbm >= 40)
4621 return 100;
4622 else if (rssi_dbm < noise_dbm)
4623 return 0;
4624 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4625
4626 /* Else use just the signal level.
4627 * This formula is a least squares fit of data points collected and
4628 * compared with a reference system that had a percentage (%) display
4629 * for signal quality. */
4630 } else
4631 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4632 (15 * RSSI_RANGE + 62 * degradation)) /
4633 (RSSI_RANGE * RSSI_RANGE);
4634
4635 if (sig_qual > 100)
4636 sig_qual = 100;
4637 else if (sig_qual < 1)
4638 sig_qual = 0;
4639
4640 return sig_qual;
4641}
4642
4643/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004644 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07004645 *
4646 * Uses the priv->rx_handlers callback function array to invoke
4647 * the appropriate handlers, including command responses,
4648 * frame-received notifications, and other notifications.
4649 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004650static void iwl4965_rx_handle(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004651{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004652 struct iwl4965_rx_mem_buffer *rxb;
4653 struct iwl4965_rx_packet *pkt;
4654 struct iwl4965_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004655 u32 r, i;
4656 int reclaim;
4657 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004658 u8 fill_rx = 0;
4659 u32 count = 0;
Zhu Yib481de92007-09-25 17:54:57 -07004660
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004661 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4662 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004663 r = iwl4965_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004664 i = rxq->read;
4665
4666 /* Rx interrupt, but nothing sent from uCode */
4667 if (i == r)
4668 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4669
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004670 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4671 fill_rx = 1;
4672
Zhu Yib481de92007-09-25 17:54:57 -07004673 while (i != r) {
4674 rxb = rxq->queue[i];
4675
Ben Cahill9fbab512007-11-29 11:09:47 +08004676 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004677 * then a bug has been introduced in the queue refilling
4678 * routines -- catch it here */
4679 BUG_ON(rxb == NULL);
4680
4681 rxq->queue[i] = NULL;
4682
4683 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02004684 priv->hw_setting.rx_buf_size,
Zhu Yib481de92007-09-25 17:54:57 -07004685 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004686 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004687
4688 /* Reclaim a command buffer only if this packet is a response
4689 * to a (driver-originated) command.
4690 * If the packet (e.g. Rx frame) originated from uCode,
4691 * there is no command buffer to reclaim.
4692 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4693 * but apparently a few don't get set; catch them here. */
4694 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4695 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4696 (pkt->hdr.cmd != REPLY_4965_RX) &&
Zhu Yicfe01702007-09-27 11:27:31 +08004697 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
Zhu Yib481de92007-09-25 17:54:57 -07004698 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4699 (pkt->hdr.cmd != REPLY_TX);
4700
4701 /* Based on type of command response or notification,
4702 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004703 * rx_handlers table. See iwl4965_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004704 if (priv->rx_handlers[pkt->hdr.cmd]) {
4705 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4706 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4707 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4708 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4709 } else {
4710 /* No handling needed */
4711 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4712 "r %d i %d No handler needed for %s, 0x%02x\n",
4713 r, i, get_cmd_string(pkt->hdr.cmd),
4714 pkt->hdr.cmd);
4715 }
4716
4717 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004718 /* Invoke any callbacks, transfer the skb to caller, and
4719 * fire off the (possibly) blocking iwl4965_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004720 * as we reclaim the driver command queue */
4721 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004722 iwl4965_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004723 else
4724 IWL_WARNING("Claim null rxb?\n");
4725 }
4726
4727 /* For now we just don't re-use anything. We can tweak this
4728 * later to try and re-use notification packets and SKBs that
4729 * fail to Rx correctly */
4730 if (rxb->skb != NULL) {
4731 priv->alloc_rxb_skb--;
4732 dev_kfree_skb_any(rxb->skb);
4733 rxb->skb = NULL;
4734 }
4735
4736 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02004737 priv->hw_setting.rx_buf_size,
4738 PCI_DMA_FROMDEVICE);
Zhu Yib481de92007-09-25 17:54:57 -07004739 spin_lock_irqsave(&rxq->lock, flags);
4740 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4741 spin_unlock_irqrestore(&rxq->lock, flags);
4742 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004743 /* If there are a lot of unused frames,
4744 * restock the Rx queue so ucode wont assert. */
4745 if (fill_rx) {
4746 count++;
4747 if (count >= 8) {
4748 priv->rxq.read = i;
4749 __iwl4965_rx_replenish(priv);
4750 count = 0;
4751 }
4752 }
Zhu Yib481de92007-09-25 17:54:57 -07004753 }
4754
4755 /* Backtrack one entry */
4756 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004757 iwl4965_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004758}
4759
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004760/**
4761 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4762 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004763static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4764 struct iwl4965_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004765{
4766 u32 reg = 0;
4767 int rc = 0;
4768 int txq_id = txq->q.id;
4769
4770 if (txq->need_update == 0)
4771 return rc;
4772
4773 /* if we're trying to save power */
4774 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4775 /* wake up nic if it's powered down ...
4776 * uCode will wake up, and interrupt us again, so next
4777 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004778 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004779
4780 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4781 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004782 iwl4965_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004783 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4784 return rc;
4785 }
4786
4787 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004788 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004789 if (rc)
4790 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004791 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004792 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004793 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004794
4795 /* else not in power-save mode, uCode will never sleep when we're
4796 * trying to tx (during RFKILL, we're not trying to tx). */
4797 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004798 iwl4965_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004799 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004800
4801 txq->need_update = 0;
4802
4803 return rc;
4804}
4805
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004806#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004807static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004808{
Joe Perches0795af52007-10-03 17:59:30 -07004809 DECLARE_MAC_BUF(mac);
4810
Zhu Yib481de92007-09-25 17:54:57 -07004811 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004812 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004813 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4814 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4815 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4816 le32_to_cpu(rxon->filter_flags));
4817 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4818 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4819 rxon->ofdm_basic_rates);
4820 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004821 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4822 print_mac(mac, rxon->node_addr));
4823 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4824 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004825 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4826}
4827#endif
4828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004829static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004830{
4831 IWL_DEBUG_ISR("Enabling interrupts\n");
4832 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004833 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004834}
4835
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004836static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004837{
4838 clear_bit(STATUS_INT_ENABLED, &priv->status);
4839
4840 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004841 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004842
4843 /* acknowledge/clear/reset any interrupts still pending
4844 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004845 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4846 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004847 IWL_DEBUG_ISR("Disabled interrupts\n");
4848}
4849
4850static const char *desc_lookup(int i)
4851{
4852 switch (i) {
4853 case 1:
4854 return "FAIL";
4855 case 2:
4856 return "BAD_PARAM";
4857 case 3:
4858 return "BAD_CHECKSUM";
4859 case 4:
4860 return "NMI_INTERRUPT";
4861 case 5:
4862 return "SYSASSERT";
4863 case 6:
4864 return "FATAL_ERROR";
4865 }
4866
4867 return "UNKNOWN";
4868}
4869
4870#define ERROR_START_OFFSET (1 * sizeof(u32))
4871#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4872
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004873static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004874{
4875 u32 data2, line;
4876 u32 desc, time, count, base, data1;
4877 u32 blink1, blink2, ilink1, ilink2;
4878 int rc;
4879
4880 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4881
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004882 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004883 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4884 return;
4885 }
4886
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004887 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004888 if (rc) {
4889 IWL_WARNING("Can not read from adapter at this time.\n");
4890 return;
4891 }
4892
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004893 count = iwl4965_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004894
4895 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4896 IWL_ERROR("Start IWL Error Log Dump:\n");
4897 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4898 priv->status, priv->config, count);
4899 }
4900
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004901 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4902 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4903 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4904 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4905 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4906 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4907 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4908 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4909 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004910
4911 IWL_ERROR("Desc Time "
4912 "data1 data2 line\n");
4913 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4914 desc_lookup(desc), desc, time, data1, data2, line);
4915 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4916 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4917 ilink1, ilink2);
4918
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004919 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004920}
4921
4922#define EVENT_START_OFFSET (4 * sizeof(u32))
4923
4924/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004925 * iwl4965_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004926 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004927 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004928 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004929static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004930 u32 num_events, u32 mode)
4931{
4932 u32 i;
4933 u32 base; /* SRAM byte address of event log header */
4934 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4935 u32 ptr; /* SRAM byte address of log data */
4936 u32 ev, time, data; /* event log data */
4937
4938 if (num_events == 0)
4939 return;
4940
4941 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4942
4943 if (mode == 0)
4944 event_size = 2 * sizeof(u32);
4945 else
4946 event_size = 3 * sizeof(u32);
4947
4948 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4949
4950 /* "time" is actually "data" for mode 0 (no timestamp).
4951 * place event id # at far right for easier visual parsing. */
4952 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004953 ev = iwl4965_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004954 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004955 time = iwl4965_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004956 ptr += sizeof(u32);
4957 if (mode == 0)
4958 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4959 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004960 data = iwl4965_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004961 ptr += sizeof(u32);
4962 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4963 }
4964 }
4965}
4966
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004967static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004968{
4969 int rc;
4970 u32 base; /* SRAM byte address of event log header */
4971 u32 capacity; /* event log capacity in # entries */
4972 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4973 u32 num_wraps; /* # times uCode wrapped to top of log */
4974 u32 next_entry; /* index of next entry to be written by uCode */
4975 u32 size; /* # entries that we'll print */
4976
4977 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004978 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004979 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4980 return;
4981 }
4982
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004983 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004984 if (rc) {
4985 IWL_WARNING("Can not read from adapter at this time.\n");
4986 return;
4987 }
4988
4989 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004990 capacity = iwl4965_read_targ_mem(priv, base);
4991 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4992 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4993 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004994
4995 size = num_wraps ? capacity : next_entry;
4996
4997 /* bail out if nothing in log */
4998 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004999 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005000 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005001 return;
5002 }
5003
Zhu Yi583fab32007-09-27 11:27:30 +08005004 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07005005 size, num_wraps);
5006
5007 /* if uCode has wrapped back to top of log, start at the oldest entry,
5008 * i.e the next one that uCode would fill. */
5009 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005010 iwl4965_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07005011 capacity - next_entry, mode);
5012
5013 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005014 iwl4965_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07005015
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005016 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005017}
5018
5019/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005020 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07005021 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005022static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005023{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005024 /* Set the FW error flag -- cleared on iwl4965_down */
Zhu Yib481de92007-09-25 17:54:57 -07005025 set_bit(STATUS_FW_ERROR, &priv->status);
5026
5027 /* Cancel currently queued command. */
5028 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5029
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08005030#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005031 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5032 iwl4965_dump_nic_error_log(priv);
5033 iwl4965_dump_nic_event_log(priv);
5034 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07005035 }
5036#endif
5037
5038 wake_up_interruptible(&priv->wait_command_queue);
5039
5040 /* Keep the restart process from trying to send host
5041 * commands by clearing the INIT status bit */
5042 clear_bit(STATUS_READY, &priv->status);
5043
5044 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5045 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5046 "Restarting adapter due to uCode error.\n");
5047
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005048 if (iwl4965_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005049 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5050 sizeof(priv->recovery_rxon));
5051 priv->error_recovering = 1;
5052 }
5053 queue_work(priv->workqueue, &priv->restart);
5054 }
5055}
5056
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005057static void iwl4965_error_recovery(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005058{
5059 unsigned long flags;
5060
5061 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5062 sizeof(priv->staging_rxon));
5063 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005064 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005065
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005066 iwl4965_rxon_add_station(priv, priv->bssid, 1);
Zhu Yib481de92007-09-25 17:54:57 -07005067
5068 spin_lock_irqsave(&priv->lock, flags);
5069 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5070 priv->error_recovering = 0;
5071 spin_unlock_irqrestore(&priv->lock, flags);
5072}
5073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005074static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005075{
5076 u32 inta, handled = 0;
5077 u32 inta_fh;
5078 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08005079#ifdef CONFIG_IWL4965_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07005080 u32 inta_mask;
5081#endif
5082
5083 spin_lock_irqsave(&priv->lock, flags);
5084
5085 /* Ack/clear/reset pending uCode interrupts.
5086 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5087 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005088 inta = iwl4965_read32(priv, CSR_INT);
5089 iwl4965_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07005090
5091 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5092 * Any new interrupts that happen after this, either while we're
5093 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005094 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5095 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07005096
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08005097#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005098 if (iwl4965_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08005099 /* just for debug */
5100 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07005101 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5102 inta, inta_mask, inta_fh);
5103 }
5104#endif
5105
5106 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5107 * atomic, make sure that inta covers all the interrupts that
5108 * we've discovered, even if FH interrupt came in just after
5109 * reading CSR_INT. */
5110 if (inta_fh & CSR_FH_INT_RX_MASK)
5111 inta |= CSR_INT_BIT_FH_RX;
5112 if (inta_fh & CSR_FH_INT_TX_MASK)
5113 inta |= CSR_INT_BIT_FH_TX;
5114
5115 /* Now service all interrupt bits discovered above. */
5116 if (inta & CSR_INT_BIT_HW_ERR) {
5117 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5118
5119 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005120 iwl4965_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005121
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005122 iwl4965_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005123
5124 handled |= CSR_INT_BIT_HW_ERR;
5125
5126 spin_unlock_irqrestore(&priv->lock, flags);
5127
5128 return;
5129 }
5130
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08005131#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005132 if (iwl4965_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07005133 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5134 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
5135 IWL_DEBUG_ISR("Microcode started or stopped.\n");
5136
5137 /* Alive notification via Rx interrupt will do the real work */
5138 if (inta & CSR_INT_BIT_ALIVE)
5139 IWL_DEBUG_ISR("Alive interrupt\n");
5140 }
5141#endif
5142 /* Safely ignore these bits for debug checks below */
5143 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
5144
Ben Cahill9fbab512007-11-29 11:09:47 +08005145 /* HW RF KILL switch toggled */
Zhu Yib481de92007-09-25 17:54:57 -07005146 if (inta & CSR_INT_BIT_RF_KILL) {
5147 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005148 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07005149 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5150 hw_rf_kill = 1;
5151
5152 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5153 "RF_KILL bit toggled to %s.\n",
5154 hw_rf_kill ? "disable radio":"enable radio");
5155
5156 /* Queue restart only if RF_KILL switch was set to "kill"
5157 * when we loaded driver, and is now set to "enable".
5158 * After we're Alive, RF_KILL gets handled by
5159 * iwl_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08005160 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5161 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07005162 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08005163 }
Zhu Yib481de92007-09-25 17:54:57 -07005164
5165 handled |= CSR_INT_BIT_RF_KILL;
5166 }
5167
Ben Cahill9fbab512007-11-29 11:09:47 +08005168 /* Chip got too hot and stopped itself */
Zhu Yib481de92007-09-25 17:54:57 -07005169 if (inta & CSR_INT_BIT_CT_KILL) {
5170 IWL_ERROR("Microcode CT kill error detected.\n");
5171 handled |= CSR_INT_BIT_CT_KILL;
5172 }
5173
5174 /* Error detected by uCode */
5175 if (inta & CSR_INT_BIT_SW_ERR) {
5176 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5177 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005178 iwl4965_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005179 handled |= CSR_INT_BIT_SW_ERR;
5180 }
5181
5182 /* uCode wakes up after power-down sleep */
5183 if (inta & CSR_INT_BIT_WAKEUP) {
5184 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005185 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5186 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5187 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5188 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5189 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5190 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5191 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07005192
5193 handled |= CSR_INT_BIT_WAKEUP;
5194 }
5195
5196 /* All uCode command responses, including Tx command responses,
5197 * Rx "responses" (frame-received notification), and other
5198 * notifications from uCode come through here*/
5199 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005200 iwl4965_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005201 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5202 }
5203
5204 if (inta & CSR_INT_BIT_FH_TX) {
5205 IWL_DEBUG_ISR("Tx interrupt\n");
5206 handled |= CSR_INT_BIT_FH_TX;
5207 }
5208
5209 if (inta & ~handled)
5210 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5211
5212 if (inta & ~CSR_INI_SET_MASK) {
5213 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5214 inta & ~CSR_INI_SET_MASK);
5215 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5216 }
5217
5218 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005219 iwl4965_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005220
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08005221#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005222 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5223 inta = iwl4965_read32(priv, CSR_INT);
5224 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5225 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07005226 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5227 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5228 }
5229#endif
5230 spin_unlock_irqrestore(&priv->lock, flags);
5231}
5232
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005233static irqreturn_t iwl4965_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07005234{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005235 struct iwl4965_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07005236 u32 inta, inta_mask;
5237 u32 inta_fh;
5238 if (!priv)
5239 return IRQ_NONE;
5240
5241 spin_lock(&priv->lock);
5242
5243 /* Disable (but don't clear!) interrupts here to avoid
5244 * back-to-back ISRs and sporadic interrupts from our NIC.
5245 * If we have something to service, the tasklet will re-enable ints.
5246 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005247 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5248 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07005249
5250 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005251 inta = iwl4965_read32(priv, CSR_INT);
5252 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07005253
5254 /* Ignore interrupt if there's nothing in NIC to service.
5255 * This may be due to IRQ shared with another device,
5256 * or due to sporadic interrupts thrown from our NIC. */
5257 if (!inta && !inta_fh) {
5258 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5259 goto none;
5260 }
5261
5262 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
Oliver Neukum66fbb542007-11-15 09:31:10 +08005263 /* Hardware disappeared. It might have already raised
5264 * an interrupt */
Zhu Yib481de92007-09-25 17:54:57 -07005265 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukum66fbb542007-11-15 09:31:10 +08005266 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07005267 }
5268
5269 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5270 inta, inta_mask, inta_fh);
5271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005272 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
Zhu Yib481de92007-09-25 17:54:57 -07005273 tasklet_schedule(&priv->irq_tasklet);
Zhu Yib481de92007-09-25 17:54:57 -07005274
Oliver Neukum66fbb542007-11-15 09:31:10 +08005275 unplugged:
5276 spin_unlock(&priv->lock);
Zhu Yib481de92007-09-25 17:54:57 -07005277 return IRQ_HANDLED;
5278
5279 none:
5280 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005281 iwl4965_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005282 spin_unlock(&priv->lock);
5283 return IRQ_NONE;
5284}
5285
5286/************************** EEPROM BANDS ****************************
5287 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005288 * The iwl4965_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07005289 * EEPROM contents to the specific channel number supported for each
5290 * band.
5291 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005292 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07005293 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5294 * The specific geography and calibration information for that channel
5295 * is contained in the eeprom map itself.
5296 *
5297 * During init, we copy the eeprom information and channel map
5298 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5299 *
5300 * channel_map_24/52 provides the index in the channel_info array for a
5301 * given channel. We have to have two separate maps as there is channel
5302 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5303 * band_2
5304 *
5305 * A value of 0xff stored in the channel_map indicates that the channel
5306 * is not supported by the hardware at all.
5307 *
5308 * A value of 0xfe in the channel_map indicates that the channel is not
5309 * valid for Tx with the current hardware. This means that
5310 * while the system can tune and receive on a given channel, it may not
5311 * be able to associate or transmit any frames on that
5312 * channel. There is no corresponding channel information for that
5313 * entry.
5314 *
5315 *********************************************************************/
5316
5317/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005318static const u8 iwl4965_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07005319 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5320};
5321
5322/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08005323static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005324 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5325};
5326
Ben Cahill9fbab512007-11-29 11:09:47 +08005327static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005328 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5329};
5330
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005331static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005332 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5333};
5334
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005335static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005336 145, 149, 153, 157, 161, 165
5337};
5338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005339static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
Zhu Yib481de92007-09-25 17:54:57 -07005340 1, 2, 3, 4, 5, 6, 7
5341};
5342
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005343static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
Zhu Yib481de92007-09-25 17:54:57 -07005344 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5345};
5346
Ben Cahill9fbab512007-11-29 11:09:47 +08005347static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5348 int band,
Zhu Yib481de92007-09-25 17:54:57 -07005349 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005350 const struct iwl4965_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07005351 **eeprom_ch_info,
5352 const u8 **eeprom_ch_index)
5353{
5354 switch (band) {
5355 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005356 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07005357 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005358 *eeprom_ch_index = iwl4965_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07005359 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005360 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005361 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07005362 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005363 *eeprom_ch_index = iwl4965_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07005364 break;
5365 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005366 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07005367 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005368 *eeprom_ch_index = iwl4965_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07005369 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005370 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005371 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07005372 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005373 *eeprom_ch_index = iwl4965_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07005374 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005375 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005376 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005377 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005378 *eeprom_ch_index = iwl4965_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07005379 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005380 case 6: /* 2.4GHz FAT channels */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005381 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
Zhu Yib481de92007-09-25 17:54:57 -07005382 *eeprom_ch_info = priv->eeprom.band_24_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005383 *eeprom_ch_index = iwl4965_eeprom_band_6;
Zhu Yib481de92007-09-25 17:54:57 -07005384 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005385 case 7: /* 5 GHz FAT channels */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005386 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
Zhu Yib481de92007-09-25 17:54:57 -07005387 *eeprom_ch_info = priv->eeprom.band_52_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005388 *eeprom_ch_index = iwl4965_eeprom_band_7;
Zhu Yib481de92007-09-25 17:54:57 -07005389 break;
5390 default:
5391 BUG();
5392 return;
5393 }
5394}
5395
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005396/**
5397 * iwl4965_get_channel_info - Find driver's private channel info
5398 *
5399 * Based on band and channel number.
5400 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005401const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005402 int phymode, u16 channel)
5403{
5404 int i;
5405
5406 switch (phymode) {
5407 case MODE_IEEE80211A:
5408 for (i = 14; i < priv->channel_count; i++) {
5409 if (priv->channel_info[i].channel == channel)
5410 return &priv->channel_info[i];
5411 }
5412 break;
5413
5414 case MODE_IEEE80211B:
5415 case MODE_IEEE80211G:
5416 if (channel >= 1 && channel <= 14)
5417 return &priv->channel_info[channel - 1];
5418 break;
5419
5420 }
5421
5422 return NULL;
5423}
5424
5425#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5426 ? # x " " : "")
5427
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005428/**
5429 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5430 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005431static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005432{
5433 int eeprom_ch_count = 0;
5434 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005435 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07005436 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005437 struct iwl4965_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005438
5439 if (priv->channel_count) {
5440 IWL_DEBUG_INFO("Channel map already initialized.\n");
5441 return 0;
5442 }
5443
5444 if (priv->eeprom.version < 0x2f) {
5445 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5446 priv->eeprom.version);
5447 return -EINVAL;
5448 }
5449
5450 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5451
5452 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005453 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5454 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5455 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5456 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5457 ARRAY_SIZE(iwl4965_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005458
5459 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5460
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005461 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07005462 priv->channel_count, GFP_KERNEL);
5463 if (!priv->channel_info) {
5464 IWL_ERROR("Could not allocate channel_info\n");
5465 priv->channel_count = 0;
5466 return -ENOMEM;
5467 }
5468
5469 ch_info = priv->channel_info;
5470
5471 /* Loop through the 5 EEPROM bands adding them in order to the
5472 * channel map we maintain (that contains additional information than
5473 * what just in the EEPROM) */
5474 for (band = 1; band <= 5; band++) {
5475
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005476 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07005477 &eeprom_ch_info, &eeprom_ch_index);
5478
5479 /* Loop through each band adding each of the channels */
5480 for (ch = 0; ch < eeprom_ch_count; ch++) {
5481 ch_info->channel = eeprom_ch_index[ch];
5482 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5483 MODE_IEEE80211A;
5484
5485 /* permanently store EEPROM's channel regulatory flags
5486 * and max power in channel info database. */
5487 ch_info->eeprom = eeprom_ch_info[ch];
5488
5489 /* Copy the run-time flags so they are there even on
5490 * invalid channels */
5491 ch_info->flags = eeprom_ch_info[ch].flags;
5492
5493 if (!(is_channel_valid(ch_info))) {
5494 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5495 "No traffic\n",
5496 ch_info->channel,
5497 ch_info->flags,
5498 is_channel_a_band(ch_info) ?
5499 "5.2" : "2.4");
5500 ch_info++;
5501 continue;
5502 }
5503
5504 /* Initialize regulatory-based run-time data */
5505 ch_info->max_power_avg = ch_info->curr_txpow =
5506 eeprom_ch_info[ch].max_power_avg;
5507 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5508 ch_info->min_power = 0;
5509
5510 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5511 " %ddBm): Ad-Hoc %ssupported\n",
5512 ch_info->channel,
5513 is_channel_a_band(ch_info) ?
5514 "5.2" : "2.4",
5515 CHECK_AND_PRINT(IBSS),
5516 CHECK_AND_PRINT(ACTIVE),
5517 CHECK_AND_PRINT(RADAR),
5518 CHECK_AND_PRINT(WIDE),
5519 CHECK_AND_PRINT(NARROW),
5520 CHECK_AND_PRINT(DFS),
5521 eeprom_ch_info[ch].flags,
5522 eeprom_ch_info[ch].max_power_avg,
5523 ((eeprom_ch_info[ch].
5524 flags & EEPROM_CHANNEL_IBSS)
5525 && !(eeprom_ch_info[ch].
5526 flags & EEPROM_CHANNEL_RADAR))
5527 ? "" : "not ");
5528
5529 /* Set the user_txpower_limit to the highest power
5530 * supported by any channel */
5531 if (eeprom_ch_info[ch].max_power_avg >
5532 priv->user_txpower_limit)
5533 priv->user_txpower_limit =
5534 eeprom_ch_info[ch].max_power_avg;
5535
5536 ch_info++;
5537 }
5538 }
5539
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005540 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
Zhu Yib481de92007-09-25 17:54:57 -07005541 for (band = 6; band <= 7; band++) {
5542 int phymode;
5543 u8 fat_extension_chan;
5544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005545 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07005546 &eeprom_ch_info, &eeprom_ch_index);
5547
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005548 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
Zhu Yib481de92007-09-25 17:54:57 -07005549 phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005550
Zhu Yib481de92007-09-25 17:54:57 -07005551 /* Loop through each band adding each of the channels */
5552 for (ch = 0; ch < eeprom_ch_count; ch++) {
5553
5554 if ((band == 6) &&
5555 ((eeprom_ch_index[ch] == 5) ||
5556 (eeprom_ch_index[ch] == 6) ||
5557 (eeprom_ch_index[ch] == 7)))
5558 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5559 else
5560 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5561
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005562 /* Set up driver's info for lower half */
Zhu Yib481de92007-09-25 17:54:57 -07005563 iwl4965_set_fat_chan_info(priv, phymode,
5564 eeprom_ch_index[ch],
5565 &(eeprom_ch_info[ch]),
5566 fat_extension_chan);
5567
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005568 /* Set up driver's info for upper half */
Zhu Yib481de92007-09-25 17:54:57 -07005569 iwl4965_set_fat_chan_info(priv, phymode,
5570 (eeprom_ch_index[ch] + 4),
5571 &(eeprom_ch_info[ch]),
5572 HT_IE_EXT_CHANNEL_BELOW);
5573 }
5574 }
5575
5576 return 0;
5577}
5578
5579/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5580 * sending probe req. This should be set long enough to hear probe responses
5581 * from more than one AP. */
5582#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5583#define IWL_ACTIVE_DWELL_TIME_52 (10)
5584
5585/* For faster active scanning, scan will move to the next channel if fewer than
5586 * PLCP_QUIET_THRESH packets are heard on this channel within
5587 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5588 * time if it's a quiet channel (nothing responded to our probe, and there's
5589 * no other traffic).
5590 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5591#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5592#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5593
5594/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5595 * Must be set longer than active dwell time.
5596 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5597#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5598#define IWL_PASSIVE_DWELL_TIME_52 (10)
5599#define IWL_PASSIVE_DWELL_BASE (100)
5600#define IWL_CHANNEL_TUNE_TIME 5
5601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005602static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005603{
5604 if (phymode == MODE_IEEE80211A)
5605 return IWL_ACTIVE_DWELL_TIME_52;
5606 else
5607 return IWL_ACTIVE_DWELL_TIME_24;
5608}
5609
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005610static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005611{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005612 u16 active = iwl4965_get_active_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005613 u16 passive = (phymode != MODE_IEEE80211A) ?
5614 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5615 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5616
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005617 if (iwl4965_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005618 /* If we're associated, we clamp the maximum passive
5619 * dwell time to be 98% of the beacon interval (minus
5620 * 2 * channel tune time) */
5621 passive = priv->beacon_int;
5622 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5623 passive = IWL_PASSIVE_DWELL_BASE;
5624 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5625 }
5626
5627 if (passive <= active)
5628 passive = active + 1;
5629
5630 return passive;
5631}
5632
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005633static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
Zhu Yib481de92007-09-25 17:54:57 -07005634 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005635 struct iwl4965_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07005636{
5637 const struct ieee80211_channel *channels = NULL;
5638 const struct ieee80211_hw_mode *hw_mode;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005639 const struct iwl4965_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005640 u16 passive_dwell = 0;
5641 u16 active_dwell = 0;
5642 int added, i;
5643
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005644 hw_mode = iwl4965_get_hw_mode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005645 if (!hw_mode)
5646 return 0;
5647
5648 channels = hw_mode->channels;
5649
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005650 active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
5651 passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005652
5653 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5654 if (channels[i].chan ==
5655 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005656 if (iwl4965_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005657 IWL_DEBUG_SCAN
5658 ("Skipping current channel %d\n",
5659 le16_to_cpu(priv->active_rxon.channel));
5660 continue;
5661 }
5662 } else if (priv->only_active_channel)
5663 continue;
5664
5665 scan_ch->channel = channels[i].chan;
5666
Ben Cahill9fbab512007-11-29 11:09:47 +08005667 ch_info = iwl4965_get_channel_info(priv, phymode,
5668 scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07005669 if (!is_channel_valid(ch_info)) {
5670 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5671 scan_ch->channel);
5672 continue;
5673 }
5674
5675 if (!is_active || is_channel_passive(ch_info) ||
5676 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5677 scan_ch->type = 0; /* passive */
5678 else
5679 scan_ch->type = 1; /* active */
5680
5681 if (scan_ch->type & 1)
5682 scan_ch->type |= (direct_mask << 1);
5683
5684 if (is_channel_narrow(ch_info))
5685 scan_ch->type |= (1 << 7);
5686
5687 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5688 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5689
Ben Cahill9fbab512007-11-29 11:09:47 +08005690 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07005691 scan_ch->tpc.dsp_atten = 110;
5692 /* scan_pwr_info->tpc.dsp_atten; */
5693
5694 /*scan_pwr_info->tpc.tx_gain; */
5695 if (phymode == MODE_IEEE80211A)
5696 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5697 else {
5698 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5699 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08005700 * power level:
5701 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005702 */
5703 }
5704
5705 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5706 scan_ch->channel,
5707 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5708 (scan_ch->type & 1) ?
5709 active_dwell : passive_dwell);
5710
5711 scan_ch++;
5712 added++;
5713 }
5714
5715 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5716 return added;
5717}
5718
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005719static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005720{
5721 int i, j;
5722 for (i = 0; i < 3; i++) {
5723 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5724 for (j = 0; j < hw_mode->num_channels; j++)
5725 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5726 }
5727}
5728
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005729static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005730 struct ieee80211_rate *rates)
5731{
5732 int i;
5733
5734 for (i = 0; i < IWL_RATE_COUNT; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005735 rates[i].rate = iwl4965_rates[i].ieee * 5;
Zhu Yib481de92007-09-25 17:54:57 -07005736 rates[i].val = i; /* Rate scaling will work on indexes */
5737 rates[i].val2 = i;
5738 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5739 /* Only OFDM have the bits-per-symbol set */
5740 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5741 rates[i].flags |= IEEE80211_RATE_OFDM;
5742 else {
5743 /*
5744 * If CCK 1M then set rate flag to CCK else CCK_2
5745 * which is CCK | PREAMBLE2
5746 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005747 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
Zhu Yib481de92007-09-25 17:54:57 -07005748 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5749 }
5750
5751 /* Set up which ones are basic rates... */
5752 if (IWL_BASIC_RATES_MASK & (1 << i))
5753 rates[i].flags |= IEEE80211_RATE_BASIC;
5754 }
Zhu Yib481de92007-09-25 17:54:57 -07005755}
5756
5757/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005758 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005759 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005760static int iwl4965_init_geos(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005761{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005762 struct iwl4965_channel_info *ch;
Zhu Yib481de92007-09-25 17:54:57 -07005763 struct ieee80211_hw_mode *modes;
5764 struct ieee80211_channel *channels;
5765 struct ieee80211_channel *geo_ch;
5766 struct ieee80211_rate *rates;
5767 int i = 0;
5768 enum {
5769 A = 0,
5770 B = 1,
5771 G = 2,
Zhu Yib481de92007-09-25 17:54:57 -07005772 };
Ron Rindjunsky326eeee2007-11-26 16:14:37 +02005773 int mode_count = 3;
Zhu Yib481de92007-09-25 17:54:57 -07005774
5775 if (priv->modes) {
5776 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5777 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5778 return 0;
5779 }
5780
5781 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5782 GFP_KERNEL);
5783 if (!modes)
5784 return -ENOMEM;
5785
5786 channels = kzalloc(sizeof(struct ieee80211_channel) *
5787 priv->channel_count, GFP_KERNEL);
5788 if (!channels) {
5789 kfree(modes);
5790 return -ENOMEM;
5791 }
5792
5793 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5794 GFP_KERNEL);
5795 if (!rates) {
5796 kfree(modes);
5797 kfree(channels);
5798 return -ENOMEM;
5799 }
5800
5801 /* 0 = 802.11a
5802 * 1 = 802.11b
5803 * 2 = 802.11g
5804 */
5805
5806 /* 5.2GHz channels start after the 2.4GHz channels */
5807 modes[A].mode = MODE_IEEE80211A;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005808 modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
Zhu Yib481de92007-09-25 17:54:57 -07005809 modes[A].rates = rates;
5810 modes[A].num_rates = 8; /* just OFDM */
5811 modes[A].rates = &rates[4];
5812 modes[A].num_channels = 0;
Ron Rindjunsky326eeee2007-11-26 16:14:37 +02005813#ifdef CONFIG_IWL4965_HT
5814 iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
5815#endif
Zhu Yib481de92007-09-25 17:54:57 -07005816
5817 modes[B].mode = MODE_IEEE80211B;
5818 modes[B].channels = channels;
5819 modes[B].rates = rates;
5820 modes[B].num_rates = 4; /* just CCK */
5821 modes[B].num_channels = 0;
5822
5823 modes[G].mode = MODE_IEEE80211G;
5824 modes[G].channels = channels;
5825 modes[G].rates = rates;
5826 modes[G].num_rates = 12; /* OFDM & CCK */
5827 modes[G].num_channels = 0;
Ron Rindjunsky326eeee2007-11-26 16:14:37 +02005828#ifdef CONFIG_IWL4965_HT
5829 iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
5830#endif
Zhu Yib481de92007-09-25 17:54:57 -07005831
5832 priv->ieee_channels = channels;
5833 priv->ieee_rates = rates;
5834
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005835 iwl4965_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005836
5837 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5838 ch = &priv->channel_info[i];
5839
5840 if (!is_channel_valid(ch)) {
5841 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5842 "skipping.\n",
5843 ch->channel, is_channel_a_band(ch) ?
5844 "5.2" : "2.4");
5845 continue;
5846 }
5847
5848 if (is_channel_a_band(ch)) {
5849 geo_ch = &modes[A].channels[modes[A].num_channels++];
Zhu Yib481de92007-09-25 17:54:57 -07005850 } else {
5851 geo_ch = &modes[B].channels[modes[B].num_channels++];
5852 modes[G].num_channels++;
Zhu Yib481de92007-09-25 17:54:57 -07005853 }
5854
5855 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5856 geo_ch->chan = ch->channel;
5857 geo_ch->power_level = ch->max_power_avg;
5858 geo_ch->antenna_max = 0xff;
5859
5860 if (is_channel_valid(ch)) {
5861 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5862 if (ch->flags & EEPROM_CHANNEL_IBSS)
5863 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5864
5865 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5866 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5867
5868 if (ch->flags & EEPROM_CHANNEL_RADAR)
5869 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5870
5871 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5872 priv->max_channel_txpower_limit =
5873 ch->max_power_avg;
5874 }
5875
5876 geo_ch->val = geo_ch->flag;
5877 }
5878
5879 if ((modes[A].num_channels == 0) && priv->is_abg) {
5880 printk(KERN_INFO DRV_NAME
5881 ": Incorrectly detected BG card as ABG. Please send "
5882 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5883 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5884 priv->is_abg = 0;
5885 }
5886
5887 printk(KERN_INFO DRV_NAME
5888 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5889 modes[G].num_channels, modes[A].num_channels);
5890
5891 /*
5892 * NOTE: We register these in preference of order -- the
5893 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5894 * a phymode based on rates or AP capabilities but seems to
5895 * configure it purely on if the channel being configured
5896 * is supported by a mode -- and the first match is taken
5897 */
5898
5899 if (modes[G].num_channels)
5900 ieee80211_register_hwmode(priv->hw, &modes[G]);
5901 if (modes[B].num_channels)
5902 ieee80211_register_hwmode(priv->hw, &modes[B]);
5903 if (modes[A].num_channels)
5904 ieee80211_register_hwmode(priv->hw, &modes[A]);
5905
5906 priv->modes = modes;
5907 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5908
5909 return 0;
5910}
5911
5912/******************************************************************************
5913 *
5914 * uCode download functions
5915 *
5916 ******************************************************************************/
5917
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005918static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005919{
5920 if (priv->ucode_code.v_addr != NULL) {
5921 pci_free_consistent(priv->pci_dev,
5922 priv->ucode_code.len,
5923 priv->ucode_code.v_addr,
5924 priv->ucode_code.p_addr);
5925 priv->ucode_code.v_addr = NULL;
5926 }
5927 if (priv->ucode_data.v_addr != NULL) {
5928 pci_free_consistent(priv->pci_dev,
5929 priv->ucode_data.len,
5930 priv->ucode_data.v_addr,
5931 priv->ucode_data.p_addr);
5932 priv->ucode_data.v_addr = NULL;
5933 }
5934 if (priv->ucode_data_backup.v_addr != NULL) {
5935 pci_free_consistent(priv->pci_dev,
5936 priv->ucode_data_backup.len,
5937 priv->ucode_data_backup.v_addr,
5938 priv->ucode_data_backup.p_addr);
5939 priv->ucode_data_backup.v_addr = NULL;
5940 }
5941 if (priv->ucode_init.v_addr != NULL) {
5942 pci_free_consistent(priv->pci_dev,
5943 priv->ucode_init.len,
5944 priv->ucode_init.v_addr,
5945 priv->ucode_init.p_addr);
5946 priv->ucode_init.v_addr = NULL;
5947 }
5948 if (priv->ucode_init_data.v_addr != NULL) {
5949 pci_free_consistent(priv->pci_dev,
5950 priv->ucode_init_data.len,
5951 priv->ucode_init_data.v_addr,
5952 priv->ucode_init_data.p_addr);
5953 priv->ucode_init_data.v_addr = NULL;
5954 }
5955 if (priv->ucode_boot.v_addr != NULL) {
5956 pci_free_consistent(priv->pci_dev,
5957 priv->ucode_boot.len,
5958 priv->ucode_boot.v_addr,
5959 priv->ucode_boot.p_addr);
5960 priv->ucode_boot.v_addr = NULL;
5961 }
5962}
5963
5964/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005965 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005966 * looking at all data.
5967 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02005968static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
Ben Cahill9fbab512007-11-29 11:09:47 +08005969 u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005970{
5971 u32 val;
5972 u32 save_len = len;
5973 int rc = 0;
5974 u32 errcnt;
5975
5976 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5977
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005978 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005979 if (rc)
5980 return rc;
5981
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005982 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005983
5984 errcnt = 0;
5985 for (; len > 0; len -= sizeof(u32), image++) {
5986 /* read data comes through single port, auto-incr addr */
5987 /* NOTE: Use the debugless read so we don't flood kernel log
5988 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005989 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005990 if (val != le32_to_cpu(*image)) {
5991 IWL_ERROR("uCode INST section is invalid at "
5992 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5993 save_len - len, val, le32_to_cpu(*image));
5994 rc = -EIO;
5995 errcnt++;
5996 if (errcnt >= 20)
5997 break;
5998 }
5999 }
6000
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006001 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006002
6003 if (!errcnt)
6004 IWL_DEBUG_INFO
6005 ("ucode image in INSTRUCTION memory is good\n");
6006
6007 return rc;
6008}
6009
6010
6011/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006012 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07006013 * using sample data 100 bytes apart. If these sample points are good,
6014 * it's a pretty good bet that everything between them is good, too.
6015 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006016static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07006017{
6018 u32 val;
6019 int rc = 0;
6020 u32 errcnt = 0;
6021 u32 i;
6022
6023 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6024
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006025 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006026 if (rc)
6027 return rc;
6028
6029 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
6030 /* read data comes through single port, auto-incr addr */
6031 /* NOTE: Use the debugless read so we don't flood kernel log
6032 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006033 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07006034 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006035 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07006036 if (val != le32_to_cpu(*image)) {
6037#if 0 /* Enable this if you want to see details */
6038 IWL_ERROR("uCode INST section is invalid at "
6039 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6040 i, val, *image);
6041#endif
6042 rc = -EIO;
6043 errcnt++;
6044 if (errcnt >= 3)
6045 break;
6046 }
6047 }
6048
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006049 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006050
6051 return rc;
6052}
6053
6054
6055/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006056 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07006057 * and verify its contents
6058 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006059static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006060{
6061 __le32 *image;
6062 u32 len;
6063 int rc = 0;
6064
6065 /* Try bootstrap */
6066 image = (__le32 *)priv->ucode_boot.v_addr;
6067 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006068 rc = iwl4965_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07006069 if (rc == 0) {
6070 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
6071 return 0;
6072 }
6073
6074 /* Try initialize */
6075 image = (__le32 *)priv->ucode_init.v_addr;
6076 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006077 rc = iwl4965_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07006078 if (rc == 0) {
6079 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6080 return 0;
6081 }
6082
6083 /* Try runtime/protocol */
6084 image = (__le32 *)priv->ucode_code.v_addr;
6085 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006086 rc = iwl4965_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07006087 if (rc == 0) {
6088 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6089 return 0;
6090 }
6091
6092 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6093
Ben Cahill9fbab512007-11-29 11:09:47 +08006094 /* Since nothing seems to match, show first several data entries in
6095 * instruction SRAM, so maybe visual inspection will give a clue.
6096 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07006097 image = (__le32 *)priv->ucode_boot.v_addr;
6098 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006099 rc = iwl4965_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07006100
6101 return rc;
6102}
6103
6104
6105/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006106static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006107{
6108 __le32 *image = priv->ucode_boot.v_addr;
6109 u32 len = priv->ucode_boot.len;
6110 u32 reg;
6111 u32 val;
6112
6113 IWL_DEBUG_INFO("Begin verify bsm\n");
6114
6115 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006116 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07006117 for (reg = BSM_SRAM_LOWER_BOUND;
6118 reg < BSM_SRAM_LOWER_BOUND + len;
6119 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006120 val = iwl4965_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07006121 if (val != le32_to_cpu(*image)) {
6122 IWL_ERROR("BSM uCode verification failed at "
6123 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6124 BSM_SRAM_LOWER_BOUND,
6125 reg - BSM_SRAM_LOWER_BOUND, len,
6126 val, le32_to_cpu(*image));
6127 return -EIO;
6128 }
6129 }
6130
6131 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6132
6133 return 0;
6134}
6135
6136/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006137 * iwl4965_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07006138 *
6139 * BSM operation:
6140 *
6141 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6142 * in special SRAM that does not power down during RFKILL. When powering back
6143 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6144 * the bootstrap program into the on-board processor, and starts it.
6145 *
6146 * The bootstrap program loads (via DMA) instructions and data for a new
6147 * program from host DRAM locations indicated by the host driver in the
6148 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6149 * automatically.
6150 *
6151 * When initializing the NIC, the host driver points the BSM to the
6152 * "initialize" uCode image. This uCode sets up some internal data, then
6153 * notifies host via "initialize alive" that it is complete.
6154 *
6155 * The host then replaces the BSM_DRAM_* pointer values to point to the
6156 * normal runtime uCode instructions and a backup uCode data cache buffer
6157 * (filled initially with starting data values for the on-board processor),
6158 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6159 * which begins normal operation.
6160 *
6161 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6162 * the backup data cache in DRAM before SRAM is powered down.
6163 *
6164 * When powering back up, the BSM loads the bootstrap program. This reloads
6165 * the runtime uCode instructions and the backup data cache into SRAM,
6166 * and re-launches the runtime uCode from where it left off.
6167 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006168static int iwl4965_load_bsm(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006169{
6170 __le32 *image = priv->ucode_boot.v_addr;
6171 u32 len = priv->ucode_boot.len;
6172 dma_addr_t pinst;
6173 dma_addr_t pdata;
6174 u32 inst_len;
6175 u32 data_len;
6176 int rc;
6177 int i;
6178 u32 done;
6179 u32 reg_offset;
6180
6181 IWL_DEBUG_INFO("Begin load bsm\n");
6182
6183 /* make sure bootstrap program is no larger than BSM's SRAM size */
6184 if (len > IWL_MAX_BSM_SIZE)
6185 return -EINVAL;
6186
6187 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08006188 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006189 * NOTE: iwl4965_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07006190 * after the "initialize" uCode has run, to point to
6191 * runtime/protocol instructions and backup data cache. */
6192 pinst = priv->ucode_init.p_addr >> 4;
6193 pdata = priv->ucode_init_data.p_addr >> 4;
6194 inst_len = priv->ucode_init.len;
6195 data_len = priv->ucode_init_data.len;
6196
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006197 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006198 if (rc)
6199 return rc;
6200
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006201 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6202 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6203 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6204 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07006205
6206 /* Fill BSM memory with bootstrap instructions */
6207 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6208 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6209 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006210 _iwl4965_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07006211 le32_to_cpu(*image));
6212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006213 rc = iwl4965_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006214 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006215 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006216 return rc;
6217 }
6218
6219 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006220 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6221 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006222 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006223 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07006224
6225 /* Load bootstrap code into instruction SRAM now,
6226 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006227 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006228 BSM_WR_CTRL_REG_BIT_START);
6229
6230 /* Wait for load of bootstrap uCode to finish */
6231 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006232 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07006233 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6234 break;
6235 udelay(10);
6236 }
6237 if (i < 100)
6238 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6239 else {
6240 IWL_ERROR("BSM write did not complete!\n");
6241 return -EIO;
6242 }
6243
6244 /* Enable future boot loads whenever power management unit triggers it
6245 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006246 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006247 BSM_WR_CTRL_REG_BIT_START_EN);
6248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006249 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006250
6251 return 0;
6252}
6253
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006254static void iwl4965_nic_start(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006255{
6256 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006257 iwl4965_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006258}
6259
Tomas Winkler90e759d2007-11-29 11:09:41 +08006260static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
6261{
6262 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
6263 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
6264}
6265
Zhu Yib481de92007-09-25 17:54:57 -07006266/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006267 * iwl4965_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07006268 *
6269 * Copy into buffers for card to fetch via bus-mastering
6270 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006271static int iwl4965_read_ucode(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006272{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006273 struct iwl4965_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006274 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006275 const struct firmware *ucode_raw;
6276 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6277 u8 *src;
6278 size_t len;
6279 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6280
6281 /* Ask kernel firmware_class module to get the boot firmware off disk.
6282 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08006283 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6284 if (ret < 0) {
6285 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6286 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07006287 goto error;
6288 }
6289
6290 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6291 name, ucode_raw->size);
6292
6293 /* Make sure that we got at least our header! */
6294 if (ucode_raw->size < sizeof(*ucode)) {
6295 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08006296 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006297 goto err_release;
6298 }
6299
6300 /* Data from ucode file: header followed by uCode images */
6301 ucode = (void *)ucode_raw->data;
6302
6303 ver = le32_to_cpu(ucode->ver);
6304 inst_size = le32_to_cpu(ucode->inst_size);
6305 data_size = le32_to_cpu(ucode->data_size);
6306 init_size = le32_to_cpu(ucode->init_size);
6307 init_data_size = le32_to_cpu(ucode->init_data_size);
6308 boot_size = le32_to_cpu(ucode->boot_size);
6309
6310 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6311 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6312 inst_size);
6313 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6314 data_size);
6315 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6316 init_size);
6317 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6318 init_data_size);
6319 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6320 boot_size);
6321
6322 /* Verify size of file vs. image size info in file's header */
6323 if (ucode_raw->size < sizeof(*ucode) +
6324 inst_size + data_size + init_size +
6325 init_data_size + boot_size) {
6326
6327 IWL_DEBUG_INFO("uCode file size %d too small\n",
6328 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08006329 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006330 goto err_release;
6331 }
6332
6333 /* Verify that uCode images will fit in card's SRAM */
6334 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08006335 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6336 inst_size);
6337 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006338 goto err_release;
6339 }
6340
6341 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08006342 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6343 data_size);
6344 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006345 goto err_release;
6346 }
6347 if (init_size > IWL_MAX_INST_SIZE) {
6348 IWL_DEBUG_INFO
Tomas Winkler90e759d2007-11-29 11:09:41 +08006349 ("uCode init instr len %d too large to fit in\n",
6350 init_size);
6351 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006352 goto err_release;
6353 }
6354 if (init_data_size > IWL_MAX_DATA_SIZE) {
6355 IWL_DEBUG_INFO
Tomas Winkler90e759d2007-11-29 11:09:41 +08006356 ("uCode init data len %d too large to fit in\n",
6357 init_data_size);
6358 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006359 goto err_release;
6360 }
6361 if (boot_size > IWL_MAX_BSM_SIZE) {
6362 IWL_DEBUG_INFO
Tomas Winkler90e759d2007-11-29 11:09:41 +08006363 ("uCode boot instr len %d too large to fit in\n",
6364 boot_size);
6365 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006366 goto err_release;
6367 }
6368
6369 /* Allocate ucode buffers for card's bus-master loading ... */
6370
6371 /* Runtime instructions and 2 copies of data:
6372 * 1) unmodified from disk
6373 * 2) backup cache for save/restore during power-downs */
6374 priv->ucode_code.len = inst_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006375 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07006376
6377 priv->ucode_data.len = data_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006378 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07006379
6380 priv->ucode_data_backup.len = data_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006381 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07006382
6383 /* Initialization instructions and data */
Tomas Winkler90e759d2007-11-29 11:09:41 +08006384 if (init_size && init_data_size) {
6385 priv->ucode_init.len = init_size;
6386 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Zhu Yib481de92007-09-25 17:54:57 -07006387
Tomas Winkler90e759d2007-11-29 11:09:41 +08006388 priv->ucode_init_data.len = init_data_size;
6389 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6390
6391 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6392 goto err_pci_alloc;
6393 }
Zhu Yib481de92007-09-25 17:54:57 -07006394
6395 /* Bootstrap (instructions only, no data) */
Tomas Winkler90e759d2007-11-29 11:09:41 +08006396 if (boot_size) {
6397 priv->ucode_boot.len = boot_size;
6398 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07006399
Tomas Winkler90e759d2007-11-29 11:09:41 +08006400 if (!priv->ucode_boot.v_addr)
6401 goto err_pci_alloc;
6402 }
Zhu Yib481de92007-09-25 17:54:57 -07006403
6404 /* Copy images into buffers for card's bus-master reads ... */
6405
6406 /* Runtime instructions (first block of data in file) */
6407 src = &ucode->data[0];
6408 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006409 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006410 memcpy(priv->ucode_code.v_addr, src, len);
6411 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6412 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6413
6414 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006415 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
Zhu Yib481de92007-09-25 17:54:57 -07006416 src = &ucode->data[inst_size];
6417 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006418 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006419 memcpy(priv->ucode_data.v_addr, src, len);
6420 memcpy(priv->ucode_data_backup.v_addr, src, len);
6421
6422 /* Initialization instructions (3rd block) */
6423 if (init_size) {
6424 src = &ucode->data[inst_size + data_size];
6425 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006426 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6427 len);
Zhu Yib481de92007-09-25 17:54:57 -07006428 memcpy(priv->ucode_init.v_addr, src, len);
6429 }
6430
6431 /* Initialization data (4th block) */
6432 if (init_data_size) {
6433 src = &ucode->data[inst_size + data_size + init_size];
6434 len = priv->ucode_init_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006435 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6436 len);
Zhu Yib481de92007-09-25 17:54:57 -07006437 memcpy(priv->ucode_init_data.v_addr, src, len);
6438 }
6439
6440 /* Bootstrap instructions (5th block) */
6441 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6442 len = priv->ucode_boot.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006443 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006444 memcpy(priv->ucode_boot.v_addr, src, len);
6445
6446 /* We have our copies now, allow OS release its copies */
6447 release_firmware(ucode_raw);
6448 return 0;
6449
6450 err_pci_alloc:
6451 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08006452 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006453 iwl4965_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006454
6455 err_release:
6456 release_firmware(ucode_raw);
6457
6458 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08006459 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006460}
6461
6462
6463/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006464 * iwl4965_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07006465 *
6466 * Tell initialization uCode where to find runtime uCode.
6467 *
6468 * BSM registers initially contain pointers to initialization uCode.
6469 * We need to replace them to load runtime uCode inst and data,
6470 * and to save runtime data when powering down.
6471 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006472static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006473{
6474 dma_addr_t pinst;
6475 dma_addr_t pdata;
6476 int rc = 0;
6477 unsigned long flags;
6478
6479 /* bits 35:4 for 4965 */
6480 pinst = priv->ucode_code.p_addr >> 4;
6481 pdata = priv->ucode_data_backup.p_addr >> 4;
6482
6483 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006484 rc = iwl4965_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006485 if (rc) {
6486 spin_unlock_irqrestore(&priv->lock, flags);
6487 return rc;
6488 }
6489
6490 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006491 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6492 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6493 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006494 priv->ucode_data.len);
6495
6496 /* Inst bytecount must be last to set up, bit 31 signals uCode
6497 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006498 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006499 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6500
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006501 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006502
6503 spin_unlock_irqrestore(&priv->lock, flags);
6504
6505 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6506
6507 return rc;
6508}
6509
6510/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006511 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006512 *
6513 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6514 *
6515 * The 4965 "initialize" ALIVE reply contains calibration data for:
6516 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6517 * (3945 does not contain this data).
6518 *
6519 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6520*/
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006521static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006522{
6523 /* Check alive response for "valid" sign from uCode */
6524 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6525 /* We had an error bringing up the hardware, so take it
6526 * all the way back down so we can try again */
6527 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6528 goto restart;
6529 }
6530
6531 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6532 * This is a paranoid check, because we would not have gotten the
6533 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006534 if (iwl4965_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006535 /* Runtime instruction load was bad;
6536 * take it all the way back down so we can try again */
6537 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6538 goto restart;
6539 }
6540
6541 /* Calculate temperature */
6542 priv->temperature = iwl4965_get_temperature(priv);
6543
6544 /* Send pointers to protocol/runtime uCode image ... init code will
6545 * load and launch runtime uCode, which will send us another "Alive"
6546 * notification. */
6547 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006548 if (iwl4965_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006549 /* Runtime instruction load won't happen;
6550 * take it all the way back down so we can try again */
6551 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6552 goto restart;
6553 }
6554 return;
6555
6556 restart:
6557 queue_work(priv->workqueue, &priv->restart);
6558}
6559
6560
6561/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006562 * iwl4965_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006563 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006564 * Alive gets handled by iwl4965_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07006565 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006566static void iwl4965_alive_start(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006567{
6568 int rc = 0;
6569
6570 IWL_DEBUG_INFO("Runtime Alive received.\n");
6571
6572 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6573 /* We had an error bringing up the hardware, so take it
6574 * all the way back down so we can try again */
6575 IWL_DEBUG_INFO("Alive failed.\n");
6576 goto restart;
6577 }
6578
6579 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6580 * This is a paranoid check, because we would not have gotten the
6581 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006582 if (iwl4965_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006583 /* Runtime instruction load was bad;
6584 * take it all the way back down so we can try again */
6585 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6586 goto restart;
6587 }
6588
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006589 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006590
6591 rc = iwl4965_alive_notify(priv);
6592 if (rc) {
6593 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6594 rc);
6595 goto restart;
6596 }
6597
Ben Cahill9fbab512007-11-29 11:09:47 +08006598 /* After the ALIVE response, we can send host commands to 4965 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07006599 set_bit(STATUS_ALIVE, &priv->status);
6600
6601 /* Clear out the uCode error bit if it is set */
6602 clear_bit(STATUS_FW_ERROR, &priv->status);
6603
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006604 rc = iwl4965_init_channel_map(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006605 if (rc) {
6606 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6607 return;
6608 }
6609
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006610 iwl4965_init_geos(priv);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006611 iwl4965_reset_channel_flag(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006612
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006613 if (iwl4965_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006614 return;
6615
Zhu Yi5a66926a2008-01-14 17:46:18 -08006616 ieee80211_start_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006617
6618 priv->active_rate = priv->rates_mask;
6619 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6620
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006621 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07006622
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006623 if (iwl4965_is_associated(priv)) {
6624 struct iwl4965_rxon_cmd *active_rxon =
6625 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07006626
6627 memcpy(&priv->staging_rxon, &priv->active_rxon,
6628 sizeof(priv->staging_rxon));
6629 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6630 } else {
6631 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006632 iwl4965_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006633 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6634 }
6635
Ben Cahill9fbab512007-11-29 11:09:47 +08006636 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006637 iwl4965_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006638
6639 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006640 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006641
6642 /* At this point, the NIC is initialized and operational */
6643 priv->notif_missed_beacons = 0;
6644 set_bit(STATUS_READY, &priv->status);
6645
6646 iwl4965_rf_kill_ct_config(priv);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006647
Zhu Yib481de92007-09-25 17:54:57 -07006648 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Zhu Yi5a66926a2008-01-14 17:46:18 -08006649 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07006650
6651 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006652 iwl4965_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006653
6654 return;
6655
6656 restart:
6657 queue_work(priv->workqueue, &priv->restart);
6658}
6659
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006660static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07006661
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006662static void __iwl4965_down(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006663{
6664 unsigned long flags;
6665 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6666 struct ieee80211_conf *conf = NULL;
6667
6668 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6669
6670 conf = ieee80211_get_hw_conf(priv->hw);
6671
6672 if (!exit_pending)
6673 set_bit(STATUS_EXIT_PENDING, &priv->status);
6674
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006675 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006676
6677 /* Unblock any waiting calls */
6678 wake_up_interruptible_all(&priv->wait_command_queue);
6679
Zhu Yib481de92007-09-25 17:54:57 -07006680 /* Wipe out the EXIT_PENDING status bit if we are not actually
6681 * exiting the module */
6682 if (!exit_pending)
6683 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6684
6685 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006686 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07006687
6688 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006689 iwl4965_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006690
6691 if (priv->mac80211_registered)
6692 ieee80211_stop_queues(priv->hw);
6693
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006694 /* If we have not previously called iwl4965_init() then
Zhu Yib481de92007-09-25 17:54:57 -07006695 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006696 if (!iwl4965_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006697 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6698 STATUS_RF_KILL_HW |
6699 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6700 STATUS_RF_KILL_SW |
6701 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6702 STATUS_IN_SUSPEND;
6703 goto exit;
6704 }
6705
6706 /* ...otherwise clear out all the status bits but the RF Kill and
6707 * SUSPEND bits and continue taking the NIC down. */
6708 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6709 STATUS_RF_KILL_HW |
6710 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6711 STATUS_RF_KILL_SW |
6712 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6713 STATUS_IN_SUSPEND |
6714 test_bit(STATUS_FW_ERROR, &priv->status) <<
6715 STATUS_FW_ERROR;
6716
6717 spin_lock_irqsave(&priv->lock, flags);
Ben Cahill9fbab512007-11-29 11:09:47 +08006718 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6719 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07006720 spin_unlock_irqrestore(&priv->lock, flags);
6721
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006722 iwl4965_hw_txq_ctx_stop(priv);
6723 iwl4965_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006724
6725 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006726 if (!iwl4965_grab_nic_access(priv)) {
6727 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006728 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006729 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006730 }
6731 spin_unlock_irqrestore(&priv->lock, flags);
6732
6733 udelay(5);
6734
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006735 iwl4965_hw_nic_stop_master(priv);
6736 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6737 iwl4965_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006738
6739 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006740 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07006741
6742 if (priv->ibss_beacon)
6743 dev_kfree_skb(priv->ibss_beacon);
6744 priv->ibss_beacon = NULL;
6745
6746 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006747 iwl4965_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006748}
6749
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006750static void iwl4965_down(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006751{
6752 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006753 __iwl4965_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006754 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08006755
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006756 iwl4965_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006757}
6758
6759#define MAX_HW_RESTARTS 5
6760
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006761static int __iwl4965_up(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006762{
6763 int rc, i;
6764 u32 hw_rf_kill = 0;
6765
6766 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6767 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6768 return -EIO;
6769 }
6770
6771 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6772 IWL_WARNING("Radio disabled by SW RF kill (module "
6773 "parameter)\n");
6774 return 0;
6775 }
6776
Reinette Chatrea781cf92008-01-21 10:08:31 -08006777 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6778 IWL_ERROR("ucode not available for device bringup\n");
6779 return -EIO;
6780 }
6781
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006782 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006783
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006784 rc = iwl4965_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006785 if (rc) {
6786 IWL_ERROR("Unable to int nic\n");
6787 return rc;
6788 }
6789
6790 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006791 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6792 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006793 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6794
6795 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006796 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6797 iwl4965_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006798
6799 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006800 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6801 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006802
6803 /* Copy original ucode data image from disk into backup cache.
6804 * This will be used to initialize the on-board processor's
6805 * data SRAM for a clean start when the runtime program first loads. */
6806 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a66926a2008-01-14 17:46:18 -08006807 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006808
6809 /* If platform's RF_KILL switch is set to KILL,
6810 * wait for BIT_INT_RF_KILL interrupt before loading uCode
6811 * and getting things started */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006812 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07006813 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
6814 hw_rf_kill = 1;
6815
6816 if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
6817 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6818 return 0;
6819 }
6820
6821 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6822
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006823 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006824
6825 /* load bootstrap state machine,
6826 * load bootstrap program into processor's memory,
6827 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006828 rc = iwl4965_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006829
6830 if (rc) {
6831 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6832 continue;
6833 }
6834
6835 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006836 iwl4965_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006837
Zhu Yib481de92007-09-25 17:54:57 -07006838 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6839
6840 return 0;
6841 }
6842
6843 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006844 __iwl4965_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006845
6846 /* tried to restart and config the device for as long as our
6847 * patience could withstand */
6848 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6849 return -EIO;
6850}
6851
6852
6853/*****************************************************************************
6854 *
6855 * Workqueue callbacks
6856 *
6857 *****************************************************************************/
6858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006859static void iwl4965_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006860{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006861 struct iwl4965_priv *priv =
6862 container_of(data, struct iwl4965_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006863
6864 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6865 return;
6866
6867 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006868 iwl4965_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006869 mutex_unlock(&priv->mutex);
6870}
6871
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006872static void iwl4965_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006873{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006874 struct iwl4965_priv *priv =
6875 container_of(data, struct iwl4965_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006876
6877 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6878 return;
6879
6880 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006881 iwl4965_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006882 mutex_unlock(&priv->mutex);
6883}
6884
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006885static void iwl4965_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006886{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006887 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006888
6889 wake_up_interruptible(&priv->wait_command_queue);
6890
6891 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6892 return;
6893
6894 mutex_lock(&priv->mutex);
6895
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006896 if (!iwl4965_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006897 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6898 "HW and/or SW RF Kill no longer active, restarting "
6899 "device\n");
6900 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6901 queue_work(priv->workqueue, &priv->restart);
6902 } else {
6903
6904 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6905 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6906 "disabled by SW switch\n");
6907 else
6908 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6909 "Kill switch must be turned off for "
6910 "wireless networking to work.\n");
6911 }
6912 mutex_unlock(&priv->mutex);
6913}
6914
6915#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006917static void iwl4965_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006918{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006919 struct iwl4965_priv *priv =
6920 container_of(data, struct iwl4965_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006921
6922 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6923 return;
6924
6925 mutex_lock(&priv->mutex);
6926 if (test_bit(STATUS_SCANNING, &priv->status) ||
6927 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6928 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6929 "Scan completion watchdog resetting adapter (%dms)\n",
6930 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
mabbas052c4b92007-10-25 17:15:43 +08006931
Zhu Yib481de92007-09-25 17:54:57 -07006932 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006933 iwl4965_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006934 }
6935 mutex_unlock(&priv->mutex);
6936}
6937
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006938static void iwl4965_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006939{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006940 struct iwl4965_priv *priv =
6941 container_of(data, struct iwl4965_priv, request_scan);
6942 struct iwl4965_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006943 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006944 .len = sizeof(struct iwl4965_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006945 .meta.flags = CMD_SIZE_HUGE,
6946 };
6947 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006948 struct iwl4965_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006949 struct ieee80211_conf *conf = NULL;
6950 u8 direct_mask;
6951 int phymode;
6952
6953 conf = ieee80211_get_hw_conf(priv->hw);
6954
6955 mutex_lock(&priv->mutex);
6956
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006957 if (!iwl4965_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006958 IWL_WARNING("request scan called when driver not ready.\n");
6959 goto done;
6960 }
6961
6962 /* Make sure the scan wasn't cancelled before this queued work
6963 * was given the chance to run... */
6964 if (!test_bit(STATUS_SCANNING, &priv->status))
6965 goto done;
6966
6967 /* This should never be called or scheduled if there is currently
6968 * a scan active in the hardware. */
6969 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6970 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6971 "Ignoring second request.\n");
6972 rc = -EIO;
6973 goto done;
6974 }
6975
6976 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6977 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6978 goto done;
6979 }
6980
6981 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6982 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6983 goto done;
6984 }
6985
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006986 if (iwl4965_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006987 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6988 goto done;
6989 }
6990
6991 if (!test_bit(STATUS_READY, &priv->status)) {
6992 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6993 goto done;
6994 }
6995
6996 if (!priv->scan_bands) {
6997 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6998 goto done;
6999 }
7000
7001 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007002 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07007003 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
7004 if (!priv->scan) {
7005 rc = -ENOMEM;
7006 goto done;
7007 }
7008 }
7009 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007010 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07007011
7012 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
7013 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
7014
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007015 if (iwl4965_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007016 u16 interval = 0;
7017 u32 extra;
7018 u32 suspend_time = 100;
7019 u32 scan_suspend_time = 100;
7020 unsigned long flags;
7021
7022 IWL_DEBUG_INFO("Scanning while associated...\n");
7023
7024 spin_lock_irqsave(&priv->lock, flags);
7025 interval = priv->beacon_int;
7026 spin_unlock_irqrestore(&priv->lock, flags);
7027
7028 scan->suspend_time = 0;
mabbas052c4b92007-10-25 17:15:43 +08007029 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07007030 if (!interval)
7031 interval = suspend_time;
7032
7033 extra = (suspend_time / interval) << 22;
7034 scan_suspend_time = (extra |
7035 ((suspend_time % interval) * 1024));
7036 scan->suspend_time = cpu_to_le32(scan_suspend_time);
7037 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
7038 scan_suspend_time, interval);
7039 }
7040
7041 /* We should add the ability for user to lock to PASSIVE ONLY */
7042 if (priv->one_direct_scan) {
7043 IWL_DEBUG_SCAN
7044 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007045 iwl4965_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07007046 priv->direct_ssid_len));
7047 scan->direct_scan[0].id = WLAN_EID_SSID;
7048 scan->direct_scan[0].len = priv->direct_ssid_len;
7049 memcpy(scan->direct_scan[0].ssid,
7050 priv->direct_ssid, priv->direct_ssid_len);
7051 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007052 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07007053 scan->direct_scan[0].id = WLAN_EID_SSID;
7054 scan->direct_scan[0].len = priv->essid_len;
7055 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
7056 direct_mask = 1;
7057 } else
7058 direct_mask = 0;
7059
7060 /* We don't build a direct scan probe request; the uCode will do
7061 * that based on the direct_mask added to each channel entry */
7062 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007063 iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Zhu Yib481de92007-09-25 17:54:57 -07007064 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
7065 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
7066 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
7067 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
7068
7069 /* flags + rate selection */
7070
7071 scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
7072
7073 switch (priv->scan_bands) {
7074 case 2:
7075 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
7076 scan->tx_cmd.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007077 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
Zhu Yib481de92007-09-25 17:54:57 -07007078 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
7079
7080 scan->good_CRC_th = 0;
7081 phymode = MODE_IEEE80211G;
7082 break;
7083
7084 case 1:
7085 scan->tx_cmd.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007086 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
Zhu Yib481de92007-09-25 17:54:57 -07007087 RATE_MCS_ANT_B_MSK);
7088 scan->good_CRC_th = IWL_GOOD_CRC_TH;
7089 phymode = MODE_IEEE80211A;
7090 break;
7091
7092 default:
7093 IWL_WARNING("Invalid scan band count\n");
7094 goto done;
7095 }
7096
7097 /* select Rx chains */
7098
7099 /* Force use of chains B and C (0x6) for scan Rx.
7100 * Avoid A (0x1) because of its off-channel reception on A-band.
7101 * MIMO is not used here, but value is required to make uCode happy. */
7102 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7103 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7104 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7105 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7106
7107 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7108 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7109
7110 if (direct_mask)
7111 IWL_DEBUG_SCAN
7112 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007113 iwl4965_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07007114 else
7115 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7116
7117 scan->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007118 iwl4965_get_channels_for_scan(
Zhu Yib481de92007-09-25 17:54:57 -07007119 priv, phymode, 1, /* active */
7120 direct_mask,
7121 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7122
7123 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007124 scan->channel_count * sizeof(struct iwl4965_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07007125 cmd.data = scan;
7126 scan->len = cpu_to_le16(cmd.len);
7127
7128 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007129 rc = iwl4965_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07007130 if (rc)
7131 goto done;
7132
7133 queue_delayed_work(priv->workqueue, &priv->scan_check,
7134 IWL_SCAN_CHECK_WATCHDOG);
7135
7136 mutex_unlock(&priv->mutex);
7137 return;
7138
7139 done:
Ian Schram01ebd062007-10-25 17:15:22 +08007140 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07007141 queue_work(priv->workqueue, &priv->scan_completed);
7142 mutex_unlock(&priv->mutex);
7143}
7144
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007145static void iwl4965_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07007146{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007147 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07007148
7149 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7150 return;
7151
7152 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007153 __iwl4965_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007154 mutex_unlock(&priv->mutex);
7155}
7156
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007157static void iwl4965_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07007158{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007159 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07007160
7161 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7162 return;
7163
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007164 iwl4965_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007165 queue_work(priv->workqueue, &priv->up);
7166}
7167
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007168static void iwl4965_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07007169{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007170 struct iwl4965_priv *priv =
7171 container_of(data, struct iwl4965_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07007172
7173 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7174 return;
7175
7176 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007177 iwl4965_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007178 mutex_unlock(&priv->mutex);
7179}
7180
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007181#define IWL_DELAY_NEXT_SCAN (HZ*2)
7182
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007183static void iwl4965_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07007184{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007185 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
Zhu Yib481de92007-09-25 17:54:57 -07007186 post_associate.work);
7187
7188 int rc = 0;
7189 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07007190 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007191
7192 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7193 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7194 return;
7195 }
7196
Joe Perches0795af52007-10-03 17:59:30 -07007197 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7198 priv->assoc_id,
7199 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07007200
7201
7202 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7203 return;
7204
7205 mutex_lock(&priv->mutex);
7206
Johannes Berg32bfd352007-12-19 01:31:26 +01007207 if (!priv->vif || !priv->is_open) {
Mohamed Abbas948c1712007-10-25 17:15:45 +08007208 mutex_unlock(&priv->mutex);
7209 return;
7210 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007211 iwl4965_scan_cancel_timeout(priv, 200);
mabbas052c4b92007-10-25 17:15:43 +08007212
Zhu Yib481de92007-09-25 17:54:57 -07007213 conf = ieee80211_get_hw_conf(priv->hw);
7214
7215 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007216 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007217
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007218 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7219 iwl4965_setup_rxon_timing(priv);
7220 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07007221 sizeof(priv->rxon_timing), &priv->rxon_timing);
7222 if (rc)
7223 IWL_WARNING("REPLY_RXON_TIMING failed - "
7224 "Attempting to continue.\n");
7225
7226 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7227
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007228#ifdef CONFIG_IWL4965_HT
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02007229 if (priv->current_ht_config.is_ht)
7230 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007231#endif /* CONFIG_IWL4965_HT*/
Zhu Yib481de92007-09-25 17:54:57 -07007232 iwl4965_set_rxon_chain(priv);
7233 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7234
7235 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7236 priv->assoc_id, priv->beacon_int);
7237
7238 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7239 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7240 else
7241 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7242
7243 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7244 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7245 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7246 else
7247 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7248
7249 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7250 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7251
7252 }
7253
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007254 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007255
7256 switch (priv->iw_mode) {
7257 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007258 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007259 break;
7260
7261 case IEEE80211_IF_TYPE_IBSS:
7262
7263 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007264 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007265
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007266 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7267 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7268 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7269 iwl4965_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007270
7271 break;
7272
7273 default:
7274 IWL_ERROR("%s Should not be called in %d mode\n",
7275 __FUNCTION__, priv->iw_mode);
7276 break;
7277 }
7278
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007279 iwl4965_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007280
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007281#ifdef CONFIG_IWL4965_SENSITIVITY
Zhu Yib481de92007-09-25 17:54:57 -07007282 /* Enable Rx differential gain and sensitivity calibrations */
7283 iwl4965_chain_noise_reset(priv);
7284 priv->start_calib = 1;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007285#endif /* CONFIG_IWL4965_SENSITIVITY */
Zhu Yib481de92007-09-25 17:54:57 -07007286
7287 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7288 priv->assoc_station_added = 1;
7289
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007290#ifdef CONFIG_IWL4965_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007291 iwl4965_activate_qos(priv, 0);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007292#endif /* CONFIG_IWL4965_QOS */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007293 /* we have just associated, don't start scan too early */
7294 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07007295 mutex_unlock(&priv->mutex);
7296}
7297
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007298static void iwl4965_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07007299{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007300 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07007301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007302 if (!iwl4965_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007303 return;
7304
7305 mutex_lock(&priv->mutex);
7306
7307 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007308 iwl4965_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007309
7310 mutex_unlock(&priv->mutex);
7311}
7312
Zhu Yi76bb77e2007-11-22 10:53:22 +08007313static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7314
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007315static void iwl4965_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07007316{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007317 struct iwl4965_priv *priv =
7318 container_of(work, struct iwl4965_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07007319
7320 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7321
7322 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7323 return;
7324
Zhu Yia0646472007-12-20 14:10:01 +08007325 if (test_bit(STATUS_CONF_PENDING, &priv->status))
7326 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08007327
Zhu Yib481de92007-09-25 17:54:57 -07007328 ieee80211_scan_completed(priv->hw);
7329
7330 /* Since setting the TXPOWER may have been deferred while
7331 * performing the scan, fire one off */
7332 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007333 iwl4965_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007334 mutex_unlock(&priv->mutex);
7335}
7336
7337/*****************************************************************************
7338 *
7339 * mac80211 entry point functions
7340 *
7341 *****************************************************************************/
7342
Zhu Yi5a66926a2008-01-14 17:46:18 -08007343#define UCODE_READY_TIMEOUT (2 * HZ)
7344
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007345static int iwl4965_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007346{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007347 struct iwl4965_priv *priv = hw->priv;
Zhu Yi5a66926a2008-01-14 17:46:18 -08007348 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07007349
7350 IWL_DEBUG_MAC80211("enter\n");
7351
Zhu Yi5a66926a2008-01-14 17:46:18 -08007352 if (pci_enable_device(priv->pci_dev)) {
7353 IWL_ERROR("Fail to pci_enable_device\n");
7354 return -ENODEV;
7355 }
7356 pci_restore_state(priv->pci_dev);
7357 pci_enable_msi(priv->pci_dev);
7358
7359 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7360 DRV_NAME, priv);
7361 if (ret) {
7362 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7363 goto out_disable_msi;
7364 }
7365
Zhu Yib481de92007-09-25 17:54:57 -07007366 /* we should be verifying the device is ready to be opened */
7367 mutex_lock(&priv->mutex);
7368
Zhu Yi5a66926a2008-01-14 17:46:18 -08007369 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7370 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7371 * ucode filename and max sizes are card-specific. */
7372
7373 if (!priv->ucode_code.len) {
7374 ret = iwl4965_read_ucode(priv);
7375 if (ret) {
7376 IWL_ERROR("Could not read microcode: %d\n", ret);
7377 mutex_unlock(&priv->mutex);
7378 goto out_release_irq;
7379 }
7380 }
7381
7382 IWL_DEBUG_INFO("Start UP work.\n");
7383 __iwl4965_up(priv);
7384
Zhu Yib481de92007-09-25 17:54:57 -07007385 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07007386 mutex_unlock(&priv->mutex);
Zhu Yi5a66926a2008-01-14 17:46:18 -08007387
7388 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7389 * mac80211 will not be run successfully. */
7390 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7391 test_bit(STATUS_READY, &priv->status),
7392 UCODE_READY_TIMEOUT);
7393 if (!ret) {
7394 if (!test_bit(STATUS_READY, &priv->status)) {
7395 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7396 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7397 ret = -ETIMEDOUT;
7398 goto out_release_irq;
7399 }
7400 }
7401
Zhu Yib481de92007-09-25 17:54:57 -07007402 IWL_DEBUG_MAC80211("leave\n");
7403 return 0;
Zhu Yi5a66926a2008-01-14 17:46:18 -08007404
7405out_release_irq:
7406 free_irq(priv->pci_dev->irq, priv);
7407out_disable_msi:
7408 pci_disable_msi(priv->pci_dev);
7409 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07007410}
7411
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007412static void iwl4965_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007413{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007414 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007415
7416 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas948c1712007-10-25 17:15:45 +08007417
Mohamed Abbas948c1712007-10-25 17:15:45 +08007418 /* stop mac, cancel any scan request and clear
7419 * RXON_FILTER_ASSOC_MSK BIT
7420 */
Zhu Yib481de92007-09-25 17:54:57 -07007421 priv->is_open = 0;
Zhu Yi5a66926a2008-01-14 17:46:18 -08007422
7423 if (iwl4965_is_ready_rf(priv)) {
7424 mutex_lock(&priv->mutex);
7425 iwl4965_scan_cancel_timeout(priv, 100);
7426 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08007427 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08007428 }
7429
Zhu Yi5a66926a2008-01-14 17:46:18 -08007430 iwl4965_down(priv);
7431
7432 flush_workqueue(priv->workqueue);
7433 free_irq(priv->pci_dev->irq, priv);
7434 pci_disable_msi(priv->pci_dev);
7435 pci_save_state(priv->pci_dev);
7436 pci_disable_device(priv->pci_dev);
Mohamed Abbas948c1712007-10-25 17:15:45 +08007437
Zhu Yib481de92007-09-25 17:54:57 -07007438 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007439}
7440
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007441static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007442 struct ieee80211_tx_control *ctl)
7443{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007444 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007445
7446 IWL_DEBUG_MAC80211("enter\n");
7447
7448 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7449 IWL_DEBUG_MAC80211("leave - monitor\n");
7450 return -1;
7451 }
7452
7453 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7454 ctl->tx_rate);
7455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007456 if (iwl4965_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07007457 dev_kfree_skb_any(skb);
7458
7459 IWL_DEBUG_MAC80211("leave\n");
7460 return 0;
7461}
7462
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007463static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007464 struct ieee80211_if_init_conf *conf)
7465{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007466 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007467 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07007468 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007469
Johannes Berg32bfd352007-12-19 01:31:26 +01007470 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007471
Johannes Berg32bfd352007-12-19 01:31:26 +01007472 if (priv->vif) {
7473 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Zhu Yib481de92007-09-25 17:54:57 -07007474 return 0;
7475 }
7476
7477 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01007478 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07007479
7480 spin_unlock_irqrestore(&priv->lock, flags);
7481
7482 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02007483
7484 if (conf->mac_addr) {
7485 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7486 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7487 }
Zhu Yib481de92007-09-25 17:54:57 -07007488
Zhu Yi5a66926a2008-01-14 17:46:18 -08007489 if (iwl4965_is_ready(priv))
7490 iwl4965_set_mode(priv, conf->type);
7491
Zhu Yib481de92007-09-25 17:54:57 -07007492 mutex_unlock(&priv->mutex);
7493
Zhu Yi5a66926a2008-01-14 17:46:18 -08007494 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007495 return 0;
7496}
7497
7498/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007499 * iwl4965_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07007500 *
7501 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7502 * be set inappropriately and the driver currently sets the hardware up to
7503 * use it whenever needed.
7504 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007505static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07007506{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007507 struct iwl4965_priv *priv = hw->priv;
7508 const struct iwl4965_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007509 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08007510 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007511
7512 mutex_lock(&priv->mutex);
7513 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7514
Zhu Yi12342c42007-12-20 11:27:32 +08007515 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7516
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007517 if (!iwl4965_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007518 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007519 ret = -EIO;
7520 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007521 }
7522
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007523 if (unlikely(!iwl4965_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07007524 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08007525 IWL_DEBUG_MAC80211("leave - scanning\n");
7526 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07007527 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08007528 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007529 }
7530
7531 spin_lock_irqsave(&priv->lock, flags);
7532
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007533 ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007534 if (!is_channel_valid(ch_info)) {
7535 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7536 conf->channel, conf->phymode);
7537 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7538 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007539 ret = -EINVAL;
7540 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007541 }
7542
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007543#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07007544 /* if we are switching fron ht to 2.4 clear flags
7545 * from any ht related info since 2.4 does not
7546 * support ht */
7547 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
7548#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7549 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7550#endif
7551 )
7552 priv->staging_rxon.flags = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007553#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07007554
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007555 iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007556
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007557 iwl4965_set_flags_for_phymode(priv, conf->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007558
7559 /* The list of supported rates and rate mask can be different
7560 * for each phymode; since the phymode may have changed, reset
7561 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007562 iwl4965_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007563
7564 spin_unlock_irqrestore(&priv->lock, flags);
7565
7566#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7567 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007568 iwl4965_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007569 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007570 }
7571#endif
7572
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007573 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07007574
7575 if (!conf->radio_enabled) {
7576 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007577 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007578 }
7579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007580 if (iwl4965_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007581 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007582 ret = -EIO;
7583 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007584 }
7585
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007586 iwl4965_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007587
7588 if (memcmp(&priv->active_rxon,
7589 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007590 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007591 else
7592 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7593
7594 IWL_DEBUG_MAC80211("leave\n");
7595
Zhu Yia0646472007-12-20 14:10:01 +08007596out:
7597 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yi5a66926a2008-01-14 17:46:18 -08007598 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007599 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07007600}
7601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007602static void iwl4965_config_ap(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007603{
7604 int rc = 0;
7605
7606 if (priv->status & STATUS_EXIT_PENDING)
7607 return;
7608
7609 /* The following should be done only at AP bring up */
7610 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7611
7612 /* RXON - unassoc (to set timing command) */
7613 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007614 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007615
7616 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007617 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7618 iwl4965_setup_rxon_timing(priv);
7619 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07007620 sizeof(priv->rxon_timing), &priv->rxon_timing);
7621 if (rc)
7622 IWL_WARNING("REPLY_RXON_TIMING failed - "
7623 "Attempting to continue.\n");
7624
7625 iwl4965_set_rxon_chain(priv);
7626
7627 /* FIXME: what should be the assoc_id for AP? */
7628 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7629 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7630 priv->staging_rxon.flags |=
7631 RXON_FLG_SHORT_PREAMBLE_MSK;
7632 else
7633 priv->staging_rxon.flags &=
7634 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7635
7636 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7637 if (priv->assoc_capability &
7638 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7639 priv->staging_rxon.flags |=
7640 RXON_FLG_SHORT_SLOT_MSK;
7641 else
7642 priv->staging_rxon.flags &=
7643 ~RXON_FLG_SHORT_SLOT_MSK;
7644
7645 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7646 priv->staging_rxon.flags &=
7647 ~RXON_FLG_SHORT_SLOT_MSK;
7648 }
7649 /* restore RXON assoc */
7650 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007651 iwl4965_commit_rxon(priv);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007652#ifdef CONFIG_IWL4965_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007653 iwl4965_activate_qos(priv, 1);
Zhu Yib481de92007-09-25 17:54:57 -07007654#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007655 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
Zhu Yie1493de2007-09-27 11:27:32 +08007656 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007657 iwl4965_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007658
7659 /* FIXME - we need to add code here to detect a totally new
7660 * configuration, reset the AP, unassoc, rxon timing, assoc,
7661 * clear sta table, add BCAST sta... */
7662}
7663
Johannes Berg32bfd352007-12-19 01:31:26 +01007664static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7665 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07007666 struct ieee80211_if_conf *conf)
7667{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007668 struct iwl4965_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07007669 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007670 unsigned long flags;
7671 int rc;
7672
7673 if (conf == NULL)
7674 return -EIO;
7675
7676 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7677 (!conf->beacon || !conf->ssid_len)) {
7678 IWL_DEBUG_MAC80211
7679 ("Leaving in AP mode because HostAPD is not ready.\n");
7680 return 0;
7681 }
7682
Zhu Yi5a66926a2008-01-14 17:46:18 -08007683 if (!iwl4965_is_alive(priv))
7684 return -EAGAIN;
7685
Zhu Yib481de92007-09-25 17:54:57 -07007686 mutex_lock(&priv->mutex);
7687
Zhu Yib481de92007-09-25 17:54:57 -07007688 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07007689 IWL_DEBUG_MAC80211("bssid: %s\n",
7690 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007691
Johannes Berg4150c572007-09-17 01:29:23 -04007692/*
7693 * very dubious code was here; the probe filtering flag is never set:
7694 *
Zhu Yib481de92007-09-25 17:54:57 -07007695 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7696 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04007697 */
7698 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yib481de92007-09-25 17:54:57 -07007699 IWL_DEBUG_MAC80211("leave - scanning\n");
7700 mutex_unlock(&priv->mutex);
7701 return 0;
7702 }
7703
Johannes Berg32bfd352007-12-19 01:31:26 +01007704 if (priv->vif != vif) {
7705 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07007706 mutex_unlock(&priv->mutex);
7707 return 0;
7708 }
7709
7710 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7711 if (!conf->bssid) {
7712 conf->bssid = priv->mac_addr;
7713 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07007714 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7715 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007716 }
7717 if (priv->ibss_beacon)
7718 dev_kfree_skb(priv->ibss_beacon);
7719
7720 priv->ibss_beacon = conf->beacon;
7721 }
7722
Mohamed Abbasfde35712007-11-29 11:10:15 +08007723 if (iwl4965_is_rfkill(priv))
7724 goto done;
7725
Zhu Yib481de92007-09-25 17:54:57 -07007726 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7727 !is_multicast_ether_addr(conf->bssid)) {
7728 /* If there is currently a HW scan going on in the background
7729 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007730 if (iwl4965_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07007731 IWL_WARNING("Aborted scan still in progress "
7732 "after 100ms\n");
7733 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7734 mutex_unlock(&priv->mutex);
7735 return -EAGAIN;
7736 }
7737 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7738
7739 /* TODO: Audit driver for usage of these members and see
7740 * if mac80211 deprecates them (priv->bssid looks like it
7741 * shouldn't be there, but I haven't scanned the IBSS code
7742 * to verify) - jpk */
7743 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7744
7745 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007746 iwl4965_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007747 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007748 rc = iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007749 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007750 iwl4965_rxon_add_station(
Zhu Yib481de92007-09-25 17:54:57 -07007751 priv, priv->active_rxon.bssid_addr, 1);
7752 }
7753
7754 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007755 iwl4965_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07007756 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007757 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007758 }
7759
Mohamed Abbasfde35712007-11-29 11:10:15 +08007760 done:
Zhu Yib481de92007-09-25 17:54:57 -07007761 spin_lock_irqsave(&priv->lock, flags);
7762 if (!conf->ssid_len)
7763 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7764 else
7765 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7766
7767 priv->essid_len = conf->ssid_len;
7768 spin_unlock_irqrestore(&priv->lock, flags);
7769
7770 IWL_DEBUG_MAC80211("leave\n");
7771 mutex_unlock(&priv->mutex);
7772
7773 return 0;
7774}
7775
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007776static void iwl4965_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04007777 unsigned int changed_flags,
7778 unsigned int *total_flags,
7779 int mc_count, struct dev_addr_list *mc_list)
7780{
7781 /*
7782 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007783 * see also iwl4965_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007784 */
7785 *total_flags = 0;
7786}
7787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007788static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007789 struct ieee80211_if_init_conf *conf)
7790{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007791 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007792
7793 IWL_DEBUG_MAC80211("enter\n");
7794
7795 mutex_lock(&priv->mutex);
Mohamed Abbas948c1712007-10-25 17:15:45 +08007796
Mohamed Abbasfde35712007-11-29 11:10:15 +08007797 if (iwl4965_is_ready_rf(priv)) {
7798 iwl4965_scan_cancel_timeout(priv, 100);
7799 cancel_delayed_work(&priv->post_associate);
7800 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7801 iwl4965_commit_rxon(priv);
7802 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007803 if (priv->vif == conf->vif) {
7804 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007805 memset(priv->bssid, 0, ETH_ALEN);
7806 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7807 priv->essid_len = 0;
7808 }
7809 mutex_unlock(&priv->mutex);
7810
7811 IWL_DEBUG_MAC80211("leave\n");
7812
7813}
Johannes Berg471b3ef2007-12-28 14:32:58 +01007814
7815static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7816 struct ieee80211_vif *vif,
7817 struct ieee80211_bss_conf *bss_conf,
7818 u32 changes)
Tomas Winkler220173b2007-10-16 00:50:25 +02007819{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007820 struct iwl4965_priv *priv = hw->priv;
Tomas Winkler220173b2007-10-16 00:50:25 +02007821
Johannes Berg471b3ef2007-12-28 14:32:58 +01007822 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7823 if (bss_conf->use_short_preamble)
Tomas Winkler220173b2007-10-16 00:50:25 +02007824 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7825 else
7826 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7827 }
7828
Johannes Berg471b3ef2007-12-28 14:32:58 +01007829 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
7830 if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
Tomas Winkler220173b2007-10-16 00:50:25 +02007831 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7832 else
7833 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7834 }
7835
Johannes Berg471b3ef2007-12-28 14:32:58 +01007836 if (changes & BSS_CHANGED_ASSOC) {
7837 /*
7838 * TODO:
7839 * do stuff instead of sniffing assoc resp
7840 */
7841 }
7842
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007843 if (iwl4965_is_associated(priv))
7844 iwl4965_send_rxon_assoc(priv);
Tomas Winkler220173b2007-10-16 00:50:25 +02007845}
Zhu Yib481de92007-09-25 17:54:57 -07007846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007847static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007848{
7849 int rc = 0;
7850 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007851 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007852
7853 IWL_DEBUG_MAC80211("enter\n");
7854
mabbas052c4b92007-10-25 17:15:43 +08007855 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007856 spin_lock_irqsave(&priv->lock, flags);
7857
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007858 if (!iwl4965_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007859 rc = -EIO;
7860 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7861 goto out_unlock;
7862 }
7863
7864 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7865 rc = -EIO;
7866 IWL_ERROR("ERROR: APs don't scan\n");
7867 goto out_unlock;
7868 }
7869
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007870 /* we don't schedule scan within next_scan_jiffies period */
7871 if (priv->next_scan_jiffies &&
7872 time_after(priv->next_scan_jiffies, jiffies)) {
7873 rc = -EAGAIN;
7874 goto out_unlock;
7875 }
Zhu Yib481de92007-09-25 17:54:57 -07007876 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007877 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7878 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007879 rc = -EAGAIN;
7880 goto out_unlock;
7881 }
7882 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007883 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007884 iwl4965_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007885
7886 priv->one_direct_scan = 1;
7887 priv->direct_ssid_len = (u8)
7888 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7889 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas948c1712007-10-25 17:15:45 +08007890 } else
7891 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007892
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007893 rc = iwl4965_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007894
7895 IWL_DEBUG_MAC80211("leave\n");
7896
7897out_unlock:
7898 spin_unlock_irqrestore(&priv->lock, flags);
mabbas052c4b92007-10-25 17:15:43 +08007899 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007900
7901 return rc;
7902}
7903
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007904static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007905 const u8 *local_addr, const u8 *addr,
7906 struct ieee80211_key_conf *key)
7907{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007908 struct iwl4965_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07007909 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007910 int rc = 0;
7911 u8 sta_id;
7912
7913 IWL_DEBUG_MAC80211("enter\n");
7914
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007915 if (!iwl4965_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007916 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7917 return -EOPNOTSUPP;
7918 }
7919
7920 if (is_zero_ether_addr(addr))
7921 /* only support pairwise keys */
7922 return -EOPNOTSUPP;
7923
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007924 sta_id = iwl4965_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007925 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007926 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7927 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007928 return -EINVAL;
7929 }
7930
7931 mutex_lock(&priv->mutex);
7932
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007933 iwl4965_scan_cancel_timeout(priv, 100);
mabbas052c4b92007-10-25 17:15:43 +08007934
Zhu Yib481de92007-09-25 17:54:57 -07007935 switch (cmd) {
7936 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007937 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007938 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007939 iwl4965_set_rxon_hwcrypto(priv, 1);
7940 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007941 key->hw_key_idx = sta_id;
7942 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7943 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7944 }
7945 break;
7946 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007947 rc = iwl4965_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007948 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007949 iwl4965_set_rxon_hwcrypto(priv, 0);
7950 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007951 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7952 }
7953 break;
7954 default:
7955 rc = -EINVAL;
7956 }
7957
7958 IWL_DEBUG_MAC80211("leave\n");
7959 mutex_unlock(&priv->mutex);
7960
7961 return rc;
7962}
7963
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007964static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007965 const struct ieee80211_tx_queue_params *params)
7966{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007967 struct iwl4965_priv *priv = hw->priv;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007968#ifdef CONFIG_IWL4965_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007969 unsigned long flags;
7970 int q;
Reinette Chatre0054b342007-11-29 11:09:42 +08007971#endif /* CONFIG_IWL4965_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007972
7973 IWL_DEBUG_MAC80211("enter\n");
7974
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007975 if (!iwl4965_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007976 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7977 return -EIO;
7978 }
7979
7980 if (queue >= AC_NUM) {
7981 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7982 return 0;
7983 }
7984
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007985#ifdef CONFIG_IWL4965_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007986 if (!priv->qos_data.qos_enable) {
7987 priv->qos_data.qos_active = 0;
7988 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7989 return 0;
7990 }
7991 q = AC_NUM - 1 - queue;
7992
7993 spin_lock_irqsave(&priv->lock, flags);
7994
7995 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7996 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7997 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7998 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7999 cpu_to_le16((params->burst_time * 100));
8000
8001 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
8002 priv->qos_data.qos_active = 1;
8003
8004 spin_unlock_irqrestore(&priv->lock, flags);
8005
8006 mutex_lock(&priv->mutex);
8007 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008008 iwl4965_activate_qos(priv, 1);
8009 else if (priv->assoc_id && iwl4965_is_associated(priv))
8010 iwl4965_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07008011
8012 mutex_unlock(&priv->mutex);
8013
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008014#endif /*CONFIG_IWL4965_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07008015
8016 IWL_DEBUG_MAC80211("leave\n");
8017 return 0;
8018}
8019
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008020static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07008021 struct ieee80211_tx_queue_stats *stats)
8022{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008023 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07008024 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008025 struct iwl4965_tx_queue *txq;
8026 struct iwl4965_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07008027 unsigned long flags;
8028
8029 IWL_DEBUG_MAC80211("enter\n");
8030
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008031 if (!iwl4965_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008032 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8033 return -EIO;
8034 }
8035
8036 spin_lock_irqsave(&priv->lock, flags);
8037
8038 for (i = 0; i < AC_NUM; i++) {
8039 txq = &priv->txq[i];
8040 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008041 avail = iwl4965_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07008042
8043 stats->data[i].len = q->n_window - avail;
8044 stats->data[i].limit = q->n_window - q->high_mark;
8045 stats->data[i].count = q->n_window;
8046
8047 }
8048 spin_unlock_irqrestore(&priv->lock, flags);
8049
8050 IWL_DEBUG_MAC80211("leave\n");
8051
8052 return 0;
8053}
8054
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008055static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07008056 struct ieee80211_low_level_stats *stats)
8057{
8058 IWL_DEBUG_MAC80211("enter\n");
8059 IWL_DEBUG_MAC80211("leave\n");
8060
8061 return 0;
8062}
8063
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008064static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07008065{
8066 IWL_DEBUG_MAC80211("enter\n");
8067 IWL_DEBUG_MAC80211("leave\n");
8068
8069 return 0;
8070}
8071
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008072static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07008073{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008074 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07008075 unsigned long flags;
8076
8077 mutex_lock(&priv->mutex);
8078 IWL_DEBUG_MAC80211("enter\n");
8079
8080 priv->lq_mngr.lq_ready = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008081#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07008082 spin_lock_irqsave(&priv->lock, flags);
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008083 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
Zhu Yib481de92007-09-25 17:54:57 -07008084 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008085#ifdef CONFIG_IWL4965_HT_AGG
Zhu Yib481de92007-09-25 17:54:57 -07008086/* if (priv->lq_mngr.agg_ctrl.granted_ba)
8087 iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
8088
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008089 memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
Zhu Yib481de92007-09-25 17:54:57 -07008090 priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
8091 priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
8092 priv->lq_mngr.agg_ctrl.auto_agg = 1;
8093
8094 if (priv->lq_mngr.agg_ctrl.auto_agg)
8095 priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008096#endif /*CONFIG_IWL4965_HT_AGG */
8097#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07008098
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008099#ifdef CONFIG_IWL4965_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008100 iwl4965_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008101#endif
8102
8103 cancel_delayed_work(&priv->post_associate);
8104
8105 spin_lock_irqsave(&priv->lock, flags);
8106 priv->assoc_id = 0;
8107 priv->assoc_capability = 0;
8108 priv->call_post_assoc_from_beacon = 0;
8109 priv->assoc_station_added = 0;
8110
8111 /* new association get rid of ibss beacon skb */
8112 if (priv->ibss_beacon)
8113 dev_kfree_skb(priv->ibss_beacon);
8114
8115 priv->ibss_beacon = NULL;
8116
8117 priv->beacon_int = priv->hw->conf.beacon_int;
8118 priv->timestamp1 = 0;
8119 priv->timestamp0 = 0;
8120 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8121 priv->beacon_int = 0;
8122
8123 spin_unlock_irqrestore(&priv->lock, flags);
8124
Mohamed Abbasfde35712007-11-29 11:10:15 +08008125 if (!iwl4965_is_ready_rf(priv)) {
8126 IWL_DEBUG_MAC80211("leave - not ready\n");
8127 mutex_unlock(&priv->mutex);
8128 return;
8129 }
8130
mabbas052c4b92007-10-25 17:15:43 +08008131 /* we are restarting association process
8132 * clear RXON_FILTER_ASSOC_MSK bit
8133 */
8134 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008135 iwl4965_scan_cancel_timeout(priv, 100);
mabbas052c4b92007-10-25 17:15:43 +08008136 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008137 iwl4965_commit_rxon(priv);
mabbas052c4b92007-10-25 17:15:43 +08008138 }
8139
Zhu Yib481de92007-09-25 17:54:57 -07008140 /* Per mac80211.h: This is only used in IBSS mode... */
8141 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
mabbas052c4b92007-10-25 17:15:43 +08008142
Zhu Yib481de92007-09-25 17:54:57 -07008143 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8144 mutex_unlock(&priv->mutex);
8145 return;
8146 }
8147
Zhu Yib481de92007-09-25 17:54:57 -07008148 priv->only_active_channel = 0;
8149
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008150 iwl4965_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008151
8152 mutex_unlock(&priv->mutex);
8153
8154 IWL_DEBUG_MAC80211("leave\n");
8155
8156}
8157
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008158static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07008159 struct ieee80211_tx_control *control)
8160{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008161 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07008162 unsigned long flags;
8163
8164 mutex_lock(&priv->mutex);
8165 IWL_DEBUG_MAC80211("enter\n");
8166
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008167 if (!iwl4965_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008168 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8169 mutex_unlock(&priv->mutex);
8170 return -EIO;
8171 }
8172
8173 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8174 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8175 mutex_unlock(&priv->mutex);
8176 return -EIO;
8177 }
8178
8179 spin_lock_irqsave(&priv->lock, flags);
8180
8181 if (priv->ibss_beacon)
8182 dev_kfree_skb(priv->ibss_beacon);
8183
8184 priv->ibss_beacon = skb;
8185
8186 priv->assoc_id = 0;
8187
8188 IWL_DEBUG_MAC80211("leave\n");
8189 spin_unlock_irqrestore(&priv->lock, flags);
8190
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008191#ifdef CONFIG_IWL4965_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008192 iwl4965_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008193#endif
8194
8195 queue_work(priv->workqueue, &priv->post_associate.work);
8196
8197 mutex_unlock(&priv->mutex);
8198
8199 return 0;
8200}
8201
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008202#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07008203
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008204static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8205 struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008206{
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008207 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8208 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8209 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
Zhu Yib481de92007-09-25 17:54:57 -07008210
8211 IWL_DEBUG_MAC80211("enter: \n");
8212
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008213 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8214 iwl_conf->is_ht = 0;
8215 return;
Zhu Yib481de92007-09-25 17:54:57 -07008216 }
8217
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008218 iwl_conf->is_ht = 1;
8219 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
Zhu Yib481de92007-09-25 17:54:57 -07008220
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008221 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8222 iwl_conf->sgf |= 0x1;
8223 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8224 iwl_conf->sgf |= 0x2;
Zhu Yib481de92007-09-25 17:54:57 -07008225
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008226 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8227 iwl_conf->max_amsdu_size =
8228 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8229 iwl_conf->supported_chan_width =
8230 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8231 iwl_conf->tx_mimo_ps_mode =
8232 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8233 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
Zhu Yib481de92007-09-25 17:54:57 -07008234
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008235 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8236 iwl_conf->extension_chan_offset =
8237 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8238 iwl_conf->tx_chan_width =
8239 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8240 iwl_conf->ht_protection =
8241 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8242 iwl_conf->non_GF_STA_present =
8243 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
Zhu Yib481de92007-09-25 17:54:57 -07008244
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008245 IWL_DEBUG_MAC80211("control channel %d\n",
8246 iwl_conf->control_channel);
Zhu Yib481de92007-09-25 17:54:57 -07008247 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07008248}
8249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008250static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008251 struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07008252{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008253 struct iwl4965_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07008254
8255 IWL_DEBUG_MAC80211("enter: \n");
8256
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008257 iwl4965_ht_info_fill(conf, priv);
Zhu Yib481de92007-09-25 17:54:57 -07008258 iwl4965_set_rxon_chain(priv);
8259
8260 if (priv && priv->assoc_id &&
8261 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8262 unsigned long flags;
8263
8264 spin_lock_irqsave(&priv->lock, flags);
8265 if (priv->beacon_int)
8266 queue_work(priv->workqueue, &priv->post_associate.work);
8267 else
8268 priv->call_post_assoc_from_beacon = 1;
8269 spin_unlock_irqrestore(&priv->lock, flags);
8270 }
8271
Ron Rindjunskyfd105e72007-11-26 16:14:39 +02008272 IWL_DEBUG_MAC80211("leave:\n");
8273 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07008274}
8275
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008276static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02008277 struct ieee80211_ht_cap *ht_cap,
8278 u8 use_current_config)
Zhu Yib481de92007-09-25 17:54:57 -07008279{
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02008280 struct ieee80211_conf *conf = &hw->conf;
8281 struct ieee80211_hw_mode *mode = conf->mode;
Zhu Yib481de92007-09-25 17:54:57 -07008282
Ron Rindjunsky8fb880322007-11-26 16:14:38 +02008283 if (use_current_config) {
8284 ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
8285 memcpy(ht_cap->supp_mcs_set,
8286 conf->ht_conf.supp_mcs_set, 16);
8287 } else {
8288 ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
8289 memcpy(ht_cap->supp_mcs_set,
8290 mode->ht_info.supp_mcs_set, 16);
8291 }
8292 ht_cap->ampdu_params_info =
8293 (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
8294 ((mode->ht_info.ampdu_density << 2) &
8295 IEEE80211_HT_CAP_AMPDU_DENSITY);
Zhu Yib481de92007-09-25 17:54:57 -07008296}
8297
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008298#endif /*CONFIG_IWL4965_HT*/
Zhu Yib481de92007-09-25 17:54:57 -07008299
8300/*****************************************************************************
8301 *
8302 * sysfs attributes
8303 *
8304 *****************************************************************************/
8305
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008306#ifdef CONFIG_IWL4965_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07008307
8308/*
8309 * The following adds a new attribute to the sysfs representation
8310 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8311 * used for controlling the debug level.
8312 *
8313 * See the level definitions in iwl for details.
8314 */
8315
8316static ssize_t show_debug_level(struct device_driver *d, char *buf)
8317{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008318 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008319}
8320static ssize_t store_debug_level(struct device_driver *d,
8321 const char *buf, size_t count)
8322{
8323 char *p = (char *)buf;
8324 u32 val;
8325
8326 val = simple_strtoul(p, &p, 0);
8327 if (p == buf)
8328 printk(KERN_INFO DRV_NAME
8329 ": %s is not in hex or decimal form.\n", buf);
8330 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008331 iwl4965_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07008332
8333 return strnlen(buf, count);
8334}
8335
8336static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8337 show_debug_level, store_debug_level);
8338
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008339#endif /* CONFIG_IWL4965_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07008340
8341static ssize_t show_rf_kill(struct device *d,
8342 struct device_attribute *attr, char *buf)
8343{
8344 /*
8345 * 0 - RF kill not enabled
8346 * 1 - SW based RF kill active (sysfs)
8347 * 2 - HW based RF kill active
8348 * 3 - Both HW and SW based RF kill active
8349 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008350 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008351 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8352 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8353
8354 return sprintf(buf, "%i\n", val);
8355}
8356
8357static ssize_t store_rf_kill(struct device *d,
8358 struct device_attribute *attr,
8359 const char *buf, size_t count)
8360{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008361 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008362
8363 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008364 iwl4965_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07008365 mutex_unlock(&priv->mutex);
8366
8367 return count;
8368}
8369
8370static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8371
8372static ssize_t show_temperature(struct device *d,
8373 struct device_attribute *attr, char *buf)
8374{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008375 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008376
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008377 if (!iwl4965_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008378 return -EAGAIN;
8379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008380 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07008381}
8382
8383static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8384
8385static ssize_t show_rs_window(struct device *d,
8386 struct device_attribute *attr,
8387 char *buf)
8388{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008389 struct iwl4965_priv *priv = d->driver_data;
8390 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07008391}
8392static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8393
8394static ssize_t show_tx_power(struct device *d,
8395 struct device_attribute *attr, char *buf)
8396{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008397 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008398 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8399}
8400
8401static ssize_t store_tx_power(struct device *d,
8402 struct device_attribute *attr,
8403 const char *buf, size_t count)
8404{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008405 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008406 char *p = (char *)buf;
8407 u32 val;
8408
8409 val = simple_strtoul(p, &p, 10);
8410 if (p == buf)
8411 printk(KERN_INFO DRV_NAME
8412 ": %s is not in decimal form.\n", buf);
8413 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008414 iwl4965_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07008415
8416 return count;
8417}
8418
8419static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8420
8421static ssize_t show_flags(struct device *d,
8422 struct device_attribute *attr, char *buf)
8423{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008424 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008425
8426 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8427}
8428
8429static ssize_t store_flags(struct device *d,
8430 struct device_attribute *attr,
8431 const char *buf, size_t count)
8432{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008433 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008434 u32 flags = simple_strtoul(buf, NULL, 0);
8435
8436 mutex_lock(&priv->mutex);
8437 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8438 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008439 if (iwl4965_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07008440 IWL_WARNING("Could not cancel scan.\n");
8441 else {
8442 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8443 flags);
8444 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008445 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008446 }
8447 }
8448 mutex_unlock(&priv->mutex);
8449
8450 return count;
8451}
8452
8453static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8454
8455static ssize_t show_filter_flags(struct device *d,
8456 struct device_attribute *attr, char *buf)
8457{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008458 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008459
8460 return sprintf(buf, "0x%04X\n",
8461 le32_to_cpu(priv->active_rxon.filter_flags));
8462}
8463
8464static ssize_t store_filter_flags(struct device *d,
8465 struct device_attribute *attr,
8466 const char *buf, size_t count)
8467{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008468 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008469 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8470
8471 mutex_lock(&priv->mutex);
8472 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8473 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008474 if (iwl4965_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07008475 IWL_WARNING("Could not cancel scan.\n");
8476 else {
8477 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8478 "0x%04X\n", filter_flags);
8479 priv->staging_rxon.filter_flags =
8480 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008481 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008482 }
8483 }
8484 mutex_unlock(&priv->mutex);
8485
8486 return count;
8487}
8488
8489static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8490 store_filter_flags);
8491
8492static ssize_t show_tune(struct device *d,
8493 struct device_attribute *attr, char *buf)
8494{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008495 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008496
8497 return sprintf(buf, "0x%04X\n",
8498 (priv->phymode << 8) |
8499 le16_to_cpu(priv->active_rxon.channel));
8500}
8501
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008502static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
Zhu Yib481de92007-09-25 17:54:57 -07008503
8504static ssize_t store_tune(struct device *d,
8505 struct device_attribute *attr,
8506 const char *buf, size_t count)
8507{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008508 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07008509 char *p = (char *)buf;
8510 u16 tune = simple_strtoul(p, &p, 0);
8511 u8 phymode = (tune >> 8) & 0xff;
8512 u16 channel = tune & 0xff;
8513
8514 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8515
8516 mutex_lock(&priv->mutex);
8517 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8518 (priv->phymode != phymode)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008519 const struct iwl4965_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07008520
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008521 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
Zhu Yib481de92007-09-25 17:54:57 -07008522 if (!ch_info) {
8523 IWL_WARNING("Requested invalid phymode/channel "
8524 "combination: %d %d\n", phymode, channel);
8525 mutex_unlock(&priv->mutex);
8526 return -EINVAL;
8527 }
8528
8529 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008530 if (iwl4965_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07008531 IWL_WARNING("Could not cancel scan.\n");
8532 else {
8533 IWL_DEBUG_INFO("Committing phymode and "
8534 "rxon.channel = %d %d\n",
8535 phymode, channel);
8536
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008537 iwl4965_set_rxon_channel(priv, phymode, channel);
8538 iwl4965_set_flags_for_phymode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07008539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008540 iwl4965_set_rate(priv);
8541 iwl4965_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008542 }
8543 }
8544 mutex_unlock(&priv->mutex);
8545
8546 return count;
8547}
8548
8549static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8550
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008551#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008552
8553static ssize_t show_measurement(struct device *d,
8554 struct device_attribute *attr, char *buf)
8555{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008556 struct iwl4965_priv *priv = dev_get_drvdata(d);
8557 struct iwl4965_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07008558 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8559 u8 *data = (u8 *) & measure_report;
8560 unsigned long flags;
8561
8562 spin_lock_irqsave(&priv->lock, flags);
8563 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8564 spin_unlock_irqrestore(&priv->lock, flags);
8565 return 0;
8566 }
8567 memcpy(&measure_report, &priv->measure_report, size);
8568 priv->measurement_status = 0;
8569 spin_unlock_irqrestore(&priv->lock, flags);
8570
8571 while (size && (PAGE_SIZE - len)) {
8572 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8573 PAGE_SIZE - len, 1);
8574 len = strlen(buf);
8575 if (PAGE_SIZE - len)
8576 buf[len++] = '\n';
8577
8578 ofs += 16;
8579 size -= min(size, 16U);
8580 }
8581
8582 return len;
8583}
8584
8585static ssize_t store_measurement(struct device *d,
8586 struct device_attribute *attr,
8587 const char *buf, size_t count)
8588{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008589 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008590 struct ieee80211_measurement_params params = {
8591 .channel = le16_to_cpu(priv->active_rxon.channel),
8592 .start_time = cpu_to_le64(priv->last_tsf),
8593 .duration = cpu_to_le16(1),
8594 };
8595 u8 type = IWL_MEASURE_BASIC;
8596 u8 buffer[32];
8597 u8 channel;
8598
8599 if (count) {
8600 char *p = buffer;
8601 strncpy(buffer, buf, min(sizeof(buffer), count));
8602 channel = simple_strtoul(p, NULL, 0);
8603 if (channel)
8604 params.channel = channel;
8605
8606 p = buffer;
8607 while (*p && *p != ' ')
8608 p++;
8609 if (*p)
8610 type = simple_strtoul(p + 1, NULL, 0);
8611 }
8612
8613 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8614 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008615 iwl4965_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07008616
8617 return count;
8618}
8619
8620static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8621 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008622#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07008623
8624static ssize_t store_retry_rate(struct device *d,
8625 struct device_attribute *attr,
8626 const char *buf, size_t count)
8627{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008628 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008629
8630 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8631 if (priv->retry_rate <= 0)
8632 priv->retry_rate = 1;
8633
8634 return count;
8635}
8636
8637static ssize_t show_retry_rate(struct device *d,
8638 struct device_attribute *attr, char *buf)
8639{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008640 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008641 return sprintf(buf, "%d", priv->retry_rate);
8642}
8643
8644static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8645 store_retry_rate);
8646
8647static ssize_t store_power_level(struct device *d,
8648 struct device_attribute *attr,
8649 const char *buf, size_t count)
8650{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008651 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008652 int rc;
8653 int mode;
8654
8655 mode = simple_strtoul(buf, NULL, 0);
8656 mutex_lock(&priv->mutex);
8657
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008658 if (!iwl4965_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008659 rc = -EAGAIN;
8660 goto out;
8661 }
8662
8663 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8664 mode = IWL_POWER_AC;
8665 else
8666 mode |= IWL_POWER_ENABLED;
8667
8668 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008669 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07008670 if (rc) {
8671 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8672 goto out;
8673 }
8674 priv->power_mode = mode;
8675 }
8676
8677 rc = count;
8678
8679 out:
8680 mutex_unlock(&priv->mutex);
8681 return rc;
8682}
8683
8684#define MAX_WX_STRING 80
8685
8686/* Values are in microsecond */
8687static const s32 timeout_duration[] = {
8688 350000,
8689 250000,
8690 75000,
8691 37000,
8692 25000,
8693};
8694static const s32 period_duration[] = {
8695 400000,
8696 700000,
8697 1000000,
8698 1000000,
8699 1000000
8700};
8701
8702static ssize_t show_power_level(struct device *d,
8703 struct device_attribute *attr, char *buf)
8704{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008705 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008706 int level = IWL_POWER_LEVEL(priv->power_mode);
8707 char *p = buf;
8708
8709 p += sprintf(p, "%d ", level);
8710 switch (level) {
8711 case IWL_POWER_MODE_CAM:
8712 case IWL_POWER_AC:
8713 p += sprintf(p, "(AC)");
8714 break;
8715 case IWL_POWER_BATTERY:
8716 p += sprintf(p, "(BATTERY)");
8717 break;
8718 default:
8719 p += sprintf(p,
8720 "(Timeout %dms, Period %dms)",
8721 timeout_duration[level - 1] / 1000,
8722 period_duration[level - 1] / 1000);
8723 }
8724
8725 if (!(priv->power_mode & IWL_POWER_ENABLED))
8726 p += sprintf(p, " OFF\n");
8727 else
8728 p += sprintf(p, " \n");
8729
8730 return (p - buf + 1);
8731
8732}
8733
8734static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8735 store_power_level);
8736
8737static ssize_t show_channels(struct device *d,
8738 struct device_attribute *attr, char *buf)
8739{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008740 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008741 int len = 0, i;
8742 struct ieee80211_channel *channels = NULL;
8743 const struct ieee80211_hw_mode *hw_mode = NULL;
8744 int count = 0;
8745
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008746 if (!iwl4965_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008747 return -EAGAIN;
8748
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008749 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
Zhu Yib481de92007-09-25 17:54:57 -07008750 if (!hw_mode)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008751 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
Zhu Yib481de92007-09-25 17:54:57 -07008752 if (hw_mode) {
8753 channels = hw_mode->channels;
8754 count = hw_mode->num_channels;
8755 }
8756
8757 len +=
8758 sprintf(&buf[len],
8759 "Displaying %d channels in 2.4GHz band "
8760 "(802.11bg):\n", count);
8761
8762 for (i = 0; i < count; i++)
8763 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8764 channels[i].chan,
8765 channels[i].power_level,
8766 channels[i].
8767 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8768 " (IEEE 802.11h required)" : "",
8769 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8770 || (channels[i].
8771 flag &
8772 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8773 ", IBSS",
8774 channels[i].
8775 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8776 "active/passive" : "passive only");
8777
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008778 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
Zhu Yib481de92007-09-25 17:54:57 -07008779 if (hw_mode) {
8780 channels = hw_mode->channels;
8781 count = hw_mode->num_channels;
8782 } else {
8783 channels = NULL;
8784 count = 0;
8785 }
8786
8787 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8788 "(802.11a):\n", count);
8789
8790 for (i = 0; i < count; i++)
8791 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8792 channels[i].chan,
8793 channels[i].power_level,
8794 channels[i].
8795 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8796 " (IEEE 802.11h required)" : "",
8797 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8798 || (channels[i].
8799 flag &
8800 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8801 ", IBSS",
8802 channels[i].
8803 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8804 "active/passive" : "passive only");
8805
8806 return len;
8807}
8808
8809static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8810
8811static ssize_t show_statistics(struct device *d,
8812 struct device_attribute *attr, char *buf)
8813{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008814 struct iwl4965_priv *priv = dev_get_drvdata(d);
8815 u32 size = sizeof(struct iwl4965_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07008816 u32 len = 0, ofs = 0;
8817 u8 *data = (u8 *) & priv->statistics;
8818 int rc = 0;
8819
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008820 if (!iwl4965_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008821 return -EAGAIN;
8822
8823 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008824 rc = iwl4965_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008825 mutex_unlock(&priv->mutex);
8826
8827 if (rc) {
8828 len = sprintf(buf,
8829 "Error sending statistics request: 0x%08X\n", rc);
8830 return len;
8831 }
8832
8833 while (size && (PAGE_SIZE - len)) {
8834 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8835 PAGE_SIZE - len, 1);
8836 len = strlen(buf);
8837 if (PAGE_SIZE - len)
8838 buf[len++] = '\n';
8839
8840 ofs += 16;
8841 size -= min(size, 16U);
8842 }
8843
8844 return len;
8845}
8846
8847static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8848
8849static ssize_t show_antenna(struct device *d,
8850 struct device_attribute *attr, char *buf)
8851{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008852 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008853
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008854 if (!iwl4965_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008855 return -EAGAIN;
8856
8857 return sprintf(buf, "%d\n", priv->antenna);
8858}
8859
8860static ssize_t store_antenna(struct device *d,
8861 struct device_attribute *attr,
8862 const char *buf, size_t count)
8863{
8864 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008865 struct iwl4965_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008866
8867 if (count == 0)
8868 return 0;
8869
8870 if (sscanf(buf, "%1i", &ant) != 1) {
8871 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8872 return count;
8873 }
8874
8875 if ((ant >= 0) && (ant <= 2)) {
8876 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008877 priv->antenna = (enum iwl4965_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07008878 } else
8879 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8880
8881
8882 return count;
8883}
8884
8885static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8886
8887static ssize_t show_status(struct device *d,
8888 struct device_attribute *attr, char *buf)
8889{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008890 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8891 if (!iwl4965_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008892 return -EAGAIN;
8893 return sprintf(buf, "0x%08x\n", (int)priv->status);
8894}
8895
8896static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8897
8898static ssize_t dump_error_log(struct device *d,
8899 struct device_attribute *attr,
8900 const char *buf, size_t count)
8901{
8902 char *p = (char *)buf;
8903
8904 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008905 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008906
8907 return strnlen(buf, count);
8908}
8909
8910static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8911
8912static ssize_t dump_event_log(struct device *d,
8913 struct device_attribute *attr,
8914 const char *buf, size_t count)
8915{
8916 char *p = (char *)buf;
8917
8918 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008919 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008920
8921 return strnlen(buf, count);
8922}
8923
8924static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8925
8926/*****************************************************************************
8927 *
8928 * driver setup and teardown
8929 *
8930 *****************************************************************************/
8931
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008932static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008933{
8934 priv->workqueue = create_workqueue(DRV_NAME);
8935
8936 init_waitqueue_head(&priv->wait_command_queue);
8937
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008938 INIT_WORK(&priv->up, iwl4965_bg_up);
8939 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8940 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8941 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8942 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8943 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8944 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8945 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8946 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8947 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8948 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8949 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07008950
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008951 iwl4965_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008952
8953 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008954 iwl4965_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07008955}
8956
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008957static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008958{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008959 iwl4965_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008960
Joonwoo Park3ae6a052007-11-29 10:43:16 +09008961 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07008962 cancel_delayed_work(&priv->scan_check);
8963 cancel_delayed_work(&priv->alive_start);
8964 cancel_delayed_work(&priv->post_associate);
8965 cancel_work_sync(&priv->beacon_update);
8966}
8967
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008968static struct attribute *iwl4965_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07008969 &dev_attr_antenna.attr,
8970 &dev_attr_channels.attr,
8971 &dev_attr_dump_errors.attr,
8972 &dev_attr_dump_events.attr,
8973 &dev_attr_flags.attr,
8974 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008975#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008976 &dev_attr_measurement.attr,
8977#endif
8978 &dev_attr_power_level.attr,
8979 &dev_attr_retry_rate.attr,
8980 &dev_attr_rf_kill.attr,
8981 &dev_attr_rs_window.attr,
8982 &dev_attr_statistics.attr,
8983 &dev_attr_status.attr,
8984 &dev_attr_temperature.attr,
8985 &dev_attr_tune.attr,
8986 &dev_attr_tx_power.attr,
8987
8988 NULL
8989};
8990
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008991static struct attribute_group iwl4965_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07008992 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008993 .attrs = iwl4965_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07008994};
8995
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008996static struct ieee80211_ops iwl4965_hw_ops = {
8997 .tx = iwl4965_mac_tx,
8998 .start = iwl4965_mac_start,
8999 .stop = iwl4965_mac_stop,
9000 .add_interface = iwl4965_mac_add_interface,
9001 .remove_interface = iwl4965_mac_remove_interface,
9002 .config = iwl4965_mac_config,
9003 .config_interface = iwl4965_mac_config_interface,
9004 .configure_filter = iwl4965_configure_filter,
9005 .set_key = iwl4965_mac_set_key,
9006 .get_stats = iwl4965_mac_get_stats,
9007 .get_tx_stats = iwl4965_mac_get_tx_stats,
9008 .conf_tx = iwl4965_mac_conf_tx,
9009 .get_tsf = iwl4965_mac_get_tsf,
9010 .reset_tsf = iwl4965_mac_reset_tsf,
9011 .beacon_update = iwl4965_mac_beacon_update,
Johannes Berg471b3ef2007-12-28 14:32:58 +01009012 .bss_info_changed = iwl4965_bss_info_changed,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009013#ifdef CONFIG_IWL4965_HT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009014 .conf_ht = iwl4965_mac_conf_ht,
Ron Rindjunsky9ab46172007-12-25 17:00:38 +02009015 .ampdu_action = iwl4965_mac_ampdu_action,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009016#ifdef CONFIG_IWL4965_HT_AGG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009017 .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
9018 .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009019#endif /* CONFIG_IWL4965_HT_AGG */
9020#endif /* CONFIG_IWL4965_HT */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009021 .hw_scan = iwl4965_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07009022};
9023
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009024static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07009025{
9026 int err = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009027 struct iwl4965_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07009028 struct ieee80211_hw *hw;
9029 int i;
Zhu Yi5a66926a2008-01-14 17:46:18 -08009030 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07009031
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009032 /* Disabling hardware scan means that mac80211 will perform scans
9033 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009034 if (iwl4965_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07009035 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009036 iwl4965_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07009037 }
9038
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009039 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
9040 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07009041 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
9042 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
9043 err = -EINVAL;
9044 goto out;
9045 }
9046
9047 /* mac80211 allocates memory for this device instance, including
9048 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009049 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07009050 if (hw == NULL) {
9051 IWL_ERROR("Can not allocate network device\n");
9052 err = -ENOMEM;
9053 goto out;
9054 }
9055 SET_IEEE80211_DEV(hw, &pdev->dev);
9056
Johannes Bergf51359a2007-10-28 14:53:36 +01009057 hw->rate_control_algorithm = "iwl-4965-rs";
9058
Zhu Yib481de92007-09-25 17:54:57 -07009059 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
9060 priv = hw->priv;
9061 priv->hw = hw;
9062
9063 priv->pci_dev = pdev;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009064 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009065#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009066 iwl4965_debug_level = iwl4965_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07009067 atomic_set(&priv->restrict_refcnt, 0);
9068#endif
9069 priv->retry_rate = 1;
9070
9071 priv->ibss_beacon = NULL;
9072
9073 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
9074 * the range of signal quality values that we'll provide.
9075 * Negative values for level/noise indicate that we'll provide dBm.
9076 * For WE, at least, non-0 values here *enable* display of values
9077 * in app (iwconfig). */
9078 hw->max_rssi = -20; /* signal level, negative indicates dBm */
9079 hw->max_noise = -20; /* noise level, negative indicates dBm */
9080 hw->max_signal = 100; /* link quality indication (%) */
9081
9082 /* Tell mac80211 our Tx characteristics */
9083 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
9084
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009085 /* Default value; 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07009086 hw->queues = 4;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009087#ifdef CONFIG_IWL4965_HT
9088#ifdef CONFIG_IWL4965_HT_AGG
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009089 /* Enhanced value; more queues, to support 11n aggregation */
Zhu Yib481de92007-09-25 17:54:57 -07009090 hw->queues = 16;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009091#endif /* CONFIG_IWL4965_HT_AGG */
9092#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07009093
9094 spin_lock_init(&priv->lock);
9095 spin_lock_init(&priv->power_data.lock);
9096 spin_lock_init(&priv->sta_lock);
9097 spin_lock_init(&priv->hcmd_lock);
9098 spin_lock_init(&priv->lq_mngr.lock);
9099
9100 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
9101 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
9102
9103 INIT_LIST_HEAD(&priv->free_frames);
9104
9105 mutex_init(&priv->mutex);
9106 if (pci_enable_device(pdev)) {
9107 err = -ENODEV;
9108 goto out_ieee80211_free_hw;
9109 }
9110
9111 pci_set_master(pdev);
9112
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009113 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009114 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009115
9116 priv->data_retry_limit = -1;
9117 priv->ieee_channels = NULL;
9118 priv->ieee_rates = NULL;
9119 priv->phymode = -1;
9120
9121 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
9122 if (!err)
9123 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
9124 if (err) {
9125 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
9126 goto out_pci_disable_device;
9127 }
9128
9129 pci_set_drvdata(pdev, priv);
9130 err = pci_request_regions(pdev, DRV_NAME);
9131 if (err)
9132 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009133
Zhu Yib481de92007-09-25 17:54:57 -07009134 /* We disable the RETRY_TIMEOUT register (0x41) to keep
9135 * PCI Tx retries from interfering with C3 CPU state */
9136 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009137
Zhu Yib481de92007-09-25 17:54:57 -07009138 priv->hw_base = pci_iomap(pdev, 0, 0);
9139 if (!priv->hw_base) {
9140 err = -ENODEV;
9141 goto out_pci_release_regions;
9142 }
9143
9144 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
9145 (unsigned long long) pci_resource_len(pdev, 0));
9146 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
9147
9148 /* Initialize module parameter values here */
9149
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009150 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009151 if (iwl4965_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07009152 set_bit(STATUS_RF_KILL_SW, &priv->status);
9153 IWL_DEBUG_INFO("Radio disabled.\n");
9154 }
9155
9156 priv->iw_mode = IEEE80211_IF_TYPE_STA;
9157
9158 priv->ps_mode = 0;
9159 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
Zhu Yib481de92007-09-25 17:54:57 -07009160 priv->valid_antenna = 0x7; /* assume all 3 connected */
9161 priv->ps_mode = IWL_MIMO_PS_NONE;
Zhu Yib481de92007-09-25 17:54:57 -07009162
Cahill, Ben M6440adb2007-11-29 11:09:55 +08009163 /* Choose which receivers/antennas to use */
Zhu Yib481de92007-09-25 17:54:57 -07009164 iwl4965_set_rxon_chain(priv);
9165
9166 printk(KERN_INFO DRV_NAME
9167 ": Detected Intel Wireless WiFi Link 4965AGN\n");
9168
9169 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009170 if (iwl4965_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07009171 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07009172 goto out_iounmap;
9173 }
9174
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009175#ifdef CONFIG_IWL4965_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009176 if (iwl4965_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07009177 priv->qos_data.qos_enable = 1;
9178
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009179 iwl4965_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009180
9181 priv->qos_data.qos_active = 0;
9182 priv->qos_data.qos_cap.val = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009183#endif /* CONFIG_IWL4965_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07009184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009185 iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
9186 iwl4965_setup_deferred_work(priv);
9187 iwl4965_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009188
9189 priv->rates_mask = IWL_RATES_MASK;
9190 /* If power management is turned on, default to AC mode */
9191 priv->power_mode = IWL_POWER_AC;
9192 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
9193
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009194 iwl4965_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02009195
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009196 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07009197 if (err) {
9198 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07009199 goto out_release_irq;
9200 }
9201
Zhu Yi5a66926a2008-01-14 17:46:18 -08009202 /* nic init */
9203 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
9204 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
9205
9206 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
9207 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
9208 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
9209 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
9210 if (err < 0) {
9211 IWL_DEBUG_INFO("Failed to init the card\n");
9212 goto out_remove_sysfs;
9213 }
9214 /* Read the EEPROM */
9215 err = iwl4965_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009216 if (err) {
Zhu Yi5a66926a2008-01-14 17:46:18 -08009217 IWL_ERROR("Unable to init EEPROM\n");
9218 goto out_remove_sysfs;
9219 }
9220 /* MAC Address location in EEPROM same for 3945/4965 */
9221 get_eeprom_mac(priv, priv->mac_addr);
9222 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
9223 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
9224
9225 iwl4965_rate_control_register(priv->hw);
9226 err = ieee80211_register_hw(priv->hw);
9227 if (err) {
9228 IWL_ERROR("Failed to register network device (error %d)\n", err);
9229 goto out_remove_sysfs;
Zhu Yib481de92007-09-25 17:54:57 -07009230 }
9231
Zhu Yi5a66926a2008-01-14 17:46:18 -08009232 priv->hw->conf.beacon_int = 100;
9233 priv->mac80211_registered = 1;
9234 pci_save_state(pdev);
9235 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07009236
9237 return 0;
9238
Zhu Yi5a66926a2008-01-14 17:46:18 -08009239 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009240 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07009241
9242 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07009243 destroy_workqueue(priv->workqueue);
9244 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009245 iwl4965_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009246
9247 out_iounmap:
9248 pci_iounmap(pdev, priv->hw_base);
9249 out_pci_release_regions:
9250 pci_release_regions(pdev);
9251 out_pci_disable_device:
9252 pci_disable_device(pdev);
9253 pci_set_drvdata(pdev, NULL);
9254 out_ieee80211_free_hw:
9255 ieee80211_free_hw(priv->hw);
9256 out:
9257 return err;
9258}
9259
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009260static void iwl4965_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07009261{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009262 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07009263 struct list_head *p, *q;
9264 int i;
9265
9266 if (!priv)
9267 return;
9268
9269 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9270
Zhu Yib481de92007-09-25 17:54:57 -07009271 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08009272
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009273 iwl4965_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009274
9275 /* Free MAC hash list for ADHOC */
9276 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9277 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9278 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009279 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07009280 }
9281 }
9282
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009283 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07009284
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009285 iwl4965_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009286
9287 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009288 iwl4965_rx_queue_free(priv, &priv->rxq);
9289 iwl4965_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009290
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009291 iwl4965_unset_hw_setting(priv);
9292 iwl4965_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009293
9294 if (priv->mac80211_registered) {
9295 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009296 iwl4965_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07009297 }
9298
Mohamed Abbas948c1712007-10-25 17:15:45 +08009299 /*netif_stop_queue(dev); */
9300 flush_workqueue(priv->workqueue);
9301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009302 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07009303 * priv->workqueue... so we can't take down the workqueue
9304 * until now... */
9305 destroy_workqueue(priv->workqueue);
9306 priv->workqueue = NULL;
9307
Zhu Yib481de92007-09-25 17:54:57 -07009308 pci_iounmap(pdev, priv->hw_base);
9309 pci_release_regions(pdev);
9310 pci_disable_device(pdev);
9311 pci_set_drvdata(pdev, NULL);
9312
9313 kfree(priv->channel_info);
9314
9315 kfree(priv->ieee_channels);
9316 kfree(priv->ieee_rates);
9317
9318 if (priv->ibss_beacon)
9319 dev_kfree_skb(priv->ibss_beacon);
9320
9321 ieee80211_free_hw(priv->hw);
9322}
9323
9324#ifdef CONFIG_PM
9325
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009326static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07009327{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009328 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07009329
Zhu Yib481de92007-09-25 17:54:57 -07009330 set_bit(STATUS_IN_SUSPEND, &priv->status);
9331
9332 /* Take down the device; powers it off, etc. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009333 iwl4965_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009334
9335 if (priv->mac80211_registered)
9336 ieee80211_stop_queues(priv->hw);
9337
9338 pci_save_state(pdev);
9339 pci_disable_device(pdev);
9340 pci_set_power_state(pdev, PCI_D3hot);
9341
Zhu Yib481de92007-09-25 17:54:57 -07009342 return 0;
9343}
9344
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009345static void iwl4965_resume(struct iwl4965_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07009346{
9347 unsigned long flags;
9348
9349 /* The following it a temporary work around due to the
9350 * suspend / resume not fully initializing the NIC correctly.
9351 * Without all of the following, resume will not attempt to take
9352 * down the NIC (it shouldn't really need to) and will just try
9353 * and bring the NIC back up. However that fails during the
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009354 * ucode verification process. This then causes iwl4965_down to be
9355 * called *after* iwl4965_hw_nic_init() has succeeded -- which
Zhu Yib481de92007-09-25 17:54:57 -07009356 * then lets the next init sequence succeed. So, we've
9357 * replicated all of that NIC init code here... */
9358
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009359 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07009360
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009361 iwl4965_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009362
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009363 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9364 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07009365 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009366 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
9367 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9368 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07009369
9370 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009371 iwl4965_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009372
9373 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009374 iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07009375
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009376 if (!iwl4965_grab_nic_access(priv)) {
9377 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
Tomas Winklerac17a942007-10-25 17:15:37 +08009378 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009379 iwl4965_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009380 }
9381 spin_unlock_irqrestore(&priv->lock, flags);
9382
9383 udelay(5);
9384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009385 iwl4965_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009386
9387 /* Bring the device back up */
9388 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9389 queue_work(priv->workqueue, &priv->up);
9390}
9391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009392static int iwl4965_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07009393{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009394 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07009395 int err;
9396
9397 printk(KERN_INFO "Coming out of suspend...\n");
9398
Zhu Yib481de92007-09-25 17:54:57 -07009399 pci_set_power_state(pdev, PCI_D0);
9400 err = pci_enable_device(pdev);
9401 pci_restore_state(pdev);
9402
9403 /*
9404 * Suspend/Resume resets the PCI configuration space, so we have to
9405 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
9406 * from interfering with C3 CPU state. pci_restore_state won't help
9407 * here since it only restores the first 64 bytes pci config header.
9408 */
9409 pci_write_config_byte(pdev, 0x41, 0x00);
9410
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009411 iwl4965_resume(priv);
Zhu Yib481de92007-09-25 17:54:57 -07009412
9413 return 0;
9414}
9415
9416#endif /* CONFIG_PM */
9417
9418/*****************************************************************************
9419 *
9420 * driver and module entry point
9421 *
9422 *****************************************************************************/
9423
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009424static struct pci_driver iwl4965_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07009425 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009426 .id_table = iwl4965_hw_card_ids,
9427 .probe = iwl4965_pci_probe,
9428 .remove = __devexit_p(iwl4965_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07009429#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009430 .suspend = iwl4965_pci_suspend,
9431 .resume = iwl4965_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07009432#endif
9433};
9434
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009435static int __init iwl4965_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07009436{
9437
9438 int ret;
9439 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9440 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009441 ret = pci_register_driver(&iwl4965_driver);
Zhu Yib481de92007-09-25 17:54:57 -07009442 if (ret) {
9443 IWL_ERROR("Unable to initialize PCI module\n");
9444 return ret;
9445 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009446#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009447 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07009448 if (ret) {
9449 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009450 pci_unregister_driver(&iwl4965_driver);
Zhu Yib481de92007-09-25 17:54:57 -07009451 return ret;
9452 }
9453#endif
9454
9455 return ret;
9456}
9457
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009458static void __exit iwl4965_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07009459{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08009460#ifdef CONFIG_IWL4965_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009461 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07009462#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009463 pci_unregister_driver(&iwl4965_driver);
Zhu Yib481de92007-09-25 17:54:57 -07009464}
9465
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009466module_param_named(antenna, iwl4965_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009467MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009468module_param_named(disable, iwl4965_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009469MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009470module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009471MODULE_PARM_DESC(hwcrypto,
9472 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009473module_param_named(debug, iwl4965_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009474MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009475module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009476MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9477
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009478module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009479MODULE_PARM_DESC(queues_num, "number of hw queues.");
9480
9481/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009482module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07009483MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02009484module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
9485MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Zhu Yib481de92007-09-25 17:54:57 -07009486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08009487module_exit(iwl4965_exit);
9488module_init(iwl4965_init);