Markus Pargmann | 1b6c793 | 2013-05-26 12:35:38 +0200 | [diff] [blame] | 1 | Freescale imx21 Framebuffer |
| 2 | |
| 3 | This framebuffer driver supports devices imx1, imx21, imx25, and imx27. |
| 4 | |
| 5 | Required properties: |
| 6 | - compatible : "fsl,<chip>-fb", chip should be imx1 or imx21 |
| 7 | - reg : Should contain 1 register ranges(address and length) |
| 8 | - interrupts : One interrupt of the fb dev |
| 9 | |
| 10 | Required nodes: |
| 11 | - display: Phandle to a display node as described in |
| 12 | Documentation/devicetree/bindings/video/display-timing.txt |
| 13 | Additional, the display node has to define properties: |
| 14 | - bits-per-pixel: Bits per pixel |
| 15 | - fsl,pcr: LCDC PCR value |
| 16 | |
| 17 | Optional properties: |
| 18 | - fsl,dmacr: DMA Control Register value. This is optional. By default, the |
| 19 | register is not modified as recommended by the datasheet. |
| 20 | - fsl,lscr1: LCDC Sharp Configuration Register value. |
| 21 | |
| 22 | Example: |
| 23 | |
| 24 | imxfb: fb@10021000 { |
| 25 | compatible = "fsl,imx21-fb"; |
| 26 | interrupts = <61>; |
| 27 | reg = <0x10021000 0x1000>; |
| 28 | display = <&display0>; |
| 29 | }; |
| 30 | |
| 31 | ... |
| 32 | |
| 33 | display0: display0 { |
| 34 | model = "Primeview-PD050VL1"; |
| 35 | native-mode = <&timing_disp0>; |
| 36 | bits-per-pixel = <16>; |
| 37 | fsl,pcr = <0xf0c88080>; /* non-standard but required */ |
| 38 | display-timings { |
| 39 | timing_disp0: 640x480 { |
| 40 | hactive = <640>; |
| 41 | vactive = <480>; |
| 42 | hback-porch = <112>; |
| 43 | hfront-porch = <36>; |
| 44 | hsync-len = <32>; |
| 45 | vback-porch = <33>; |
| 46 | vfront-porch = <33>; |
| 47 | vsync-len = <2>; |
| 48 | clock-frequency = <25000000>; |
| 49 | }; |
| 50 | }; |
| 51 | }; |