blob: 9f9de3e95826031eaaf08ba79ab5170bc59ce7c7 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
Aubrey Lie3defff2007-05-21 18:09:11 +080028config ZONE_DMA
29 bool
30 default y
31
Bryan Wu1394f032007-05-06 14:50:22 -070032config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
53 bool
54 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
Michael Hennerichb2d15832007-07-24 15:46:36 +080060config GENERIC_GPIO
Bryan Wu1394f032007-05-06 14:50:22 -070061 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
Michael Hennerich59003142007-10-21 16:54:27 +080074 depends on (BF52x || BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -070075 default y
76
77source "init/Kconfig"
78source "kernel/Kconfig.preempt"
79
80menu "Blackfin Processor Options"
81
82comment "Processor and Board Settings"
83
84choice
85 prompt "CPU"
86 default BF533
87
Michael Hennerich59003142007-10-21 16:54:27 +080088config BF522
89 bool "BF522"
90 help
91 BF522 Processor Support.
92
93config BF525
94 bool "BF525"
95 help
96 BF525 Processor Support.
97
98config BF527
99 bool "BF527"
100 help
101 BF527 Processor Support.
102
Bryan Wu1394f032007-05-06 14:50:22 -0700103config BF531
104 bool "BF531"
105 help
106 BF531 Processor Support.
107
108config BF532
109 bool "BF532"
110 help
111 BF532 Processor Support.
112
113config BF533
114 bool "BF533"
115 help
116 BF533 Processor Support.
117
118config BF534
119 bool "BF534"
120 help
121 BF534 Processor Support.
122
123config BF536
124 bool "BF536"
125 help
126 BF536 Processor Support.
127
128config BF537
129 bool "BF537"
130 help
131 BF537 Processor Support.
132
Roy Huang24a07a12007-07-12 22:41:45 +0800133config BF542
134 bool "BF542"
135 help
136 BF542 Processor Support.
137
138config BF544
139 bool "BF544"
140 help
141 BF544 Processor Support.
142
143config BF548
144 bool "BF548"
145 help
146 BF548 Processor Support.
147
148config BF549
149 bool "BF549"
150 help
151 BF549 Processor Support.
152
Bryan Wu1394f032007-05-06 14:50:22 -0700153config BF561
154 bool "BF561"
155 help
156 Not Supported Yet - Work in progress - BF561 Processor Support.
157
158endchoice
159
160choice
161 prompt "Silicon Rev"
Michael Hennerich59003142007-10-21 16:54:27 +0800162 default BF_REV_0_1 if BF527
Bryan Wu1394f032007-05-06 14:50:22 -0700163 default BF_REV_0_2 if BF537
164 default BF_REV_0_3 if BF533
Roy Huang24a07a12007-07-12 22:41:45 +0800165 default BF_REV_0_0 if BF549
166
167config BF_REV_0_0
168 bool "0.0"
Michael Hennerich59003142007-10-21 16:54:27 +0800169 depends on (BF549 || BF527)
170
171config BF_REV_0_1
172 bool "0.2"
173 depends on (BF549 || BF527)
Bryan Wu1394f032007-05-06 14:50:22 -0700174
175config BF_REV_0_2
176 bool "0.2"
177 depends on (BF537 || BF536 || BF534)
178
179config BF_REV_0_3
180 bool "0.3"
181 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
182
183config BF_REV_0_4
184 bool "0.4"
185 depends on (BF561 || BF533 || BF532 || BF531)
186
187config BF_REV_0_5
188 bool "0.5"
189 depends on (BF561 || BF533 || BF532 || BF531)
190
Jie Zhangde3025f2007-06-25 18:04:12 +0800191config BF_REV_ANY
192 bool "any"
193
194config BF_REV_NONE
195 bool "none"
196
Bryan Wu1394f032007-05-06 14:50:22 -0700197endchoice
198
Michael Hennerich59003142007-10-21 16:54:27 +0800199config BF52x
200 bool
201 depends on (BF522 || BF525 || BF527)
202 default y
203
Roy Huang24a07a12007-07-12 22:41:45 +0800204config BF53x
205 bool
206 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
207 default y
208
209config BF54x
210 bool
211 depends on (BF542 || BF544 || BF548 || BF549)
212 default y
213
Bryan Wu1394f032007-05-06 14:50:22 -0700214config BFIN_DUAL_CORE
215 bool
216 depends on (BF561)
217 default y
218
219config BFIN_SINGLE_CORE
220 bool
221 depends on !BFIN_DUAL_CORE
222 default y
223
224choice
225 prompt "System type"
226 default BFIN533_STAMP
227 help
228 Do NOT change the board here. Please use the top level
229 configuration to ensure that all the other settings are
230 correct.
231
Michael Hennerich59003142007-10-21 16:54:27 +0800232config BFIN527_EZKIT
233 bool "BF527-EZKIT"
234 depends on (BF522 || BF525 || BF527)
235 help
236 BF533-EZKIT-LITE board Support.
237
Bryan Wu1394f032007-05-06 14:50:22 -0700238config BFIN533_EZKIT
239 bool "BF533-EZKIT"
240 depends on (BF533 || BF532 || BF531)
241 help
242 BF533-EZKIT-LITE board Support.
243
244config BFIN533_STAMP
245 bool "BF533-STAMP"
246 depends on (BF533 || BF532 || BF531)
247 help
248 BF533-STAMP board Support.
249
250config BFIN537_STAMP
251 bool "BF537-STAMP"
252 depends on (BF537 || BF536 || BF534)
253 help
254 BF537-STAMP board Support.
255
256config BFIN533_BLUETECHNIX_CM
257 bool "Bluetechnix CM-BF533"
258 depends on (BF533)
259 help
260 CM-BF533 support for EVAL- and DEV-Board.
261
262config BFIN537_BLUETECHNIX_CM
263 bool "Bluetechnix CM-BF537"
264 depends on (BF537)
265 help
266 CM-BF537 support for EVAL- and DEV-Board.
267
Roy Huang24a07a12007-07-12 22:41:45 +0800268config BFIN548_EZKIT
269 bool "BF548-EZKIT"
270 depends on (BF548 || BF549)
271 help
272 BFIN548-EZKIT board Support.
273
Bryan Wu1394f032007-05-06 14:50:22 -0700274config BFIN561_BLUETECHNIX_CM
Mike Frysinger0a290592007-05-21 18:09:21 +0800275 bool "Bluetechnix CM-BF561"
Bryan Wu1394f032007-05-06 14:50:22 -0700276 depends on (BF561)
277 help
278 CM-BF561 support for EVAL- and DEV-Board.
279
280config BFIN561_EZKIT
281 bool "BF561-EZKIT"
282 depends on (BF561)
283 help
284 BF561-EZKIT-LITE board Support.
285
Mike Frysinger0a290592007-05-21 18:09:21 +0800286config BFIN561_TEPLA
287 bool "BF561-TEPLA"
288 depends on (BF561)
289 help
290 BF561-TEPLA board Support.
291
Bryan Wu1394f032007-05-06 14:50:22 -0700292config PNAV10
293 bool "PNAV 1.0 board"
294 depends on (BF537)
295 help
296 PNAV 1.0 board Support.
297
Javier Herreroab472a02007-10-29 16:14:44 +0800298config H8606_HVSISTEMAS
299 bool "HV Sistemas H8606"
300 depends on (BF532)
301 help
302 HV Sistemas H8606 board support.
303
Bryan Wu1394f032007-05-06 14:50:22 -0700304config GENERIC_BOARD
305 bool "Custom"
306 depends on (BF537 || BF536 \
307 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
308 help
309 GENERIC or Custom board Support.
310
311endchoice
312
313config MEM_GENERIC_BOARD
314 bool
315 depends on GENERIC_BOARD
316 default y
317
318config MEM_MT48LC64M4A2FB_7E
319 bool
320 depends on (BFIN533_STAMP)
321 default y
322
323config MEM_MT48LC16M16A2TG_75
324 bool
325 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
Javier Herreroab472a02007-10-29 16:14:44 +0800326 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \
327 || H8606_HVSISTEMAS)
Bryan Wu1394f032007-05-06 14:50:22 -0700328 default y
329
330config MEM_MT48LC32M8A2_75
331 bool
332 depends on (BFIN537_STAMP || PNAV10)
333 default y
334
335config MEM_MT48LC8M32B2B5_7
336 bool
337 depends on (BFIN561_BLUETECHNIX_CM)
338 default y
339
Michael Hennerich59003142007-10-21 16:54:27 +0800340config MEM_MT48LC32M16A2TG_75
341 bool
342 depends on (BFIN527_EZKIT)
343 default y
344
Bryan Wu1394f032007-05-06 14:50:22 -0700345config BFIN_SHARED_FLASH_ENET
346 bool
347 depends on (BFIN533_STAMP)
348 default y
349
Michael Hennerich59003142007-10-21 16:54:27 +0800350source "arch/blackfin/mach-bf527/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700351source "arch/blackfin/mach-bf533/Kconfig"
352source "arch/blackfin/mach-bf561/Kconfig"
353source "arch/blackfin/mach-bf537/Kconfig"
Roy Huang24a07a12007-07-12 22:41:45 +0800354source "arch/blackfin/mach-bf548/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700355
356menu "Board customizations"
357
358config CMDLINE_BOOL
359 bool "Default bootloader kernel arguments"
360
361config CMDLINE
362 string "Initial kernel command string"
363 depends on CMDLINE_BOOL
364 default "console=ttyBF0,57600"
365 help
366 If you don't have a boot loader capable of passing a command line string
367 to the kernel, you may specify one here. As a minimum, you should specify
368 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
369
Robin Getzf16295e2007-08-03 18:07:17 +0800370comment "Clock/PLL Setup"
Bryan Wu1394f032007-05-06 14:50:22 -0700371
372config CLKIN_HZ
373 int "Crystal Frequency in Hz"
374 default "11059200" if BFIN533_STAMP
375 default "27000000" if BFIN533_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800376 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
Bryan Wu1394f032007-05-06 14:50:22 -0700377 default "30000000" if BFIN561_EZKIT
378 default "24576000" if PNAV10
379 help
380 The frequency of CLKIN crystal oscillator on the board in Hz.
381
Robin Getzf16295e2007-08-03 18:07:17 +0800382config BFIN_KERNEL_CLOCK
383 bool "Re-program Clocks while Kernel boots?"
384 default n
385 help
386 This option decides if kernel clocks are re-programed from the
387 bootloader settings. If the clocks are not set, the SDRAM settings
388 are also not changed, and the Bootloader does 100% of the hardware
389 configuration.
390
391config PLL_BYPASS
392 bool "Bypass PLL"
393 depends on BFIN_KERNEL_CLOCK
394 default n
395
396config CLKIN_HALF
397 bool "Half Clock In"
398 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
399 default n
400 help
401 If this is set the clock will be divided by 2, before it goes to the PLL.
402
403config VCO_MULT
404 int "VCO Multiplier"
405 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
406 range 1 64
407 default "22" if BFIN533_EZKIT
408 default "45" if BFIN533_STAMP
Michael Hennerich59003142007-10-21 16:54:27 +0800409 default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
Robin Getzf16295e2007-08-03 18:07:17 +0800410 default "22" if BFIN533_BLUETECHNIX_CM
411 default "20" if BFIN537_BLUETECHNIX_CM
412 default "20" if BFIN561_BLUETECHNIX_CM
413 default "20" if BFIN561_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800414 default "16" if H8606_HVSISTEMAS
Robin Getzf16295e2007-08-03 18:07:17 +0800415 help
416 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
417 PLL Frequency = (Crystal Frequency) * (this setting)
418
419choice
420 prompt "Core Clock Divider"
421 depends on BFIN_KERNEL_CLOCK
422 default CCLK_DIV_1
423 help
424 This sets the frequency of the core. It can be 1, 2, 4 or 8
425 Core Frequency = (PLL frequency) / (this setting)
426
427config CCLK_DIV_1
428 bool "1"
429
430config CCLK_DIV_2
431 bool "2"
432
433config CCLK_DIV_4
434 bool "4"
435
436config CCLK_DIV_8
437 bool "8"
438endchoice
439
440config SCLK_DIV
441 int "System Clock Divider"
442 depends on BFIN_KERNEL_CLOCK
443 range 1 15
444 default 5 if BFIN533_EZKIT
445 default 5 if BFIN533_STAMP
Michael Hennerich59003142007-10-21 16:54:27 +0800446 default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
Robin Getzf16295e2007-08-03 18:07:17 +0800447 default 5 if BFIN533_BLUETECHNIX_CM
448 default 4 if BFIN537_BLUETECHNIX_CM
449 default 4 if BFIN561_BLUETECHNIX_CM
450 default 5 if BFIN561_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800451 default 3 if H8606_HVSISTEMAS
Robin Getzf16295e2007-08-03 18:07:17 +0800452 help
453 This sets the frequency of the system clock (including SDRAM or DDR).
454 This can be between 1 and 15
455 System Clock = (PLL frequency) / (this setting)
456
457#
458# Max & Min Speeds for various Chips
459#
460config MAX_VCO_HZ
461 int
462 default 600000000 if BF522
463 default 600000000 if BF525
464 default 600000000 if BF527
465 default 400000000 if BF531
466 default 400000000 if BF532
467 default 750000000 if BF533
468 default 500000000 if BF534
469 default 400000000 if BF536
470 default 600000000 if BF537
471 default 533000000 if BF538
472 default 533000000 if BF539
473 default 600000000 if BF542
474 default 533000000 if BF544
475 default 533000000 if BF549
476 default 600000000 if BF561
477
478config MIN_VCO_HZ
479 int
480 default 50000000
481
482config MAX_SCLK_HZ
483 int
484 default 133000000
485
486config MIN_SCLK_HZ
487 int
488 default 27000000
489
490comment "Kernel Timer/Scheduler"
491
492source kernel/Kconfig.hz
493
494comment "Memory Setup"
495
Bryan Wu1394f032007-05-06 14:50:22 -0700496config MEM_SIZE
497 int "SDRAM Memory Size in MBytes"
498 default 32 if BFIN533_EZKIT
Michael Hennerich59003142007-10-21 16:54:27 +0800499 default 64 if BFIN527_EZKIT
Bryan Wu1394f032007-05-06 14:50:22 -0700500 default 64 if BFIN537_STAMP
501 default 64 if BFIN561_EZKIT
502 default 128 if BFIN533_STAMP
503 default 64 if PNAV10
Javier Herreroab472a02007-10-29 16:14:44 +0800504 default 32 if H8606_HVSISTEMAS
Bryan Wu1394f032007-05-06 14:50:22 -0700505
506config MEM_ADD_WIDTH
507 int "SDRAM Memory Address Width"
508 default 9 if BFIN533_EZKIT
509 default 9 if BFIN561_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800510 default 9 if H8606_HVSISTEMAS
Michael Hennerich59003142007-10-21 16:54:27 +0800511 default 10 if BFIN527_EZKIT
Bryan Wu1394f032007-05-06 14:50:22 -0700512 default 10 if BFIN537_STAMP
513 default 11 if BFIN533_STAMP
514 default 10 if PNAV10
515
516config ENET_FLASH_PIN
517 int "PF port/pin used for flash and ethernet sharing"
518 depends on (BFIN533_STAMP)
519 default 0
520 help
521 PF port/pin used for flash and ethernet sharing to allow other PF
522 pins to be used on other platforms without having to touch common
523 code.
524 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
525
526config BOOT_LOAD
527 hex "Kernel load address for booting"
528 default "0x1000"
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800529 range 0x1000 0x20000000
Bryan Wu1394f032007-05-06 14:50:22 -0700530 help
531 This option allows you to set the load address of the kernel.
532 This can be useful if you are on a board which has a small amount
533 of memory or you wish to reserve some memory at the beginning of
534 the address space.
535
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800536 Note that you need to keep this value above 4k (0x1000) as this
537 memory region is used to capture NULL pointer references as well
538 as some core kernel functions.
Bryan Wu1394f032007-05-06 14:50:22 -0700539
540comment "LED Status Indicators"
541 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
542
543config BFIN_ALIVE_LED
544 bool "Enable Board Alive"
545 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
546 default n
547 help
548 Blink the LEDs you select when the kernel is running. Helps detect
549 a hung kernel.
550
551config BFIN_ALIVE_LED_NUM
552 int "LED"
553 depends on BFIN_ALIVE_LED
554 range 1 3 if BFIN533_STAMP
555 default "3" if BFIN533_STAMP
556 help
557 Select the LED (marked on the board) for you to blink.
558
559config BFIN_IDLE_LED
560 bool "Enable System Load/Idle LED"
561 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
562 default n
563 help
564 Blinks the LED you select when to determine kernel load.
565
566config BFIN_IDLE_LED_NUM
567 int "LED"
568 depends on BFIN_IDLE_LED
569 range 1 3 if BFIN533_STAMP
570 default "2" if BFIN533_STAMP
571 help
572 Select the LED (marked on the board) for you to blink.
573
Mike Frysingerf0b5d122007-08-05 17:03:59 +0800574choice
575 prompt "Blackfin Exception Scratch Register"
576 default BFIN_SCRATCH_REG_RETN
577 help
578 Select the resource to reserve for the Exception handler:
579 - RETN: Non-Maskable Interrupt (NMI)
580 - RETE: Exception Return (JTAG/ICE)
581 - CYCLES: Performance counter
582
583 If you are unsure, please select "RETN".
584
585config BFIN_SCRATCH_REG_RETN
586 bool "RETN"
587 help
588 Use the RETN register in the Blackfin exception handler
589 as a stack scratch register. This means you cannot
590 safely use NMI on the Blackfin while running Linux, but
591 you can debug the system with a JTAG ICE and use the
592 CYCLES performance registers.
593
594 If you are unsure, please select "RETN".
595
596config BFIN_SCRATCH_REG_RETE
597 bool "RETE"
598 help
599 Use the RETE register in the Blackfin exception handler
600 as a stack scratch register. This means you cannot
601 safely use a JTAG ICE while debugging a Blackfin board,
602 but you can safely use the CYCLES performance registers
603 and the NMI.
604
605 If you are unsure, please select "RETN".
606
607config BFIN_SCRATCH_REG_CYCLES
608 bool "CYCLES"
609 help
610 Use the CYCLES register in the Blackfin exception handler
611 as a stack scratch register. This means you cannot
612 safely use the CYCLES performance registers on a Blackfin
613 board at anytime, but you can debug the system with a JTAG
614 ICE and use the NMI.
615
616 If you are unsure, please select "RETN".
617
618endchoice
619
Bryan Wu1394f032007-05-06 14:50:22 -0700620#
621# Sorry - but you need to put the hex address here -
622#
623
624# Flag Data register
625config BFIN_ALIVE_LED_PORT
626 hex
627 default 0xFFC00700 if (BFIN533_STAMP)
628
629# Peripheral Flag Direction Register
630config BFIN_ALIVE_LED_DPORT
631 hex
632 default 0xFFC00730 if (BFIN533_STAMP)
633
634config BFIN_ALIVE_LED_PIN
635 hex
636 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
637 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
638 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
639
640config BFIN_IDLE_LED_PORT
641 hex
642 default 0xFFC00700 if (BFIN533_STAMP)
643
644# Peripheral Flag Direction Register
645config BFIN_IDLE_LED_DPORT
646 hex
647 default 0xFFC00730 if (BFIN533_STAMP)
648
649config BFIN_IDLE_LED_PIN
650 hex
651 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
652 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
653 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
654
Bryan Wu1394f032007-05-06 14:50:22 -0700655endmenu
656
657
658menu "Blackfin Kernel Optimizations"
659
Bryan Wu1394f032007-05-06 14:50:22 -0700660comment "Memory Optimizations"
661
662config I_ENTRY_L1
663 bool "Locate interrupt entry code in L1 Memory"
664 default y
665 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200666 If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked
667 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700668
669config EXCPT_IRQ_SYSC_L1
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200670 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory"
Bryan Wu1394f032007-05-06 14:50:22 -0700671 default y
672 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200673 If enabled, the entire ASM lowlevel exception and interrupt entry code
674 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
675 (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700676
677config DO_IRQ_L1
678 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
679 default y
680 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200681 If enabled, the frequently called do_irq dispatcher function is linked
682 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700683
684config CORE_TIMER_IRQ_L1
685 bool "Locate frequently called timer_interrupt() function in L1 Memory"
686 default y
687 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200688 If enabled, the frequently called timer_interrupt() function is linked
689 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700690
691config IDLE_L1
692 bool "Locate frequently idle function in L1 Memory"
693 default y
694 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200695 If enabled, the frequently called idle function is linked
696 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700697
698config SCHEDULE_L1
699 bool "Locate kernel schedule function in L1 Memory"
700 default y
701 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200702 If enabled, the frequently called kernel schedule is linked
703 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700704
705config ARITHMETIC_OPS_L1
706 bool "Locate kernel owned arithmetic functions in L1 Memory"
707 default y
708 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200709 If enabled, arithmetic functions are linked
710 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700711
712config ACCESS_OK_L1
713 bool "Locate access_ok function in L1 Memory"
714 default y
715 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200716 If enabled, the access_ok function is linked
717 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700718
719config MEMSET_L1
720 bool "Locate memset function in L1 Memory"
721 default y
722 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200723 If enabled, the memset function is linked
724 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700725
726config MEMCPY_L1
727 bool "Locate memcpy function in L1 Memory"
728 default y
729 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200730 If enabled, the memcpy function is linked
731 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700732
733config SYS_BFIN_SPINLOCK_L1
734 bool "Locate sys_bfin_spinlock function in L1 Memory"
735 default y
736 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200737 If enabled, sys_bfin_spinlock function is linked
738 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700739
740config IP_CHECKSUM_L1
741 bool "Locate IP Checksum function in L1 Memory"
742 default n
743 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200744 If enabled, the IP Checksum function is linked
745 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700746
747config CACHELINE_ALIGNED_L1
748 bool "Locate cacheline_aligned data to L1 Data Memory"
Michael Hennerich157cc5a2007-07-12 16:20:21 +0800749 default y if !BF54x
750 default n if BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700751 depends on !BF531
752 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200753 If enabled, cacheline_anligned data is linked
754 into L1 data memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700755
756config SYSCALL_TAB_L1
757 bool "Locate Syscall Table L1 Data Memory"
758 default n
759 depends on !BF531
760 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200761 If enabled, the Syscall LUT is linked
762 into L1 data memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700763
764config CPLB_SWITCH_TAB_L1
765 bool "Locate CPLB Switch Tables L1 Data Memory"
766 default n
767 depends on !BF531
768 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200769 If enabled, the CPLB Switch Tables are linked
770 into L1 data memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700771
772endmenu
773
774
775choice
776 prompt "Kernel executes from"
777 help
778 Choose the memory type that the kernel will be running in.
779
780config RAMKERNEL
781 bool "RAM"
782 help
783 The kernel will be resident in RAM when running.
784
785config ROMKERNEL
786 bool "ROM"
787 help
788 The kernel will be resident in FLASH/ROM when running.
789
790endchoice
791
792source "mm/Kconfig"
793
Bryan Wudb0fa202007-07-12 14:55:05 +0800794config LARGE_ALLOCS
795 bool "Allow allocating large blocks (> 1MB) of memory"
796 help
797 Allow the slab memory allocator to keep chains for very large
798 memory sizes - upto 32MB. You may need this if your system has
799 a lot of RAM, and you need to able to allocate very large
800 contiguous chunks. If unsure, say N.
801
Mike Frysinger780431e2007-10-21 23:37:54 +0800802config BFIN_GPTIMERS
803 tristate "Enable Blackfin General Purpose Timers API"
804 default n
805 help
806 Enable support for the General Purpose Timers API. If you
807 are unsure, say N.
808
809 To compile this driver as a module, choose M here: the module
810 will be called gptimers.ko.
811
Bryan Wu1394f032007-05-06 14:50:22 -0700812config BFIN_DMA_5XX
813 bool "Enable DMA Support"
Michael Hennerich59003142007-10-21 16:54:27 +0800814 depends on (BF52x || BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700815 default y
816 help
817 DMA driver for BF5xx.
818
819choice
820 prompt "Uncached SDRAM region"
821 default DMA_UNCACHED_1M
Adrian Bunk247537b2007-09-26 20:02:52 +0200822 depends on BFIN_DMA_5XX
Bryan Wu1394f032007-05-06 14:50:22 -0700823config DMA_UNCACHED_2M
824 bool "Enable 2M DMA region"
825config DMA_UNCACHED_1M
826 bool "Enable 1M DMA region"
827config DMA_UNCACHED_NONE
828 bool "Disable DMA region"
829endchoice
830
831
832comment "Cache Support"
Robin Getz3bebca22007-10-10 23:55:26 +0800833config BFIN_ICACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700834 bool "Enable ICACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800835config BFIN_DCACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700836 bool "Enable DCACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800837config BFIN_DCACHE_BANKA
Bryan Wu1394f032007-05-06 14:50:22 -0700838 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
Robin Getz3bebca22007-10-10 23:55:26 +0800839 depends on BFIN_DCACHE && !BF531
Bryan Wu1394f032007-05-06 14:50:22 -0700840 default n
Robin Getz3bebca22007-10-10 23:55:26 +0800841config BFIN_ICACHE_LOCK
842 bool "Enable Instruction Cache Locking"
Bryan Wu1394f032007-05-06 14:50:22 -0700843
844choice
845 prompt "Policy"
Robin Getz3bebca22007-10-10 23:55:26 +0800846 depends on BFIN_DCACHE
847 default BFIN_WB
848config BFIN_WB
Bryan Wu1394f032007-05-06 14:50:22 -0700849 bool "Write back"
850 help
851 Write Back Policy:
852 Cached data will be written back to SDRAM only when needed.
853 This can give a nice increase in performance, but beware of
854 broken drivers that do not properly invalidate/flush their
855 cache.
856
857 Write Through Policy:
858 Cached data will always be written back to SDRAM when the
859 cache is updated. This is a completely safe setting, but
860 performance is worse than Write Back.
861
862 If you are unsure of the options and you want to be safe,
863 then go with Write Through.
864
Robin Getz3bebca22007-10-10 23:55:26 +0800865config BFIN_WT
Bryan Wu1394f032007-05-06 14:50:22 -0700866 bool "Write through"
867 help
868 Write Back Policy:
869 Cached data will be written back to SDRAM only when needed.
870 This can give a nice increase in performance, but beware of
871 broken drivers that do not properly invalidate/flush their
872 cache.
873
874 Write Through Policy:
875 Cached data will always be written back to SDRAM when the
876 cache is updated. This is a completely safe setting, but
877 performance is worse than Write Back.
878
879 If you are unsure of the options and you want to be safe,
880 then go with Write Through.
881
882endchoice
883
884config L1_MAX_PIECE
885 int "Set the max L1 SRAM pieces"
886 default 16
887 help
888 Set the max memory pieces for the L1 SRAM allocation algorithm.
889 Min value is 16. Max value is 1024.
890
Bryan Wu1394f032007-05-06 14:50:22 -0700891comment "Asynchonous Memory Configuration"
892
Mike Frysingerddf416b2007-10-10 18:06:47 +0800893menu "EBIU_AMGCTL Global Control"
Bryan Wu1394f032007-05-06 14:50:22 -0700894config C_AMCKEN
895 bool "Enable CLKOUT"
896 default y
897
898config C_CDPRIO
899 bool "DMA has priority over core for ext. accesses"
Michael Hennerich9be343c2007-07-12 11:58:44 +0800900 depends on !BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700901 default n
902
903config C_B0PEN
904 depends on BF561
905 bool "Bank 0 16 bit packing enable"
906 default y
907
908config C_B1PEN
909 depends on BF561
910 bool "Bank 1 16 bit packing enable"
911 default y
912
913config C_B2PEN
914 depends on BF561
915 bool "Bank 2 16 bit packing enable"
916 default y
917
918config C_B3PEN
919 depends on BF561
920 bool "Bank 3 16 bit packing enable"
921 default n
922
923choice
924 prompt"Enable Asynchonous Memory Banks"
925 default C_AMBEN_ALL
926
927config C_AMBEN
928 bool "Disable All Banks"
929
930config C_AMBEN_B0
931 bool "Enable Bank 0"
932
933config C_AMBEN_B0_B1
934 bool "Enable Bank 0 & 1"
935
936config C_AMBEN_B0_B1_B2
937 bool "Enable Bank 0 & 1 & 2"
938
939config C_AMBEN_ALL
940 bool "Enable All Banks"
941endchoice
942endmenu
943
944menu "EBIU_AMBCTL Control"
945config BANK_0
946 hex "Bank 0"
947 default 0x7BB0
948
949config BANK_1
950 hex "Bank 1"
951 default 0x7BB0
952
953config BANK_2
954 hex "Bank 2"
955 default 0x7BB0
956
957config BANK_3
958 hex "Bank 3"
959 default 0x99B3
960endmenu
961
962endmenu
963
964#############################################################################
965menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
966
967config PCI
968 bool "PCI support"
969 help
970 Support for PCI bus.
971
972source "drivers/pci/Kconfig"
973
974config HOTPLUG
975 bool "Support for hot-pluggable device"
976 help
977 Say Y here if you want to plug devices into your computer while
978 the system is running, and be able to use them quickly. In many
979 cases, the devices can likewise be unplugged at any time too.
980
981 One well known example of this is PCMCIA- or PC-cards, credit-card
982 size devices such as network cards, modems or hard drives which are
983 plugged into slots found on all modern laptop computers. Another
984 example, used on modern desktops as well as laptops, is USB.
985
986 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
987 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
988 Then your kernel will automatically call out to a user mode "policy
989 agent" (/sbin/hotplug) to load modules and set up software needed
990 to use devices as you hotplug them.
991
992source "drivers/pcmcia/Kconfig"
993
994source "drivers/pci/hotplug/Kconfig"
995
996endmenu
997
998menu "Executable file formats"
999
1000source "fs/Kconfig.binfmt"
1001
1002endmenu
1003
1004menu "Power management options"
1005source "kernel/power/Kconfig"
1006
1007choice
1008 prompt "Select PM Wakeup Event Source"
1009 default PM_WAKEUP_GPIO_BY_SIC_IWR
1010 depends on PM
1011 help
1012 If you have a GPIO already configured as input with the corresponding PORTx_MASK
1013 bit set - "Specify Wakeup Event by SIC_IWR value"
1014
1015config PM_WAKEUP_GPIO_BY_SIC_IWR
1016 bool "Specify Wakeup Event by SIC_IWR value"
1017config PM_WAKEUP_BY_GPIO
1018 bool "Cause Wakeup Event by GPIO"
1019config PM_WAKEUP_GPIO_API
1020 bool "Configure Wakeup Event by PM GPIO API"
1021
1022endchoice
1023
1024config PM_WAKEUP_SIC_IWR
1025 hex "Wakeup Events (SIC_IWR)"
1026 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
1027 default 0x80000000 if (BF537 || BF536 || BF534)
1028 default 0x100000 if (BF533 || BF532 || BF531)
1029
1030config PM_WAKEUP_GPIO_NUMBER
1031 int "Wakeup GPIO number"
1032 range 0 47
1033 depends on PM_WAKEUP_BY_GPIO
1034 default 2 if BFIN537_STAMP
1035
1036choice
1037 prompt "GPIO Polarity"
1038 depends on PM_WAKEUP_BY_GPIO
1039 default PM_WAKEUP_GPIO_POLAR_H
1040config PM_WAKEUP_GPIO_POLAR_H
1041 bool "Active High"
1042config PM_WAKEUP_GPIO_POLAR_L
1043 bool "Active Low"
1044config PM_WAKEUP_GPIO_POLAR_EDGE_F
1045 bool "Falling EDGE"
1046config PM_WAKEUP_GPIO_POLAR_EDGE_R
1047 bool "Rising EDGE"
1048config PM_WAKEUP_GPIO_POLAR_EDGE_B
1049 bool "Both EDGE"
1050endchoice
1051
1052endmenu
1053
Roy Huang24a07a12007-07-12 22:41:45 +08001054if (BF537 || BF533 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -07001055
1056menu "CPU Frequency scaling"
1057
1058source "drivers/cpufreq/Kconfig"
1059
1060config CPU_FREQ
1061 bool
1062 default n
1063 help
1064 If you want to enable this option, you should select the
1065 DPMC driver from Character Devices.
1066endmenu
1067
1068endif
1069
1070source "net/Kconfig"
1071
1072source "drivers/Kconfig"
1073
1074source "fs/Kconfig"
1075
Mathieu Desnoyers09caded2007-10-18 23:41:05 -07001076source "kernel/Kconfig.instrumentation"
Bryan Wu1394f032007-05-06 14:50:22 -07001077
1078menu "Kernel hacking"
1079
1080source "lib/Kconfig.debug"
1081
1082config DEBUG_HWERR
1083 bool "Hardware error interrupt debugging"
1084 depends on DEBUG_KERNEL
1085 help
1086 When enabled, the hardware error interrupt is never disabled, and
1087 will happen immediately when an error condition occurs. This comes
1088 at a slight cost in code size, but is necessary if you are getting
1089 hardware error interrupts and need to know where they are coming
1090 from.
1091
1092config DEBUG_ICACHE_CHECK
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001093 bool "Check Instruction cache coherency"
Bryan Wu1394f032007-05-06 14:50:22 -07001094 depends on DEBUG_KERNEL
1095 depends on DEBUG_HWERR
1096 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001097 Say Y here if you are getting weird unexplained errors. This will
1098 ensure that icache is what SDRAM says it should be by doing a
1099 byte wise comparison between SDRAM and instruction cache. This
Bryan Wu1394f032007-05-06 14:50:22 -07001100 also relocates the irq_panic() function to L1 memory, (which is
1101 un-cached).
1102
Bryan Wu1394f032007-05-06 14:50:22 -07001103config DEBUG_HUNT_FOR_ZERO
1104 bool "Catch NULL pointer reads/writes"
1105 default y
1106 help
1107 Say Y here to catch reads/writes to anywhere in the memory range
1108 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1109 catching common programming errors such as NULL pointer dereferences.
1110
1111 Misbehaving applications will be killed (generate a SEGV) while the
1112 kernel will trigger a panic.
1113
1114 Enabling this option will take up an extra entry in CPLB table.
1115 Otherwise, there is no extra overhead.
1116
Robin Getz518039b2007-07-25 11:03:28 +08001117config DEBUG_BFIN_HWTRACE_ON
1118 bool "Turn on Blackfin's Hardware Trace"
1119 default y
1120 help
1121 All Blackfins include a Trace Unit which stores a history of the last
1122 16 changes in program flow taken by the program sequencer. The history
1123 allows the user to recreate the program sequencer’s recent path. This
1124 can be handy when an application dies - we print out the execution
1125 path of how it got to the offending instruction.
1126
1127 By turning this off, you may save a tiny amount of power.
1128
1129choice
1130 prompt "Omit loop Tracing"
1131 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1132 depends on DEBUG_BFIN_HWTRACE_ON
1133 help
1134 The trace buffer can be configured to omit recording of changes in
1135 program flow that match either the last entry or one of the last
1136 two entries. Omitting one of these entries from the record prevents
1137 the trace buffer from overflowing because of any sort of loop (for, do
1138 while, etc) in the program.
1139
1140 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1141 this feature can be used to prevent trace overflow from loops that
1142 are nested four deep.
1143
1144config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1145 bool "Trace all Loops"
1146 help
1147 The trace buffer records all changes of flow
1148
1149config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1150 bool "Compress single-level loops"
1151 help
1152 The trace buffer does not record single loops - helpful if trace
1153 is spinning on a while or do loop.
1154
1155config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1156 bool "Compress two-level loops"
1157 help
1158 The trace buffer does not record loops two levels deep. Helpful if
1159 the trace is spinning in a nested loop
1160
1161endchoice
1162
1163config DEBUG_BFIN_HWTRACE_COMPRESSION
1164 int
1165 depends on DEBUG_BFIN_HWTRACE_ON
1166 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1167 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1168 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1169
1170
1171config DEBUG_BFIN_HWTRACE_EXPAND
1172 bool "Expand Trace Buffer greater than 16 entries"
1173 depends on DEBUG_BFIN_HWTRACE_ON
1174 default n
1175 help
1176 By selecting this option, every time the 16 hardware entries in
1177 the Blackfin's HW Trace buffer are full, the kernel will move them
1178 into a software buffer, for dumping when there is an issue. This
1179 has a great impact on performance, (an interrupt every 16 change of
1180 flows) and should normally be turned off, except in those nasty
1181 debugging sessions
1182
1183config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1184 int "Size of Trace buffer (in power of 2k)"
1185 range 0 4
1186 depends on DEBUG_BFIN_HWTRACE_EXPAND
1187 default 1
1188 help
1189 This sets the size of the software buffer that the trace information
1190 is kept in.
1191 0 for (2^0) 1k, or 256 entries,
1192 1 for (2^1) 2k, or 512 entries,
1193 2 for (2^2) 4k, or 1024 entries,
1194 3 for (2^3) 8k, or 2048 entries,
1195 4 for (2^4) 16k, or 4096 entries
1196
Bryan Wu1394f032007-05-06 14:50:22 -07001197config DEBUG_BFIN_NO_KERN_HWTRACE
1198 bool "Trace user apps (turn off hwtrace in kernel)"
Robin Getz518039b2007-07-25 11:03:28 +08001199 depends on DEBUG_BFIN_HWTRACE_ON
Bryan Wu1394f032007-05-06 14:50:22 -07001200 default n
1201 help
1202 Some pieces of the kernel contain a lot of flow changes which can
1203 quickly fill up the hardware trace buffer. When debugging crashes,
1204 the hardware trace may indicate that the problem lies in kernel
1205 space when in reality an application is buggy.
1206
1207 Say Y here to disable hardware tracing in some known "jumpy" pieces
1208 of code so that the trace buffer will extend further back.
1209
Robin Getz0ae53642007-10-09 17:24:49 +08001210config EARLY_PRINTK
1211 bool "Early printk"
1212 default n
1213 help
1214 This option enables special console drivers which allow the kernel
1215 to print messages very early in the bootup process.
1216
1217 This is useful for kernel debugging when your machine crashes very
1218 early before the console code is initialized. After enabling this
1219 feature, you must add "earlyprintk=serial,uart0,57600" to the
1220 command line (bootargs). It is safe to say Y here in all cases, as
1221 all of this lives in the init section and is thrown away after the
1222 kernel boots completely.
1223
Bryan Wu1394f032007-05-06 14:50:22 -07001224config DUAL_CORE_TEST_MODULE
1225 tristate "Dual Core Test Module"
1226 depends on (BF561)
1227 default n
1228 help
1229 Say Y here to build-in dual core test module for dual core test.
1230
1231config CPLB_INFO
1232 bool "Display the CPLB information"
1233 help
1234 Display the CPLB information.
1235
1236config ACCESS_CHECK
1237 bool "Check the user pointer address"
1238 default y
1239 help
1240 Usually the pointer transfer from user space is checked to see if its
1241 address is in the kernel space.
1242
1243 Say N here to disable that check to improve the performance.
1244
1245endmenu
1246
1247source "security/Kconfig"
1248
1249source "crypto/Kconfig"
1250
1251source "lib/Kconfig"