Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) |
| 3 | * |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 4 | * Copyright (C) 2002 - 2011 Paul Mundt |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 5 | * Copyright (C) 2015 Glider bvba |
Markus Brunner | 3ea6bc3 | 2007-08-20 08:59:33 +0900 | [diff] [blame] | 6 | * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * based off of the old drivers/char/sh-sci.c by: |
| 9 | * |
| 10 | * Copyright (C) 1999, 2000 Niibe Yutaka |
| 11 | * Copyright (C) 2000 Sugioka Toshinobu |
| 12 | * Modified to support multiple serial ports. Stuart Menefy (May 2000). |
| 13 | * Modified to support SecureEdge. David McCullough (2002) |
| 14 | * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). |
Magnus Damm | d89ddd1 | 2007-07-25 11:42:56 +0900 | [diff] [blame] | 15 | * Removed SH7300 support (Jul 2007). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | * |
| 17 | * This file is subject to the terms and conditions of the GNU General Public |
| 18 | * License. See the file "COPYING" in the main directory of this archive |
| 19 | * for more details. |
| 20 | */ |
Paul Mundt | 0b3d4ef | 2007-03-14 13:22:37 +0900 | [diff] [blame] | 21 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
| 22 | #define SUPPORT_SYSRQ |
| 23 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | |
| 25 | #undef DEBUG |
| 26 | |
Paul Mundt | 85f094e | 2008-04-25 16:04:20 +0900 | [diff] [blame] | 27 | #include <linux/clk.h> |
Laurent Pinchart | 8fb9631 | 2013-12-06 10:59:10 +0100 | [diff] [blame] | 28 | #include <linux/console.h> |
Paul Mundt | fa5da2f | 2007-03-08 17:27:37 +0900 | [diff] [blame] | 29 | #include <linux/ctype.h> |
Laurent Pinchart | 8fb9631 | 2013-12-06 10:59:10 +0100 | [diff] [blame] | 30 | #include <linux/cpufreq.h> |
| 31 | #include <linux/delay.h> |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 32 | #include <linux/dmaengine.h> |
Magnus Damm | 5beabc7 | 2011-08-02 09:42:54 +0000 | [diff] [blame] | 33 | #include <linux/dma-mapping.h> |
Laurent Pinchart | 8fb9631 | 2013-12-06 10:59:10 +0100 | [diff] [blame] | 34 | #include <linux/err.h> |
| 35 | #include <linux/errno.h> |
Laurent Pinchart | 8fb9631 | 2013-12-06 10:59:10 +0100 | [diff] [blame] | 36 | #include <linux/init.h> |
| 37 | #include <linux/interrupt.h> |
| 38 | #include <linux/ioport.h> |
| 39 | #include <linux/major.h> |
| 40 | #include <linux/module.h> |
| 41 | #include <linux/mm.h> |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 42 | #include <linux/of.h> |
Laurent Pinchart | 8fb9631 | 2013-12-06 10:59:10 +0100 | [diff] [blame] | 43 | #include <linux/platform_device.h> |
| 44 | #include <linux/pm_runtime.h> |
| 45 | #include <linux/scatterlist.h> |
| 46 | #include <linux/serial.h> |
| 47 | #include <linux/serial_sci.h> |
| 48 | #include <linux/sh_dma.h> |
| 49 | #include <linux/slab.h> |
| 50 | #include <linux/string.h> |
| 51 | #include <linux/sysrq.h> |
| 52 | #include <linux/timer.h> |
| 53 | #include <linux/tty.h> |
| 54 | #include <linux/tty_flip.h> |
Paul Mundt | 85f094e | 2008-04-25 16:04:20 +0900 | [diff] [blame] | 55 | |
| 56 | #ifdef CONFIG_SUPERH |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 57 | #include <asm/sh_bios.h> |
Paul Mundt | b7a76e4 | 2006-02-01 03:06:06 -0800 | [diff] [blame] | 58 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 60 | #include "serial_mctrl_gpio.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | #include "sh-sci.h" |
| 62 | |
Laurent Pinchart | 89b5c1a | 2013-12-06 10:59:52 +0100 | [diff] [blame] | 63 | /* Offsets into the sci_port->irqs array */ |
| 64 | enum { |
| 65 | SCIx_ERI_IRQ, |
| 66 | SCIx_RXI_IRQ, |
| 67 | SCIx_TXI_IRQ, |
| 68 | SCIx_BRI_IRQ, |
| 69 | SCIx_NR_IRQS, |
| 70 | |
| 71 | SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */ |
| 72 | }; |
| 73 | |
| 74 | #define SCIx_IRQ_IS_MUXED(port) \ |
| 75 | ((port)->irqs[SCIx_ERI_IRQ] == \ |
| 76 | (port)->irqs[SCIx_RXI_IRQ]) || \ |
| 77 | ((port)->irqs[SCIx_ERI_IRQ] && \ |
| 78 | ((port)->irqs[SCIx_RXI_IRQ] < 0)) |
| 79 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 80 | enum SCI_CLKS { |
| 81 | SCI_FCK, /* Functional Clock */ |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 82 | SCI_SCK, /* Optional External Clock */ |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 83 | SCI_BRG_INT, /* Optional BRG Internal Clock Source */ |
| 84 | SCI_SCIF_CLK, /* Optional BRG External Clock Source */ |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 85 | SCI_NUM_CLKS |
| 86 | }; |
| 87 | |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 88 | /* Bit x set means sampling rate x + 1 is supported */ |
| 89 | #define SCI_SR(x) BIT((x) - 1) |
| 90 | #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1) |
| 91 | |
Geert Uytterhoeven | 92a0574 | 2016-01-04 14:45:22 +0100 | [diff] [blame] | 92 | #define SCI_SR_SCIFAB SCI_SR(5) | SCI_SR(7) | SCI_SR(11) | \ |
| 93 | SCI_SR(13) | SCI_SR(16) | SCI_SR(17) | \ |
| 94 | SCI_SR(19) | SCI_SR(27) |
| 95 | |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 96 | #define min_sr(_port) ffs((_port)->sampling_rate_mask) |
| 97 | #define max_sr(_port) fls((_port)->sampling_rate_mask) |
| 98 | |
| 99 | /* Iterate over all supported sampling rates, from high to low */ |
| 100 | #define for_each_sr(_sr, _port) \ |
| 101 | for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \ |
| 102 | if ((_port)->sampling_rate_mask & SCI_SR((_sr))) |
| 103 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 104 | struct sci_port { |
| 105 | struct uart_port port; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | |
Paul Mundt | ce6738b | 2011-01-19 15:24:40 +0900 | [diff] [blame] | 107 | /* Platform configuration */ |
| 108 | struct plat_sci_port *cfg; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 109 | unsigned int overrun_reg; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 110 | unsigned int overrun_mask; |
Laurent Pinchart | 3ae988d | 2013-12-06 10:59:17 +0100 | [diff] [blame] | 111 | unsigned int error_mask; |
Geert Uytterhoeven | 5da0f46 | 2015-08-21 20:02:27 +0200 | [diff] [blame] | 112 | unsigned int error_clear; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 113 | unsigned int sampling_rate_mask; |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 114 | resource_size_t reg_size; |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 115 | struct mctrl_gpios *gpios; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 116 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 117 | /* Break timer */ |
| 118 | struct timer_list break_timer; |
| 119 | int break_flag; |
dmitry pervushin | 1534a3b | 2007-04-24 13:41:12 +0900 | [diff] [blame] | 120 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 121 | /* Clocks */ |
| 122 | struct clk *clks[SCI_NUM_CLKS]; |
| 123 | unsigned long clk_rates[SCI_NUM_CLKS]; |
Paul Mundt | edad1f2 | 2009-11-25 16:23:35 +0900 | [diff] [blame] | 124 | |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 125 | int irqs[SCIx_NR_IRQS]; |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 126 | char *irqstr[SCIx_NR_IRQS]; |
| 127 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 128 | struct dma_chan *chan_tx; |
| 129 | struct dma_chan *chan_rx; |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 130 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 131 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 132 | dma_cookie_t cookie_tx; |
| 133 | dma_cookie_t cookie_rx[2]; |
| 134 | dma_cookie_t active_rx; |
Geert Uytterhoeven | 7990442 | 2015-08-21 20:02:42 +0200 | [diff] [blame] | 135 | dma_addr_t tx_dma_addr; |
| 136 | unsigned int tx_dma_len; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 137 | struct scatterlist sg_rx[2]; |
Yoshihiro Shimoda | 7b39d90 | 2015-08-21 20:02:54 +0200 | [diff] [blame] | 138 | void *rx_buf[2]; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 139 | size_t buf_len_rx; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 140 | struct work_struct work_tx; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 141 | struct timer_list rx_timer; |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 142 | unsigned int rx_timeout; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 143 | #endif |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 144 | |
| 145 | bool autorts; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 146 | }; |
| 147 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 148 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS |
| 149 | |
| 150 | static struct sci_port sci_ports[SCI_NPORTS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | static struct uart_driver sci_uart_driver; |
| 152 | |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 153 | static inline struct sci_port * |
| 154 | to_sci_port(struct uart_port *uart) |
| 155 | { |
| 156 | return container_of(uart, struct sci_port, port); |
| 157 | } |
| 158 | |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 159 | struct plat_sci_reg { |
| 160 | u8 offset, size; |
| 161 | }; |
| 162 | |
| 163 | /* Helper for invalidating specific entries of an inherited map. */ |
| 164 | #define sci_reg_invalid { .offset = 0, .size = 0 } |
| 165 | |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 166 | static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 167 | [SCIx_PROBE_REGTYPE] = { |
| 168 | [0 ... SCIx_NR_REGS - 1] = sci_reg_invalid, |
| 169 | }, |
| 170 | |
| 171 | /* |
| 172 | * Common SCI definitions, dependent on the port's regshift |
| 173 | * value. |
| 174 | */ |
| 175 | [SCIx_SCI_REGTYPE] = { |
| 176 | [SCSMR] = { 0x00, 8 }, |
| 177 | [SCBRR] = { 0x01, 8 }, |
| 178 | [SCSCR] = { 0x02, 8 }, |
| 179 | [SCxTDR] = { 0x03, 8 }, |
| 180 | [SCxSR] = { 0x04, 8 }, |
| 181 | [SCxRDR] = { 0x05, 8 }, |
| 182 | [SCFCR] = sci_reg_invalid, |
| 183 | [SCFDR] = sci_reg_invalid, |
| 184 | [SCTFDR] = sci_reg_invalid, |
| 185 | [SCRFDR] = sci_reg_invalid, |
| 186 | [SCSPTR] = sci_reg_invalid, |
| 187 | [SCLSR] = sci_reg_invalid, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 188 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 189 | [SCPCR] = sci_reg_invalid, |
| 190 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 191 | [SCDL] = sci_reg_invalid, |
| 192 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 193 | }, |
| 194 | |
| 195 | /* |
Laurent Pinchart | 2ae9f47 | 2017-01-11 16:43:32 +0200 | [diff] [blame] | 196 | * Common definitions for legacy IrDA ports. |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 197 | */ |
| 198 | [SCIx_IRDA_REGTYPE] = { |
| 199 | [SCSMR] = { 0x00, 8 }, |
Laurent Pinchart | 2ae9f47 | 2017-01-11 16:43:32 +0200 | [diff] [blame] | 200 | [SCBRR] = { 0x02, 8 }, |
| 201 | [SCSCR] = { 0x04, 8 }, |
| 202 | [SCxTDR] = { 0x06, 8 }, |
| 203 | [SCxSR] = { 0x08, 16 }, |
| 204 | [SCxRDR] = { 0x0a, 8 }, |
| 205 | [SCFCR] = { 0x0c, 8 }, |
| 206 | [SCFDR] = { 0x0e, 16 }, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 207 | [SCTFDR] = sci_reg_invalid, |
| 208 | [SCRFDR] = sci_reg_invalid, |
| 209 | [SCSPTR] = sci_reg_invalid, |
| 210 | [SCLSR] = sci_reg_invalid, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 211 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 212 | [SCPCR] = sci_reg_invalid, |
| 213 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 214 | [SCDL] = sci_reg_invalid, |
| 215 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 216 | }, |
| 217 | |
| 218 | /* |
| 219 | * Common SCIFA definitions. |
| 220 | */ |
| 221 | [SCIx_SCIFA_REGTYPE] = { |
| 222 | [SCSMR] = { 0x00, 16 }, |
| 223 | [SCBRR] = { 0x04, 8 }, |
| 224 | [SCSCR] = { 0x08, 16 }, |
| 225 | [SCxTDR] = { 0x20, 8 }, |
| 226 | [SCxSR] = { 0x14, 16 }, |
| 227 | [SCxRDR] = { 0x24, 8 }, |
| 228 | [SCFCR] = { 0x18, 16 }, |
| 229 | [SCFDR] = { 0x1c, 16 }, |
| 230 | [SCTFDR] = sci_reg_invalid, |
| 231 | [SCRFDR] = sci_reg_invalid, |
| 232 | [SCSPTR] = sci_reg_invalid, |
| 233 | [SCLSR] = sci_reg_invalid, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 234 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 235 | [SCPCR] = { 0x30, 16 }, |
| 236 | [SCPDR] = { 0x34, 16 }, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 237 | [SCDL] = sci_reg_invalid, |
| 238 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 239 | }, |
| 240 | |
| 241 | /* |
| 242 | * Common SCIFB definitions. |
| 243 | */ |
| 244 | [SCIx_SCIFB_REGTYPE] = { |
| 245 | [SCSMR] = { 0x00, 16 }, |
| 246 | [SCBRR] = { 0x04, 8 }, |
| 247 | [SCSCR] = { 0x08, 16 }, |
| 248 | [SCxTDR] = { 0x40, 8 }, |
| 249 | [SCxSR] = { 0x14, 16 }, |
| 250 | [SCxRDR] = { 0x60, 8 }, |
| 251 | [SCFCR] = { 0x18, 16 }, |
Takashi Yoshii | 8c66d6d | 2012-11-16 10:53:31 +0900 | [diff] [blame] | 252 | [SCFDR] = sci_reg_invalid, |
| 253 | [SCTFDR] = { 0x38, 16 }, |
| 254 | [SCRFDR] = { 0x3c, 16 }, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 255 | [SCSPTR] = sci_reg_invalid, |
| 256 | [SCLSR] = sci_reg_invalid, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 257 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 258 | [SCPCR] = { 0x30, 16 }, |
| 259 | [SCPDR] = { 0x34, 16 }, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 260 | [SCDL] = sci_reg_invalid, |
| 261 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 262 | }, |
| 263 | |
| 264 | /* |
Phil Edworthy | 3af1f8a | 2011-10-03 15:16:47 +0100 | [diff] [blame] | 265 | * Common SH-2(A) SCIF definitions for ports with FIFO data |
| 266 | * count registers. |
| 267 | */ |
| 268 | [SCIx_SH2_SCIF_FIFODATA_REGTYPE] = { |
| 269 | [SCSMR] = { 0x00, 16 }, |
| 270 | [SCBRR] = { 0x04, 8 }, |
| 271 | [SCSCR] = { 0x08, 16 }, |
| 272 | [SCxTDR] = { 0x0c, 8 }, |
| 273 | [SCxSR] = { 0x10, 16 }, |
| 274 | [SCxRDR] = { 0x14, 8 }, |
| 275 | [SCFCR] = { 0x18, 16 }, |
| 276 | [SCFDR] = { 0x1c, 16 }, |
| 277 | [SCTFDR] = sci_reg_invalid, |
| 278 | [SCRFDR] = sci_reg_invalid, |
| 279 | [SCSPTR] = { 0x20, 16 }, |
| 280 | [SCLSR] = { 0x24, 16 }, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 281 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 282 | [SCPCR] = sci_reg_invalid, |
| 283 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 284 | [SCDL] = sci_reg_invalid, |
| 285 | [SCCKS] = sci_reg_invalid, |
Phil Edworthy | 3af1f8a | 2011-10-03 15:16:47 +0100 | [diff] [blame] | 286 | }, |
| 287 | |
| 288 | /* |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 289 | * Common SH-3 SCIF definitions. |
| 290 | */ |
| 291 | [SCIx_SH3_SCIF_REGTYPE] = { |
| 292 | [SCSMR] = { 0x00, 8 }, |
| 293 | [SCBRR] = { 0x02, 8 }, |
| 294 | [SCSCR] = { 0x04, 8 }, |
| 295 | [SCxTDR] = { 0x06, 8 }, |
| 296 | [SCxSR] = { 0x08, 16 }, |
| 297 | [SCxRDR] = { 0x0a, 8 }, |
| 298 | [SCFCR] = { 0x0c, 8 }, |
| 299 | [SCFDR] = { 0x0e, 16 }, |
| 300 | [SCTFDR] = sci_reg_invalid, |
| 301 | [SCRFDR] = sci_reg_invalid, |
| 302 | [SCSPTR] = sci_reg_invalid, |
| 303 | [SCLSR] = sci_reg_invalid, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 304 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 305 | [SCPCR] = sci_reg_invalid, |
| 306 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 307 | [SCDL] = sci_reg_invalid, |
| 308 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 309 | }, |
| 310 | |
| 311 | /* |
| 312 | * Common SH-4(A) SCIF(B) definitions. |
| 313 | */ |
| 314 | [SCIx_SH4_SCIF_REGTYPE] = { |
| 315 | [SCSMR] = { 0x00, 16 }, |
| 316 | [SCBRR] = { 0x04, 8 }, |
| 317 | [SCSCR] = { 0x08, 16 }, |
| 318 | [SCxTDR] = { 0x0c, 8 }, |
| 319 | [SCxSR] = { 0x10, 16 }, |
| 320 | [SCxRDR] = { 0x14, 8 }, |
| 321 | [SCFCR] = { 0x18, 16 }, |
| 322 | [SCFDR] = { 0x1c, 16 }, |
| 323 | [SCTFDR] = sci_reg_invalid, |
| 324 | [SCRFDR] = sci_reg_invalid, |
| 325 | [SCSPTR] = { 0x20, 16 }, |
| 326 | [SCLSR] = { 0x24, 16 }, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 327 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 328 | [SCPCR] = sci_reg_invalid, |
| 329 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 330 | [SCDL] = sci_reg_invalid, |
| 331 | [SCCKS] = sci_reg_invalid, |
| 332 | }, |
| 333 | |
| 334 | /* |
| 335 | * Common SCIF definitions for ports with a Baud Rate Generator for |
| 336 | * External Clock (BRG). |
| 337 | */ |
| 338 | [SCIx_SH4_SCIF_BRG_REGTYPE] = { |
| 339 | [SCSMR] = { 0x00, 16 }, |
| 340 | [SCBRR] = { 0x04, 8 }, |
| 341 | [SCSCR] = { 0x08, 16 }, |
| 342 | [SCxTDR] = { 0x0c, 8 }, |
| 343 | [SCxSR] = { 0x10, 16 }, |
| 344 | [SCxRDR] = { 0x14, 8 }, |
| 345 | [SCFCR] = { 0x18, 16 }, |
| 346 | [SCFDR] = { 0x1c, 16 }, |
| 347 | [SCTFDR] = sci_reg_invalid, |
| 348 | [SCRFDR] = sci_reg_invalid, |
| 349 | [SCSPTR] = { 0x20, 16 }, |
| 350 | [SCLSR] = { 0x24, 16 }, |
| 351 | [HSSRR] = sci_reg_invalid, |
| 352 | [SCPCR] = sci_reg_invalid, |
| 353 | [SCPDR] = sci_reg_invalid, |
| 354 | [SCDL] = { 0x30, 16 }, |
| 355 | [SCCKS] = { 0x34, 16 }, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 356 | }, |
| 357 | |
| 358 | /* |
| 359 | * Common HSCIF definitions. |
| 360 | */ |
| 361 | [SCIx_HSCIF_REGTYPE] = { |
| 362 | [SCSMR] = { 0x00, 16 }, |
| 363 | [SCBRR] = { 0x04, 8 }, |
| 364 | [SCSCR] = { 0x08, 16 }, |
| 365 | [SCxTDR] = { 0x0c, 8 }, |
| 366 | [SCxSR] = { 0x10, 16 }, |
| 367 | [SCxRDR] = { 0x14, 8 }, |
| 368 | [SCFCR] = { 0x18, 16 }, |
| 369 | [SCFDR] = { 0x1c, 16 }, |
| 370 | [SCTFDR] = sci_reg_invalid, |
| 371 | [SCRFDR] = sci_reg_invalid, |
| 372 | [SCSPTR] = { 0x20, 16 }, |
| 373 | [SCLSR] = { 0x24, 16 }, |
| 374 | [HSSRR] = { 0x40, 16 }, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 375 | [SCPCR] = sci_reg_invalid, |
| 376 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 377 | [SCDL] = { 0x30, 16 }, |
| 378 | [SCCKS] = { 0x34, 16 }, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 379 | }, |
| 380 | |
| 381 | /* |
| 382 | * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR |
| 383 | * register. |
| 384 | */ |
| 385 | [SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE] = { |
| 386 | [SCSMR] = { 0x00, 16 }, |
| 387 | [SCBRR] = { 0x04, 8 }, |
| 388 | [SCSCR] = { 0x08, 16 }, |
| 389 | [SCxTDR] = { 0x0c, 8 }, |
| 390 | [SCxSR] = { 0x10, 16 }, |
| 391 | [SCxRDR] = { 0x14, 8 }, |
| 392 | [SCFCR] = { 0x18, 16 }, |
| 393 | [SCFDR] = { 0x1c, 16 }, |
| 394 | [SCTFDR] = sci_reg_invalid, |
| 395 | [SCRFDR] = sci_reg_invalid, |
| 396 | [SCSPTR] = sci_reg_invalid, |
| 397 | [SCLSR] = { 0x24, 16 }, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 398 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 399 | [SCPCR] = sci_reg_invalid, |
| 400 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 401 | [SCDL] = sci_reg_invalid, |
| 402 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 403 | }, |
| 404 | |
| 405 | /* |
| 406 | * Common SH-4(A) SCIF(B) definitions for ports with FIFO data |
| 407 | * count registers. |
| 408 | */ |
| 409 | [SCIx_SH4_SCIF_FIFODATA_REGTYPE] = { |
| 410 | [SCSMR] = { 0x00, 16 }, |
| 411 | [SCBRR] = { 0x04, 8 }, |
| 412 | [SCSCR] = { 0x08, 16 }, |
| 413 | [SCxTDR] = { 0x0c, 8 }, |
| 414 | [SCxSR] = { 0x10, 16 }, |
| 415 | [SCxRDR] = { 0x14, 8 }, |
| 416 | [SCFCR] = { 0x18, 16 }, |
| 417 | [SCFDR] = { 0x1c, 16 }, |
| 418 | [SCTFDR] = { 0x1c, 16 }, /* aliased to SCFDR */ |
| 419 | [SCRFDR] = { 0x20, 16 }, |
| 420 | [SCSPTR] = { 0x24, 16 }, |
| 421 | [SCLSR] = { 0x28, 16 }, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 422 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 423 | [SCPCR] = sci_reg_invalid, |
| 424 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 425 | [SCDL] = sci_reg_invalid, |
| 426 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 427 | }, |
| 428 | |
| 429 | /* |
| 430 | * SH7705-style SCIF(B) ports, lacking both SCSPTR and SCLSR |
| 431 | * registers. |
| 432 | */ |
| 433 | [SCIx_SH7705_SCIF_REGTYPE] = { |
| 434 | [SCSMR] = { 0x00, 16 }, |
| 435 | [SCBRR] = { 0x04, 8 }, |
| 436 | [SCSCR] = { 0x08, 16 }, |
| 437 | [SCxTDR] = { 0x20, 8 }, |
| 438 | [SCxSR] = { 0x14, 16 }, |
| 439 | [SCxRDR] = { 0x24, 8 }, |
| 440 | [SCFCR] = { 0x18, 16 }, |
| 441 | [SCFDR] = { 0x1c, 16 }, |
| 442 | [SCTFDR] = sci_reg_invalid, |
| 443 | [SCRFDR] = sci_reg_invalid, |
| 444 | [SCSPTR] = sci_reg_invalid, |
| 445 | [SCLSR] = sci_reg_invalid, |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 446 | [HSSRR] = sci_reg_invalid, |
Geert Uytterhoeven | c097abc | 2015-04-30 18:21:27 +0200 | [diff] [blame] | 447 | [SCPCR] = sci_reg_invalid, |
| 448 | [SCPDR] = sci_reg_invalid, |
Geert Uytterhoeven | b8bbd6b | 2015-11-12 13:36:06 +0100 | [diff] [blame] | 449 | [SCDL] = sci_reg_invalid, |
| 450 | [SCCKS] = sci_reg_invalid, |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 451 | }, |
| 452 | }; |
| 453 | |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 454 | #define sci_getreg(up, offset) (sci_regmap[to_sci_port(up)->cfg->regtype] + offset) |
| 455 | |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 456 | /* |
| 457 | * The "offset" here is rather misleading, in that it refers to an enum |
| 458 | * value relative to the port mapping rather than the fixed offset |
| 459 | * itself, which needs to be manually retrieved from the platform's |
| 460 | * register map for the given port. |
| 461 | */ |
| 462 | static unsigned int sci_serial_in(struct uart_port *p, int offset) |
| 463 | { |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 464 | const struct plat_sci_reg *reg = sci_getreg(p, offset); |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 465 | |
| 466 | if (reg->size == 8) |
| 467 | return ioread8(p->membase + (reg->offset << p->regshift)); |
| 468 | else if (reg->size == 16) |
| 469 | return ioread16(p->membase + (reg->offset << p->regshift)); |
| 470 | else |
| 471 | WARN(1, "Invalid register access\n"); |
| 472 | |
| 473 | return 0; |
| 474 | } |
| 475 | |
| 476 | static void sci_serial_out(struct uart_port *p, int offset, int value) |
| 477 | { |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 478 | const struct plat_sci_reg *reg = sci_getreg(p, offset); |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 479 | |
| 480 | if (reg->size == 8) |
| 481 | iowrite8(value, p->membase + (reg->offset << p->regshift)); |
| 482 | else if (reg->size == 16) |
| 483 | iowrite16(value, p->membase + (reg->offset << p->regshift)); |
| 484 | else |
| 485 | WARN(1, "Invalid register access\n"); |
| 486 | } |
| 487 | |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 488 | static int sci_probe_regmap(struct plat_sci_port *cfg) |
| 489 | { |
| 490 | switch (cfg->type) { |
| 491 | case PORT_SCI: |
| 492 | cfg->regtype = SCIx_SCI_REGTYPE; |
| 493 | break; |
| 494 | case PORT_IRDA: |
| 495 | cfg->regtype = SCIx_IRDA_REGTYPE; |
| 496 | break; |
| 497 | case PORT_SCIFA: |
| 498 | cfg->regtype = SCIx_SCIFA_REGTYPE; |
| 499 | break; |
| 500 | case PORT_SCIFB: |
| 501 | cfg->regtype = SCIx_SCIFB_REGTYPE; |
| 502 | break; |
| 503 | case PORT_SCIF: |
| 504 | /* |
| 505 | * The SH-4 is a bit of a misnomer here, although that's |
| 506 | * where this particular port layout originated. This |
| 507 | * configuration (or some slight variation thereof) |
| 508 | * remains the dominant model for all SCIFs. |
| 509 | */ |
| 510 | cfg->regtype = SCIx_SH4_SCIF_REGTYPE; |
| 511 | break; |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 512 | case PORT_HSCIF: |
| 513 | cfg->regtype = SCIx_HSCIF_REGTYPE; |
| 514 | break; |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 515 | default: |
Geert Uytterhoeven | 6c13d5d | 2014-03-11 11:11:17 +0100 | [diff] [blame] | 516 | pr_err("Can't probe register map for given port\n"); |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 517 | return -EINVAL; |
| 518 | } |
| 519 | |
| 520 | return 0; |
| 521 | } |
| 522 | |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 523 | static void sci_port_enable(struct sci_port *sci_port) |
| 524 | { |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 525 | unsigned int i; |
| 526 | |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 527 | if (!sci_port->port.dev) |
| 528 | return; |
| 529 | |
| 530 | pm_runtime_get_sync(sci_port->port.dev); |
| 531 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 532 | for (i = 0; i < SCI_NUM_CLKS; i++) { |
| 533 | clk_prepare_enable(sci_port->clks[i]); |
| 534 | sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]); |
| 535 | } |
| 536 | sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK]; |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 537 | } |
| 538 | |
| 539 | static void sci_port_disable(struct sci_port *sci_port) |
| 540 | { |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 541 | unsigned int i; |
| 542 | |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 543 | if (!sci_port->port.dev) |
| 544 | return; |
| 545 | |
Laurent Pinchart | caec703 | 2013-11-28 18:11:45 +0100 | [diff] [blame] | 546 | /* Cancel the break timer to ensure that the timer handler will not try |
| 547 | * to access the hardware with clocks and power disabled. Reset the |
| 548 | * break flag to make the break debouncing state machine ready for the |
| 549 | * next break. |
| 550 | */ |
| 551 | del_timer_sync(&sci_port->break_timer); |
| 552 | sci_port->break_flag = 0; |
| 553 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 554 | for (i = SCI_NUM_CLKS; i-- > 0; ) |
| 555 | clk_disable_unprepare(sci_port->clks[i]); |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 556 | |
| 557 | pm_runtime_put_sync(sci_port->port.dev); |
| 558 | } |
| 559 | |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 560 | static inline unsigned long port_rx_irq_mask(struct uart_port *port) |
| 561 | { |
| 562 | /* |
| 563 | * Not all ports (such as SCIFA) will support REIE. Rather than |
| 564 | * special-casing the port type, we check the port initialization |
| 565 | * IRQ enable mask to see whether the IRQ is desired at all. If |
| 566 | * it's unset, it's logically inferred that there's no point in |
| 567 | * testing for it. |
| 568 | */ |
| 569 | return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); |
| 570 | } |
| 571 | |
| 572 | static void sci_start_tx(struct uart_port *port) |
| 573 | { |
| 574 | struct sci_port *s = to_sci_port(port); |
| 575 | unsigned short ctrl; |
| 576 | |
| 577 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 578 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 579 | u16 new, scr = serial_port_in(port, SCSCR); |
| 580 | if (s->chan_tx) |
| 581 | new = scr | SCSCR_TDRQE; |
| 582 | else |
| 583 | new = scr & ~SCSCR_TDRQE; |
| 584 | if (new != scr) |
| 585 | serial_port_out(port, SCSCR, new); |
| 586 | } |
| 587 | |
| 588 | if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && |
| 589 | dma_submit_error(s->cookie_tx)) { |
| 590 | s->cookie_tx = 0; |
| 591 | schedule_work(&s->work_tx); |
| 592 | } |
| 593 | #endif |
| 594 | |
| 595 | if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 596 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ |
| 597 | ctrl = serial_port_in(port, SCSCR); |
| 598 | serial_port_out(port, SCSCR, ctrl | SCSCR_TIE); |
| 599 | } |
| 600 | } |
| 601 | |
| 602 | static void sci_stop_tx(struct uart_port *port) |
| 603 | { |
| 604 | unsigned short ctrl; |
| 605 | |
| 606 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ |
| 607 | ctrl = serial_port_in(port, SCSCR); |
| 608 | |
| 609 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
| 610 | ctrl &= ~SCSCR_TDRQE; |
| 611 | |
| 612 | ctrl &= ~SCSCR_TIE; |
| 613 | |
| 614 | serial_port_out(port, SCSCR, ctrl); |
| 615 | } |
| 616 | |
| 617 | static void sci_start_rx(struct uart_port *port) |
| 618 | { |
| 619 | unsigned short ctrl; |
| 620 | |
| 621 | ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port); |
| 622 | |
| 623 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
| 624 | ctrl &= ~SCSCR_RDRQE; |
| 625 | |
| 626 | serial_port_out(port, SCSCR, ctrl); |
| 627 | } |
| 628 | |
| 629 | static void sci_stop_rx(struct uart_port *port) |
| 630 | { |
| 631 | unsigned short ctrl; |
| 632 | |
| 633 | ctrl = serial_port_in(port, SCSCR); |
| 634 | |
| 635 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
| 636 | ctrl &= ~SCSCR_RDRQE; |
| 637 | |
| 638 | ctrl &= ~port_rx_irq_mask(port); |
| 639 | |
| 640 | serial_port_out(port, SCSCR, ctrl); |
| 641 | } |
| 642 | |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 643 | static void sci_clear_SCxSR(struct uart_port *port, unsigned int mask) |
| 644 | { |
| 645 | if (port->type == PORT_SCI) { |
| 646 | /* Just store the mask */ |
| 647 | serial_port_out(port, SCxSR, mask); |
| 648 | } else if (to_sci_port(port)->overrun_mask == SCIFA_ORER) { |
| 649 | /* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */ |
| 650 | /* Only clear the status bits we want to clear */ |
| 651 | serial_port_out(port, SCxSR, |
| 652 | serial_port_in(port, SCxSR) & mask); |
| 653 | } else { |
| 654 | /* Store the mask, clear parity/framing errors */ |
| 655 | serial_port_out(port, SCxSR, mask & ~(SCIF_FERC | SCIF_PERC)); |
| 656 | } |
| 657 | } |
| 658 | |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 659 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || \ |
| 660 | defined(CONFIG_SERIAL_SH_SCI_EARLYCON) |
Paul Mundt | 1f6fd5c | 2008-12-17 14:53:24 +0900 | [diff] [blame] | 661 | |
| 662 | #ifdef CONFIG_CONSOLE_POLL |
Paul Mundt | 07d2a1a | 2008-12-11 19:06:43 +0900 | [diff] [blame] | 663 | static int sci_poll_get_char(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 665 | unsigned short status; |
| 666 | int c; |
| 667 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 668 | do { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 669 | status = serial_port_in(port, SCxSR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | if (status & SCxSR_ERRORS(port)) { |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 671 | sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | continue; |
| 673 | } |
Jason Wessel | 3f255eb | 2010-05-20 21:04:23 -0500 | [diff] [blame] | 674 | break; |
| 675 | } while (1); |
| 676 | |
| 677 | if (!(status & SCxSR_RDxF(port))) |
| 678 | return NO_POLL_CHAR; |
Paul Mundt | 07d2a1a | 2008-12-11 19:06:43 +0900 | [diff] [blame] | 679 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 680 | c = serial_port_in(port, SCxRDR); |
Paul Mundt | 07d2a1a | 2008-12-11 19:06:43 +0900 | [diff] [blame] | 681 | |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 682 | /* Dummy read */ |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 683 | serial_port_in(port, SCxSR); |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 684 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | |
| 686 | return c; |
| 687 | } |
Paul Mundt | 1f6fd5c | 2008-12-17 14:53:24 +0900 | [diff] [blame] | 688 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | |
Paul Mundt | 07d2a1a | 2008-12-11 19:06:43 +0900 | [diff] [blame] | 690 | static void sci_poll_put_char(struct uart_port *port, unsigned char c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | unsigned short status; |
| 693 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | do { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 695 | status = serial_port_in(port, SCxSR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | } while (!(status & SCxSR_TDxE(port))); |
| 697 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 698 | serial_port_out(port, SCxTDR, c); |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 699 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 700 | } |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 701 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE || |
| 702 | CONFIG_SERIAL_SH_SCI_EARLYCON */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 704 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 705 | { |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 706 | struct sci_port *s = to_sci_port(port); |
Markus Brunner | 3ea6bc3 | 2007-08-20 08:59:33 +0900 | [diff] [blame] | 707 | |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 708 | /* |
| 709 | * Use port-specific handler if provided. |
| 710 | */ |
| 711 | if (s->cfg->ops && s->cfg->ops->init_pins) { |
| 712 | s->cfg->ops->init_pins(port, cflag); |
| 713 | return; |
Markus Brunner | 3ea6bc3 | 2007-08-20 08:59:33 +0900 | [diff] [blame] | 714 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | |
Geert Uytterhoeven | e9d7a45 | 2016-06-03 12:00:09 +0200 | [diff] [blame] | 716 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 717 | u16 ctrl = serial_port_in(port, SCPCR); |
| 718 | |
| 719 | /* Enable RXD and TXD pin functions */ |
| 720 | ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC); |
| 721 | if (to_sci_port(port)->cfg->capabilities & SCIx_HAVE_RTSCTS) { |
| 722 | /* RTS# is output, driven 1 */ |
| 723 | ctrl |= SCPCR_RTSC; |
| 724 | serial_port_out(port, SCPDR, |
| 725 | serial_port_in(port, SCPDR) | SCPDR_RTSD); |
| 726 | /* Enable CTS# pin function */ |
| 727 | ctrl &= ~SCPCR_CTSC; |
| 728 | } |
| 729 | serial_port_out(port, SCPCR, ctrl); |
| 730 | } else if (sci_getreg(port, SCSPTR)->size) { |
Geert Uytterhoeven | d2b9775 | 2016-06-03 12:00:08 +0200 | [diff] [blame] | 731 | u16 status = serial_port_in(port, SCSPTR); |
Paul Mundt | b7a76e4 | 2006-02-01 03:06:06 -0800 | [diff] [blame] | 732 | |
Geert Uytterhoeven | d2b9775 | 2016-06-03 12:00:08 +0200 | [diff] [blame] | 733 | /* RTS# is output, driven 1 */ |
| 734 | status |= SCSPTR_RTSIO | SCSPTR_RTSDT; |
| 735 | /* CTS# and SCK are inputs */ |
| 736 | status &= ~(SCSPTR_CTSIO | SCSPTR_SCKIO); |
| 737 | serial_port_out(port, SCSPTR, status); |
Paul Mundt | faf02f8 | 2011-12-02 17:44:50 +0900 | [diff] [blame] | 738 | } |
Paul Mundt | d570164 | 2008-12-16 20:07:27 +0900 | [diff] [blame] | 739 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 741 | static int sci_txfill(struct uart_port *port) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 742 | { |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 743 | const struct plat_sci_reg *reg; |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 744 | |
| 745 | reg = sci_getreg(port, SCTFDR); |
| 746 | if (reg->size) |
Takashi Yoshii | 63f7ad1 | 2012-11-16 10:53:11 +0900 | [diff] [blame] | 747 | return serial_port_in(port, SCTFDR) & ((port->fifosize << 1) - 1); |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 748 | |
| 749 | reg = sci_getreg(port, SCFDR); |
| 750 | if (reg->size) |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 751 | return serial_port_in(port, SCFDR) >> 8; |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 752 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 753 | return !(serial_port_in(port, SCxSR) & SCI_TDRE); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 754 | } |
| 755 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 756 | static int sci_txroom(struct uart_port *port) |
| 757 | { |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 758 | return port->fifosize - sci_txfill(port); |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 759 | } |
| 760 | |
| 761 | static int sci_rxfill(struct uart_port *port) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 762 | { |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 763 | const struct plat_sci_reg *reg; |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 764 | |
| 765 | reg = sci_getreg(port, SCRFDR); |
| 766 | if (reg->size) |
Takashi Yoshii | 63f7ad1 | 2012-11-16 10:53:11 +0900 | [diff] [blame] | 767 | return serial_port_in(port, SCRFDR) & ((port->fifosize << 1) - 1); |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 768 | |
| 769 | reg = sci_getreg(port, SCFDR); |
| 770 | if (reg->size) |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 771 | return serial_port_in(port, SCFDR) & ((port->fifosize << 1) - 1); |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 772 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 773 | return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 774 | } |
| 775 | |
Paul Mundt | 514820e | 2011-06-08 18:51:32 +0900 | [diff] [blame] | 776 | /* |
| 777 | * SCI helper for checking the state of the muxed port/RXD pins. |
| 778 | */ |
| 779 | static inline int sci_rxd_in(struct uart_port *port) |
| 780 | { |
| 781 | struct sci_port *s = to_sci_port(port); |
| 782 | |
| 783 | if (s->cfg->port_reg <= 0) |
| 784 | return 1; |
| 785 | |
Paul Mundt | 0dd4d5c | 2012-10-15 14:08:48 +0900 | [diff] [blame] | 786 | /* Cast for ARM damage */ |
Laurent Pinchart | e2afca6 | 2013-12-11 13:40:31 +0100 | [diff] [blame] | 787 | return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg); |
Paul Mundt | 514820e | 2011-06-08 18:51:32 +0900 | [diff] [blame] | 788 | } |
| 789 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 790 | /* ********************************************************************** * |
| 791 | * the interrupt related routines * |
| 792 | * ********************************************************************** */ |
| 793 | |
| 794 | static void sci_transmit_chars(struct uart_port *port) |
| 795 | { |
Alan Cox | ebd2c8f | 2009-09-19 13:13:28 -0700 | [diff] [blame] | 796 | struct circ_buf *xmit = &port->state->xmit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 797 | unsigned int stopped = uart_tx_stopped(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | unsigned short status; |
| 799 | unsigned short ctrl; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 800 | int count; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 802 | status = serial_port_in(port, SCxSR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | if (!(status & SCxSR_TDxE(port))) { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 804 | ctrl = serial_port_in(port, SCSCR); |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 805 | if (uart_circ_empty(xmit)) |
Paul Mundt | 8e69861 | 2009-06-24 19:44:32 +0900 | [diff] [blame] | 806 | ctrl &= ~SCSCR_TIE; |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 807 | else |
Paul Mundt | 8e69861 | 2009-06-24 19:44:32 +0900 | [diff] [blame] | 808 | ctrl |= SCSCR_TIE; |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 809 | serial_port_out(port, SCSCR, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 810 | return; |
| 811 | } |
| 812 | |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 813 | count = sci_txroom(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | |
| 815 | do { |
| 816 | unsigned char c; |
| 817 | |
| 818 | if (port->x_char) { |
| 819 | c = port->x_char; |
| 820 | port->x_char = 0; |
| 821 | } else if (!uart_circ_empty(xmit) && !stopped) { |
| 822 | c = xmit->buf[xmit->tail]; |
| 823 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 824 | } else { |
| 825 | break; |
| 826 | } |
| 827 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 828 | serial_port_out(port, SCxTDR, c); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 829 | |
| 830 | port->icount.tx++; |
| 831 | } while (--count > 0); |
| 832 | |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 833 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 834 | |
| 835 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 836 | uart_write_wakeup(port); |
| 837 | if (uart_circ_empty(xmit)) { |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 838 | sci_stop_tx(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | } else { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 840 | ctrl = serial_port_in(port, SCSCR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | |
Yoshihiro Shimoda | 1a22f08 | 2008-11-11 12:19:05 +0900 | [diff] [blame] | 842 | if (port->type != PORT_SCI) { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 843 | serial_port_in(port, SCxSR); /* Dummy read */ |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 844 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | |
Paul Mundt | 8e69861 | 2009-06-24 19:44:32 +0900 | [diff] [blame] | 847 | ctrl |= SCSCR_TIE; |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 848 | serial_port_out(port, SCSCR, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | } |
| 850 | } |
| 851 | |
| 852 | /* On SH3, SCIF may read end-of-break as a space->mark char */ |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 853 | #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); }) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 855 | static void sci_receive_chars(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | { |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 857 | struct sci_port *sci_port = to_sci_port(port); |
Jiri Slaby | 227434f | 2013-01-03 15:53:01 +0100 | [diff] [blame] | 858 | struct tty_port *tport = &port->state->port; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | int i, count, copied = 0; |
| 860 | unsigned short status; |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 861 | unsigned char flag; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 863 | status = serial_port_in(port, SCxSR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 864 | if (!(status & SCxSR_RDxF(port))) |
| 865 | return; |
| 866 | |
| 867 | while (1) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 868 | /* Don't copy more bytes than there is room for in the buffer */ |
Jiri Slaby | 227434f | 2013-01-03 15:53:01 +0100 | [diff] [blame] | 869 | count = tty_buffer_request_room(tport, sci_rxfill(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 870 | |
| 871 | /* If for any reason we can't copy more data, we're done! */ |
| 872 | if (count == 0) |
| 873 | break; |
| 874 | |
| 875 | if (port->type == PORT_SCI) { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 876 | char c = serial_port_in(port, SCxRDR); |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 877 | if (uart_handle_sysrq_char(port, c) || |
| 878 | sci_port->break_flag) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 879 | count = 0; |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 880 | else |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 881 | tty_insert_flip_char(tport, c, TTY_NORMAL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 882 | } else { |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 883 | for (i = 0; i < count; i++) { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 884 | char c = serial_port_in(port, SCxRDR); |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 885 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 886 | status = serial_port_in(port, SCxSR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | #if defined(CONFIG_CPU_SH3) |
| 888 | /* Skip "chars" during break */ |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 889 | if (sci_port->break_flag) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | if ((c == 0) && |
| 891 | (status & SCxSR_FER(port))) { |
| 892 | count--; i--; |
| 893 | continue; |
| 894 | } |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 895 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 896 | /* Nonzero => end-of-break */ |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 897 | dev_dbg(port->dev, "debounce<%02x>\n", c); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 898 | sci_port->break_flag = 0; |
| 899 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | if (STEPFN(c)) { |
| 901 | count--; i--; |
| 902 | continue; |
| 903 | } |
| 904 | } |
| 905 | #endif /* CONFIG_CPU_SH3 */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 906 | if (uart_handle_sysrq_char(port, c)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 907 | count--; i--; |
| 908 | continue; |
| 909 | } |
| 910 | |
| 911 | /* Store data and status */ |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 912 | if (status & SCxSR_FER(port)) { |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 913 | flag = TTY_FRAME; |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 914 | port->icount.frame++; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 915 | dev_notice(port->dev, "frame error\n"); |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 916 | } else if (status & SCxSR_PER(port)) { |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 917 | flag = TTY_PARITY; |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 918 | port->icount.parity++; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 919 | dev_notice(port->dev, "parity error\n"); |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 920 | } else |
| 921 | flag = TTY_NORMAL; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 922 | |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 923 | tty_insert_flip_char(tport, c, flag); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | } |
| 925 | } |
| 926 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 927 | serial_port_in(port, SCxSR); /* dummy read */ |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 928 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 929 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | copied += count; |
| 931 | port->icount.rx += count; |
| 932 | } |
| 933 | |
| 934 | if (copied) { |
| 935 | /* Tell the rest of the system the news. New characters! */ |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 936 | tty_flip_buffer_push(tport); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 937 | } else { |
Ulrich Hecht | 4afade7 | 2018-02-15 13:02:27 +0100 | [diff] [blame] | 938 | /* TTY buffers full; read from RX reg to prevent lockup */ |
| 939 | serial_port_in(port, SCxRDR); |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 940 | serial_port_in(port, SCxSR); /* dummy read */ |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 941 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 942 | } |
| 943 | } |
| 944 | |
| 945 | #define SCI_BREAK_JIFFIES (HZ/20) |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 946 | |
| 947 | /* |
| 948 | * The sci generates interrupts during the break, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | * 1 per millisecond or so during the break period, for 9600 baud. |
| 950 | * So dont bother disabling interrupts. |
| 951 | * But dont want more than 1 break event. |
| 952 | * Use a kernel timer to periodically poll the rx line until |
| 953 | * the break is finished. |
| 954 | */ |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 955 | static inline void sci_schedule_break_timer(struct sci_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 956 | { |
Paul Mundt | bc9b3f5 | 2011-01-20 23:30:19 +0900 | [diff] [blame] | 957 | mod_timer(&port->break_timer, jiffies + SCI_BREAK_JIFFIES); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 958 | } |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 959 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | /* Ensure that two consecutive samples find the break over. */ |
| 961 | static void sci_break_timer(unsigned long data) |
| 962 | { |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 963 | struct sci_port *port = (struct sci_port *)data; |
| 964 | |
| 965 | if (sci_rxd_in(&port->port) == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | port->break_flag = 1; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 967 | sci_schedule_break_timer(port); |
| 968 | } else if (port->break_flag == 1) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 969 | /* break is over. */ |
| 970 | port->break_flag = 2; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 971 | sci_schedule_break_timer(port); |
| 972 | } else |
| 973 | port->break_flag = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 974 | } |
| 975 | |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 976 | static int sci_handle_errors(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 977 | { |
| 978 | int copied = 0; |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 979 | unsigned short status = serial_port_in(port, SCxSR); |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 980 | struct tty_port *tport = &port->state->port; |
Paul Mundt | debf950 | 2011-06-08 18:19:37 +0900 | [diff] [blame] | 981 | struct sci_port *s = to_sci_port(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 982 | |
Laurent Pinchart | 3ae988d | 2013-12-06 10:59:17 +0100 | [diff] [blame] | 983 | /* Handle overruns */ |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 984 | if (status & s->overrun_mask) { |
Laurent Pinchart | 3ae988d | 2013-12-06 10:59:17 +0100 | [diff] [blame] | 985 | port->icount.overrun++; |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 986 | |
Laurent Pinchart | 3ae988d | 2013-12-06 10:59:17 +0100 | [diff] [blame] | 987 | /* overrun error */ |
| 988 | if (tty_insert_flip_char(tport, 0, TTY_OVERRUN)) |
| 989 | copied++; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 990 | |
Joe Perches | 9b971cd | 2014-03-11 10:10:46 -0700 | [diff] [blame] | 991 | dev_notice(port->dev, "overrun error\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 992 | } |
| 993 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 994 | if (status & SCxSR_FER(port)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 995 | if (sci_rxd_in(port) == 0) { |
| 996 | /* Notify of BREAK */ |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 997 | struct sci_port *sci_port = to_sci_port(port); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 998 | |
| 999 | if (!sci_port->break_flag) { |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 1000 | port->icount.brk++; |
| 1001 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1002 | sci_port->break_flag = 1; |
| 1003 | sci_schedule_break_timer(sci_port); |
| 1004 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1005 | /* Do sysrq handling. */ |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1006 | if (uart_handle_break(port)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1007 | return 0; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 1008 | |
| 1009 | dev_dbg(port->dev, "BREAK detected\n"); |
| 1010 | |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1011 | if (tty_insert_flip_char(tport, 0, TTY_BREAK)) |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 1012 | copied++; |
| 1013 | } |
| 1014 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1015 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1016 | /* frame error */ |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 1017 | port->icount.frame++; |
| 1018 | |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1019 | if (tty_insert_flip_char(tport, 0, TTY_FRAME)) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 1020 | copied++; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 1021 | |
| 1022 | dev_notice(port->dev, "frame error\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1023 | } |
| 1024 | } |
| 1025 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1026 | if (status & SCxSR_PER(port)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1027 | /* parity error */ |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 1028 | port->icount.parity++; |
| 1029 | |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1030 | if (tty_insert_flip_char(tport, 0, TTY_PARITY)) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1031 | copied++; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 1032 | |
Joe Perches | 9b971cd | 2014-03-11 10:10:46 -0700 | [diff] [blame] | 1033 | dev_notice(port->dev, "parity error\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | } |
| 1035 | |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 1036 | if (copied) |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 1037 | tty_flip_buffer_push(tport); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | |
| 1039 | return copied; |
| 1040 | } |
| 1041 | |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 1042 | static int sci_handle_fifo_overrun(struct uart_port *port) |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1043 | { |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1044 | struct tty_port *tport = &port->state->port; |
Paul Mundt | debf950 | 2011-06-08 18:19:37 +0900 | [diff] [blame] | 1045 | struct sci_port *s = to_sci_port(port); |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 1046 | const struct plat_sci_reg *reg; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 1047 | int copied = 0; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 1048 | u16 status; |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1049 | |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 1050 | reg = sci_getreg(port, s->overrun_reg); |
Paul Mundt | 4b8c59a | 2011-06-14 17:53:34 +0900 | [diff] [blame] | 1051 | if (!reg->size) |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1052 | return 0; |
| 1053 | |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 1054 | status = serial_port_in(port, s->overrun_reg); |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 1055 | if (status & s->overrun_mask) { |
| 1056 | status &= ~s->overrun_mask; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 1057 | serial_port_out(port, s->overrun_reg, status); |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1058 | |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 1059 | port->icount.overrun++; |
| 1060 | |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1061 | tty_insert_flip_char(tport, 0, TTY_OVERRUN); |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 1062 | tty_flip_buffer_push(tport); |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1063 | |
Yoshihiro Kaneko | 51b31f1 | 2015-01-26 20:53:29 +0900 | [diff] [blame] | 1064 | dev_dbg(port->dev, "overrun error\n"); |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1065 | copied++; |
| 1066 | } |
| 1067 | |
| 1068 | return copied; |
| 1069 | } |
| 1070 | |
Paul Mundt | 94c8b6d | 2011-01-20 23:26:18 +0900 | [diff] [blame] | 1071 | static int sci_handle_breaks(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1072 | { |
| 1073 | int copied = 0; |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 1074 | unsigned short status = serial_port_in(port, SCxSR); |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1075 | struct tty_port *tport = &port->state->port; |
Magnus Damm | a5660ad | 2009-01-21 15:14:38 +0000 | [diff] [blame] | 1076 | struct sci_port *s = to_sci_port(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1077 | |
Paul Mundt | 0b3d4ef | 2007-03-14 13:22:37 +0900 | [diff] [blame] | 1078 | if (uart_handle_break(port)) |
| 1079 | return 0; |
| 1080 | |
Paul Mundt | b7a76e4 | 2006-02-01 03:06:06 -0800 | [diff] [blame] | 1081 | if (!s->break_flag && status & SCxSR_BRK(port)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1082 | #if defined(CONFIG_CPU_SH3) |
| 1083 | /* Debounce break */ |
| 1084 | s->break_flag = 1; |
| 1085 | #endif |
Paul Mundt | d97fbbe | 2011-11-24 19:15:06 +0900 | [diff] [blame] | 1086 | |
| 1087 | port->icount.brk++; |
| 1088 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1089 | /* Notify of BREAK */ |
Jiri Slaby | 92a19f9 | 2013-01-03 15:53:03 +0100 | [diff] [blame] | 1090 | if (tty_insert_flip_char(tport, 0, TTY_BREAK)) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 1091 | copied++; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 1092 | |
| 1093 | dev_dbg(port->dev, "BREAK detected\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | } |
| 1095 | |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 1096 | if (copied) |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 1097 | tty_flip_buffer_push(tport); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1098 | |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1099 | copied += sci_handle_fifo_overrun(port); |
| 1100 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1101 | return copied; |
| 1102 | } |
| 1103 | |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1104 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 1105 | static void sci_dma_tx_complete(void *arg) |
| 1106 | { |
| 1107 | struct sci_port *s = arg; |
| 1108 | struct uart_port *port = &s->port; |
| 1109 | struct circ_buf *xmit = &port->state->xmit; |
| 1110 | unsigned long flags; |
| 1111 | |
| 1112 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); |
| 1113 | |
| 1114 | spin_lock_irqsave(&port->lock, flags); |
| 1115 | |
| 1116 | xmit->tail += s->tx_dma_len; |
| 1117 | xmit->tail &= UART_XMIT_SIZE - 1; |
| 1118 | |
| 1119 | port->icount.tx += s->tx_dma_len; |
| 1120 | |
| 1121 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 1122 | uart_write_wakeup(port); |
| 1123 | |
| 1124 | if (!uart_circ_empty(xmit)) { |
| 1125 | s->cookie_tx = 0; |
| 1126 | schedule_work(&s->work_tx); |
| 1127 | } else { |
| 1128 | s->cookie_tx = -EINVAL; |
| 1129 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 1130 | u16 ctrl = serial_port_in(port, SCSCR); |
| 1131 | serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE); |
| 1132 | } |
| 1133 | } |
| 1134 | |
| 1135 | spin_unlock_irqrestore(&port->lock, flags); |
| 1136 | } |
| 1137 | |
| 1138 | /* Locking: called with port lock held */ |
| 1139 | static int sci_dma_rx_push(struct sci_port *s, void *buf, size_t count) |
| 1140 | { |
| 1141 | struct uart_port *port = &s->port; |
| 1142 | struct tty_port *tport = &port->state->port; |
| 1143 | int copied; |
| 1144 | |
| 1145 | copied = tty_insert_flip_string(tport, buf, count); |
| 1146 | if (copied < count) { |
| 1147 | dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n", |
| 1148 | count - copied); |
| 1149 | port->icount.buf_overrun++; |
| 1150 | } |
| 1151 | |
| 1152 | port->icount.rx += copied; |
| 1153 | |
| 1154 | return copied; |
| 1155 | } |
| 1156 | |
| 1157 | static int sci_dma_rx_find_active(struct sci_port *s) |
| 1158 | { |
| 1159 | unsigned int i; |
| 1160 | |
| 1161 | for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) |
| 1162 | if (s->active_rx == s->cookie_rx[i]) |
| 1163 | return i; |
| 1164 | |
| 1165 | dev_err(s->port.dev, "%s: Rx cookie %d not found!\n", __func__, |
| 1166 | s->active_rx); |
| 1167 | return -1; |
| 1168 | } |
| 1169 | |
| 1170 | static void sci_rx_dma_release(struct sci_port *s, bool enable_pio) |
| 1171 | { |
| 1172 | struct dma_chan *chan = s->chan_rx; |
| 1173 | struct uart_port *port = &s->port; |
| 1174 | unsigned long flags; |
| 1175 | |
| 1176 | spin_lock_irqsave(&port->lock, flags); |
| 1177 | s->chan_rx = NULL; |
| 1178 | s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL; |
| 1179 | spin_unlock_irqrestore(&port->lock, flags); |
| 1180 | dmaengine_terminate_all(chan); |
| 1181 | dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], |
| 1182 | sg_dma_address(&s->sg_rx[0])); |
| 1183 | dma_release_channel(chan); |
| 1184 | if (enable_pio) |
| 1185 | sci_start_rx(port); |
| 1186 | } |
| 1187 | |
| 1188 | static void sci_dma_rx_complete(void *arg) |
| 1189 | { |
| 1190 | struct sci_port *s = arg; |
Muhammad Hamza Farooq | 1d3db60 | 2015-09-18 13:08:30 +0200 | [diff] [blame] | 1191 | struct dma_chan *chan = s->chan_rx; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1192 | struct uart_port *port = &s->port; |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1193 | struct dma_async_tx_descriptor *desc; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1194 | unsigned long flags; |
| 1195 | int active, count = 0; |
| 1196 | |
| 1197 | dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line, |
| 1198 | s->active_rx); |
| 1199 | |
| 1200 | spin_lock_irqsave(&port->lock, flags); |
| 1201 | |
| 1202 | active = sci_dma_rx_find_active(s); |
| 1203 | if (active >= 0) |
| 1204 | count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx); |
| 1205 | |
| 1206 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); |
| 1207 | |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1208 | if (count) |
| 1209 | tty_flip_buffer_push(&port->state->port); |
| 1210 | |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1211 | desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1, |
| 1212 | DMA_DEV_TO_MEM, |
| 1213 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 1214 | if (!desc) |
| 1215 | goto fail; |
| 1216 | |
| 1217 | desc->callback = sci_dma_rx_complete; |
| 1218 | desc->callback_param = s; |
| 1219 | s->cookie_rx[active] = dmaengine_submit(desc); |
| 1220 | if (dma_submit_error(s->cookie_rx[active])) |
| 1221 | goto fail; |
| 1222 | |
| 1223 | s->active_rx = s->cookie_rx[!active]; |
| 1224 | |
Muhammad Hamza Farooq | 1d3db60 | 2015-09-18 13:08:30 +0200 | [diff] [blame] | 1225 | dma_async_issue_pending(chan); |
| 1226 | |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1227 | dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n", |
| 1228 | __func__, s->cookie_rx[active], active, s->active_rx); |
| 1229 | spin_unlock_irqrestore(&port->lock, flags); |
| 1230 | return; |
| 1231 | |
| 1232 | fail: |
| 1233 | spin_unlock_irqrestore(&port->lock, flags); |
| 1234 | dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); |
| 1235 | sci_rx_dma_release(s, true); |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1236 | } |
| 1237 | |
| 1238 | static void sci_tx_dma_release(struct sci_port *s, bool enable_pio) |
| 1239 | { |
| 1240 | struct dma_chan *chan = s->chan_tx; |
| 1241 | struct uart_port *port = &s->port; |
| 1242 | unsigned long flags; |
| 1243 | |
| 1244 | spin_lock_irqsave(&port->lock, flags); |
| 1245 | s->chan_tx = NULL; |
| 1246 | s->cookie_tx = -EINVAL; |
| 1247 | spin_unlock_irqrestore(&port->lock, flags); |
| 1248 | dmaengine_terminate_all(chan); |
| 1249 | dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE, |
| 1250 | DMA_TO_DEVICE); |
| 1251 | dma_release_channel(chan); |
| 1252 | if (enable_pio) |
| 1253 | sci_start_tx(port); |
| 1254 | } |
| 1255 | |
| 1256 | static void sci_submit_rx(struct sci_port *s) |
| 1257 | { |
| 1258 | struct dma_chan *chan = s->chan_rx; |
| 1259 | int i; |
| 1260 | |
| 1261 | for (i = 0; i < 2; i++) { |
| 1262 | struct scatterlist *sg = &s->sg_rx[i]; |
| 1263 | struct dma_async_tx_descriptor *desc; |
| 1264 | |
| 1265 | desc = dmaengine_prep_slave_sg(chan, |
| 1266 | sg, 1, DMA_DEV_TO_MEM, |
| 1267 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 1268 | if (!desc) |
| 1269 | goto fail; |
| 1270 | |
| 1271 | desc->callback = sci_dma_rx_complete; |
| 1272 | desc->callback_param = s; |
| 1273 | s->cookie_rx[i] = dmaengine_submit(desc); |
| 1274 | if (dma_submit_error(s->cookie_rx[i])) |
| 1275 | goto fail; |
| 1276 | |
| 1277 | dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__, |
| 1278 | s->cookie_rx[i], i); |
| 1279 | } |
| 1280 | |
| 1281 | s->active_rx = s->cookie_rx[0]; |
| 1282 | |
| 1283 | dma_async_issue_pending(chan); |
| 1284 | return; |
| 1285 | |
| 1286 | fail: |
| 1287 | if (i) |
| 1288 | dmaengine_terminate_all(chan); |
| 1289 | for (i = 0; i < 2; i++) |
| 1290 | s->cookie_rx[i] = -EINVAL; |
| 1291 | s->active_rx = -EINVAL; |
| 1292 | dev_warn(s->port.dev, "Failed to re-start Rx DMA, using PIO\n"); |
| 1293 | sci_rx_dma_release(s, true); |
| 1294 | } |
| 1295 | |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1296 | static void work_fn_tx(struct work_struct *work) |
| 1297 | { |
| 1298 | struct sci_port *s = container_of(work, struct sci_port, work_tx); |
| 1299 | struct dma_async_tx_descriptor *desc; |
| 1300 | struct dma_chan *chan = s->chan_tx; |
| 1301 | struct uart_port *port = &s->port; |
| 1302 | struct circ_buf *xmit = &port->state->xmit; |
| 1303 | dma_addr_t buf; |
| 1304 | |
| 1305 | /* |
| 1306 | * DMA is idle now. |
| 1307 | * Port xmit buffer is already mapped, and it is one page... Just adjust |
| 1308 | * offsets and lengths. Since it is a circular buffer, we have to |
| 1309 | * transmit till the end, and then the rest. Take the port lock to get a |
| 1310 | * consistent xmit buffer state. |
| 1311 | */ |
| 1312 | spin_lock_irq(&port->lock); |
| 1313 | buf = s->tx_dma_addr + (xmit->tail & (UART_XMIT_SIZE - 1)); |
| 1314 | s->tx_dma_len = min_t(unsigned int, |
| 1315 | CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE), |
| 1316 | CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE)); |
| 1317 | spin_unlock_irq(&port->lock); |
| 1318 | |
| 1319 | desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len, |
| 1320 | DMA_MEM_TO_DEV, |
| 1321 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 1322 | if (!desc) { |
| 1323 | dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n"); |
| 1324 | /* switch to PIO */ |
| 1325 | sci_tx_dma_release(s, true); |
| 1326 | return; |
| 1327 | } |
| 1328 | |
| 1329 | dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len, |
| 1330 | DMA_TO_DEVICE); |
| 1331 | |
| 1332 | spin_lock_irq(&port->lock); |
| 1333 | desc->callback = sci_dma_tx_complete; |
| 1334 | desc->callback_param = s; |
| 1335 | spin_unlock_irq(&port->lock); |
| 1336 | s->cookie_tx = dmaengine_submit(desc); |
| 1337 | if (dma_submit_error(s->cookie_tx)) { |
| 1338 | dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); |
| 1339 | /* switch to PIO */ |
| 1340 | sci_tx_dma_release(s, true); |
| 1341 | return; |
| 1342 | } |
| 1343 | |
| 1344 | dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", |
| 1345 | __func__, xmit->buf, xmit->tail, xmit->head, s->cookie_tx); |
| 1346 | |
| 1347 | dma_async_issue_pending(chan); |
| 1348 | } |
| 1349 | |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1350 | static void rx_timer_fn(unsigned long arg) |
| 1351 | { |
| 1352 | struct sci_port *s = (struct sci_port *)arg; |
Muhammad Hamza Farooq | e7327c0 | 2015-09-18 13:08:32 +0200 | [diff] [blame] | 1353 | struct dma_chan *chan = s->chan_rx; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1354 | struct uart_port *port = &s->port; |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1355 | struct dma_tx_state state; |
| 1356 | enum dma_status status; |
| 1357 | unsigned long flags; |
| 1358 | unsigned int read; |
| 1359 | int active, count; |
| 1360 | u16 scr; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1361 | |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1362 | spin_lock_irqsave(&port->lock, flags); |
| 1363 | |
| 1364 | dev_dbg(port->dev, "DMA Rx timed out\n"); |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1365 | |
| 1366 | active = sci_dma_rx_find_active(s); |
| 1367 | if (active < 0) { |
| 1368 | spin_unlock_irqrestore(&port->lock, flags); |
| 1369 | return; |
| 1370 | } |
| 1371 | |
| 1372 | status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); |
Muhammad Hamza Farooq | 3b96304 | 2015-09-18 13:08:31 +0200 | [diff] [blame] | 1373 | if (status == DMA_COMPLETE) { |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1374 | dev_dbg(port->dev, "Cookie %d #%d has already completed\n", |
| 1375 | s->active_rx, active); |
Muhammad Hamza Farooq | 3b96304 | 2015-09-18 13:08:31 +0200 | [diff] [blame] | 1376 | spin_unlock_irqrestore(&port->lock, flags); |
| 1377 | |
| 1378 | /* Let packet complete handler take care of the packet */ |
| 1379 | return; |
| 1380 | } |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1381 | |
Muhammad Hamza Farooq | e7327c0 | 2015-09-18 13:08:32 +0200 | [diff] [blame] | 1382 | dmaengine_pause(chan); |
| 1383 | |
| 1384 | /* |
| 1385 | * sometimes DMA transfer doesn't stop even if it is stopped and |
| 1386 | * data keeps on coming until transaction is complete so check |
| 1387 | * for DMA_COMPLETE again |
| 1388 | * Let packet complete handler take care of the packet |
| 1389 | */ |
| 1390 | status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); |
| 1391 | if (status == DMA_COMPLETE) { |
| 1392 | spin_unlock_irqrestore(&port->lock, flags); |
| 1393 | dev_dbg(port->dev, "Transaction complete after DMA engine was stopped"); |
| 1394 | return; |
| 1395 | } |
| 1396 | |
Geert Uytterhoeven | 67f462b0 | 2015-09-18 13:08:25 +0200 | [diff] [blame] | 1397 | /* Handle incomplete DMA receive */ |
| 1398 | dmaengine_terminate_all(s->chan_rx); |
| 1399 | read = sg_dma_len(&s->sg_rx[active]) - state.residue; |
| 1400 | dev_dbg(port->dev, "Read %u bytes with cookie %d\n", read, |
| 1401 | s->active_rx); |
| 1402 | |
| 1403 | if (read) { |
| 1404 | count = sci_dma_rx_push(s, s->rx_buf[active], read); |
| 1405 | if (count) |
| 1406 | tty_flip_buffer_push(&port->state->port); |
| 1407 | } |
| 1408 | |
Geert Uytterhoeven | 756981b | 2015-09-18 13:08:26 +0200 | [diff] [blame] | 1409 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
| 1410 | sci_submit_rx(s); |
Muhammad Hamza Farooq | 371cfed | 2015-09-18 13:08:29 +0200 | [diff] [blame] | 1411 | |
| 1412 | /* Direct new serial port interrupts back to CPU */ |
| 1413 | scr = serial_port_in(port, SCSCR); |
| 1414 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 1415 | scr &= ~SCSCR_RDRQE; |
| 1416 | enable_irq(s->irqs[SCIx_RXI_IRQ]); |
| 1417 | } |
| 1418 | serial_port_out(port, SCSCR, scr | SCSCR_RIE); |
| 1419 | |
| 1420 | spin_unlock_irqrestore(&port->lock, flags); |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1421 | } |
| 1422 | |
Geert Uytterhoeven | ff44112 | 2015-09-18 13:08:33 +0200 | [diff] [blame] | 1423 | static struct dma_chan *sci_request_dma_chan(struct uart_port *port, |
| 1424 | enum dma_transfer_direction dir, |
| 1425 | unsigned int id) |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1426 | { |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1427 | dma_cap_mask_t mask; |
Geert Uytterhoeven | ff44112 | 2015-09-18 13:08:33 +0200 | [diff] [blame] | 1428 | struct dma_chan *chan; |
| 1429 | struct dma_slave_config cfg; |
| 1430 | int ret; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1431 | |
| 1432 | dma_cap_zero(mask); |
| 1433 | dma_cap_set(DMA_SLAVE, mask); |
| 1434 | |
Geert Uytterhoeven | ff44112 | 2015-09-18 13:08:33 +0200 | [diff] [blame] | 1435 | chan = dma_request_slave_channel_compat(mask, shdma_chan_filter, |
| 1436 | (void *)(unsigned long)id, port->dev, |
| 1437 | dir == DMA_MEM_TO_DEV ? "tx" : "rx"); |
| 1438 | if (!chan) { |
| 1439 | dev_warn(port->dev, |
| 1440 | "dma_request_slave_channel_compat failed\n"); |
| 1441 | return NULL; |
| 1442 | } |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1443 | |
Geert Uytterhoeven | ff44112 | 2015-09-18 13:08:33 +0200 | [diff] [blame] | 1444 | memset(&cfg, 0, sizeof(cfg)); |
| 1445 | cfg.direction = dir; |
| 1446 | if (dir == DMA_MEM_TO_DEV) { |
| 1447 | cfg.dst_addr = port->mapbase + |
| 1448 | (sci_getreg(port, SCxTDR)->offset << port->regshift); |
| 1449 | cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 1450 | } else { |
| 1451 | cfg.src_addr = port->mapbase + |
| 1452 | (sci_getreg(port, SCxRDR)->offset << port->regshift); |
| 1453 | cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 1454 | } |
| 1455 | |
| 1456 | ret = dmaengine_slave_config(chan, &cfg); |
| 1457 | if (ret) { |
| 1458 | dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret); |
| 1459 | dma_release_channel(chan); |
| 1460 | return NULL; |
| 1461 | } |
| 1462 | |
| 1463 | return chan; |
| 1464 | } |
| 1465 | |
| 1466 | static void sci_request_dma(struct uart_port *port) |
| 1467 | { |
| 1468 | struct sci_port *s = to_sci_port(port); |
| 1469 | struct dma_chan *chan; |
| 1470 | |
| 1471 | dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); |
| 1472 | |
| 1473 | if (!port->dev->of_node && |
| 1474 | (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0)) |
| 1475 | return; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1476 | |
| 1477 | s->cookie_tx = -EINVAL; |
Geert Uytterhoeven | ff44112 | 2015-09-18 13:08:33 +0200 | [diff] [blame] | 1478 | chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV, s->cfg->dma_slave_tx); |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1479 | dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); |
| 1480 | if (chan) { |
| 1481 | s->chan_tx = chan; |
| 1482 | /* UART circular tx buffer is an aligned page. */ |
| 1483 | s->tx_dma_addr = dma_map_single(chan->device->dev, |
| 1484 | port->state->xmit.buf, |
| 1485 | UART_XMIT_SIZE, |
| 1486 | DMA_TO_DEVICE); |
| 1487 | if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) { |
| 1488 | dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n"); |
| 1489 | dma_release_channel(chan); |
| 1490 | s->chan_tx = NULL; |
| 1491 | } else { |
| 1492 | dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n", |
| 1493 | __func__, UART_XMIT_SIZE, |
| 1494 | port->state->xmit.buf, &s->tx_dma_addr); |
| 1495 | } |
| 1496 | |
| 1497 | INIT_WORK(&s->work_tx, work_fn_tx); |
| 1498 | } |
| 1499 | |
Geert Uytterhoeven | ff44112 | 2015-09-18 13:08:33 +0200 | [diff] [blame] | 1500 | chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM, s->cfg->dma_slave_rx); |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1501 | dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); |
| 1502 | if (chan) { |
| 1503 | unsigned int i; |
| 1504 | dma_addr_t dma; |
| 1505 | void *buf; |
| 1506 | |
| 1507 | s->chan_rx = chan; |
| 1508 | |
| 1509 | s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize); |
| 1510 | buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2, |
| 1511 | &dma, GFP_KERNEL); |
| 1512 | if (!buf) { |
| 1513 | dev_warn(port->dev, |
| 1514 | "Failed to allocate Rx dma buffer, using PIO\n"); |
| 1515 | dma_release_channel(chan); |
| 1516 | s->chan_rx = NULL; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1517 | return; |
| 1518 | } |
| 1519 | |
| 1520 | for (i = 0; i < 2; i++) { |
| 1521 | struct scatterlist *sg = &s->sg_rx[i]; |
| 1522 | |
| 1523 | sg_init_table(sg, 1); |
| 1524 | s->rx_buf[i] = buf; |
| 1525 | sg_dma_address(sg) = dma; |
Yoshihiro Shimoda | d09959e | 2015-12-04 15:21:19 +0100 | [diff] [blame] | 1526 | sg_dma_len(sg) = s->buf_len_rx; |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1527 | |
| 1528 | buf += s->buf_len_rx; |
| 1529 | dma += s->buf_len_rx; |
| 1530 | } |
| 1531 | |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1532 | setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s); |
| 1533 | |
Geert Uytterhoeven | 756981b | 2015-09-18 13:08:26 +0200 | [diff] [blame] | 1534 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
| 1535 | sci_submit_rx(s); |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1536 | } |
| 1537 | } |
| 1538 | |
| 1539 | static void sci_free_dma(struct uart_port *port) |
| 1540 | { |
| 1541 | struct sci_port *s = to_sci_port(port); |
| 1542 | |
| 1543 | if (s->chan_tx) |
| 1544 | sci_tx_dma_release(s, false); |
| 1545 | if (s->chan_rx) |
| 1546 | sci_rx_dma_release(s, false); |
| 1547 | } |
Geert Uytterhoeven | 13b9c31 | 2017-04-25 20:15:35 +0200 | [diff] [blame] | 1548 | |
| 1549 | static void sci_flush_buffer(struct uart_port *port) |
| 1550 | { |
| 1551 | /* |
| 1552 | * In uart_flush_buffer(), the xmit circular buffer has just been |
| 1553 | * cleared, so we have to reset tx_dma_len accordingly. |
| 1554 | */ |
| 1555 | to_sci_port(port)->tx_dma_len = 0; |
| 1556 | } |
| 1557 | #else /* !CONFIG_SERIAL_SH_SCI_DMA */ |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1558 | static inline void sci_request_dma(struct uart_port *port) |
| 1559 | { |
| 1560 | } |
| 1561 | |
| 1562 | static inline void sci_free_dma(struct uart_port *port) |
| 1563 | { |
| 1564 | } |
Geert Uytterhoeven | 13b9c31 | 2017-04-25 20:15:35 +0200 | [diff] [blame] | 1565 | |
| 1566 | #define sci_flush_buffer NULL |
| 1567 | #endif /* !CONFIG_SERIAL_SH_SCI_DMA */ |
Geert Uytterhoeven | e1910fc | 2015-09-18 13:08:24 +0200 | [diff] [blame] | 1568 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1569 | static irqreturn_t sci_rx_interrupt(int irq, void *ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1570 | { |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1571 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 1572 | struct uart_port *port = ptr; |
| 1573 | struct sci_port *s = to_sci_port(port); |
| 1574 | |
| 1575 | if (s->chan_rx) { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 1576 | u16 scr = serial_port_in(port, SCSCR); |
| 1577 | u16 ssr = serial_port_in(port, SCxSR); |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1578 | |
| 1579 | /* Disable future Rx interrupts */ |
Guennadi Liakhovetski | d1d4b10 | 2010-05-23 16:39:09 +0000 | [diff] [blame] | 1580 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 1581 | disable_irq_nosync(irq); |
Geert Uytterhoeven | 26de4f1 | 2014-03-11 11:11:19 +0100 | [diff] [blame] | 1582 | scr |= SCSCR_RDRQE; |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 1583 | } else { |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 1584 | scr &= ~SCSCR_RIE; |
Geert Uytterhoeven | 756981b | 2015-09-18 13:08:26 +0200 | [diff] [blame] | 1585 | sci_submit_rx(s); |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 1586 | } |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 1587 | serial_port_out(port, SCSCR, scr); |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1588 | /* Clear current interrupt */ |
Geert Uytterhoeven | 54af500 | 2015-08-21 20:02:28 +0200 | [diff] [blame] | 1589 | serial_port_out(port, SCxSR, |
| 1590 | ssr & ~(SCIF_DR | SCxSR_RDxF(port))); |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 1591 | dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n", |
| 1592 | jiffies, s->rx_timeout); |
| 1593 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1594 | |
| 1595 | return IRQ_HANDLED; |
| 1596 | } |
| 1597 | #endif |
| 1598 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | /* I think sci_receive_chars has to be called irrespective |
| 1600 | * of whether the I_IXOFF is set, otherwise, how is the interrupt |
| 1601 | * to be disabled? |
| 1602 | */ |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1603 | sci_receive_chars(ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1604 | |
| 1605 | return IRQ_HANDLED; |
| 1606 | } |
| 1607 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1608 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1609 | { |
| 1610 | struct uart_port *port = ptr; |
Stuart Menefy | fd78a76 | 2009-07-29 23:01:24 +0900 | [diff] [blame] | 1611 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1612 | |
Stuart Menefy | fd78a76 | 2009-07-29 23:01:24 +0900 | [diff] [blame] | 1613 | spin_lock_irqsave(&port->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1614 | sci_transmit_chars(port); |
Stuart Menefy | fd78a76 | 2009-07-29 23:01:24 +0900 | [diff] [blame] | 1615 | spin_unlock_irqrestore(&port->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | |
| 1617 | return IRQ_HANDLED; |
| 1618 | } |
| 1619 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1620 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1621 | { |
| 1622 | struct uart_port *port = ptr; |
Geert Uytterhoeven | e6403c1 | 2015-08-21 20:02:55 +0200 | [diff] [blame] | 1623 | struct sci_port *s = to_sci_port(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1624 | |
| 1625 | /* Handle errors */ |
| 1626 | if (port->type == PORT_SCI) { |
| 1627 | if (sci_handle_errors(port)) { |
| 1628 | /* discard character in rx buffer */ |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 1629 | serial_port_in(port, SCxSR); |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 1630 | sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1631 | } |
| 1632 | } else { |
Paul Mundt | d830fa4 | 2008-12-16 19:29:38 +0900 | [diff] [blame] | 1633 | sci_handle_fifo_overrun(port); |
Geert Uytterhoeven | e6403c1 | 2015-08-21 20:02:55 +0200 | [diff] [blame] | 1634 | if (!s->chan_rx) |
| 1635 | sci_receive_chars(ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | } |
| 1637 | |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 1638 | sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1639 | |
| 1640 | /* Kick the transmission */ |
Yoshihiro Shimoda | 8eadb56 | 2015-08-21 20:02:56 +0200 | [diff] [blame] | 1641 | if (!s->chan_tx) |
| 1642 | sci_tx_interrupt(irq, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1643 | |
| 1644 | return IRQ_HANDLED; |
| 1645 | } |
| 1646 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1647 | static irqreturn_t sci_br_interrupt(int irq, void *ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1648 | { |
| 1649 | struct uart_port *port = ptr; |
| 1650 | |
| 1651 | /* Handle BREAKs */ |
| 1652 | sci_handle_breaks(port); |
Geert Uytterhoeven | a1b5b43 | 2015-08-21 20:02:25 +0200 | [diff] [blame] | 1653 | sci_clear_SCxSR(port, SCxSR_BREAK_CLEAR(port)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1654 | |
| 1655 | return IRQ_HANDLED; |
| 1656 | } |
| 1657 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1658 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1659 | { |
Nobuhiro Iwamatsu | cb772fe | 2015-03-17 01:19:19 +0900 | [diff] [blame] | 1660 | unsigned short ssr_status, scr_status, err_enabled, orer_status = 0; |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1661 | struct uart_port *port = ptr; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1662 | struct sci_port *s = to_sci_port(port); |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1663 | irqreturn_t ret = IRQ_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1664 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 1665 | ssr_status = serial_port_in(port, SCxSR); |
| 1666 | scr_status = serial_port_in(port, SCSCR); |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 1667 | if (s->overrun_reg == SCxSR) |
Nobuhiro Iwamatsu | cb772fe | 2015-03-17 01:19:19 +0900 | [diff] [blame] | 1668 | orer_status = ssr_status; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 1669 | else { |
| 1670 | if (sci_getreg(port, s->overrun_reg)->size) |
| 1671 | orer_status = serial_port_in(port, s->overrun_reg); |
Nobuhiro Iwamatsu | cb772fe | 2015-03-17 01:19:19 +0900 | [diff] [blame] | 1672 | } |
| 1673 | |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 1674 | err_enabled = scr_status & port_rx_irq_mask(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1675 | |
| 1676 | /* Tx Interrupt */ |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 1677 | if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCSCR_TIE) && |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1678 | !s->chan_tx) |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1679 | ret = sci_tx_interrupt(irq, ptr); |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 1680 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1681 | /* |
| 1682 | * Rx Interrupt: if we're using DMA, the DMA controller clears RDF / |
| 1683 | * DR flags |
| 1684 | */ |
| 1685 | if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && |
Geert Uytterhoeven | e0a12a2 | 2015-08-21 20:02:35 +0200 | [diff] [blame] | 1686 | (scr_status & SCSCR_RIE)) |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1687 | ret = sci_rx_interrupt(irq, ptr); |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 1688 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1689 | /* Error Interrupt */ |
SUGIOKA Toshinobu | dd4da3a | 2009-07-07 05:32:07 +0000 | [diff] [blame] | 1690 | if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled) |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1691 | ret = sci_er_interrupt(irq, ptr); |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 1692 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1693 | /* Break Interrupt */ |
SUGIOKA Toshinobu | dd4da3a | 2009-07-07 05:32:07 +0000 | [diff] [blame] | 1694 | if ((ssr_status & SCxSR_BRK(port)) && err_enabled) |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1695 | ret = sci_br_interrupt(irq, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1696 | |
Hisashi Nakamura | 8b6ff84 | 2015-01-26 21:25:48 +0900 | [diff] [blame] | 1697 | /* Overrun Interrupt */ |
Yoshihiro Shimoda | 9080307 | 2015-08-21 20:02:36 +0200 | [diff] [blame] | 1698 | if (orer_status & s->overrun_mask) { |
Nobuhiro Iwamatsu | cb772fe | 2015-03-17 01:19:19 +0900 | [diff] [blame] | 1699 | sci_handle_fifo_overrun(port); |
Yoshihiro Shimoda | 9080307 | 2015-08-21 20:02:36 +0200 | [diff] [blame] | 1700 | ret = IRQ_HANDLED; |
| 1701 | } |
Hisashi Nakamura | 8b6ff84 | 2015-01-26 21:25:48 +0900 | [diff] [blame] | 1702 | |
Michael Trimarchi | a8884e3 | 2008-10-31 16:10:23 +0900 | [diff] [blame] | 1703 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1704 | } |
| 1705 | |
Geert Uytterhoeven | d56a91e | 2015-08-21 20:02:32 +0200 | [diff] [blame] | 1706 | static const struct sci_irq_desc { |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1707 | const char *desc; |
| 1708 | irq_handler_t handler; |
| 1709 | } sci_irq_desc[] = { |
| 1710 | /* |
| 1711 | * Split out handlers, the default case. |
| 1712 | */ |
| 1713 | [SCIx_ERI_IRQ] = { |
| 1714 | .desc = "rx err", |
| 1715 | .handler = sci_er_interrupt, |
| 1716 | }, |
| 1717 | |
| 1718 | [SCIx_RXI_IRQ] = { |
| 1719 | .desc = "rx full", |
| 1720 | .handler = sci_rx_interrupt, |
| 1721 | }, |
| 1722 | |
| 1723 | [SCIx_TXI_IRQ] = { |
| 1724 | .desc = "tx empty", |
| 1725 | .handler = sci_tx_interrupt, |
| 1726 | }, |
| 1727 | |
| 1728 | [SCIx_BRI_IRQ] = { |
| 1729 | .desc = "break", |
| 1730 | .handler = sci_br_interrupt, |
| 1731 | }, |
| 1732 | |
| 1733 | /* |
| 1734 | * Special muxed handler. |
| 1735 | */ |
| 1736 | [SCIx_MUX_IRQ] = { |
| 1737 | .desc = "mux", |
| 1738 | .handler = sci_mpxed_interrupt, |
| 1739 | }, |
| 1740 | }; |
| 1741 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1742 | static int sci_request_irq(struct sci_port *port) |
| 1743 | { |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1744 | struct uart_port *up = &port->port; |
| 1745 | int i, j, ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1746 | |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1747 | for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) { |
Geert Uytterhoeven | d56a91e | 2015-08-21 20:02:32 +0200 | [diff] [blame] | 1748 | const struct sci_irq_desc *desc; |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1749 | int irq; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 1750 | |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1751 | if (SCIx_IRQ_IS_MUXED(port)) { |
| 1752 | i = SCIx_MUX_IRQ; |
| 1753 | irq = up->irq; |
Paul Mundt | 0e8963d | 2012-05-18 18:21:06 +0900 | [diff] [blame] | 1754 | } else { |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1755 | irq = port->irqs[i]; |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1756 | |
Paul Mundt | 0e8963d | 2012-05-18 18:21:06 +0900 | [diff] [blame] | 1757 | /* |
| 1758 | * Certain port types won't support all of the |
| 1759 | * available interrupt sources. |
| 1760 | */ |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1761 | if (unlikely(irq < 0)) |
Paul Mundt | 0e8963d | 2012-05-18 18:21:06 +0900 | [diff] [blame] | 1762 | continue; |
| 1763 | } |
| 1764 | |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1765 | desc = sci_irq_desc + i; |
| 1766 | port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", |
| 1767 | dev_name(up->dev), desc->desc); |
Geert Uytterhoeven | 4205463 | 2015-08-21 20:02:34 +0200 | [diff] [blame] | 1768 | if (!port->irqstr[j]) |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1769 | goto out_nomem; |
Paul Mundt | 762c69e | 2008-12-16 18:55:26 +0900 | [diff] [blame] | 1770 | |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1771 | ret = request_irq(irq, desc->handler, up->irqflags, |
| 1772 | port->irqstr[j], port); |
| 1773 | if (unlikely(ret)) { |
| 1774 | dev_err(up->dev, "Can't allocate %s IRQ\n", desc->desc); |
| 1775 | goto out_noirq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1776 | } |
| 1777 | } |
| 1778 | |
| 1779 | return 0; |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1780 | |
| 1781 | out_noirq: |
| 1782 | while (--i >= 0) |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1783 | free_irq(port->irqs[i], port); |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1784 | |
| 1785 | out_nomem: |
| 1786 | while (--j >= 0) |
| 1787 | kfree(port->irqstr[j]); |
| 1788 | |
| 1789 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1790 | } |
| 1791 | |
| 1792 | static void sci_free_irq(struct sci_port *port) |
| 1793 | { |
| 1794 | int i; |
| 1795 | |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1796 | /* |
| 1797 | * Intentionally in reverse order so we iterate over the muxed |
| 1798 | * IRQ first. |
| 1799 | */ |
| 1800 | for (i = 0; i < SCIx_NR_IRQS; i++) { |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1801 | int irq = port->irqs[i]; |
Paul Mundt | 0e8963d | 2012-05-18 18:21:06 +0900 | [diff] [blame] | 1802 | |
| 1803 | /* |
| 1804 | * Certain port types won't support all of the available |
| 1805 | * interrupt sources. |
| 1806 | */ |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1807 | if (unlikely(irq < 0)) |
Paul Mundt | 0e8963d | 2012-05-18 18:21:06 +0900 | [diff] [blame] | 1808 | continue; |
| 1809 | |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 1810 | free_irq(port->irqs[i], port); |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1811 | kfree(port->irqstr[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1812 | |
Paul Mundt | 9174fc8 | 2011-06-28 15:25:36 +0900 | [diff] [blame] | 1813 | if (SCIx_IRQ_IS_MUXED(port)) { |
| 1814 | /* If there's only one IRQ, we're done. */ |
| 1815 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1816 | } |
| 1817 | } |
| 1818 | } |
| 1819 | |
| 1820 | static unsigned int sci_tx_empty(struct uart_port *port) |
| 1821 | { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 1822 | unsigned short status = serial_port_in(port, SCxSR); |
Paul Mundt | 72b294c | 2011-06-14 17:38:19 +0900 | [diff] [blame] | 1823 | unsigned short in_tx_fifo = sci_txfill(port); |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1824 | |
| 1825 | return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1826 | } |
| 1827 | |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 1828 | static void sci_set_rts(struct uart_port *port, bool state) |
| 1829 | { |
| 1830 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 1831 | u16 data = serial_port_in(port, SCPDR); |
| 1832 | |
| 1833 | /* Active low */ |
| 1834 | if (state) |
| 1835 | data &= ~SCPDR_RTSD; |
| 1836 | else |
| 1837 | data |= SCPDR_RTSD; |
| 1838 | serial_port_out(port, SCPDR, data); |
| 1839 | |
| 1840 | /* RTS# is output */ |
| 1841 | serial_port_out(port, SCPCR, |
| 1842 | serial_port_in(port, SCPCR) | SCPCR_RTSC); |
| 1843 | } else if (sci_getreg(port, SCSPTR)->size) { |
| 1844 | u16 ctrl = serial_port_in(port, SCSPTR); |
| 1845 | |
| 1846 | /* Active low */ |
| 1847 | if (state) |
| 1848 | ctrl &= ~SCSPTR_RTSDT; |
| 1849 | else |
| 1850 | ctrl |= SCSPTR_RTSDT; |
| 1851 | serial_port_out(port, SCSPTR, ctrl); |
| 1852 | } |
| 1853 | } |
| 1854 | |
| 1855 | static bool sci_get_cts(struct uart_port *port) |
| 1856 | { |
| 1857 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 1858 | /* Active low */ |
| 1859 | return !(serial_port_in(port, SCPDR) & SCPDR_CTSD); |
| 1860 | } else if (sci_getreg(port, SCSPTR)->size) { |
| 1861 | /* Active low */ |
| 1862 | return !(serial_port_in(port, SCSPTR) & SCSPTR_CTSDT); |
| 1863 | } |
| 1864 | |
| 1865 | return true; |
| 1866 | } |
| 1867 | |
Paul Mundt | cdf7c42 | 2011-11-24 20:18:32 +0900 | [diff] [blame] | 1868 | /* |
| 1869 | * Modem control is a bit of a mixed bag for SCI(F) ports. Generally |
| 1870 | * CTS/RTS is supported in hardware by at least one port and controlled |
| 1871 | * via SCSPTR (SCxPCR for SCIFA/B parts), or external pins (presently |
| 1872 | * handled via the ->init_pins() op, which is a bit of a one-way street, |
| 1873 | * lacking any ability to defer pin control -- this will later be |
| 1874 | * converted over to the GPIO framework). |
Paul Mundt | dc7e3ef | 2011-11-24 20:20:53 +0900 | [diff] [blame] | 1875 | * |
| 1876 | * Other modes (such as loopback) are supported generically on certain |
| 1877 | * port types, but not others. For these it's sufficient to test for the |
| 1878 | * existence of the support register and simply ignore the port type. |
Paul Mundt | cdf7c42 | 2011-11-24 20:18:32 +0900 | [diff] [blame] | 1879 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1880 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 1881 | { |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 1882 | struct sci_port *s = to_sci_port(port); |
| 1883 | |
Paul Mundt | dc7e3ef | 2011-11-24 20:20:53 +0900 | [diff] [blame] | 1884 | if (mctrl & TIOCM_LOOP) { |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 1885 | const struct plat_sci_reg *reg; |
Paul Mundt | dc7e3ef | 2011-11-24 20:20:53 +0900 | [diff] [blame] | 1886 | |
| 1887 | /* |
| 1888 | * Standard loopback mode for SCFCR ports. |
| 1889 | */ |
| 1890 | reg = sci_getreg(port, SCFCR); |
| 1891 | if (reg->size) |
Geert Uytterhoeven | 26de4f1 | 2014-03-11 11:11:19 +0100 | [diff] [blame] | 1892 | serial_port_out(port, SCFCR, |
| 1893 | serial_port_in(port, SCFCR) | |
| 1894 | SCFCR_LOOP); |
Paul Mundt | dc7e3ef | 2011-11-24 20:20:53 +0900 | [diff] [blame] | 1895 | } |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 1896 | |
| 1897 | mctrl_gpio_set(s->gpios, mctrl); |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 1898 | |
| 1899 | if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS)) |
| 1900 | return; |
| 1901 | |
| 1902 | if (!(mctrl & TIOCM_RTS)) { |
| 1903 | /* Disable Auto RTS */ |
| 1904 | serial_port_out(port, SCFCR, |
| 1905 | serial_port_in(port, SCFCR) & ~SCFCR_MCE); |
| 1906 | |
| 1907 | /* Clear RTS */ |
| 1908 | sci_set_rts(port, 0); |
| 1909 | } else if (s->autorts) { |
| 1910 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
| 1911 | /* Enable RTS# pin function */ |
| 1912 | serial_port_out(port, SCPCR, |
| 1913 | serial_port_in(port, SCPCR) & ~SCPCR_RTSC); |
| 1914 | } |
| 1915 | |
| 1916 | /* Enable Auto RTS */ |
| 1917 | serial_port_out(port, SCFCR, |
| 1918 | serial_port_in(port, SCFCR) | SCFCR_MCE); |
| 1919 | } else { |
| 1920 | /* Set RTS */ |
| 1921 | sci_set_rts(port, 1); |
| 1922 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1923 | } |
| 1924 | |
| 1925 | static unsigned int sci_get_mctrl(struct uart_port *port) |
| 1926 | { |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 1927 | struct sci_port *s = to_sci_port(port); |
| 1928 | struct mctrl_gpios *gpios = s->gpios; |
| 1929 | unsigned int mctrl = 0; |
| 1930 | |
| 1931 | mctrl_gpio_get(gpios, &mctrl); |
| 1932 | |
Paul Mundt | cdf7c42 | 2011-11-24 20:18:32 +0900 | [diff] [blame] | 1933 | /* |
| 1934 | * CTS/RTS is handled in hardware when supported, while nothing |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 1935 | * else is wired up. |
Paul Mundt | cdf7c42 | 2011-11-24 20:18:32 +0900 | [diff] [blame] | 1936 | */ |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 1937 | if (s->autorts) { |
| 1938 | if (sci_get_cts(port)) |
| 1939 | mctrl |= TIOCM_CTS; |
| 1940 | } else if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS))) { |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 1941 | mctrl |= TIOCM_CTS; |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 1942 | } |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 1943 | if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR))) |
| 1944 | mctrl |= TIOCM_DSR; |
| 1945 | if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD))) |
| 1946 | mctrl |= TIOCM_CAR; |
| 1947 | |
| 1948 | return mctrl; |
| 1949 | } |
| 1950 | |
| 1951 | static void sci_enable_ms(struct uart_port *port) |
| 1952 | { |
| 1953 | mctrl_gpio_enable_ms(to_sci_port(port)->gpios); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1954 | } |
| 1955 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1956 | static void sci_break_ctl(struct uart_port *port, int break_state) |
| 1957 | { |
Shimoda, Yoshihiro | bbb4ce5 | 2012-04-06 09:59:14 +0900 | [diff] [blame] | 1958 | unsigned short scscr, scsptr; |
| 1959 | |
Shimoda, Yoshihiro | a4e02f6 | 2012-04-12 19:19:21 +0900 | [diff] [blame] | 1960 | /* check wheter the port has SCSPTR */ |
Geert Uytterhoeven | abbf121 | 2016-06-03 12:00:05 +0200 | [diff] [blame] | 1961 | if (!sci_getreg(port, SCSPTR)->size) { |
Shimoda, Yoshihiro | bbb4ce5 | 2012-04-06 09:59:14 +0900 | [diff] [blame] | 1962 | /* |
| 1963 | * Not supported by hardware. Most parts couple break and rx |
| 1964 | * interrupts together, with break detection always enabled. |
| 1965 | */ |
Shimoda, Yoshihiro | a4e02f6 | 2012-04-12 19:19:21 +0900 | [diff] [blame] | 1966 | return; |
Shimoda, Yoshihiro | bbb4ce5 | 2012-04-06 09:59:14 +0900 | [diff] [blame] | 1967 | } |
Shimoda, Yoshihiro | a4e02f6 | 2012-04-12 19:19:21 +0900 | [diff] [blame] | 1968 | |
| 1969 | scsptr = serial_port_in(port, SCSPTR); |
| 1970 | scscr = serial_port_in(port, SCSCR); |
| 1971 | |
| 1972 | if (break_state == -1) { |
| 1973 | scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT; |
| 1974 | scscr &= ~SCSCR_TE; |
| 1975 | } else { |
| 1976 | scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO; |
| 1977 | scscr |= SCSCR_TE; |
| 1978 | } |
| 1979 | |
| 1980 | serial_port_out(port, SCSPTR, scsptr); |
| 1981 | serial_port_out(port, SCSCR, scscr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1982 | } |
| 1983 | |
| 1984 | static int sci_startup(struct uart_port *port) |
| 1985 | { |
Magnus Damm | a5660ad | 2009-01-21 15:14:38 +0000 | [diff] [blame] | 1986 | struct sci_port *s = to_sci_port(port); |
Paul Mundt | 073e84c | 2011-01-19 17:30:53 +0900 | [diff] [blame] | 1987 | int ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1988 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1989 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); |
| 1990 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 1991 | sci_request_dma(port); |
Paul Mundt | 073e84c | 2011-01-19 17:30:53 +0900 | [diff] [blame] | 1992 | |
Takatoshi Akiyama | d952024 | 2017-02-27 15:56:31 +0900 | [diff] [blame] | 1993 | ret = sci_request_irq(s); |
| 1994 | if (unlikely(ret < 0)) { |
| 1995 | sci_free_dma(port); |
| 1996 | return ret; |
| 1997 | } |
| 1998 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1999 | return 0; |
| 2000 | } |
| 2001 | |
| 2002 | static void sci_shutdown(struct uart_port *port) |
| 2003 | { |
Magnus Damm | a5660ad | 2009-01-21 15:14:38 +0000 | [diff] [blame] | 2004 | struct sci_port *s = to_sci_port(port); |
Shinya Kuribayashi | 33b48e1 | 2012-11-16 10:54:49 +0900 | [diff] [blame] | 2005 | unsigned long flags; |
Geert Uytterhoeven | 5fd2b6e | 2016-06-26 11:20:21 +0200 | [diff] [blame] | 2006 | u16 scr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2007 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 2008 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); |
| 2009 | |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 2010 | s->autorts = false; |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 2011 | mctrl_gpio_disable_ms(to_sci_port(port)->gpios); |
| 2012 | |
Shinya Kuribayashi | 33b48e1 | 2012-11-16 10:54:49 +0900 | [diff] [blame] | 2013 | spin_lock_irqsave(&port->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2014 | sci_stop_rx(port); |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 2015 | sci_stop_tx(port); |
Geert Uytterhoeven | 5fd2b6e | 2016-06-26 11:20:21 +0200 | [diff] [blame] | 2016 | /* Stop RX and TX, disable related interrupts, keep clock source */ |
| 2017 | scr = serial_port_in(port, SCSCR); |
| 2018 | serial_port_out(port, SCSCR, scr & (SCSCR_CKE1 | SCSCR_CKE0)); |
Shinya Kuribayashi | 33b48e1 | 2012-11-16 10:54:49 +0900 | [diff] [blame] | 2019 | spin_unlock_irqrestore(&port->lock, flags); |
Paul Mundt | 073e84c | 2011-01-19 17:30:53 +0900 | [diff] [blame] | 2020 | |
Aleksandar Mitev | 9ab7655 | 2015-09-18 13:08:28 +0200 | [diff] [blame] | 2021 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 2022 | if (s->chan_rx) { |
| 2023 | dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__, |
| 2024 | port->line); |
| 2025 | del_timer_sync(&s->rx_timer); |
| 2026 | } |
| 2027 | #endif |
| 2028 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2029 | sci_free_irq(s); |
Takatoshi Akiyama | d952024 | 2017-02-27 15:56:31 +0900 | [diff] [blame] | 2030 | sci_free_dma(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2031 | } |
| 2032 | |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2033 | static int sci_sck_calc(struct sci_port *s, unsigned int bps, |
| 2034 | unsigned int *srr) |
Paul Mundt | 26c92f3 | 2009-06-24 18:23:52 +0900 | [diff] [blame] | 2035 | { |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2036 | unsigned long freq = s->clk_rates[SCI_SCK]; |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2037 | int err, min_err = INT_MAX; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2038 | unsigned int sr; |
Laurent Pinchart | ec09c5e | 2013-12-06 10:59:20 +0100 | [diff] [blame] | 2039 | |
Geert Uytterhoeven | 7b5c0c0 | 2016-01-04 14:45:20 +0100 | [diff] [blame] | 2040 | if (s->port.type != PORT_HSCIF) |
| 2041 | freq *= 2; |
Paul Mundt | e8183a6 | 2011-01-19 17:51:37 +0900 | [diff] [blame] | 2042 | |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2043 | for_each_sr(sr, s) { |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2044 | err = DIV_ROUND_CLOSEST(freq, sr) - bps; |
| 2045 | if (abs(err) >= abs(min_err)) |
| 2046 | continue; |
| 2047 | |
| 2048 | min_err = err; |
| 2049 | *srr = sr - 1; |
| 2050 | |
| 2051 | if (!err) |
| 2052 | break; |
| 2053 | } |
| 2054 | |
| 2055 | dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err, |
| 2056 | *srr + 1); |
| 2057 | return min_err; |
Paul Mundt | 26c92f3 | 2009-06-24 18:23:52 +0900 | [diff] [blame] | 2058 | } |
| 2059 | |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2060 | static int sci_brg_calc(struct sci_port *s, unsigned int bps, |
| 2061 | unsigned long freq, unsigned int *dlr, |
| 2062 | unsigned int *srr) |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2063 | { |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2064 | int err, min_err = INT_MAX; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2065 | unsigned int sr, dl; |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2066 | |
Geert Uytterhoeven | 7b5c0c0 | 2016-01-04 14:45:20 +0100 | [diff] [blame] | 2067 | if (s->port.type != PORT_HSCIF) |
| 2068 | freq *= 2; |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2069 | |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2070 | for_each_sr(sr, s) { |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2071 | dl = DIV_ROUND_CLOSEST(freq, sr * bps); |
| 2072 | dl = clamp(dl, 1U, 65535U); |
| 2073 | |
| 2074 | err = DIV_ROUND_CLOSEST(freq, sr * dl) - bps; |
| 2075 | if (abs(err) >= abs(min_err)) |
| 2076 | continue; |
| 2077 | |
| 2078 | min_err = err; |
| 2079 | *dlr = dl; |
| 2080 | *srr = sr - 1; |
| 2081 | |
| 2082 | if (!err) |
| 2083 | break; |
| 2084 | } |
| 2085 | |
| 2086 | dev_dbg(s->port.dev, "BRG: %u%+d bps using DL %u SR %u\n", bps, |
| 2087 | min_err, *dlr, *srr + 1); |
| 2088 | return min_err; |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2089 | } |
| 2090 | |
Geert Uytterhoeven | b4a5c45 | 2015-11-16 17:22:16 +0100 | [diff] [blame] | 2091 | /* calculate sample rate, BRR, and clock select */ |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2092 | static int sci_scbrr_calc(struct sci_port *s, unsigned int bps, |
| 2093 | unsigned int *brr, unsigned int *srr, |
| 2094 | unsigned int *cks) |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2095 | { |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2096 | unsigned long freq = s->clk_rates[SCI_FCK]; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2097 | unsigned int sr, br, prediv, scrate, c; |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2098 | int err, min_err = INT_MAX; |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2099 | |
Geert Uytterhoeven | 7b5c0c0 | 2016-01-04 14:45:20 +0100 | [diff] [blame] | 2100 | if (s->port.type != PORT_HSCIF) |
| 2101 | freq *= 2; |
Geert Uytterhoeven | b4a5c45 | 2015-11-16 17:22:16 +0100 | [diff] [blame] | 2102 | |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2103 | /* |
| 2104 | * Find the combination of sample rate and clock select with the |
| 2105 | * smallest deviation from the desired baud rate. |
| 2106 | * Prefer high sample rates to maximise the receive margin. |
| 2107 | * |
| 2108 | * M: Receive margin (%) |
| 2109 | * N: Ratio of bit rate to clock (N = sampling rate) |
| 2110 | * D: Clock duty (D = 0 to 1.0) |
| 2111 | * L: Frame length (L = 9 to 12) |
| 2112 | * F: Absolute value of clock frequency deviation |
| 2113 | * |
| 2114 | * M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) - |
| 2115 | * (|D - 0.5| / N * (1 + F))| |
| 2116 | * NOTE: Usually, treat D for 0.5, F is 0 by this calculation. |
| 2117 | */ |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2118 | for_each_sr(sr, s) { |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2119 | for (c = 0; c <= 3; c++) { |
| 2120 | /* integerized formulas from HSCIF documentation */ |
Geert Uytterhoeven | 7b5c0c0 | 2016-01-04 14:45:20 +0100 | [diff] [blame] | 2121 | prediv = sr * (1 << (2 * c + 1)); |
Geert Uytterhoeven | de01e6c | 2015-11-13 17:04:56 +0100 | [diff] [blame] | 2122 | |
| 2123 | /* |
| 2124 | * We need to calculate: |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2125 | * |
Geert Uytterhoeven | de01e6c | 2015-11-13 17:04:56 +0100 | [diff] [blame] | 2126 | * br = freq / (prediv * bps) clamped to [1..256] |
Geert Uytterhoeven | 881a748 | 2015-11-16 15:54:47 +0100 | [diff] [blame] | 2127 | * err = freq / (br * prediv) - bps |
Geert Uytterhoeven | de01e6c | 2015-11-13 17:04:56 +0100 | [diff] [blame] | 2128 | * |
| 2129 | * Watch out for overflow when calculating the desired |
| 2130 | * sampling clock rate! |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2131 | */ |
Geert Uytterhoeven | de01e6c | 2015-11-13 17:04:56 +0100 | [diff] [blame] | 2132 | if (bps > UINT_MAX / prediv) |
| 2133 | break; |
| 2134 | |
| 2135 | scrate = prediv * bps; |
| 2136 | br = DIV_ROUND_CLOSEST(freq, scrate); |
Geert Uytterhoeven | 95a2703 | 2015-11-13 16:56:08 +0100 | [diff] [blame] | 2137 | br = clamp(br, 1U, 256U); |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2138 | |
Geert Uytterhoeven | 881a748 | 2015-11-16 15:54:47 +0100 | [diff] [blame] | 2139 | err = DIV_ROUND_CLOSEST(freq, br * prediv) - bps; |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2140 | if (abs(err) >= abs(min_err)) |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2141 | continue; |
| 2142 | |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2143 | min_err = err; |
Geert Uytterhoeven | 95a2703 | 2015-11-13 16:56:08 +0100 | [diff] [blame] | 2144 | *brr = br - 1; |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2145 | *srr = sr - 1; |
| 2146 | *cks = c; |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2147 | |
| 2148 | if (!err) |
| 2149 | goto found; |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2150 | } |
| 2151 | } |
| 2152 | |
Geert Uytterhoeven | 6c51332 | 2015-11-16 16:33:22 +0100 | [diff] [blame] | 2153 | found: |
Geert Uytterhoeven | 881a748 | 2015-11-16 15:54:47 +0100 | [diff] [blame] | 2154 | dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps, |
| 2155 | min_err, *brr, *srr + 1, *cks); |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2156 | return min_err; |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2157 | } |
| 2158 | |
Magnus Damm | 1ba7622 | 2011-08-03 03:47:36 +0000 | [diff] [blame] | 2159 | static void sci_reset(struct uart_port *port) |
| 2160 | { |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 2161 | const struct plat_sci_reg *reg; |
Magnus Damm | 1ba7622 | 2011-08-03 03:47:36 +0000 | [diff] [blame] | 2162 | unsigned int status; |
| 2163 | |
| 2164 | do { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 2165 | status = serial_port_in(port, SCxSR); |
Magnus Damm | 1ba7622 | 2011-08-03 03:47:36 +0000 | [diff] [blame] | 2166 | } while (!(status & SCxSR_TEND(port))); |
| 2167 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 2168 | serial_port_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ |
Magnus Damm | 1ba7622 | 2011-08-03 03:47:36 +0000 | [diff] [blame] | 2169 | |
Paul Mundt | 0979e0e | 2011-11-24 18:35:49 +0900 | [diff] [blame] | 2170 | reg = sci_getreg(port, SCFCR); |
| 2171 | if (reg->size) |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 2172 | serial_port_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); |
Geert Uytterhoeven | 2768cf4 | 2016-06-24 16:59:15 +0200 | [diff] [blame] | 2173 | |
| 2174 | sci_clear_SCxSR(port, |
| 2175 | SCxSR_RDxF_CLEAR(port) & SCxSR_ERROR_CLEAR(port) & |
| 2176 | SCxSR_BREAK_CLEAR(port)); |
Geert Uytterhoeven | fc2af33 | 2016-06-24 16:59:16 +0200 | [diff] [blame] | 2177 | if (sci_getreg(port, SCLSR)->size) { |
| 2178 | status = serial_port_in(port, SCLSR); |
| 2179 | status &= ~(SCLSR_TO | SCLSR_ORER); |
| 2180 | serial_port_out(port, SCLSR, status); |
| 2181 | } |
Magnus Damm | 1ba7622 | 2011-08-03 03:47:36 +0000 | [diff] [blame] | 2182 | } |
| 2183 | |
Alan Cox | 606d099 | 2006-12-08 02:38:45 -0800 | [diff] [blame] | 2184 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
| 2185 | struct ktermios *old) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2186 | { |
Geert Uytterhoeven | 95ee05c | 2016-01-04 14:45:18 +0100 | [diff] [blame] | 2187 | unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i; |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2188 | unsigned int brr = 255, cks = 0, srr = 15, dl = 0, sccks = 0; |
| 2189 | unsigned int brr1 = 255, cks1 = 0, srr1 = 15, dl1 = 0; |
Paul Mundt | 00b9de9 | 2009-06-24 17:53:33 +0900 | [diff] [blame] | 2190 | struct sci_port *s = to_sci_port(port); |
Geert Uytterhoeven | d3184e6 | 2015-08-21 20:02:33 +0200 | [diff] [blame] | 2191 | const struct plat_sci_reg *reg; |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2192 | int min_err = INT_MAX, err; |
| 2193 | unsigned long max_freq = 0; |
| 2194 | int best_clk = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2195 | |
Nobuhiro Iwamatsu | 730c4e7 | 2014-07-14 16:10:00 +0900 | [diff] [blame] | 2196 | if ((termios->c_cflag & CSIZE) == CS7) |
| 2197 | smr_val |= SCSMR_CHR; |
| 2198 | if (termios->c_cflag & PARENB) |
| 2199 | smr_val |= SCSMR_PE; |
| 2200 | if (termios->c_cflag & PARODD) |
| 2201 | smr_val |= SCSMR_PE | SCSMR_ODD; |
| 2202 | if (termios->c_cflag & CSTOPB) |
| 2203 | smr_val |= SCSMR_STOP; |
| 2204 | |
Magnus Damm | 154280f | 2009-12-22 03:37:28 +0000 | [diff] [blame] | 2205 | /* |
| 2206 | * earlyprintk comes here early on with port->uartclk set to zero. |
| 2207 | * the clock framework is not up and running at this point so here |
| 2208 | * we assume that 115200 is the maximum baud rate. please note that |
| 2209 | * the baud rate is not programmed during earlyprintk - it is assumed |
| 2210 | * that the previous boot loader has enabled required clocks and |
| 2211 | * setup the baud rate generator hardware for us already. |
| 2212 | */ |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2213 | if (!port->uartclk) { |
| 2214 | baud = uart_get_baud_rate(port, termios, old, 0, 115200); |
| 2215 | goto done; |
| 2216 | } |
Magnus Damm | 154280f | 2009-12-22 03:37:28 +0000 | [diff] [blame] | 2217 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2218 | for (i = 0; i < SCI_NUM_CLKS; i++) |
| 2219 | max_freq = max(max_freq, s->clk_rates[i]); |
| 2220 | |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2221 | baud = uart_get_baud_rate(port, termios, old, 0, max_freq / min_sr(s)); |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2222 | if (!baud) |
| 2223 | goto done; |
| 2224 | |
| 2225 | /* |
| 2226 | * There can be multiple sources for the sampling clock. Find the one |
| 2227 | * that gives us the smallest deviation from the desired baud rate. |
| 2228 | */ |
| 2229 | |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2230 | /* Optional Undivided External Clock */ |
| 2231 | if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA && |
| 2232 | port->type != PORT_SCIFB) { |
| 2233 | err = sci_sck_calc(s, baud, &srr1); |
| 2234 | if (abs(err) < abs(min_err)) { |
| 2235 | best_clk = SCI_SCK; |
| 2236 | scr_val = SCSCR_CKE1; |
| 2237 | sccks = SCCKS_CKS; |
| 2238 | min_err = err; |
| 2239 | srr = srr1; |
| 2240 | if (!err) |
| 2241 | goto done; |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2242 | } |
| 2243 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2244 | |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2245 | /* Optional BRG Frequency Divided External Clock */ |
| 2246 | if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) { |
| 2247 | err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1, |
| 2248 | &srr1); |
| 2249 | if (abs(err) < abs(min_err)) { |
| 2250 | best_clk = SCI_SCIF_CLK; |
| 2251 | scr_val = SCSCR_CKE1; |
| 2252 | sccks = 0; |
| 2253 | min_err = err; |
| 2254 | dl = dl1; |
| 2255 | srr = srr1; |
| 2256 | if (!err) |
| 2257 | goto done; |
| 2258 | } |
| 2259 | } |
| 2260 | |
| 2261 | /* Optional BRG Frequency Divided Internal Clock */ |
| 2262 | if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) { |
| 2263 | err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1, |
| 2264 | &srr1); |
| 2265 | if (abs(err) < abs(min_err)) { |
| 2266 | best_clk = SCI_BRG_INT; |
| 2267 | scr_val = SCSCR_CKE1; |
| 2268 | sccks = SCCKS_XIN; |
| 2269 | min_err = err; |
| 2270 | dl = dl1; |
| 2271 | srr = srr1; |
| 2272 | if (!min_err) |
| 2273 | goto done; |
| 2274 | } |
| 2275 | } |
| 2276 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2277 | /* Divided Functional Clock using standard Bit Rate Register */ |
| 2278 | err = sci_scbrr_calc(s, baud, &brr1, &srr1, &cks1); |
| 2279 | if (abs(err) < abs(min_err)) { |
| 2280 | best_clk = SCI_FCK; |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2281 | scr_val = 0; |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2282 | min_err = err; |
| 2283 | brr = brr1; |
| 2284 | srr = srr1; |
| 2285 | cks = cks1; |
| 2286 | } |
| 2287 | |
| 2288 | done: |
| 2289 | if (best_clk >= 0) |
| 2290 | dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n", |
| 2291 | s->clks[best_clk], baud, min_err); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2292 | |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 2293 | sci_port_enable(s); |
Alexandre Courbot | 3600338 | 2011-03-03 08:04:42 +0000 | [diff] [blame] | 2294 | |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2295 | /* |
| 2296 | * Program the optional External Baud Rate Generator (BRG) first. |
| 2297 | * It controls the mux to select (H)SCK or frequency divided clock. |
| 2298 | */ |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2299 | if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) { |
| 2300 | serial_port_out(port, SCDL, dl); |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2301 | serial_port_out(port, SCCKS, sccks); |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2302 | } |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2303 | |
Magnus Damm | 1ba7622 | 2011-08-03 03:47:36 +0000 | [diff] [blame] | 2304 | sci_reset(port); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2305 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2306 | uart_update_timeout(port, termios->c_cflag, baud); |
| 2307 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2308 | if (best_clk >= 0) { |
Geert Uytterhoeven | 92a0574 | 2016-01-04 14:45:22 +0100 | [diff] [blame] | 2309 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
| 2310 | switch (srr + 1) { |
| 2311 | case 5: smr_val |= SCSMR_SRC_5; break; |
| 2312 | case 7: smr_val |= SCSMR_SRC_7; break; |
| 2313 | case 11: smr_val |= SCSMR_SRC_11; break; |
| 2314 | case 13: smr_val |= SCSMR_SRC_13; break; |
| 2315 | case 16: smr_val |= SCSMR_SRC_16; break; |
| 2316 | case 17: smr_val |= SCSMR_SRC_17; break; |
| 2317 | case 19: smr_val |= SCSMR_SRC_19; break; |
| 2318 | case 27: smr_val |= SCSMR_SRC_27; break; |
| 2319 | } |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2320 | smr_val |= cks; |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2321 | dev_dbg(port->dev, |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2322 | "SCR 0x%x SMR 0x%x BRR %u CKS 0x%x DL %u SRR %u\n", |
| 2323 | scr_val, smr_val, brr, sccks, dl, srr); |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2324 | serial_port_out(port, SCSCR, scr_val); |
Takashi Yoshii | 9d482cc | 2012-11-16 10:52:49 +0900 | [diff] [blame] | 2325 | serial_port_out(port, SCSMR, smr_val); |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2326 | serial_port_out(port, SCBRR, brr); |
| 2327 | if (sci_getreg(port, HSSRR)->size) |
| 2328 | serial_port_out(port, HSSRR, srr | HSCIF_SRE); |
| 2329 | |
| 2330 | /* Wait one bit interval */ |
| 2331 | udelay((1000000 + (baud - 1)) / baud); |
| 2332 | } else { |
| 2333 | /* Don't touch the bit rate configuration */ |
| 2334 | scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); |
Geert Uytterhoeven | 3a964ab | 2016-01-04 14:45:19 +0100 | [diff] [blame] | 2335 | smr_val |= serial_port_in(port, SCSMR) & |
| 2336 | (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS); |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2337 | dev_dbg(port->dev, "SCR 0x%x SMR 0x%x\n", scr_val, smr_val); |
| 2338 | serial_port_out(port, SCSCR, scr_val); |
| 2339 | serial_port_out(port, SCSMR, smr_val); |
| 2340 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2341 | |
Paul Mundt | d570164 | 2008-12-16 20:07:27 +0900 | [diff] [blame] | 2342 | sci_init_pins(port, termios->c_cflag); |
Paul Mundt | 0979e0e | 2011-11-24 18:35:49 +0900 | [diff] [blame] | 2343 | |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 2344 | port->status &= ~UPSTAT_AUTOCTS; |
| 2345 | s->autorts = false; |
Paul Mundt | 73c3d53 | 2011-12-02 19:02:06 +0900 | [diff] [blame] | 2346 | reg = sci_getreg(port, SCFCR); |
| 2347 | if (reg->size) { |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 2348 | unsigned short ctrl = serial_port_in(port, SCFCR); |
Paul Mundt | 0979e0e | 2011-11-24 18:35:49 +0900 | [diff] [blame] | 2349 | |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 2350 | if ((port->flags & UPF_HARD_FLOW) && |
| 2351 | (termios->c_cflag & CRTSCTS)) { |
| 2352 | /* There is no CTS interrupt to restart the hardware */ |
| 2353 | port->status |= UPSTAT_AUTOCTS; |
| 2354 | /* MCE is enabled when RTS is raised */ |
| 2355 | s->autorts = true; |
Paul Mundt | faf02f8 | 2011-12-02 17:44:50 +0900 | [diff] [blame] | 2356 | } |
Paul Mundt | 73c3d53 | 2011-12-02 19:02:06 +0900 | [diff] [blame] | 2357 | |
| 2358 | /* |
| 2359 | * As we've done a sci_reset() above, ensure we don't |
| 2360 | * interfere with the FIFOs while toggling MCE. As the |
| 2361 | * reset values could still be set, simply mask them out. |
| 2362 | */ |
| 2363 | ctrl &= ~(SCFCR_RFRST | SCFCR_TFRST); |
| 2364 | |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 2365 | serial_port_out(port, SCFCR, ctrl); |
Paul Mundt | 0979e0e | 2011-11-24 18:35:49 +0900 | [diff] [blame] | 2366 | } |
Paul Mundt | b7a76e4 | 2006-02-01 03:06:06 -0800 | [diff] [blame] | 2367 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2368 | scr_val |= s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0); |
| 2369 | dev_dbg(port->dev, "SCSCR 0x%x\n", scr_val); |
| 2370 | serial_port_out(port, SCSCR, scr_val); |
Geert Uytterhoeven | 92a0574 | 2016-01-04 14:45:22 +0100 | [diff] [blame] | 2371 | if ((srr + 1 == 5) && |
| 2372 | (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) { |
| 2373 | /* |
| 2374 | * In asynchronous mode, when the sampling rate is 1/5, first |
| 2375 | * received data may become invalid on some SCIFA and SCIFB. |
| 2376 | * To avoid this problem wait more than 1 serial data time (1 |
| 2377 | * bit time x serial data number) after setting SCSCR.RE = 1. |
| 2378 | */ |
| 2379 | udelay(DIV_ROUND_UP(10 * 1000000, baud)); |
| 2380 | } |
Geert Uytterhoeven | ad3faea | 2017-03-28 11:13:45 +0200 | [diff] [blame] | 2381 | if (port->flags & UPF_HARD_FLOW) { |
| 2382 | /* Refresh (Auto) RTS */ |
| 2383 | sci_set_mctrl(port, port->mctrl); |
| 2384 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2385 | |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 2386 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
| 2387 | /* |
Nobuhiro Iwamatsu | 5f6d851 | 2015-03-17 01:19:54 +0900 | [diff] [blame] | 2388 | * Calculate delay for 2 DMA buffers (4 FIFO). |
Geert Uytterhoeven | f5835c1 | 2015-08-21 20:02:38 +0200 | [diff] [blame] | 2389 | * See serial_core.c::uart_update_timeout(). |
| 2390 | * With 10 bits (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above |
| 2391 | * function calculates 1 jiffie for the data plus 5 jiffies for the |
| 2392 | * "slop(e)." Then below we calculate 5 jiffies (20ms) for 2 DMA |
| 2393 | * buffers (4 FIFO sizes), but when performing a faster transfer, the |
| 2394 | * value obtained by this formula is too small. Therefore, if the value |
| 2395 | * is smaller than 20ms, use 20ms as the timeout value for DMA. |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 2396 | */ |
| 2397 | if (s->chan_rx) { |
Nobuhiro Iwamatsu | 5f6d851 | 2015-03-17 01:19:54 +0900 | [diff] [blame] | 2398 | unsigned int bits; |
| 2399 | |
| 2400 | /* byte size and parity */ |
| 2401 | switch (termios->c_cflag & CSIZE) { |
| 2402 | case CS5: |
| 2403 | bits = 7; |
| 2404 | break; |
| 2405 | case CS6: |
| 2406 | bits = 8; |
| 2407 | break; |
| 2408 | case CS7: |
| 2409 | bits = 9; |
| 2410 | break; |
| 2411 | default: |
| 2412 | bits = 10; |
| 2413 | break; |
| 2414 | } |
| 2415 | |
| 2416 | if (termios->c_cflag & CSTOPB) |
| 2417 | bits++; |
| 2418 | if (termios->c_cflag & PARENB) |
| 2419 | bits++; |
| 2420 | s->rx_timeout = DIV_ROUND_UP((s->buf_len_rx * 2 * bits * HZ) / |
| 2421 | (baud / 10), 10); |
Joe Perches | 9b971cd | 2014-03-11 10:10:46 -0700 | [diff] [blame] | 2422 | dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n", |
Guennadi Liakhovetski | 3089f38 | 2010-03-19 13:53:04 +0000 | [diff] [blame] | 2423 | s->rx_timeout * 1000 / HZ, port->timeout); |
| 2424 | if (s->rx_timeout < msecs_to_jiffies(20)) |
| 2425 | s->rx_timeout = msecs_to_jiffies(20); |
| 2426 | } |
| 2427 | #endif |
| 2428 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2429 | if ((termios->c_cflag & CREAD) != 0) |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 2430 | sci_start_rx(port); |
Alexandre Courbot | 3600338 | 2011-03-03 08:04:42 +0000 | [diff] [blame] | 2431 | |
Paul Mundt | 23241d4 | 2011-06-28 13:55:31 +0900 | [diff] [blame] | 2432 | sci_port_disable(s); |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 2433 | |
| 2434 | if (UART_ENABLE_MS(port, termios->c_cflag)) |
| 2435 | sci_enable_ms(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2436 | } |
| 2437 | |
Teppei Kamijou | 0174e5c | 2012-11-16 10:51:55 +0900 | [diff] [blame] | 2438 | static void sci_pm(struct uart_port *port, unsigned int state, |
| 2439 | unsigned int oldstate) |
| 2440 | { |
| 2441 | struct sci_port *sci_port = to_sci_port(port); |
| 2442 | |
| 2443 | switch (state) { |
Geert Uytterhoeven | d3dfe5d | 2014-03-11 11:11:20 +0100 | [diff] [blame] | 2444 | case UART_PM_STATE_OFF: |
Teppei Kamijou | 0174e5c | 2012-11-16 10:51:55 +0900 | [diff] [blame] | 2445 | sci_port_disable(sci_port); |
| 2446 | break; |
| 2447 | default: |
| 2448 | sci_port_enable(sci_port); |
| 2449 | break; |
| 2450 | } |
| 2451 | } |
| 2452 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2453 | static const char *sci_type(struct uart_port *port) |
| 2454 | { |
| 2455 | switch (port->type) { |
Michael Trimarchi | e7c98dc | 2008-11-13 18:18:35 +0900 | [diff] [blame] | 2456 | case PORT_IRDA: |
| 2457 | return "irda"; |
| 2458 | case PORT_SCI: |
| 2459 | return "sci"; |
| 2460 | case PORT_SCIF: |
| 2461 | return "scif"; |
| 2462 | case PORT_SCIFA: |
| 2463 | return "scifa"; |
Guennadi Liakhovetski | d1d4b10 | 2010-05-23 16:39:09 +0000 | [diff] [blame] | 2464 | case PORT_SCIFB: |
| 2465 | return "scifb"; |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 2466 | case PORT_HSCIF: |
| 2467 | return "hscif"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2468 | } |
| 2469 | |
Paul Mundt | fa43972 | 2008-09-04 18:53:58 +0900 | [diff] [blame] | 2470 | return NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2471 | } |
| 2472 | |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2473 | static int sci_remap_port(struct uart_port *port) |
| 2474 | { |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2475 | struct sci_port *sport = to_sci_port(port); |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2476 | |
| 2477 | /* |
| 2478 | * Nothing to do if there's already an established membase. |
| 2479 | */ |
| 2480 | if (port->membase) |
| 2481 | return 0; |
| 2482 | |
| 2483 | if (port->flags & UPF_IOREMAP) { |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2484 | port->membase = ioremap_nocache(port->mapbase, sport->reg_size); |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2485 | if (unlikely(!port->membase)) { |
| 2486 | dev_err(port->dev, "can't remap port#%d\n", port->line); |
| 2487 | return -ENXIO; |
| 2488 | } |
| 2489 | } else { |
| 2490 | /* |
| 2491 | * For the simple (and majority of) cases where we don't |
| 2492 | * need to do any remapping, just cast the cookie |
| 2493 | * directly. |
| 2494 | */ |
Jingoo Han | 3af4e96 | 2014-02-05 09:56:37 +0900 | [diff] [blame] | 2495 | port->membase = (void __iomem *)(uintptr_t)port->mapbase; |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2496 | } |
| 2497 | |
| 2498 | return 0; |
| 2499 | } |
| 2500 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2501 | static void sci_release_port(struct uart_port *port) |
| 2502 | { |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2503 | struct sci_port *sport = to_sci_port(port); |
| 2504 | |
Paul Mundt | e265164 | 2011-01-20 21:24:03 +0900 | [diff] [blame] | 2505 | if (port->flags & UPF_IOREMAP) { |
| 2506 | iounmap(port->membase); |
| 2507 | port->membase = NULL; |
| 2508 | } |
| 2509 | |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2510 | release_mem_region(port->mapbase, sport->reg_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2511 | } |
| 2512 | |
| 2513 | static int sci_request_port(struct uart_port *port) |
| 2514 | { |
Paul Mundt | e265164 | 2011-01-20 21:24:03 +0900 | [diff] [blame] | 2515 | struct resource *res; |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2516 | struct sci_port *sport = to_sci_port(port); |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2517 | int ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2518 | |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2519 | res = request_mem_region(port->mapbase, sport->reg_size, |
| 2520 | dev_name(port->dev)); |
| 2521 | if (unlikely(res == NULL)) { |
| 2522 | dev_err(port->dev, "request_mem_region failed."); |
Paul Mundt | e265164 | 2011-01-20 21:24:03 +0900 | [diff] [blame] | 2523 | return -EBUSY; |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2524 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2525 | |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2526 | ret = sci_remap_port(port); |
| 2527 | if (unlikely(ret != 0)) { |
| 2528 | release_resource(res); |
| 2529 | return ret; |
Paul Mundt | 7ff731a | 2008-10-01 15:46:58 +0900 | [diff] [blame] | 2530 | } |
Paul Mundt | e265164 | 2011-01-20 21:24:03 +0900 | [diff] [blame] | 2531 | |
| 2532 | return 0; |
| 2533 | } |
| 2534 | |
| 2535 | static void sci_config_port(struct uart_port *port, int flags) |
| 2536 | { |
| 2537 | if (flags & UART_CONFIG_TYPE) { |
| 2538 | struct sci_port *sport = to_sci_port(port); |
| 2539 | |
| 2540 | port->type = sport->cfg->type; |
| 2541 | sci_request_port(port); |
| 2542 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2543 | } |
| 2544 | |
| 2545 | static int sci_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 2546 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2547 | if (ser->baud_base < 2400) |
| 2548 | /* No paper tape reader for Mitch.. */ |
| 2549 | return -EINVAL; |
| 2550 | |
| 2551 | return 0; |
| 2552 | } |
| 2553 | |
Julia Lawall | 069a47e | 2016-09-01 19:51:35 +0200 | [diff] [blame] | 2554 | static const struct uart_ops sci_uart_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2555 | .tx_empty = sci_tx_empty, |
| 2556 | .set_mctrl = sci_set_mctrl, |
| 2557 | .get_mctrl = sci_get_mctrl, |
| 2558 | .start_tx = sci_start_tx, |
| 2559 | .stop_tx = sci_stop_tx, |
| 2560 | .stop_rx = sci_stop_rx, |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 2561 | .enable_ms = sci_enable_ms, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2562 | .break_ctl = sci_break_ctl, |
| 2563 | .startup = sci_startup, |
| 2564 | .shutdown = sci_shutdown, |
Geert Uytterhoeven | 13b9c31 | 2017-04-25 20:15:35 +0200 | [diff] [blame] | 2565 | .flush_buffer = sci_flush_buffer, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2566 | .set_termios = sci_set_termios, |
Teppei Kamijou | 0174e5c | 2012-11-16 10:51:55 +0900 | [diff] [blame] | 2567 | .pm = sci_pm, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2568 | .type = sci_type, |
| 2569 | .release_port = sci_release_port, |
| 2570 | .request_port = sci_request_port, |
| 2571 | .config_port = sci_config_port, |
| 2572 | .verify_port = sci_verify_port, |
Paul Mundt | 07d2a1a | 2008-12-11 19:06:43 +0900 | [diff] [blame] | 2573 | #ifdef CONFIG_CONSOLE_POLL |
| 2574 | .poll_get_char = sci_poll_get_char, |
| 2575 | .poll_put_char = sci_poll_put_char, |
| 2576 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2577 | }; |
| 2578 | |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2579 | static int sci_init_clocks(struct sci_port *sci_port, struct device *dev) |
| 2580 | { |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2581 | const char *clk_names[] = { |
| 2582 | [SCI_FCK] = "fck", |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2583 | [SCI_SCK] = "sck", |
Geert Uytterhoeven | 1270f86 | 2015-11-18 11:25:53 +0100 | [diff] [blame] | 2584 | [SCI_BRG_INT] = "brg_int", |
| 2585 | [SCI_SCIF_CLK] = "scif_clk", |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2586 | }; |
| 2587 | struct clk *clk; |
| 2588 | unsigned int i; |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2589 | |
Geert Uytterhoeven | 6af27bf | 2015-11-18 11:12:26 +0100 | [diff] [blame] | 2590 | if (sci_port->cfg->type == PORT_HSCIF) |
| 2591 | clk_names[SCI_SCK] = "hsck"; |
| 2592 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2593 | for (i = 0; i < SCI_NUM_CLKS; i++) { |
| 2594 | clk = devm_clk_get(dev, clk_names[i]); |
| 2595 | if (PTR_ERR(clk) == -EPROBE_DEFER) |
| 2596 | return -EPROBE_DEFER; |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2597 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2598 | if (IS_ERR(clk) && i == SCI_FCK) { |
| 2599 | /* |
| 2600 | * "fck" used to be called "sci_ick", and we need to |
| 2601 | * maintain DT backward compatibility. |
| 2602 | */ |
| 2603 | clk = devm_clk_get(dev, "sci_ick"); |
| 2604 | if (PTR_ERR(clk) == -EPROBE_DEFER) |
| 2605 | return -EPROBE_DEFER; |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2606 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2607 | if (!IS_ERR(clk)) |
| 2608 | goto found; |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2609 | |
Geert Uytterhoeven | f4998e5 | 2015-10-26 09:58:16 +0100 | [diff] [blame] | 2610 | /* |
| 2611 | * Not all SH platforms declare a clock lookup entry |
| 2612 | * for SCI devices, in which case we need to get the |
| 2613 | * global "peripheral_clk" clock. |
| 2614 | */ |
| 2615 | clk = devm_clk_get(dev, "peripheral_clk"); |
| 2616 | if (!IS_ERR(clk)) |
| 2617 | goto found; |
| 2618 | |
| 2619 | dev_err(dev, "failed to get %s (%ld)\n", clk_names[i], |
| 2620 | PTR_ERR(clk)); |
| 2621 | return PTR_ERR(clk); |
| 2622 | } |
| 2623 | |
| 2624 | found: |
| 2625 | if (IS_ERR(clk)) |
| 2626 | dev_dbg(dev, "failed to get %s (%ld)\n", clk_names[i], |
| 2627 | PTR_ERR(clk)); |
| 2628 | else |
| 2629 | dev_dbg(dev, "clk %s is %pC rate %pCr\n", clk_names[i], |
| 2630 | clk, clk); |
| 2631 | sci_port->clks[i] = IS_ERR(clk) ? NULL : clk; |
| 2632 | } |
| 2633 | return 0; |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2634 | } |
| 2635 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 2636 | static int sci_init_single(struct platform_device *dev, |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2637 | struct sci_port *sci_port, unsigned int index, |
| 2638 | struct plat_sci_port *p, bool early) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2639 | { |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 2640 | struct uart_port *port = &sci_port->port; |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2641 | const struct resource *res; |
| 2642 | unsigned int i; |
Paul Mundt | 3127c6b | 2011-06-28 13:44:37 +0900 | [diff] [blame] | 2643 | int ret; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2644 | |
Paul Mundt | 50f0959 | 2011-12-02 20:09:48 +0900 | [diff] [blame] | 2645 | sci_port->cfg = p; |
| 2646 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 2647 | port->ops = &sci_uart_ops; |
| 2648 | port->iotype = UPIO_MEM; |
| 2649 | port->line = index; |
Markus Pietrek | 75136d4 | 2010-01-15 08:33:20 +0900 | [diff] [blame] | 2650 | |
Laurent Pinchart | 89b5c1a | 2013-12-06 10:59:52 +0100 | [diff] [blame] | 2651 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 2652 | if (res == NULL) |
| 2653 | return -ENOMEM; |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2654 | |
Laurent Pinchart | 89b5c1a | 2013-12-06 10:59:52 +0100 | [diff] [blame] | 2655 | port->mapbase = res->start; |
Yoshinori Sato | e4d6f91 | 2015-05-16 23:57:31 +0900 | [diff] [blame] | 2656 | sci_port->reg_size = resource_size(res); |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2657 | |
Laurent Pinchart | 89b5c1a | 2013-12-06 10:59:52 +0100 | [diff] [blame] | 2658 | for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) |
| 2659 | sci_port->irqs[i] = platform_get_irq(dev, i); |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2660 | |
Laurent Pinchart | 89b5c1a | 2013-12-06 10:59:52 +0100 | [diff] [blame] | 2661 | /* The SCI generates several interrupts. They can be muxed together or |
| 2662 | * connected to different interrupt lines. In the muxed case only one |
| 2663 | * interrupt resource is specified. In the non-muxed case three or four |
| 2664 | * interrupt resources are specified, as the BRI interrupt is optional. |
| 2665 | */ |
| 2666 | if (sci_port->irqs[0] < 0) |
| 2667 | return -ENXIO; |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2668 | |
Laurent Pinchart | 89b5c1a | 2013-12-06 10:59:52 +0100 | [diff] [blame] | 2669 | if (sci_port->irqs[1] < 0) { |
| 2670 | sci_port->irqs[1] = sci_port->irqs[0]; |
| 2671 | sci_port->irqs[2] = sci_port->irqs[0]; |
| 2672 | sci_port->irqs[3] = sci_port->irqs[0]; |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2673 | } |
| 2674 | |
Paul Mundt | 3127c6b | 2011-06-28 13:44:37 +0900 | [diff] [blame] | 2675 | if (p->regtype == SCIx_PROBE_REGTYPE) { |
| 2676 | ret = sci_probe_regmap(p); |
Rafael J. Wysocki | fc97114 | 2011-08-08 00:26:50 +0200 | [diff] [blame] | 2677 | if (unlikely(ret)) |
Paul Mundt | 3127c6b | 2011-06-28 13:44:37 +0900 | [diff] [blame] | 2678 | return ret; |
| 2679 | } |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 2680 | |
Laurent Pinchart | b545e4f | 2013-12-06 10:59:19 +0100 | [diff] [blame] | 2681 | switch (p->type) { |
| 2682 | case PORT_SCIFB: |
| 2683 | port->fifosize = 256; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 2684 | sci_port->overrun_reg = SCxSR; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 2685 | sci_port->overrun_mask = SCIFA_ORER; |
Geert Uytterhoeven | 92a0574 | 2016-01-04 14:45:22 +0100 | [diff] [blame] | 2686 | sci_port->sampling_rate_mask = SCI_SR_SCIFAB; |
Laurent Pinchart | b545e4f | 2013-12-06 10:59:19 +0100 | [diff] [blame] | 2687 | break; |
| 2688 | case PORT_HSCIF: |
| 2689 | port->fifosize = 128; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 2690 | sci_port->overrun_reg = SCLSR; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 2691 | sci_port->overrun_mask = SCLSR_ORER; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2692 | sci_port->sampling_rate_mask = SCI_SR_RANGE(8, 32); |
Laurent Pinchart | b545e4f | 2013-12-06 10:59:19 +0100 | [diff] [blame] | 2693 | break; |
| 2694 | case PORT_SCIFA: |
| 2695 | port->fifosize = 64; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 2696 | sci_port->overrun_reg = SCxSR; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 2697 | sci_port->overrun_mask = SCIFA_ORER; |
Geert Uytterhoeven | 92a0574 | 2016-01-04 14:45:22 +0100 | [diff] [blame] | 2698 | sci_port->sampling_rate_mask = SCI_SR_SCIFAB; |
Laurent Pinchart | b545e4f | 2013-12-06 10:59:19 +0100 | [diff] [blame] | 2699 | break; |
| 2700 | case PORT_SCIF: |
| 2701 | port->fifosize = 16; |
Laurent Pinchart | ec09c5e | 2013-12-06 10:59:20 +0100 | [diff] [blame] | 2702 | if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) { |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 2703 | sci_port->overrun_reg = SCxSR; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 2704 | sci_port->overrun_mask = SCIFA_ORER; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2705 | sci_port->sampling_rate_mask = SCI_SR(16); |
Laurent Pinchart | ec09c5e | 2013-12-06 10:59:20 +0100 | [diff] [blame] | 2706 | } else { |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 2707 | sci_port->overrun_reg = SCLSR; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 2708 | sci_port->overrun_mask = SCLSR_ORER; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2709 | sci_port->sampling_rate_mask = SCI_SR(32); |
Laurent Pinchart | ec09c5e | 2013-12-06 10:59:20 +0100 | [diff] [blame] | 2710 | } |
Laurent Pinchart | b545e4f | 2013-12-06 10:59:19 +0100 | [diff] [blame] | 2711 | break; |
| 2712 | default: |
| 2713 | port->fifosize = 1; |
Geert Uytterhoeven | 2e0842a | 2015-04-30 18:21:32 +0200 | [diff] [blame] | 2714 | sci_port->overrun_reg = SCxSR; |
Geert Uytterhoeven | 75c249f | 2015-04-30 18:21:31 +0200 | [diff] [blame] | 2715 | sci_port->overrun_mask = SCI_ORER; |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2716 | sci_port->sampling_rate_mask = SCI_SR(32); |
Laurent Pinchart | b545e4f | 2013-12-06 10:59:19 +0100 | [diff] [blame] | 2717 | break; |
| 2718 | } |
| 2719 | |
Laurent Pinchart | 878fbb9 | 2013-12-06 10:59:51 +0100 | [diff] [blame] | 2720 | /* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't |
| 2721 | * match the SoC datasheet, this should be investigated. Let platform |
| 2722 | * data override the sampling rate for now. |
Laurent Pinchart | ec09c5e | 2013-12-06 10:59:20 +0100 | [diff] [blame] | 2723 | */ |
Geert Uytterhoeven | f84b6bd | 2015-08-21 20:02:31 +0200 | [diff] [blame] | 2724 | if (p->sampling_rate) |
Geert Uytterhoeven | 69eee8e | 2016-01-04 14:45:21 +0100 | [diff] [blame] | 2725 | sci_port->sampling_rate_mask = SCI_SR(p->sampling_rate); |
Laurent Pinchart | ec09c5e | 2013-12-06 10:59:20 +0100 | [diff] [blame] | 2726 | |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2727 | if (!early) { |
Laurent Pinchart | a9ec81f | 2015-09-14 15:14:23 +0300 | [diff] [blame] | 2728 | ret = sci_init_clocks(sci_port, &dev->dev); |
| 2729 | if (ret < 0) |
| 2730 | return ret; |
Paul Mundt | c7ed1ab | 2010-03-10 18:35:14 +0900 | [diff] [blame] | 2731 | |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 2732 | port->dev = &dev->dev; |
Magnus Damm | 5e50d2d | 2011-04-19 10:38:25 +0000 | [diff] [blame] | 2733 | |
| 2734 | pm_runtime_enable(&dev->dev); |
Magnus Damm | 7b6fd3b | 2009-12-14 10:24:42 +0000 | [diff] [blame] | 2735 | } |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2736 | |
Magnus Damm | 7ed7e07 | 2009-01-21 15:14:14 +0000 | [diff] [blame] | 2737 | sci_port->break_timer.data = (unsigned long)sci_port; |
| 2738 | sci_port->break_timer.function = sci_break_timer; |
| 2739 | init_timer(&sci_port->break_timer); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2740 | |
Paul Mundt | debf950 | 2011-06-08 18:19:37 +0900 | [diff] [blame] | 2741 | /* |
| 2742 | * Establish some sensible defaults for the error detection. |
| 2743 | */ |
Geert Uytterhoeven | 5da0f46 | 2015-08-21 20:02:27 +0200 | [diff] [blame] | 2744 | if (p->type == PORT_SCI) { |
| 2745 | sci_port->error_mask = SCI_DEFAULT_ERROR_MASK; |
| 2746 | sci_port->error_clear = SCI_ERROR_CLEAR; |
| 2747 | } else { |
| 2748 | sci_port->error_mask = SCIF_DEFAULT_ERROR_MASK; |
| 2749 | sci_port->error_clear = SCIF_ERROR_CLEAR; |
| 2750 | } |
Paul Mundt | debf950 | 2011-06-08 18:19:37 +0900 | [diff] [blame] | 2751 | |
| 2752 | /* |
Laurent Pinchart | 3ae988d | 2013-12-06 10:59:17 +0100 | [diff] [blame] | 2753 | * Make the error mask inclusive of overrun detection, if |
| 2754 | * supported. |
| 2755 | */ |
Geert Uytterhoeven | 5da0f46 | 2015-08-21 20:02:27 +0200 | [diff] [blame] | 2756 | if (sci_port->overrun_reg == SCxSR) { |
Geert Uytterhoeven | afd66db | 2015-04-30 18:21:33 +0200 | [diff] [blame] | 2757 | sci_port->error_mask |= sci_port->overrun_mask; |
Geert Uytterhoeven | 5da0f46 | 2015-08-21 20:02:27 +0200 | [diff] [blame] | 2758 | sci_port->error_clear &= ~sci_port->overrun_mask; |
| 2759 | } |
Paul Mundt | debf950 | 2011-06-08 18:19:37 +0900 | [diff] [blame] | 2760 | |
Paul Mundt | ce6738b | 2011-01-19 15:24:40 +0900 | [diff] [blame] | 2761 | port->type = p->type; |
Laurent Pinchart | b6e4a3f | 2013-12-06 10:59:14 +0100 | [diff] [blame] | 2762 | port->flags = UPF_FIXED_PORT | p->flags; |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 2763 | port->regshift = p->regshift; |
Paul Mundt | ce6738b | 2011-01-19 15:24:40 +0900 | [diff] [blame] | 2764 | |
| 2765 | /* |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 2766 | * The UART port needs an IRQ value, so we peg this to the RX IRQ |
Paul Mundt | ce6738b | 2011-01-19 15:24:40 +0900 | [diff] [blame] | 2767 | * for the multi-IRQ ports, which is where we are primarily |
| 2768 | * concerned with the shutdown path synchronization. |
| 2769 | * |
| 2770 | * For the muxed case there's nothing more to do. |
| 2771 | */ |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2772 | port->irq = sci_port->irqs[SCIx_RXI_IRQ]; |
Yong Zhang | 9cfb5c0 | 2011-09-22 16:59:15 +0800 | [diff] [blame] | 2773 | port->irqflags = 0; |
Guennadi Liakhovetski | 73a19e4 | 2010-03-02 11:39:15 +0900 | [diff] [blame] | 2774 | |
Paul Mundt | 61a6976 | 2011-06-14 12:40:19 +0900 | [diff] [blame] | 2775 | port->serial_in = sci_serial_in; |
| 2776 | port->serial_out = sci_serial_out; |
| 2777 | |
Guennadi Liakhovetski | 937bb6e | 2011-06-24 13:56:15 +0200 | [diff] [blame] | 2778 | if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) |
| 2779 | dev_dbg(port->dev, "DMA tx %d, rx %d\n", |
| 2780 | p->dma_slave_tx, p->dma_slave_rx); |
Magnus Damm | 7ed7e07 | 2009-01-21 15:14:14 +0000 | [diff] [blame] | 2781 | |
Paul Mundt | c7ed1ab | 2010-03-10 18:35:14 +0900 | [diff] [blame] | 2782 | return 0; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2783 | } |
| 2784 | |
Laurent Pinchart | 6dae142 | 2012-06-13 00:28:23 +0200 | [diff] [blame] | 2785 | static void sci_cleanup_single(struct sci_port *port) |
| 2786 | { |
Laurent Pinchart | 6dae142 | 2012-06-13 00:28:23 +0200 | [diff] [blame] | 2787 | pm_runtime_disable(port->port.dev); |
| 2788 | } |
| 2789 | |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 2790 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || \ |
| 2791 | defined(CONFIG_SERIAL_SH_SCI_EARLYCON) |
Magnus Damm | dc8e6f5 | 2009-01-21 15:14:06 +0000 | [diff] [blame] | 2792 | static void serial_console_putchar(struct uart_port *port, int ch) |
| 2793 | { |
| 2794 | sci_poll_put_char(port, ch); |
| 2795 | } |
| 2796 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2797 | /* |
| 2798 | * Print a string to the serial port trying not to disturb |
| 2799 | * any possible real use of the port... |
| 2800 | */ |
| 2801 | static void serial_console_write(struct console *co, const char *s, |
| 2802 | unsigned count) |
| 2803 | { |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2804 | struct sci_port *sci_port = &sci_ports[co->index]; |
| 2805 | struct uart_port *port = &sci_port->port; |
Geert Uytterhoeven | a67969b | 2015-11-18 16:20:44 +0100 | [diff] [blame] | 2806 | unsigned short bits, ctrl, ctrl_temp; |
Shinya Kuribayashi | 40f70c0 | 2012-11-16 10:54:15 +0900 | [diff] [blame] | 2807 | unsigned long flags; |
| 2808 | int locked = 1; |
| 2809 | |
| 2810 | local_irq_save(flags); |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 2811 | #if defined(SUPPORT_SYSRQ) |
Shinya Kuribayashi | 40f70c0 | 2012-11-16 10:54:15 +0900 | [diff] [blame] | 2812 | if (port->sysrq) |
| 2813 | locked = 0; |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 2814 | else |
| 2815 | #endif |
| 2816 | if (oops_in_progress) |
Shinya Kuribayashi | 40f70c0 | 2012-11-16 10:54:15 +0900 | [diff] [blame] | 2817 | locked = spin_trylock(&port->lock); |
| 2818 | else |
| 2819 | spin_lock(&port->lock); |
| 2820 | |
Geert Uytterhoeven | a67969b | 2015-11-18 16:20:44 +0100 | [diff] [blame] | 2821 | /* first save SCSCR then disable interrupts, keep clock source */ |
Shinya Kuribayashi | 40f70c0 | 2012-11-16 10:54:15 +0900 | [diff] [blame] | 2822 | ctrl = serial_port_in(port, SCSCR); |
Geert Uytterhoeven | a67969b | 2015-11-18 16:20:44 +0100 | [diff] [blame] | 2823 | ctrl_temp = (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) | |
| 2824 | (ctrl & (SCSCR_CKE1 | SCSCR_CKE0)); |
| 2825 | serial_port_out(port, SCSCR, ctrl_temp); |
Paul Mundt | 07d2a1a | 2008-12-11 19:06:43 +0900 | [diff] [blame] | 2826 | |
Magnus Damm | 501b825 | 2009-01-21 15:14:30 +0000 | [diff] [blame] | 2827 | uart_console_write(port, s, count, serial_console_putchar); |
Magnus Damm | 973e5d5 | 2009-02-24 15:57:12 +0900 | [diff] [blame] | 2828 | |
| 2829 | /* wait until fifo is empty and last bit has been transmitted */ |
| 2830 | bits = SCxSR_TDxE(port) | SCxSR_TEND(port); |
Paul Mundt | b12bb29 | 2012-03-30 19:50:15 +0900 | [diff] [blame] | 2831 | while ((serial_port_in(port, SCxSR) & bits) != bits) |
Magnus Damm | 973e5d5 | 2009-02-24 15:57:12 +0900 | [diff] [blame] | 2832 | cpu_relax(); |
Shinya Kuribayashi | 40f70c0 | 2012-11-16 10:54:15 +0900 | [diff] [blame] | 2833 | |
| 2834 | /* restore the SCSCR */ |
| 2835 | serial_port_out(port, SCSCR, ctrl); |
| 2836 | |
| 2837 | if (locked) |
| 2838 | spin_unlock(&port->lock); |
| 2839 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2840 | } |
| 2841 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 2842 | static int serial_console_setup(struct console *co, char *options) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2843 | { |
Magnus Damm | dc8e6f5 | 2009-01-21 15:14:06 +0000 | [diff] [blame] | 2844 | struct sci_port *sci_port; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2845 | struct uart_port *port; |
| 2846 | int baud = 115200; |
| 2847 | int bits = 8; |
| 2848 | int parity = 'n'; |
| 2849 | int flow = 'n'; |
| 2850 | int ret; |
| 2851 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2852 | /* |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2853 | * Refuse to handle any bogus ports. |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2854 | */ |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2855 | if (co->index < 0 || co->index >= SCI_NPORTS) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2856 | return -ENODEV; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2857 | |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2858 | sci_port = &sci_ports[co->index]; |
| 2859 | port = &sci_port->port; |
| 2860 | |
Alexandre Courbot | b2267a6 | 2011-02-09 03:18:46 +0000 | [diff] [blame] | 2861 | /* |
| 2862 | * Refuse to handle uninitialized ports. |
| 2863 | */ |
| 2864 | if (!port->ops) |
| 2865 | return -ENODEV; |
| 2866 | |
Paul Mundt | f6e9495 | 2011-01-21 15:25:36 +0900 | [diff] [blame] | 2867 | ret = sci_remap_port(port); |
| 2868 | if (unlikely(ret != 0)) |
| 2869 | return ret; |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2870 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2871 | if (options) |
| 2872 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 2873 | |
Paul Mundt | ab7cfb5 | 2011-06-01 14:47:42 +0900 | [diff] [blame] | 2874 | return uart_set_options(port, co, baud, parity, bits, flow); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2875 | } |
| 2876 | |
| 2877 | static struct console serial_console = { |
| 2878 | .name = "ttySC", |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2879 | .device = uart_console_device, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2880 | .write = serial_console_write, |
| 2881 | .setup = serial_console_setup, |
Paul Mundt | fa5da2f | 2007-03-08 17:27:37 +0900 | [diff] [blame] | 2882 | .flags = CON_PRINTBUFFER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2883 | .index = -1, |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2884 | .data = &sci_uart_driver, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2885 | }; |
| 2886 | |
Magnus Damm | 7b6fd3b | 2009-12-14 10:24:42 +0000 | [diff] [blame] | 2887 | static struct console early_serial_console = { |
| 2888 | .name = "early_ttySC", |
| 2889 | .write = serial_console_write, |
| 2890 | .flags = CON_PRINTBUFFER, |
Paul Mundt | 906b17d | 2011-01-21 16:19:53 +0900 | [diff] [blame] | 2891 | .index = -1, |
Magnus Damm | 7b6fd3b | 2009-12-14 10:24:42 +0000 | [diff] [blame] | 2892 | }; |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2893 | |
Magnus Damm | 7b6fd3b | 2009-12-14 10:24:42 +0000 | [diff] [blame] | 2894 | static char early_serial_buf[32]; |
| 2895 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 2896 | static int sci_probe_earlyprintk(struct platform_device *pdev) |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2897 | { |
Jingoo Han | 574de55 | 2013-07-30 17:06:57 +0900 | [diff] [blame] | 2898 | struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev); |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2899 | |
| 2900 | if (early_serial_console.data) |
| 2901 | return -EEXIST; |
| 2902 | |
| 2903 | early_serial_console.index = pdev->id; |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2904 | |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 2905 | sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true); |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2906 | |
| 2907 | serial_console_setup(&early_serial_console, early_serial_buf); |
| 2908 | |
| 2909 | if (!strstr(early_serial_buf, "keep")) |
| 2910 | early_serial_console.flags |= CON_BOOT; |
| 2911 | |
| 2912 | register_console(&early_serial_console); |
| 2913 | return 0; |
| 2914 | } |
Nobuhiro Iwamatsu | 6a8c979 | 2011-03-24 02:20:56 +0000 | [diff] [blame] | 2915 | |
| 2916 | #define SCI_CONSOLE (&serial_console) |
| 2917 | |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2918 | #else |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 2919 | static inline int sci_probe_earlyprintk(struct platform_device *pdev) |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 2920 | { |
| 2921 | return -EINVAL; |
| 2922 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2923 | |
Nobuhiro Iwamatsu | 6a8c979 | 2011-03-24 02:20:56 +0000 | [diff] [blame] | 2924 | #define SCI_CONSOLE NULL |
| 2925 | |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 2926 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE || CONFIG_SERIAL_SH_SCI_EARLYCON */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2927 | |
Geert Uytterhoeven | 6c13d5d | 2014-03-11 11:11:17 +0100 | [diff] [blame] | 2928 | static const char banner[] __initconst = "SuperH (H)SCI(F) driver initialized"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2929 | |
| 2930 | static struct uart_driver sci_uart_driver = { |
| 2931 | .owner = THIS_MODULE, |
| 2932 | .driver_name = "sci", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2933 | .dev_name = "ttySC", |
| 2934 | .major = SCI_MAJOR, |
| 2935 | .minor = SCI_MINOR_START, |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 2936 | .nr = SCI_NPORTS, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2937 | .cons = SCI_CONSOLE, |
| 2938 | }; |
| 2939 | |
Paul Mundt | 54507f6 | 2009-05-08 23:48:33 +0900 | [diff] [blame] | 2940 | static int sci_remove(struct platform_device *dev) |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 2941 | { |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 2942 | struct sci_port *port = platform_get_drvdata(dev); |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 2943 | |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 2944 | uart_remove_one_port(&sci_uart_driver, &port->port); |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 2945 | |
Laurent Pinchart | 6dae142 | 2012-06-13 00:28:23 +0200 | [diff] [blame] | 2946 | sci_cleanup_single(port); |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 2947 | |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 2948 | return 0; |
| 2949 | } |
| 2950 | |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 2951 | |
| 2952 | #define SCI_OF_DATA(type, regtype) (void *)((type) << 16 | (regtype)) |
| 2953 | #define SCI_OF_TYPE(data) ((unsigned long)(data) >> 16) |
| 2954 | #define SCI_OF_REGTYPE(data) ((unsigned long)(data) & 0xffff) |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2955 | |
| 2956 | static const struct of_device_id of_sci_match[] = { |
Geert Uytterhoeven | f443ff8 | 2015-11-10 16:16:54 +0100 | [diff] [blame] | 2957 | /* SoC-specific types */ |
| 2958 | { |
| 2959 | .compatible = "renesas,scif-r7s72100", |
| 2960 | .data = SCI_OF_DATA(PORT_SCIF, SCIx_SH2_SCIF_FIFODATA_REGTYPE), |
| 2961 | }, |
Geert Uytterhoeven | 9ed44bb | 2015-11-10 18:57:23 +0100 | [diff] [blame] | 2962 | /* Family-specific types */ |
| 2963 | { |
| 2964 | .compatible = "renesas,rcar-gen1-scif", |
| 2965 | .data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_BRG_REGTYPE), |
| 2966 | }, { |
| 2967 | .compatible = "renesas,rcar-gen2-scif", |
| 2968 | .data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_BRG_REGTYPE), |
| 2969 | }, { |
| 2970 | .compatible = "renesas,rcar-gen3-scif", |
| 2971 | .data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_BRG_REGTYPE), |
| 2972 | }, |
Geert Uytterhoeven | f443ff8 | 2015-11-10 16:16:54 +0100 | [diff] [blame] | 2973 | /* Generic types */ |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2974 | { |
| 2975 | .compatible = "renesas,scif", |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 2976 | .data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_REGTYPE), |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2977 | }, { |
| 2978 | .compatible = "renesas,scifa", |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 2979 | .data = SCI_OF_DATA(PORT_SCIFA, SCIx_SCIFA_REGTYPE), |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2980 | }, { |
| 2981 | .compatible = "renesas,scifb", |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 2982 | .data = SCI_OF_DATA(PORT_SCIFB, SCIx_SCIFB_REGTYPE), |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2983 | }, { |
| 2984 | .compatible = "renesas,hscif", |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 2985 | .data = SCI_OF_DATA(PORT_HSCIF, SCIx_HSCIF_REGTYPE), |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2986 | }, { |
Yoshinori Sato | e1d0be6 | 2015-01-28 02:53:55 +0900 | [diff] [blame] | 2987 | .compatible = "renesas,sci", |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 2988 | .data = SCI_OF_DATA(PORT_SCI, SCIx_SCI_REGTYPE), |
Yoshinori Sato | e1d0be6 | 2015-01-28 02:53:55 +0900 | [diff] [blame] | 2989 | }, { |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 2990 | /* Terminator */ |
| 2991 | }, |
| 2992 | }; |
| 2993 | MODULE_DEVICE_TABLE(of, of_sci_match); |
| 2994 | |
| 2995 | static struct plat_sci_port * |
| 2996 | sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id) |
| 2997 | { |
| 2998 | struct device_node *np = pdev->dev.of_node; |
| 2999 | const struct of_device_id *match; |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3000 | struct plat_sci_port *p; |
| 3001 | int id; |
| 3002 | |
| 3003 | if (!IS_ENABLED(CONFIG_OF) || !np) |
| 3004 | return NULL; |
| 3005 | |
Geert Uytterhoeven | 495bb47 | 2015-12-10 16:02:17 +0100 | [diff] [blame] | 3006 | match = of_match_node(of_sci_match, np); |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3007 | if (!match) |
| 3008 | return NULL; |
| 3009 | |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3010 | p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); |
Geert Uytterhoeven | 4205463 | 2015-08-21 20:02:34 +0200 | [diff] [blame] | 3011 | if (!p) |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3012 | return NULL; |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3013 | |
Geert Uytterhoeven | 2095fc7 | 2015-11-12 13:39:49 +0100 | [diff] [blame] | 3014 | /* Get the line number from the aliases node. */ |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3015 | id = of_alias_get_id(np, "serial"); |
| 3016 | if (id < 0) { |
| 3017 | dev_err(&pdev->dev, "failed to get alias id (%d)\n", id); |
| 3018 | return NULL; |
| 3019 | } |
| 3020 | |
| 3021 | *dev_id = id; |
| 3022 | |
| 3023 | p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; |
Geert Uytterhoeven | bd2238f | 2015-11-10 16:09:23 +0100 | [diff] [blame] | 3024 | p->type = SCI_OF_TYPE(match->data); |
| 3025 | p->regtype = SCI_OF_REGTYPE(match->data); |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3026 | p->scscr = SCSCR_RE | SCSCR_TE; |
| 3027 | |
Geert Uytterhoeven | 861a70a | 2016-06-03 12:00:11 +0200 | [diff] [blame] | 3028 | if (of_find_property(np, "uart-has-rtscts", NULL)) |
| 3029 | p->capabilities |= SCIx_HAVE_RTSCTS; |
| 3030 | |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3031 | return p; |
| 3032 | } |
| 3033 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 3034 | static int sci_probe_single(struct platform_device *dev, |
Magnus Damm | 0ee7071 | 2009-01-21 15:13:50 +0000 | [diff] [blame] | 3035 | unsigned int index, |
| 3036 | struct plat_sci_port *p, |
| 3037 | struct sci_port *sciport) |
| 3038 | { |
Magnus Damm | 0ee7071 | 2009-01-21 15:13:50 +0000 | [diff] [blame] | 3039 | int ret; |
| 3040 | |
| 3041 | /* Sanity check */ |
| 3042 | if (unlikely(index >= SCI_NPORTS)) { |
Joe Perches | 9b971cd | 2014-03-11 10:10:46 -0700 | [diff] [blame] | 3043 | dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n", |
Magnus Damm | 0ee7071 | 2009-01-21 15:13:50 +0000 | [diff] [blame] | 3044 | index+1, SCI_NPORTS); |
Joe Perches | 9b971cd | 2014-03-11 10:10:46 -0700 | [diff] [blame] | 3045 | dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); |
Laurent Pinchart | b6c5ef6 | 2012-06-13 00:28:24 +0200 | [diff] [blame] | 3046 | return -EINVAL; |
Magnus Damm | 0ee7071 | 2009-01-21 15:13:50 +0000 | [diff] [blame] | 3047 | } |
| 3048 | |
Laurent Pinchart | 1fcc91a | 2013-12-06 10:59:16 +0100 | [diff] [blame] | 3049 | ret = sci_init_single(dev, sciport, index, p, false); |
Paul Mundt | c7ed1ab | 2010-03-10 18:35:14 +0900 | [diff] [blame] | 3050 | if (ret) |
| 3051 | return ret; |
Magnus Damm | 0ee7071 | 2009-01-21 15:13:50 +0000 | [diff] [blame] | 3052 | |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 3053 | sciport->gpios = mctrl_gpio_init(&sciport->port, 0); |
| 3054 | if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS) |
| 3055 | return PTR_ERR(sciport->gpios); |
| 3056 | |
| 3057 | if (p->capabilities & SCIx_HAVE_RTSCTS) { |
| 3058 | if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, |
| 3059 | UART_GPIO_CTS)) || |
| 3060 | !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, |
| 3061 | UART_GPIO_RTS))) { |
| 3062 | dev_err(&dev->dev, "Conflicting RTS/CTS config\n"); |
| 3063 | return -EINVAL; |
| 3064 | } |
Geert Uytterhoeven | 33f50ff | 2016-06-03 12:00:10 +0200 | [diff] [blame] | 3065 | sciport->port.flags |= UPF_HARD_FLOW; |
Geert Uytterhoeven | f907c9e | 2016-06-03 12:00:04 +0200 | [diff] [blame] | 3066 | } |
| 3067 | |
Laurent Pinchart | 6dae142 | 2012-06-13 00:28:23 +0200 | [diff] [blame] | 3068 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); |
| 3069 | if (ret) { |
| 3070 | sci_cleanup_single(sciport); |
| 3071 | return ret; |
| 3072 | } |
| 3073 | |
| 3074 | return 0; |
Magnus Damm | 0ee7071 | 2009-01-21 15:13:50 +0000 | [diff] [blame] | 3075 | } |
| 3076 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 3077 | static int sci_probe(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3078 | { |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3079 | struct plat_sci_port *p; |
| 3080 | struct sci_port *sp; |
| 3081 | unsigned int dev_id; |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 3082 | int ret; |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 3083 | |
Paul Mundt | ecdf8a4 | 2011-01-21 00:05:48 +0900 | [diff] [blame] | 3084 | /* |
| 3085 | * If we've come here via earlyprintk initialization, head off to |
| 3086 | * the special early probe. We don't have sufficient device state |
| 3087 | * to make it beyond this yet. |
| 3088 | */ |
| 3089 | if (is_early_platform_device(dev)) |
| 3090 | return sci_probe_earlyprintk(dev); |
Magnus Damm | 7b6fd3b | 2009-12-14 10:24:42 +0000 | [diff] [blame] | 3091 | |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3092 | if (dev->dev.of_node) { |
| 3093 | p = sci_parse_dt(dev, &dev_id); |
| 3094 | if (p == NULL) |
| 3095 | return -EINVAL; |
| 3096 | } else { |
| 3097 | p = dev->dev.platform_data; |
| 3098 | if (p == NULL) { |
| 3099 | dev_err(&dev->dev, "no platform data supplied\n"); |
| 3100 | return -EINVAL; |
| 3101 | } |
| 3102 | |
| 3103 | dev_id = dev->id; |
| 3104 | } |
| 3105 | |
| 3106 | sp = &sci_ports[dev_id]; |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 3107 | platform_set_drvdata(dev, sp); |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 3108 | |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3109 | ret = sci_probe_single(dev, dev_id, p, sp); |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 3110 | if (ret) |
Laurent Pinchart | 6dae142 | 2012-06-13 00:28:23 +0200 | [diff] [blame] | 3111 | return ret; |
Magnus Damm | e552de2 | 2009-01-21 15:13:42 +0000 | [diff] [blame] | 3112 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3113 | #ifdef CONFIG_SH_STANDARD_BIOS |
| 3114 | sh_bios_gdb_detach(); |
| 3115 | #endif |
| 3116 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3117 | return 0; |
| 3118 | } |
| 3119 | |
Sergei Shtylyov | cb87634 | 2015-01-16 13:56:02 -0800 | [diff] [blame] | 3120 | static __maybe_unused int sci_suspend(struct device *dev) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3121 | { |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 3122 | struct sci_port *sport = dev_get_drvdata(dev); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3123 | |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 3124 | if (sport) |
| 3125 | uart_suspend_port(&sci_uart_driver, &sport->port); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3126 | |
| 3127 | return 0; |
| 3128 | } |
| 3129 | |
Sergei Shtylyov | cb87634 | 2015-01-16 13:56:02 -0800 | [diff] [blame] | 3130 | static __maybe_unused int sci_resume(struct device *dev) |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3131 | { |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 3132 | struct sci_port *sport = dev_get_drvdata(dev); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3133 | |
Paul Mundt | d535a23 | 2011-01-19 17:19:35 +0900 | [diff] [blame] | 3134 | if (sport) |
| 3135 | uart_resume_port(&sci_uart_driver, &sport->port); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3136 | |
| 3137 | return 0; |
| 3138 | } |
| 3139 | |
Sergei Shtylyov | cb87634 | 2015-01-16 13:56:02 -0800 | [diff] [blame] | 3140 | static SIMPLE_DEV_PM_OPS(sci_dev_pm_ops, sci_suspend, sci_resume); |
Paul Mundt | 6daa79b | 2009-06-15 07:07:38 +0900 | [diff] [blame] | 3141 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3142 | static struct platform_driver sci_driver = { |
| 3143 | .probe = sci_probe, |
Uwe Kleine-König | b9e39c8 | 2009-11-24 22:07:32 +0100 | [diff] [blame] | 3144 | .remove = sci_remove, |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3145 | .driver = { |
| 3146 | .name = "sh-sci", |
Paul Mundt | 6daa79b | 2009-06-15 07:07:38 +0900 | [diff] [blame] | 3147 | .pm = &sci_dev_pm_ops, |
Bastian Hecht | 20bdcab | 2013-12-06 10:59:54 +0100 | [diff] [blame] | 3148 | .of_match_table = of_match_ptr(of_sci_match), |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3149 | }, |
| 3150 | }; |
| 3151 | |
| 3152 | static int __init sci_init(void) |
| 3153 | { |
| 3154 | int ret; |
| 3155 | |
Geert Uytterhoeven | 6c13d5d | 2014-03-11 11:11:17 +0100 | [diff] [blame] | 3156 | pr_info("%s\n", banner); |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3157 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3158 | ret = uart_register_driver(&sci_uart_driver); |
| 3159 | if (likely(ret == 0)) { |
| 3160 | ret = platform_driver_register(&sci_driver); |
| 3161 | if (unlikely(ret)) |
| 3162 | uart_unregister_driver(&sci_uart_driver); |
| 3163 | } |
| 3164 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3165 | return ret; |
| 3166 | } |
| 3167 | |
| 3168 | static void __exit sci_exit(void) |
| 3169 | { |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3170 | platform_driver_unregister(&sci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3171 | uart_unregister_driver(&sci_uart_driver); |
| 3172 | } |
| 3173 | |
Magnus Damm | 7b6fd3b | 2009-12-14 10:24:42 +0000 | [diff] [blame] | 3174 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
| 3175 | early_platform_init_buffer("earlyprintk", &sci_driver, |
| 3176 | early_serial_buf, ARRAY_SIZE(early_serial_buf)); |
| 3177 | #endif |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 3178 | #ifdef CONFIG_SERIAL_SH_SCI_EARLYCON |
| 3179 | static struct __init plat_sci_port port_cfg; |
| 3180 | |
| 3181 | static int __init early_console_setup(struct earlycon_device *device, |
| 3182 | int type) |
| 3183 | { |
| 3184 | if (!device->port.membase) |
| 3185 | return -ENODEV; |
| 3186 | |
| 3187 | device->port.serial_in = sci_serial_in; |
| 3188 | device->port.serial_out = sci_serial_out; |
| 3189 | device->port.type = type; |
| 3190 | memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port)); |
| 3191 | sci_ports[0].cfg = &port_cfg; |
| 3192 | sci_ports[0].cfg->type = type; |
| 3193 | sci_probe_regmap(sci_ports[0].cfg); |
| 3194 | port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR) | |
| 3195 | SCSCR_RE | SCSCR_TE; |
| 3196 | sci_serial_out(&sci_ports[0].port, SCSCR, port_cfg.scscr); |
| 3197 | |
| 3198 | device->con->write = serial_console_write; |
| 3199 | return 0; |
| 3200 | } |
| 3201 | static int __init sci_early_console_setup(struct earlycon_device *device, |
| 3202 | const char *opt) |
| 3203 | { |
| 3204 | return early_console_setup(device, PORT_SCI); |
| 3205 | } |
| 3206 | static int __init scif_early_console_setup(struct earlycon_device *device, |
| 3207 | const char *opt) |
| 3208 | { |
| 3209 | return early_console_setup(device, PORT_SCIF); |
| 3210 | } |
| 3211 | static int __init scifa_early_console_setup(struct earlycon_device *device, |
| 3212 | const char *opt) |
| 3213 | { |
| 3214 | return early_console_setup(device, PORT_SCIFA); |
| 3215 | } |
| 3216 | static int __init scifb_early_console_setup(struct earlycon_device *device, |
| 3217 | const char *opt) |
| 3218 | { |
| 3219 | return early_console_setup(device, PORT_SCIFB); |
| 3220 | } |
| 3221 | static int __init hscif_early_console_setup(struct earlycon_device *device, |
| 3222 | const char *opt) |
| 3223 | { |
| 3224 | return early_console_setup(device, PORT_HSCIF); |
| 3225 | } |
| 3226 | |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 3227 | OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup); |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 3228 | OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup); |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 3229 | OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup); |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 3230 | OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup); |
Yoshinori Sato | 0b0cced | 2015-12-24 11:24:48 +0100 | [diff] [blame] | 3231 | OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup); |
| 3232 | #endif /* CONFIG_SERIAL_SH_SCI_EARLYCON */ |
| 3233 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3234 | module_init(sci_init); |
| 3235 | module_exit(sci_exit); |
| 3236 | |
Paul Mundt | e108b2c | 2006-09-27 16:32:13 +0900 | [diff] [blame] | 3237 | MODULE_LICENSE("GPL"); |
Kay Sievers | e169c13 | 2008-04-15 14:34:35 -0700 | [diff] [blame] | 3238 | MODULE_ALIAS("platform:sh-sci"); |
Paul Mundt | 7f405f9 | 2011-06-28 13:47:40 +0900 | [diff] [blame] | 3239 | MODULE_AUTHOR("Paul Mundt"); |
Ulrich Hecht | f303b36 | 2013-05-31 17:57:01 +0200 | [diff] [blame] | 3240 | MODULE_DESCRIPTION("SuperH (H)SCI(F) serial driver"); |