Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008 Atheros Communications Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 17 | #include "core.h" |
| 18 | |
| 19 | /* |
| 20 | * Setup and link descriptors. |
| 21 | * |
| 22 | * 11N: we can no longer afford to self link the last descriptor. |
| 23 | * MAC acknowledges BA status as long as it copies frames to host |
| 24 | * buffer (or rx fifo). This can incorrectly acknowledge packets |
| 25 | * to a sender if last desc is self-linked. |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 26 | */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 27 | static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) |
| 28 | { |
| 29 | struct ath_hal *ah = sc->sc_ah; |
| 30 | struct ath_desc *ds; |
| 31 | struct sk_buff *skb; |
| 32 | |
| 33 | ATH_RXBUF_RESET(bf); |
| 34 | |
| 35 | ds = bf->bf_desc; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 36 | ds->ds_link = 0; /* link to null */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 37 | ds->ds_data = bf->bf_buf_addr; |
| 38 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 39 | /* virtual addr of the beginning of the buffer. */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 40 | skb = bf->bf_mpdu; |
| 41 | ASSERT(skb != NULL); |
| 42 | ds->ds_vdata = skb->data; |
| 43 | |
Luis R. Rodriguez | b4b6cda | 2008-11-20 17:15:13 -0800 | [diff] [blame] | 44 | /* setup rx descriptors. The sc_rxbufsize here tells the harware |
| 45 | * how much data it can DMA to us and that we are prepared |
| 46 | * to process */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 47 | ath9k_hw_setuprxdesc(ah, |
| 48 | ds, |
Luis R. Rodriguez | b4b6cda | 2008-11-20 17:15:13 -0800 | [diff] [blame] | 49 | sc->sc_rxbufsize, |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 50 | 0); |
| 51 | |
| 52 | if (sc->sc_rxlink == NULL) |
| 53 | ath9k_hw_putrxbuf(ah, bf->bf_daddr); |
| 54 | else |
| 55 | *sc->sc_rxlink = bf->bf_daddr; |
| 56 | |
| 57 | sc->sc_rxlink = &ds->ds_link; |
| 58 | ath9k_hw_rxena(ah); |
| 59 | } |
| 60 | |
Sujith | ff37e33 | 2008-11-24 12:07:55 +0530 | [diff] [blame] | 61 | static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) |
| 62 | { |
| 63 | /* XXX block beacon interrupts */ |
| 64 | ath9k_hw_setantenna(sc->sc_ah, antenna); |
| 65 | sc->sc_defant = antenna; |
| 66 | sc->sc_rxotherant = 0; |
| 67 | } |
| 68 | |
| 69 | /* |
| 70 | * Extend 15-bit time stamp from rx descriptor to |
| 71 | * a full 64-bit TSF using the current h/w TSF. |
| 72 | */ |
| 73 | static u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp) |
| 74 | { |
| 75 | u64 tsf; |
| 76 | |
| 77 | tsf = ath9k_hw_gettsf64(sc->sc_ah); |
| 78 | if ((tsf & 0x7fff) < rstamp) |
| 79 | tsf -= 0x8000; |
| 80 | return (tsf & ~0x7fff) | rstamp; |
| 81 | } |
| 82 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 83 | static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc, u32 len) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 84 | { |
| 85 | struct sk_buff *skb; |
| 86 | u32 off; |
| 87 | |
| 88 | /* |
| 89 | * Cache-line-align. This is important (for the |
| 90 | * 5210 at least) as not doing so causes bogus data |
| 91 | * in rx'd frames. |
| 92 | */ |
| 93 | |
Luis R. Rodriguez | b4b6cda | 2008-11-20 17:15:13 -0800 | [diff] [blame] | 94 | /* Note: the kernel can allocate a value greater than |
| 95 | * what we ask it to give us. We really only need 4 KB as that |
| 96 | * is this hardware supports and in fact we need at least 3849 |
| 97 | * as that is the MAX AMSDU size this hardware supports. |
| 98 | * Unfortunately this means we may get 8 KB here from the |
| 99 | * kernel... and that is actually what is observed on some |
| 100 | * systems :( */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 101 | skb = dev_alloc_skb(len + sc->sc_cachelsz - 1); |
| 102 | if (skb != NULL) { |
| 103 | off = ((unsigned long) skb->data) % sc->sc_cachelsz; |
| 104 | if (off != 0) |
| 105 | skb_reserve(skb, sc->sc_cachelsz - off); |
| 106 | } else { |
| 107 | DPRINTF(sc, ATH_DBG_FATAL, |
| 108 | "%s: skbuff alloc of size %u failed\n", |
| 109 | __func__, len); |
| 110 | return NULL; |
| 111 | } |
| 112 | |
| 113 | return skb; |
| 114 | } |
| 115 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 116 | static int ath_rate2idx(struct ath_softc *sc, int rate) |
| 117 | { |
| 118 | int i = 0, cur_band, n_rates; |
| 119 | struct ieee80211_hw *hw = sc->hw; |
| 120 | |
| 121 | cur_band = hw->conf.channel->band; |
| 122 | n_rates = sc->sbands[cur_band].n_bitrates; |
| 123 | |
| 124 | for (i = 0; i < n_rates; i++) { |
| 125 | if (sc->sbands[cur_band].bitrates[i].bitrate == rate) |
| 126 | break; |
| 127 | } |
| 128 | |
| 129 | /* |
| 130 | * NB:mac80211 validates rx rate index against the supported legacy rate |
| 131 | * index only (should be done against ht rates also), return the highest |
| 132 | * legacy rate index for rx rate which does not match any one of the |
| 133 | * supported basic and extended rates to make mac80211 happy. |
| 134 | * The following hack will be cleaned up once the issue with |
| 135 | * the rx rate index validation in mac80211 is fixed. |
| 136 | */ |
| 137 | if (i == n_rates) |
| 138 | return n_rates - 1; |
| 139 | |
| 140 | return i; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 141 | } |
| 142 | |
| 143 | /* |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 144 | * For Decrypt or Demic errors, we only mark packet status here and always push |
| 145 | * up the frame up to let mac80211 handle the actual error case, be it no |
| 146 | * decryption key or real decryption error. This let us keep statistics there. |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 147 | */ |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 148 | static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds, |
| 149 | struct ieee80211_rx_status *rx_status, bool *decrypt_error, |
| 150 | struct ath_softc *sc) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 151 | { |
Sujith | e63835b | 2008-11-18 09:07:53 +0530 | [diff] [blame] | 152 | struct ath_rate_table *rate_table = sc->hw_rate_table[sc->sc_curmode]; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 153 | struct ieee80211_hdr *hdr; |
Sujith | e63835b | 2008-11-18 09:07:53 +0530 | [diff] [blame] | 154 | int ratekbps, rix; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 155 | u8 ratecode; |
| 156 | __le16 fc; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 157 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 158 | hdr = (struct ieee80211_hdr *)skb->data; |
| 159 | fc = hdr->frame_control; |
| 160 | memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 161 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 162 | if (ds->ds_rxstat.rs_more) { |
| 163 | /* |
| 164 | * Frame spans multiple descriptors; this cannot happen yet |
| 165 | * as we don't support jumbograms. If not in monitor mode, |
| 166 | * discard the frame. Enable this if you want to see |
| 167 | * error frames in Monitor mode. |
| 168 | */ |
| 169 | if (sc->sc_ah->ah_opmode != ATH9K_M_MONITOR) |
| 170 | goto rx_next; |
| 171 | } else if (ds->ds_rxstat.rs_status != 0) { |
| 172 | if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC) |
| 173 | rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; |
| 174 | if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY) |
| 175 | goto rx_next; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 176 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 177 | if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) { |
| 178 | *decrypt_error = true; |
| 179 | } else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) { |
| 180 | if (ieee80211_is_ctl(fc)) |
| 181 | /* |
| 182 | * Sometimes, we get invalid |
| 183 | * MIC failures on valid control frames. |
| 184 | * Remove these mic errors. |
| 185 | */ |
| 186 | ds->ds_rxstat.rs_status &= ~ATH9K_RXERR_MIC; |
| 187 | else |
| 188 | rx_status->flag |= RX_FLAG_MMIC_ERROR; |
| 189 | } |
| 190 | /* |
| 191 | * Reject error frames with the exception of |
| 192 | * decryption and MIC failures. For monitor mode, |
| 193 | * we also ignore the CRC error. |
| 194 | */ |
| 195 | if (sc->sc_ah->ah_opmode == ATH9K_M_MONITOR) { |
| 196 | if (ds->ds_rxstat.rs_status & |
| 197 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | |
| 198 | ATH9K_RXERR_CRC)) |
| 199 | goto rx_next; |
| 200 | } else { |
| 201 | if (ds->ds_rxstat.rs_status & |
| 202 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { |
| 203 | goto rx_next; |
| 204 | } |
| 205 | } |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 206 | } |
| 207 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 208 | ratecode = ds->ds_rxstat.rs_rate; |
Sujith | e63835b | 2008-11-18 09:07:53 +0530 | [diff] [blame] | 209 | rix = rate_table->rateCodeToIndex[ratecode]; |
| 210 | ratekbps = rate_table->info[rix].ratekbps; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 211 | |
| 212 | /* HT rate */ |
| 213 | if (ratecode & 0x80) { |
| 214 | if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040) |
| 215 | ratekbps = (ratekbps * 27) / 13; |
| 216 | if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI) |
| 217 | ratekbps = (ratekbps * 10) / 9; |
| 218 | } |
| 219 | |
| 220 | rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp); |
| 221 | rx_status->band = sc->hw->conf.channel->band; |
| 222 | rx_status->freq = sc->hw->conf.channel->center_freq; |
| 223 | rx_status->noise = sc->sc_ani.sc_noise_floor; |
| 224 | rx_status->signal = rx_status->noise + ds->ds_rxstat.rs_rssi; |
| 225 | rx_status->rate_idx = ath_rate2idx(sc, (ratekbps / 100)); |
| 226 | rx_status->antenna = ds->ds_rxstat.rs_antenna; |
| 227 | |
| 228 | /* at 45 you will be able to use MCS 15 reliably. A more elaborate |
| 229 | * scheme can be used here but it requires tables of SNR/throughput for |
| 230 | * each possible mode used. */ |
| 231 | rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 45; |
| 232 | |
| 233 | /* rssi can be more than 45 though, anything above that |
| 234 | * should be considered at 100% */ |
| 235 | if (rx_status->qual > 100) |
| 236 | rx_status->qual = 100; |
| 237 | |
| 238 | rx_status->flag |= RX_FLAG_TSFT; |
| 239 | |
| 240 | return 1; |
| 241 | rx_next: |
| 242 | return 0; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 243 | } |
| 244 | |
| 245 | static void ath_opmode_init(struct ath_softc *sc) |
| 246 | { |
| 247 | struct ath_hal *ah = sc->sc_ah; |
| 248 | u32 rfilt, mfilt[2]; |
| 249 | |
| 250 | /* configure rx filter */ |
| 251 | rfilt = ath_calcrxfilter(sc); |
| 252 | ath9k_hw_setrxfilter(ah, rfilt); |
| 253 | |
| 254 | /* configure bssid mask */ |
Sujith | 60b67f5 | 2008-08-07 10:52:38 +0530 | [diff] [blame] | 255 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 256 | ath9k_hw_setbssidmask(ah, sc->sc_bssidmask); |
| 257 | |
| 258 | /* configure operational mode */ |
| 259 | ath9k_hw_setopmode(ah); |
| 260 | |
| 261 | /* Handle any link-level address change. */ |
| 262 | ath9k_hw_setmac(ah, sc->sc_myaddr); |
| 263 | |
| 264 | /* calculate and install multicast filter */ |
| 265 | mfilt[0] = mfilt[1] = ~0; |
| 266 | |
| 267 | ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]); |
| 268 | DPRINTF(sc, ATH_DBG_CONFIG , |
| 269 | "%s: RX filter 0x%x, MC filter %08x:%08x\n", |
| 270 | __func__, rfilt, mfilt[0], mfilt[1]); |
| 271 | } |
| 272 | |
| 273 | int ath_rx_init(struct ath_softc *sc, int nbufs) |
| 274 | { |
| 275 | struct sk_buff *skb; |
| 276 | struct ath_buf *bf; |
| 277 | int error = 0; |
| 278 | |
| 279 | do { |
| 280 | spin_lock_init(&sc->sc_rxflushlock); |
Sujith | 98deeea | 2008-08-11 14:05:46 +0530 | [diff] [blame] | 281 | sc->sc_flags &= ~SC_OP_RXFLUSH; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 282 | spin_lock_init(&sc->sc_rxbuflock); |
| 283 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 284 | sc->sc_rxbufsize = roundup(IEEE80211_MAX_MPDU_LEN, |
| 285 | min(sc->sc_cachelsz, |
| 286 | (u16)64)); |
| 287 | |
| 288 | DPRINTF(sc, ATH_DBG_CONFIG, "%s: cachelsz %u rxbufsize %u\n", |
| 289 | __func__, sc->sc_cachelsz, sc->sc_rxbufsize); |
| 290 | |
| 291 | /* Initialize rx descriptors */ |
| 292 | |
| 293 | error = ath_descdma_setup(sc, &sc->sc_rxdma, &sc->sc_rxbuf, |
| 294 | "rx", nbufs, 1); |
| 295 | if (error != 0) { |
| 296 | DPRINTF(sc, ATH_DBG_FATAL, |
| 297 | "%s: failed to allocate rx descriptors: %d\n", |
| 298 | __func__, error); |
| 299 | break; |
| 300 | } |
| 301 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 302 | list_for_each_entry(bf, &sc->sc_rxbuf, list) { |
| 303 | skb = ath_rxbuf_alloc(sc, sc->sc_rxbufsize); |
| 304 | if (skb == NULL) { |
| 305 | error = -ENOMEM; |
| 306 | break; |
| 307 | } |
| 308 | |
| 309 | bf->bf_mpdu = skb; |
Sujith | 927e70e | 2008-08-14 13:26:34 +0530 | [diff] [blame] | 310 | bf->bf_buf_addr = pci_map_single(sc->pdev, skb->data, |
Luis R. Rodriguez | ca0c7e5 | 2008-11-20 17:15:12 -0800 | [diff] [blame] | 311 | sc->sc_rxbufsize, |
Sujith | 927e70e | 2008-08-14 13:26:34 +0530 | [diff] [blame] | 312 | PCI_DMA_FROMDEVICE); |
| 313 | bf->bf_dmacontext = bf->bf_buf_addr; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 314 | } |
| 315 | sc->sc_rxlink = NULL; |
| 316 | |
| 317 | } while (0); |
| 318 | |
| 319 | if (error) |
| 320 | ath_rx_cleanup(sc); |
| 321 | |
| 322 | return error; |
| 323 | } |
| 324 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 325 | void ath_rx_cleanup(struct ath_softc *sc) |
| 326 | { |
| 327 | struct sk_buff *skb; |
| 328 | struct ath_buf *bf; |
| 329 | |
| 330 | list_for_each_entry(bf, &sc->sc_rxbuf, list) { |
| 331 | skb = bf->bf_mpdu; |
| 332 | if (skb) |
| 333 | dev_kfree_skb(skb); |
| 334 | } |
| 335 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 336 | if (sc->sc_rxdma.dd_desc_len != 0) |
| 337 | ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf); |
| 338 | } |
| 339 | |
| 340 | /* |
| 341 | * Calculate the receive filter according to the |
| 342 | * operating mode and state: |
| 343 | * |
| 344 | * o always accept unicast, broadcast, and multicast traffic |
| 345 | * o maintain current state of phy error reception (the hal |
| 346 | * may enable phy error frames for noise immunity work) |
| 347 | * o probe request frames are accepted only when operating in |
| 348 | * hostap, adhoc, or monitor modes |
| 349 | * o enable promiscuous mode according to the interface state |
| 350 | * o accept beacons: |
| 351 | * - when operating in adhoc mode so the 802.11 layer creates |
| 352 | * node table entries for peers, |
| 353 | * - when operating in station mode for collecting rssi data when |
| 354 | * the station is otherwise quiet, or |
| 355 | * - when operating as a repeater so we see repeater-sta beacons |
| 356 | * - when scanning |
| 357 | */ |
| 358 | |
| 359 | u32 ath_calcrxfilter(struct ath_softc *sc) |
| 360 | { |
| 361 | #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR) |
Sujith | 7dcfdcd | 2008-08-11 14:03:13 +0530 | [diff] [blame] | 362 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 363 | u32 rfilt; |
| 364 | |
| 365 | rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE) |
| 366 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST |
| 367 | | ATH9K_RX_FILTER_MCAST; |
| 368 | |
| 369 | /* If not a STA, enable processing of Probe Requests */ |
Sujith | b4696c8b | 2008-08-11 14:04:52 +0530 | [diff] [blame] | 370 | if (sc->sc_ah->ah_opmode != ATH9K_M_STA) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 371 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; |
| 372 | |
| 373 | /* Can't set HOSTAP into promiscous mode */ |
Sujith | b4696c8b | 2008-08-11 14:04:52 +0530 | [diff] [blame] | 374 | if (((sc->sc_ah->ah_opmode != ATH9K_M_HOSTAP) && |
Sujith | 7dcfdcd | 2008-08-11 14:03:13 +0530 | [diff] [blame] | 375 | (sc->rx_filter & FIF_PROMISC_IN_BSS)) || |
Sujith | b4696c8b | 2008-08-11 14:04:52 +0530 | [diff] [blame] | 376 | (sc->sc_ah->ah_opmode == ATH9K_M_MONITOR)) { |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 377 | rfilt |= ATH9K_RX_FILTER_PROM; |
| 378 | /* ??? To prevent from sending ACK */ |
| 379 | rfilt &= ~ATH9K_RX_FILTER_UCAST; |
| 380 | } |
| 381 | |
Luis R. Rodriguez | ffb8267 | 2008-11-03 14:43:01 -0800 | [diff] [blame] | 382 | if (sc->sc_ah->ah_opmode == ATH9K_M_STA || |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 383 | sc->sc_ah->ah_opmode == ATH9K_M_IBSS) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 384 | rfilt |= ATH9K_RX_FILTER_BEACON; |
| 385 | |
| 386 | /* If in HOSTAP mode, want to enable reception of PSPOLL frames |
| 387 | & beacon frames */ |
Sujith | b4696c8b | 2008-08-11 14:04:52 +0530 | [diff] [blame] | 388 | if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 389 | rfilt |= (ATH9K_RX_FILTER_BEACON | ATH9K_RX_FILTER_PSPOLL); |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 390 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 391 | return rfilt; |
Sujith | 7dcfdcd | 2008-08-11 14:03:13 +0530 | [diff] [blame] | 392 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 393 | #undef RX_FILTER_PRESERVE |
| 394 | } |
| 395 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 396 | int ath_startrecv(struct ath_softc *sc) |
| 397 | { |
| 398 | struct ath_hal *ah = sc->sc_ah; |
| 399 | struct ath_buf *bf, *tbf; |
| 400 | |
| 401 | spin_lock_bh(&sc->sc_rxbuflock); |
| 402 | if (list_empty(&sc->sc_rxbuf)) |
| 403 | goto start_recv; |
| 404 | |
| 405 | sc->sc_rxlink = NULL; |
| 406 | list_for_each_entry_safe(bf, tbf, &sc->sc_rxbuf, list) { |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 407 | ath_rx_buf_link(sc, bf); |
| 408 | } |
| 409 | |
| 410 | /* We could have deleted elements so the list may be empty now */ |
| 411 | if (list_empty(&sc->sc_rxbuf)) |
| 412 | goto start_recv; |
| 413 | |
| 414 | bf = list_first_entry(&sc->sc_rxbuf, struct ath_buf, list); |
| 415 | ath9k_hw_putrxbuf(ah, bf->bf_daddr); |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 416 | ath9k_hw_rxena(ah); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 417 | |
| 418 | start_recv: |
| 419 | spin_unlock_bh(&sc->sc_rxbuflock); |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 420 | ath_opmode_init(sc); |
| 421 | ath9k_hw_startpcureceive(ah); |
| 422 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 423 | return 0; |
| 424 | } |
| 425 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 426 | bool ath_stoprecv(struct ath_softc *sc) |
| 427 | { |
| 428 | struct ath_hal *ah = sc->sc_ah; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 429 | bool stopped; |
| 430 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 431 | ath9k_hw_stoppcurecv(ah); |
| 432 | ath9k_hw_setrxfilter(ah, 0); |
| 433 | stopped = ath9k_hw_stopdmarecv(ah); |
| 434 | mdelay(3); /* 3ms is long enough for 1 frame */ |
| 435 | sc->sc_rxlink = NULL; |
| 436 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 437 | return stopped; |
| 438 | } |
| 439 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 440 | void ath_flushrecv(struct ath_softc *sc) |
| 441 | { |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 442 | spin_lock_bh(&sc->sc_rxflushlock); |
Sujith | 98deeea | 2008-08-11 14:05:46 +0530 | [diff] [blame] | 443 | sc->sc_flags |= SC_OP_RXFLUSH; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 444 | ath_rx_tasklet(sc, 1); |
Sujith | 98deeea | 2008-08-11 14:05:46 +0530 | [diff] [blame] | 445 | sc->sc_flags &= ~SC_OP_RXFLUSH; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 446 | spin_unlock_bh(&sc->sc_rxflushlock); |
| 447 | } |
| 448 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 449 | int ath_rx_tasklet(struct ath_softc *sc, int flush) |
| 450 | { |
| 451 | #define PA2DESC(_sc, _pa) \ |
| 452 | ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \ |
| 453 | ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr))) |
| 454 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 455 | struct ath_buf *bf; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 456 | struct ath_desc *ds; |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 457 | struct sk_buff *skb = NULL, *requeue_skb; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 458 | struct ieee80211_rx_status rx_status; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 459 | struct ath_hal *ah = sc->sc_ah; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 460 | struct ieee80211_hdr *hdr; |
| 461 | int hdrlen, padsize, retval; |
| 462 | bool decrypt_error = false; |
| 463 | u8 keyix; |
| 464 | |
| 465 | spin_lock_bh(&sc->sc_rxbuflock); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 466 | |
| 467 | do { |
| 468 | /* If handling rx interrupt and flush is in progress => exit */ |
Sujith | 98deeea | 2008-08-11 14:05:46 +0530 | [diff] [blame] | 469 | if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0)) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 470 | break; |
| 471 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 472 | if (list_empty(&sc->sc_rxbuf)) { |
| 473 | sc->sc_rxlink = NULL; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 474 | break; |
| 475 | } |
| 476 | |
| 477 | bf = list_first_entry(&sc->sc_rxbuf, struct ath_buf, list); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 478 | ds = bf->bf_desc; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 479 | |
| 480 | /* |
| 481 | * Must provide the virtual address of the current |
| 482 | * descriptor, the physical address, and the virtual |
| 483 | * address of the next descriptor in the h/w chain. |
| 484 | * This allows the HAL to look ahead to see if the |
| 485 | * hardware is done with a descriptor by checking the |
| 486 | * done bit in the following descriptor and the address |
| 487 | * of the current descriptor the DMA engine is working |
| 488 | * on. All this is necessary because of our use of |
| 489 | * a self-linked list to avoid rx overruns. |
| 490 | */ |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 491 | retval = ath9k_hw_rxprocdesc(ah, ds, |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 492 | bf->bf_daddr, |
| 493 | PA2DESC(sc, ds->ds_link), |
| 494 | 0); |
| 495 | if (retval == -EINPROGRESS) { |
| 496 | struct ath_buf *tbf; |
| 497 | struct ath_desc *tds; |
| 498 | |
| 499 | if (list_is_last(&bf->list, &sc->sc_rxbuf)) { |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 500 | sc->sc_rxlink = NULL; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 501 | break; |
| 502 | } |
| 503 | |
| 504 | tbf = list_entry(bf->list.next, struct ath_buf, list); |
| 505 | |
| 506 | /* |
| 507 | * On some hardware the descriptor status words could |
| 508 | * get corrupted, including the done bit. Because of |
| 509 | * this, check if the next descriptor's done bit is |
| 510 | * set or not. |
| 511 | * |
| 512 | * If the next descriptor's done bit is set, the current |
| 513 | * descriptor has been corrupted. Force s/w to discard |
| 514 | * this descriptor and continue... |
| 515 | */ |
| 516 | |
| 517 | tds = tbf->bf_desc; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 518 | retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr, |
| 519 | PA2DESC(sc, tds->ds_link), 0); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 520 | if (retval == -EINPROGRESS) { |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 521 | break; |
| 522 | } |
| 523 | } |
| 524 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 525 | skb = bf->bf_mpdu; |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 526 | if (!skb) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 527 | continue; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 528 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 529 | /* |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 530 | * If we're asked to flush receive queue, directly |
| 531 | * chain it back at the queue without processing it. |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 532 | */ |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 533 | if (flush) |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 534 | goto requeue; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 535 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 536 | if (!ds->ds_rxstat.rs_datalen) |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 537 | goto requeue; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 538 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 539 | /* The status portion of the descriptor could get corrupted. */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 540 | if (sc->sc_rxbufsize < ds->ds_rxstat.rs_datalen) |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 541 | goto requeue; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 542 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 543 | if (!ath_rx_prepare(skb, ds, &rx_status, &decrypt_error, sc)) |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 544 | goto requeue; |
| 545 | |
| 546 | /* Ensure we always have an skb to requeue once we are done |
| 547 | * processing the current buffer's skb */ |
| 548 | requeue_skb = ath_rxbuf_alloc(sc, sc->sc_rxbufsize); |
| 549 | |
| 550 | /* If there is no memory we ignore the current RX'd frame, |
| 551 | * tell hardware it can give us a new frame using the old |
| 552 | * skb and put it at the tail of the sc->sc_rxbuf list for |
| 553 | * processing. */ |
| 554 | if (!requeue_skb) |
| 555 | goto requeue; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 556 | |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 557 | pci_dma_sync_single_for_cpu(sc->pdev, |
| 558 | bf->bf_buf_addr, |
Luis R. Rodriguez | ca0c7e5 | 2008-11-20 17:15:12 -0800 | [diff] [blame] | 559 | sc->sc_rxbufsize, |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 560 | PCI_DMA_FROMDEVICE); |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 561 | pci_unmap_single(sc->pdev, bf->bf_buf_addr, |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 562 | sc->sc_rxbufsize, |
| 563 | PCI_DMA_FROMDEVICE); |
| 564 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 565 | skb_put(skb, ds->ds_rxstat.rs_datalen); |
| 566 | skb->protocol = cpu_to_be16(ETH_P_CONTROL); |
| 567 | |
| 568 | /* see if any padding is done by the hw and remove it */ |
| 569 | hdr = (struct ieee80211_hdr *)skb->data; |
| 570 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); |
| 571 | |
| 572 | if (hdrlen & 3) { |
| 573 | padsize = hdrlen % 4; |
| 574 | memmove(skb->data + padsize, skb->data, hdrlen); |
| 575 | skb_pull(skb, padsize); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 576 | } |
| 577 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 578 | keyix = ds->ds_rxstat.rs_keyix; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 579 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 580 | if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) { |
| 581 | rx_status.flag |= RX_FLAG_DECRYPTED; |
| 582 | } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED) |
| 583 | && !decrypt_error && skb->len >= hdrlen + 4) { |
| 584 | keyix = skb->data[hdrlen + 3] >> 6; |
| 585 | |
| 586 | if (test_bit(keyix, sc->sc_keymap)) |
| 587 | rx_status.flag |= RX_FLAG_DECRYPTED; |
| 588 | } |
| 589 | |
| 590 | /* Send the frame to mac80211 */ |
| 591 | __ieee80211_rx(sc->hw, skb, &rx_status); |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 592 | |
| 593 | /* We will now give hardware our shiny new allocated skb */ |
| 594 | bf->bf_mpdu = requeue_skb; |
| 595 | bf->bf_buf_addr = pci_map_single(sc->pdev, requeue_skb->data, |
| 596 | sc->sc_rxbufsize, |
| 597 | PCI_DMA_FROMDEVICE); |
| 598 | bf->bf_dmacontext = bf->bf_buf_addr; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 599 | |
| 600 | /* |
| 601 | * change the default rx antenna if rx diversity chooses the |
| 602 | * other antenna 3 times in a row. |
| 603 | */ |
| 604 | if (sc->sc_defant != ds->ds_rxstat.rs_antenna) { |
| 605 | if (++sc->sc_rxotherant >= 3) |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 606 | ath_setdefantenna(sc, ds->ds_rxstat.rs_antenna); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 607 | } else { |
| 608 | sc->sc_rxotherant = 0; |
| 609 | } |
Luis R. Rodriguez | cb71d9b | 2008-11-21 17:41:33 -0800 | [diff] [blame] | 610 | requeue: |
| 611 | list_move_tail(&bf->list, &sc->sc_rxbuf); |
| 612 | ath_rx_buf_link(sc, bf); |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 613 | } while (1); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 614 | |
Sujith | be0418a | 2008-11-18 09:05:55 +0530 | [diff] [blame] | 615 | spin_unlock_bh(&sc->sc_rxbuflock); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 616 | |
| 617 | return 0; |
| 618 | #undef PA2DESC |
| 619 | } |