blob: 3d882b70af16e59ebcf2059415cbe4204870a079 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Ben Gamari20172632009-02-17 20:08:50 -050032#include "drmP.h"
33#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010034#include "intel_drv.h"
Ben Gamari20172632009-02-17 20:08:50 -050035#include "i915_drm.h"
36#include "i915_drv.h"
37
38#define DRM_I915_RING_DEBUG 1
39
40
41#if defined(CONFIG_DEBUG_FS)
42
Ben Gamari433e12f2009-02-17 20:08:51 -050043#define ACTIVE_LIST 1
44#define FLUSHING_LIST 2
45#define INACTIVE_LIST 3
46
Chris Wilson70d39fe2010-08-25 16:03:34 +010047static const char *yesno(int v)
48{
49 return v ? "yes" : "no";
50}
51
52static int i915_capabilities(struct seq_file *m, void *data)
53{
54 struct drm_info_node *node = (struct drm_info_node *) m->private;
55 struct drm_device *dev = node->minor->dev;
56 const struct intel_device_info *info = INTEL_INFO(dev);
57
58 seq_printf(m, "gen: %d\n", info->gen);
59#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
60 B(is_mobile);
61 B(is_i8xx);
62 B(is_i85x);
63 B(is_i915g);
64 B(is_i9xx);
65 B(is_i945gm);
66 B(is_i965g);
67 B(is_i965gm);
68 B(is_g33);
69 B(need_gfx_hws);
70 B(is_g4x);
71 B(is_pineview);
72 B(is_broadwater);
73 B(is_crestline);
74 B(is_ironlake);
75 B(has_fbc);
76 B(has_rc6);
77 B(has_pipe_cxsr);
78 B(has_hotplug);
79 B(cursor_needs_physical);
80 B(has_overlay);
81 B(overlay_needs_physical);
82#undef B
83
84 return 0;
85}
86
Chris Wilsona6172a82009-02-11 14:26:38 +000087static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
88{
89 if (obj_priv->user_pin_count > 0)
90 return "P";
91 else if (obj_priv->pin_count > 0)
92 return "p";
93 else
94 return " ";
95}
96
97static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
98{
99 switch (obj_priv->tiling_mode) {
100 default:
101 case I915_TILING_NONE: return " ";
102 case I915_TILING_X: return "X";
103 case I915_TILING_Y: return "Y";
104 }
105}
106
Chris Wilson37811fc2010-08-25 22:45:57 +0100107static void
108describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
109{
110 seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
111 &obj->base,
112 get_pin_flag(obj),
113 get_tiling_flag(obj),
114 obj->base.size,
115 obj->base.read_domains,
116 obj->base.write_domain,
117 obj->last_rendering_seqno,
118 obj->dirty ? " dirty" : "",
119 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
120 if (obj->base.name)
121 seq_printf(m, " (name: %d)", obj->base.name);
122 if (obj->fence_reg != I915_FENCE_REG_NONE)
123 seq_printf(m, " (fence: %d)", obj->fence_reg);
124 if (obj->gtt_space != NULL)
125 seq_printf(m, " (gtt_offset: %08x)", obj->gtt_offset);
126}
127
Ben Gamari433e12f2009-02-17 20:08:51 -0500128static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500129{
130 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500131 uintptr_t list = (uintptr_t) node->info_ent->data;
132 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500133 struct drm_device *dev = node->minor->dev;
134 drm_i915_private_t *dev_priv = dev->dev_private;
135 struct drm_i915_gem_object *obj_priv;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100136 int ret;
137
138 ret = mutex_lock_interruptible(&dev->struct_mutex);
139 if (ret)
140 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500141
Ben Gamari433e12f2009-02-17 20:08:51 -0500142 switch (list) {
143 case ACTIVE_LIST:
144 seq_printf(m, "Active:\n");
Zou Nan hai852835f2010-05-21 09:08:56 +0800145 head = &dev_priv->render_ring.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500146 break;
147 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400148 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500149 head = &dev_priv->mm.inactive_list;
150 break;
151 case FLUSHING_LIST:
152 seq_printf(m, "Flushing:\n");
153 head = &dev_priv->mm.flushing_list;
154 break;
155 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100156 mutex_unlock(&dev->struct_mutex);
157 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500158 }
159
Chris Wilsonde227ef2010-07-03 07:58:38 +0100160 list_for_each_entry(obj_priv, head, list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100161 seq_printf(m, " ");
162 describe_obj(m, obj_priv);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800163 seq_printf(m, "\n");
Ben Gamari20172632009-02-17 20:08:50 -0500164 }
Carl Worth5e118f42009-03-20 11:54:25 -0700165
Chris Wilsonde227ef2010-07-03 07:58:38 +0100166 mutex_unlock(&dev->struct_mutex);
Ben Gamari20172632009-02-17 20:08:50 -0500167 return 0;
168}
169
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100170static int i915_gem_pageflip_info(struct seq_file *m, void *data)
171{
172 struct drm_info_node *node = (struct drm_info_node *) m->private;
173 struct drm_device *dev = node->minor->dev;
174 unsigned long flags;
175 struct intel_crtc *crtc;
176
177 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
178 const char *pipe = crtc->pipe ? "B" : "A";
179 const char *plane = crtc->plane ? "B" : "A";
180 struct intel_unpin_work *work;
181
182 spin_lock_irqsave(&dev->event_lock, flags);
183 work = crtc->unpin_work;
184 if (work == NULL) {
185 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
186 pipe, plane);
187 } else {
188 if (!work->pending) {
189 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
190 pipe, plane);
191 } else {
192 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
193 pipe, plane);
194 }
195 if (work->enable_stall_check)
196 seq_printf(m, "Stall check enabled, ");
197 else
198 seq_printf(m, "Stall check waiting for page flip ioctl, ");
199 seq_printf(m, "%d prepares\n", work->pending);
200
201 if (work->old_fb_obj) {
202 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
203 if(obj_priv)
204 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
205 }
206 if (work->pending_flip_obj) {
207 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
208 if(obj_priv)
209 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
210 }
211 }
212 spin_unlock_irqrestore(&dev->event_lock, flags);
213 }
214
215 return 0;
216}
217
Ben Gamari20172632009-02-17 20:08:50 -0500218static int i915_gem_request_info(struct seq_file *m, void *data)
219{
220 struct drm_info_node *node = (struct drm_info_node *) m->private;
221 struct drm_device *dev = node->minor->dev;
222 drm_i915_private_t *dev_priv = dev->dev_private;
223 struct drm_i915_gem_request *gem_request;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100224 int ret;
225
226 ret = mutex_lock_interruptible(&dev->struct_mutex);
227 if (ret)
228 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500229
230 seq_printf(m, "Request:\n");
Zou Nan hai852835f2010-05-21 09:08:56 +0800231 list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
232 list) {
Ben Gamari20172632009-02-17 20:08:50 -0500233 seq_printf(m, " %d @ %d\n",
234 gem_request->seqno,
235 (int) (jiffies - gem_request->emitted_jiffies));
236 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100237 mutex_unlock(&dev->struct_mutex);
238
Ben Gamari20172632009-02-17 20:08:50 -0500239 return 0;
240}
241
242static int i915_gem_seqno_info(struct seq_file *m, void *data)
243{
244 struct drm_info_node *node = (struct drm_info_node *) m->private;
245 struct drm_device *dev = node->minor->dev;
246 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100247 int ret;
248
249 ret = mutex_lock_interruptible(&dev->struct_mutex);
250 if (ret)
251 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500252
Eric Anholte20f9c62010-05-26 14:51:06 -0700253 if (dev_priv->render_ring.status_page.page_addr != NULL) {
Ben Gamari20172632009-02-17 20:08:50 -0500254 seq_printf(m, "Current sequence: %d\n",
Zou Nan hai852835f2010-05-21 09:08:56 +0800255 i915_get_gem_seqno(dev, &dev_priv->render_ring));
Ben Gamari20172632009-02-17 20:08:50 -0500256 } else {
257 seq_printf(m, "Current sequence: hws uninitialized\n");
258 }
259 seq_printf(m, "Waiter sequence: %d\n",
260 dev_priv->mm.waiting_gem_seqno);
261 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100262
263 mutex_unlock(&dev->struct_mutex);
264
Ben Gamari20172632009-02-17 20:08:50 -0500265 return 0;
266}
267
268
269static int i915_interrupt_info(struct seq_file *m, void *data)
270{
271 struct drm_info_node *node = (struct drm_info_node *) m->private;
272 struct drm_device *dev = node->minor->dev;
273 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100274 int ret;
275
276 ret = mutex_lock_interruptible(&dev->struct_mutex);
277 if (ret)
278 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500279
Eric Anholtbad720f2009-10-22 16:11:14 -0700280 if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800281 seq_printf(m, "Interrupt enable: %08x\n",
282 I915_READ(IER));
283 seq_printf(m, "Interrupt identity: %08x\n",
284 I915_READ(IIR));
285 seq_printf(m, "Interrupt mask: %08x\n",
286 I915_READ(IMR));
287 seq_printf(m, "Pipe A stat: %08x\n",
288 I915_READ(PIPEASTAT));
289 seq_printf(m, "Pipe B stat: %08x\n",
290 I915_READ(PIPEBSTAT));
291 } else {
292 seq_printf(m, "North Display Interrupt enable: %08x\n",
293 I915_READ(DEIER));
294 seq_printf(m, "North Display Interrupt identity: %08x\n",
295 I915_READ(DEIIR));
296 seq_printf(m, "North Display Interrupt mask: %08x\n",
297 I915_READ(DEIMR));
298 seq_printf(m, "South Display Interrupt enable: %08x\n",
299 I915_READ(SDEIER));
300 seq_printf(m, "South Display Interrupt identity: %08x\n",
301 I915_READ(SDEIIR));
302 seq_printf(m, "South Display Interrupt mask: %08x\n",
303 I915_READ(SDEIMR));
304 seq_printf(m, "Graphics Interrupt enable: %08x\n",
305 I915_READ(GTIER));
306 seq_printf(m, "Graphics Interrupt identity: %08x\n",
307 I915_READ(GTIIR));
308 seq_printf(m, "Graphics Interrupt mask: %08x\n",
309 I915_READ(GTIMR));
310 }
Ben Gamari20172632009-02-17 20:08:50 -0500311 seq_printf(m, "Interrupts received: %d\n",
312 atomic_read(&dev_priv->irq_received));
Eric Anholte20f9c62010-05-26 14:51:06 -0700313 if (dev_priv->render_ring.status_page.page_addr != NULL) {
Ben Gamari20172632009-02-17 20:08:50 -0500314 seq_printf(m, "Current sequence: %d\n",
Zou Nan hai852835f2010-05-21 09:08:56 +0800315 i915_get_gem_seqno(dev, &dev_priv->render_ring));
Ben Gamari20172632009-02-17 20:08:50 -0500316 } else {
317 seq_printf(m, "Current sequence: hws uninitialized\n");
318 }
319 seq_printf(m, "Waiter sequence: %d\n",
320 dev_priv->mm.waiting_gem_seqno);
321 seq_printf(m, "IRQ sequence: %d\n",
322 dev_priv->mm.irq_gem_seqno);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100323 mutex_unlock(&dev->struct_mutex);
324
Ben Gamari20172632009-02-17 20:08:50 -0500325 return 0;
326}
327
Chris Wilsona6172a82009-02-11 14:26:38 +0000328static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
329{
330 struct drm_info_node *node = (struct drm_info_node *) m->private;
331 struct drm_device *dev = node->minor->dev;
332 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100333 int i, ret;
334
335 ret = mutex_lock_interruptible(&dev->struct_mutex);
336 if (ret)
337 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000338
339 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
340 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
341 for (i = 0; i < dev_priv->num_fence_regs; i++) {
342 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
343
344 if (obj == NULL) {
345 seq_printf(m, "Fenced object[%2d] = unused\n", i);
346 } else {
347 struct drm_i915_gem_object *obj_priv;
348
Daniel Vetter23010e42010-03-08 13:35:02 +0100349 obj_priv = to_intel_bo(obj);
Chris Wilsona6172a82009-02-11 14:26:38 +0000350 seq_printf(m, "Fenced object[%2d] = %p: %s "
Linus Torvalds0b4d5692009-03-27 17:02:09 -0700351 "%08x %08zx %08x %s %08x %08x %d",
Chris Wilsona6172a82009-02-11 14:26:38 +0000352 i, obj, get_pin_flag(obj_priv),
353 obj_priv->gtt_offset,
354 obj->size, obj_priv->stride,
355 get_tiling_flag(obj_priv),
356 obj->read_domains, obj->write_domain,
357 obj_priv->last_rendering_seqno);
358 if (obj->name)
359 seq_printf(m, " (name: %d)", obj->name);
360 seq_printf(m, "\n");
361 }
362 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100363 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000364
365 return 0;
366}
367
Ben Gamari20172632009-02-17 20:08:50 -0500368static int i915_hws_info(struct seq_file *m, void *data)
369{
370 struct drm_info_node *node = (struct drm_info_node *) m->private;
371 struct drm_device *dev = node->minor->dev;
372 drm_i915_private_t *dev_priv = dev->dev_private;
373 int i;
374 volatile u32 *hws;
375
Eric Anholte20f9c62010-05-26 14:51:06 -0700376 hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500377 if (hws == NULL)
378 return 0;
379
380 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
381 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
382 i * 4,
383 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
384 }
385 return 0;
386}
387
Ben Gamari6911a9b2009-04-02 11:24:54 -0700388static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
389{
390 int page, i;
391 uint32_t *mem;
392
393 for (page = 0; page < page_count; page++) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100394 mem = kmap(pages[page]);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700395 for (i = 0; i < PAGE_SIZE; i += 4)
396 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100397 kunmap(pages[page]);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700398 }
399}
400
401static int i915_batchbuffer_info(struct seq_file *m, void *data)
402{
403 struct drm_info_node *node = (struct drm_info_node *) m->private;
404 struct drm_device *dev = node->minor->dev;
405 drm_i915_private_t *dev_priv = dev->dev_private;
406 struct drm_gem_object *obj;
407 struct drm_i915_gem_object *obj_priv;
408 int ret;
409
Chris Wilsonde227ef2010-07-03 07:58:38 +0100410 ret = mutex_lock_interruptible(&dev->struct_mutex);
411 if (ret)
412 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700413
Zou Nan hai852835f2010-05-21 09:08:56 +0800414 list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list,
415 list) {
Daniel Vettera8089e82010-04-09 19:05:09 +0000416 obj = &obj_priv->base;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700417 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
Chris Wilson4bdadb92010-01-27 13:36:32 +0000418 ret = i915_gem_object_get_pages(obj, 0);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700419 if (ret) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100420 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700421 return ret;
422 }
423
424 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
425 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
426
427 i915_gem_object_put_pages(obj);
428 }
429 }
430
Chris Wilsonde227ef2010-07-03 07:58:38 +0100431 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700432
433 return 0;
434}
435
436static int i915_ringbuffer_data(struct seq_file *m, void *data)
437{
438 struct drm_info_node *node = (struct drm_info_node *) m->private;
439 struct drm_device *dev = node->minor->dev;
440 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100441 int ret;
442
443 ret = mutex_lock_interruptible(&dev->struct_mutex);
444 if (ret)
445 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700446
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800447 if (!dev_priv->render_ring.gem_object) {
Ben Gamari6911a9b2009-04-02 11:24:54 -0700448 seq_printf(m, "No ringbuffer setup\n");
Chris Wilsonde227ef2010-07-03 07:58:38 +0100449 } else {
450 u8 *virt = dev_priv->render_ring.virtual_start;
451 uint32_t off;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700452
Chris Wilsonde227ef2010-07-03 07:58:38 +0100453 for (off = 0; off < dev_priv->render_ring.size; off += 4) {
454 uint32_t *ptr = (uint32_t *)(virt + off);
455 seq_printf(m, "%08x : %08x\n", off, *ptr);
456 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700457 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100458 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700459
460 return 0;
461}
462
463static int i915_ringbuffer_info(struct seq_file *m, void *data)
464{
465 struct drm_info_node *node = (struct drm_info_node *) m->private;
466 struct drm_device *dev = node->minor->dev;
467 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson0ef82af2009-09-05 18:07:06 +0100468 unsigned int head, tail;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700469
470 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
471 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700472
473 seq_printf(m, "RingHead : %08x\n", head);
474 seq_printf(m, "RingTail : %08x\n", tail);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800475 seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
Ben Gamari76cff812009-06-10 18:26:20 -0400476 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
Ben Gamari6911a9b2009-04-02 11:24:54 -0700477
478 return 0;
479}
480
Chris Wilson9df30792010-02-18 10:24:56 +0000481static const char *pin_flag(int pinned)
482{
483 if (pinned > 0)
484 return " P";
485 else if (pinned < 0)
486 return " p";
487 else
488 return "";
489}
490
491static const char *tiling_flag(int tiling)
492{
493 switch (tiling) {
494 default:
495 case I915_TILING_NONE: return "";
496 case I915_TILING_X: return " X";
497 case I915_TILING_Y: return " Y";
498 }
499}
500
501static const char *dirty_flag(int dirty)
502{
503 return dirty ? " dirty" : "";
504}
505
506static const char *purgeable_flag(int purgeable)
507{
508 return purgeable ? " purgeable" : "";
509}
510
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700511static int i915_error_state(struct seq_file *m, void *unused)
512{
513 struct drm_info_node *node = (struct drm_info_node *) m->private;
514 struct drm_device *dev = node->minor->dev;
515 drm_i915_private_t *dev_priv = dev->dev_private;
516 struct drm_i915_error_state *error;
517 unsigned long flags;
Chris Wilson9df30792010-02-18 10:24:56 +0000518 int i, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700519
520 spin_lock_irqsave(&dev_priv->error_lock, flags);
521 if (!dev_priv->first_error) {
522 seq_printf(m, "no error state collected\n");
523 goto out;
524 }
525
526 error = dev_priv->first_error;
527
Jesse Barnes8a905232009-07-11 16:48:03 -0400528 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
529 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000530 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700531 seq_printf(m, "EIR: 0x%08x\n", error->eir);
532 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
533 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
534 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
535 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
536 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
537 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
538 if (IS_I965G(dev)) {
539 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
540 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
541 }
Chris Wilson9df30792010-02-18 10:24:56 +0000542 seq_printf(m, "seqno: 0x%08x\n", error->seqno);
543
544 if (error->active_bo_count) {
545 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
546
547 for (i = 0; i < error->active_bo_count; i++) {
548 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
549 error->active_bo[i].gtt_offset,
550 error->active_bo[i].size,
551 error->active_bo[i].read_domains,
552 error->active_bo[i].write_domain,
553 error->active_bo[i].seqno,
554 pin_flag(error->active_bo[i].pinned),
555 tiling_flag(error->active_bo[i].tiling),
556 dirty_flag(error->active_bo[i].dirty),
557 purgeable_flag(error->active_bo[i].purgeable));
558
559 if (error->active_bo[i].name)
560 seq_printf(m, " (name: %d)", error->active_bo[i].name);
561 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
562 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
563
564 seq_printf(m, "\n");
565 }
566 }
567
568 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
569 if (error->batchbuffer[i]) {
570 struct drm_i915_error_object *obj = error->batchbuffer[i];
571
572 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
573 offset = 0;
574 for (page = 0; page < obj->page_count; page++) {
575 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
576 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
577 offset += 4;
578 }
579 }
580 }
581 }
582
583 if (error->ringbuffer) {
584 struct drm_i915_error_object *obj = error->ringbuffer;
585
586 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
587 offset = 0;
588 for (page = 0; page < obj->page_count; page++) {
589 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
590 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
591 offset += 4;
592 }
593 }
594 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700595
Chris Wilson6ef3d422010-08-04 20:26:07 +0100596 if (error->overlay)
597 intel_overlay_print_error_state(m, error->overlay);
598
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700599out:
600 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
601
602 return 0;
603}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700604
Jesse Barnesf97108d2010-01-29 11:27:07 -0800605static int i915_rstdby_delays(struct seq_file *m, void *unused)
606{
607 struct drm_info_node *node = (struct drm_info_node *) m->private;
608 struct drm_device *dev = node->minor->dev;
609 drm_i915_private_t *dev_priv = dev->dev_private;
610 u16 crstanddelay = I915_READ16(CRSTANDVID);
611
612 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
613
614 return 0;
615}
616
617static int i915_cur_delayinfo(struct seq_file *m, void *unused)
618{
619 struct drm_info_node *node = (struct drm_info_node *) m->private;
620 struct drm_device *dev = node->minor->dev;
621 drm_i915_private_t *dev_priv = dev->dev_private;
622 u16 rgvswctl = I915_READ16(MEMSWCTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700623 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800624
Jesse Barnes7648fa92010-05-20 14:28:11 -0700625 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
626 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
627 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
628 MEMSTAT_VID_SHIFT);
629 seq_printf(m, "Current P-state: %d\n",
630 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800631
632 return 0;
633}
634
635static int i915_delayfreq_table(struct seq_file *m, void *unused)
636{
637 struct drm_info_node *node = (struct drm_info_node *) m->private;
638 struct drm_device *dev = node->minor->dev;
639 drm_i915_private_t *dev_priv = dev->dev_private;
640 u32 delayfreq;
641 int i;
642
643 for (i = 0; i < 16; i++) {
644 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700645 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
646 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800647 }
648
649 return 0;
650}
651
652static inline int MAP_TO_MV(int map)
653{
654 return 1250 - (map * 25);
655}
656
657static int i915_inttoext_table(struct seq_file *m, void *unused)
658{
659 struct drm_info_node *node = (struct drm_info_node *) m->private;
660 struct drm_device *dev = node->minor->dev;
661 drm_i915_private_t *dev_priv = dev->dev_private;
662 u32 inttoext;
663 int i;
664
665 for (i = 1; i <= 32; i++) {
666 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
667 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
668 }
669
670 return 0;
671}
672
673static int i915_drpc_info(struct seq_file *m, void *unused)
674{
675 struct drm_info_node *node = (struct drm_info_node *) m->private;
676 struct drm_device *dev = node->minor->dev;
677 drm_i915_private_t *dev_priv = dev->dev_private;
678 u32 rgvmodectl = I915_READ(MEMMODECTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700679 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
680 u16 crstandvid = I915_READ16(CRSTANDVID);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800681
682 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
683 "yes" : "no");
684 seq_printf(m, "Boost freq: %d\n",
685 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
686 MEMMODE_BOOST_FREQ_SHIFT);
687 seq_printf(m, "HW control enabled: %s\n",
688 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
689 seq_printf(m, "SW control enabled: %s\n",
690 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
691 seq_printf(m, "Gated voltage change: %s\n",
692 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
693 seq_printf(m, "Starting frequency: P%d\n",
694 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700695 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -0800696 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700697 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
698 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
699 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
700 seq_printf(m, "Render standby enabled: %s\n",
701 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnesf97108d2010-01-29 11:27:07 -0800702
703 return 0;
704}
705
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800706static int i915_fbc_status(struct seq_file *m, void *unused)
707{
708 struct drm_info_node *node = (struct drm_info_node *) m->private;
709 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800710 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800711
Adam Jacksonee5382a2010-04-23 11:17:39 -0400712 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800713 seq_printf(m, "FBC unsupported on this chipset\n");
714 return 0;
715 }
716
Adam Jacksonee5382a2010-04-23 11:17:39 -0400717 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800718 seq_printf(m, "FBC enabled\n");
719 } else {
720 seq_printf(m, "FBC disabled: ");
721 switch (dev_priv->no_fbc_reason) {
722 case FBC_STOLEN_TOO_SMALL:
723 seq_printf(m, "not enough stolen memory");
724 break;
725 case FBC_UNSUPPORTED_MODE:
726 seq_printf(m, "mode not supported");
727 break;
728 case FBC_MODE_TOO_LARGE:
729 seq_printf(m, "mode too large");
730 break;
731 case FBC_BAD_PLANE:
732 seq_printf(m, "FBC unsupported on plane");
733 break;
734 case FBC_NOT_TILED:
735 seq_printf(m, "scanout buffer not tiled");
736 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -0700737 case FBC_MULTIPLE_PIPES:
738 seq_printf(m, "multiple pipes are enabled");
739 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800740 default:
741 seq_printf(m, "unknown reason");
742 }
743 seq_printf(m, "\n");
744 }
745 return 0;
746}
747
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800748static int i915_sr_status(struct seq_file *m, void *unused)
749{
750 struct drm_info_node *node = (struct drm_info_node *) m->private;
751 struct drm_device *dev = node->minor->dev;
752 drm_i915_private_t *dev_priv = dev->dev_private;
753 bool sr_enabled = false;
754
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100755 if (IS_IRONLAKE(dev))
756 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
757 else if (IS_I965GM(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800758 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
759 else if (IS_I915GM(dev))
760 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
761 else if (IS_PINEVIEW(dev))
762 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
763
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100764 seq_printf(m, "self-refresh: %s\n",
765 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800766
767 return 0;
768}
769
Jesse Barnes7648fa92010-05-20 14:28:11 -0700770static int i915_emon_status(struct seq_file *m, void *unused)
771{
772 struct drm_info_node *node = (struct drm_info_node *) m->private;
773 struct drm_device *dev = node->minor->dev;
774 drm_i915_private_t *dev_priv = dev->dev_private;
775 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100776 int ret;
777
778 ret = mutex_lock_interruptible(&dev->struct_mutex);
779 if (ret)
780 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -0700781
782 temp = i915_mch_val(dev_priv);
783 chipset = i915_chipset_val(dev_priv);
784 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100785 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700786
787 seq_printf(m, "GMCH temp: %ld\n", temp);
788 seq_printf(m, "Chipset power: %ld\n", chipset);
789 seq_printf(m, "GFX power: %ld\n", gfx);
790 seq_printf(m, "Total power: %ld\n", chipset + gfx);
791
792 return 0;
793}
794
795static int i915_gfxec(struct seq_file *m, void *unused)
796{
797 struct drm_info_node *node = (struct drm_info_node *) m->private;
798 struct drm_device *dev = node->minor->dev;
799 drm_i915_private_t *dev_priv = dev->dev_private;
800
801 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
802
803 return 0;
804}
805
Chris Wilson44834a62010-08-19 16:09:23 +0100806static int i915_opregion(struct seq_file *m, void *unused)
807{
808 struct drm_info_node *node = (struct drm_info_node *) m->private;
809 struct drm_device *dev = node->minor->dev;
810 drm_i915_private_t *dev_priv = dev->dev_private;
811 struct intel_opregion *opregion = &dev_priv->opregion;
812 int ret;
813
814 ret = mutex_lock_interruptible(&dev->struct_mutex);
815 if (ret)
816 return ret;
817
818 if (opregion->header)
819 seq_write(m, opregion->header, OPREGION_SIZE);
820
821 mutex_unlock(&dev->struct_mutex);
822
823 return 0;
824}
825
Chris Wilson37811fc2010-08-25 22:45:57 +0100826static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
827{
828 struct drm_info_node *node = (struct drm_info_node *) m->private;
829 struct drm_device *dev = node->minor->dev;
830 drm_i915_private_t *dev_priv = dev->dev_private;
831 struct intel_fbdev *ifbdev;
832 struct intel_framebuffer *fb;
833 int ret;
834
835 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
836 if (ret)
837 return ret;
838
839 ifbdev = dev_priv->fbdev;
840 fb = to_intel_framebuffer(ifbdev->helper.fb);
841
842 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
843 fb->base.width,
844 fb->base.height,
845 fb->base.depth,
846 fb->base.bits_per_pixel);
847 describe_obj(m, to_intel_bo(fb->obj));
848 seq_printf(m, "\n");
849
850 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
851 if (&fb->base == ifbdev->helper.fb)
852 continue;
853
854 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
855 fb->base.width,
856 fb->base.height,
857 fb->base.depth,
858 fb->base.bits_per_pixel);
859 describe_obj(m, to_intel_bo(fb->obj));
860 seq_printf(m, "\n");
861 }
862
863 mutex_unlock(&dev->mode_config.mutex);
864
865 return 0;
866}
867
Chris Wilsonf3cd4742009-10-13 22:20:20 +0100868static int
869i915_wedged_open(struct inode *inode,
870 struct file *filp)
871{
872 filp->private_data = inode->i_private;
873 return 0;
874}
875
876static ssize_t
877i915_wedged_read(struct file *filp,
878 char __user *ubuf,
879 size_t max,
880 loff_t *ppos)
881{
882 struct drm_device *dev = filp->private_data;
883 drm_i915_private_t *dev_priv = dev->dev_private;
884 char buf[80];
885 int len;
886
887 len = snprintf(buf, sizeof (buf),
888 "wedged : %d\n",
889 atomic_read(&dev_priv->mm.wedged));
890
Dan Carpenterf4433a82010-09-08 21:44:47 +0200891 if (len > sizeof (buf))
892 len = sizeof (buf);
893
Chris Wilsonf3cd4742009-10-13 22:20:20 +0100894 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
895}
896
897static ssize_t
898i915_wedged_write(struct file *filp,
899 const char __user *ubuf,
900 size_t cnt,
901 loff_t *ppos)
902{
903 struct drm_device *dev = filp->private_data;
904 drm_i915_private_t *dev_priv = dev->dev_private;
905 char buf[20];
906 int val = 1;
907
908 if (cnt > 0) {
909 if (cnt > sizeof (buf) - 1)
910 return -EINVAL;
911
912 if (copy_from_user(buf, ubuf, cnt))
913 return -EFAULT;
914 buf[cnt] = 0;
915
916 val = simple_strtoul(buf, NULL, 0);
917 }
918
919 DRM_INFO("Manually setting wedged to %d\n", val);
920
921 atomic_set(&dev_priv->mm.wedged, val);
922 if (val) {
923 DRM_WAKEUP(&dev_priv->irq_queue);
924 queue_work(dev_priv->wq, &dev_priv->error_work);
925 }
926
927 return cnt;
928}
929
930static const struct file_operations i915_wedged_fops = {
931 .owner = THIS_MODULE,
932 .open = i915_wedged_open,
933 .read = i915_wedged_read,
934 .write = i915_wedged_write,
935};
936
937/* As the drm_debugfs_init() routines are called before dev->dev_private is
938 * allocated we need to hook into the minor for release. */
939static int
940drm_add_fake_info_node(struct drm_minor *minor,
941 struct dentry *ent,
942 const void *key)
943{
944 struct drm_info_node *node;
945
946 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
947 if (node == NULL) {
948 debugfs_remove(ent);
949 return -ENOMEM;
950 }
951
952 node->minor = minor;
953 node->dent = ent;
954 node->info_ent = (void *) key;
955 list_add(&node->list, &minor->debugfs_nodes.list);
956
957 return 0;
958}
959
960static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
961{
962 struct drm_device *dev = minor->dev;
963 struct dentry *ent;
964
965 ent = debugfs_create_file("i915_wedged",
966 S_IRUGO | S_IWUSR,
967 root, dev,
968 &i915_wedged_fops);
969 if (IS_ERR(ent))
970 return PTR_ERR(ent);
971
972 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
973}
Ben Gamari9e3a6d12009-07-01 22:26:53 -0400974
Ben Gamari27c202a2009-07-01 22:26:52 -0400975static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson70d39fe2010-08-25 16:03:34 +0100976 {"i915_capabilities", i915_capabilities, 0, 0},
Ben Gamari433e12f2009-02-17 20:08:51 -0500977 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
978 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
979 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100980 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -0500981 {"i915_gem_request", i915_gem_request_info, 0},
982 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +0000983 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -0500984 {"i915_gem_interrupt", i915_interrupt_info, 0},
985 {"i915_gem_hws", i915_hws_info, 0},
Ben Gamari6911a9b2009-04-02 11:24:54 -0700986 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
987 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
988 {"i915_batchbuffers", i915_batchbuffer_info, 0},
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700989 {"i915_error_state", i915_error_state, 0},
Jesse Barnesf97108d2010-01-29 11:27:07 -0800990 {"i915_rstdby_delays", i915_rstdby_delays, 0},
991 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
992 {"i915_delayfreq_table", i915_delayfreq_table, 0},
993 {"i915_inttoext_table", i915_inttoext_table, 0},
994 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -0700995 {"i915_emon_status", i915_emon_status, 0},
996 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800997 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800998 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +0100999 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01001000 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001001};
Ben Gamari27c202a2009-07-01 22:26:52 -04001002#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05001003
Ben Gamari27c202a2009-07-01 22:26:52 -04001004int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001005{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001006 int ret;
1007
1008 ret = i915_wedged_create(minor->debugfs_root, minor);
1009 if (ret)
1010 return ret;
1011
Ben Gamari27c202a2009-07-01 22:26:52 -04001012 return drm_debugfs_create_files(i915_debugfs_list,
1013 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05001014 minor->debugfs_root, minor);
1015}
1016
Ben Gamari27c202a2009-07-01 22:26:52 -04001017void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001018{
Ben Gamari27c202a2009-07-01 22:26:52 -04001019 drm_debugfs_remove_files(i915_debugfs_list,
1020 I915_DEBUGFS_ENTRIES, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05001021 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1022 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05001023}
1024
1025#endif /* CONFIG_DEBUG_FS */