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Tiequan Luo7984a522018-05-07 11:22:27 +08001/*
Chirag Khuranaad047872020-02-18 16:04:35 +05302 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
Tiequan Luo7984a522018-05-07 11:22:27 +08003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14/dts-v1/;
15
16#include "msm8909-mtp.dtsi"
17#include "8909-pm8916.dtsi"
18#include "msm8909-pm8916-mtp.dtsi"
19#include "apq8009-audio-external_codec.dtsi"
taojiangf3ca09d2018-06-21 19:51:00 +080020#include "msm8909-pm8916-camera.dtsi"
21#include "msm8909-pm8916-camera-sensor-robot-som.dtsi"
Chirag Khuranaad047872020-02-18 16:04:35 +053022#include "dsi-panel-ili9806e-fwvga-video.dtsi"
Tiequan Luo7984a522018-05-07 11:22:27 +080023
24/ {
25 model = "Qualcomm Technologies, Inc. APQ8009 Robot SOM refboard";
26 compatible = "qcom,apq8009-mtp", "qcom,apq8009", "qcom,mtp";
27 qcom,msm-id = <265 2>;
28 qcom,board-id = <8 0x15>;
29};
30
Meng Wange0253bd2018-06-13 09:53:59 +080031&audio_codec_mtp {
32 status = "disabled";
33};
34
35&i2c_4 {
36 status= "okay";
37};
38
39&pm8916_gpios {
40 wcd_vdd_en { /* GPIO 4 */
41 wcd_vdd_en_active: wcd_vdd_en_active {
42 status = "ok";
43 pins = "gpio4";
44 function = "normal";
45 output-high;
46 qcom,drive-strength = <2>;
47 };
48 wcd_vdd_en_sleep: wcd_vdd_en_sleep {
49 status = "ok";
50 pins = "gpio4";
51 function = "normal";
52 output-low;
53 qcom,drive-strength = <2>;
54 };
55
56 };
57};
58
Tiequan Luo7984a522018-05-07 11:22:27 +080059&soc {
Meng Wange0253bd2018-06-13 09:53:59 +080060 ext_codec: sound-9335 {
61 compatible = "qcom,apq8009-audio-i2s-codec";
Meng Wange0253bd2018-06-13 09:53:59 +080062
Tiequan Luo7984a522018-05-07 11:22:27 +080063 qcom,audio-routing =
64 "AIF4 VI", "MCLK",
65 "RX_BIAS", "MCLK",
66 "MADINPUT", "MCLK",
Kenneth Westfield7b921a02020-04-20 21:54:24 -070067 "AMIC2", "MIC BIAS2",
68 "MIC BIAS2", "Headset Mic",
69 "DMIC0", "MIC BIAS1",
70 "MIC BIAS1", "Digital Mic0",
71 "DMIC1", "MIC BIAS1",
72 "MIC BIAS1", "Digital Mic1",
73 "DMIC2", "MIC BIAS3",
74 "MIC BIAS3", "Digital Mic2",
75 "DMIC3", "MIC BIAS3",
76 "MIC BIAS3", "Digital Mic3",
Tiequan Luo7984a522018-05-07 11:22:27 +080077 "SpkrLeft IN", "SPK1 OUT",
78 "SpkrRight IN", "SPK2 OUT";
Meng Wange0253bd2018-06-13 09:53:59 +080079
Kenneth Westfieldfeadbe62020-04-24 19:11:34 -070080 qcom,pdm-i2s-switch-enable = <&msm_gpio 88 0>;
Meng Wange0253bd2018-06-13 09:53:59 +080081 qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>;
82 qcom,quat-mi2s-gpios = <&cdc_quat_tdm_gpios>;
Tiequan Luo7984a522018-05-07 11:22:27 +080083 };
84
Meng Wange0253bd2018-06-13 09:53:59 +080085 clock_audio: audio_ext_clk {
86 compatible = "qcom,audio-ref-clk";
87 qcom,codec-mclk-clk-freq = <9600000>;
88 qcom,lpass-clock = <1>;
89 reg = <0x07702004 0x4>;
90 pinctrl-names = "sleep", "active";
91 pinctrl-0 = <&i2s_mclk_sleep>;
92 pinctrl-1 = <&i2s_mclk_active>;
93 #clock-cells = <1>;
Tiequan Luo7984a522018-05-07 11:22:27 +080094 };
95
96 i2c@78b8000 {
97 wcd9xxx_codec@d {
Meng Wange0253bd2018-06-13 09:53:59 +080098 status = "okay";
99 compatible = "qcom,tasha-i2c-pgd";
100 reg = <0x0d>;
101
102 interrupt-parent = <&wcd9xxx_intc>;
103 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
104 17 18 19 20 21 22 23 24 25 26 27 28 29
105 30>;
106
107 qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
108
109 qcom,has-buck-vsel-gpio;
110 qcom,buck-vsel-gpio-node = <&wcd_vdd_gpio>;
111 swr_master {
112 compatible = "qcom,swr-wcd";
113 qcom,swr-num-dev = <2>;
114 #address-cells = <2>;
115 #size-cells = <0>;
116
117 wsa881x_211:wsa881x@21170211 {
118 compatible = "qcom,wsa881x";
119 reg = <0x00 0x21170211>;
120 qcom,spkr-sd-n-node = <&wsa_spkr>;
121 };
122
123 wsa881x_212:wsa881x@21170212 {
124 compatible = "qcom,wsa881x";
125 reg = <0x00 0x21170212>;
126 qcom,spkr-sd-n-node = <&wsa_spkr>;
127 };
128
129 wsa881x_213:wsa881x@21170213 {
130 compatible = "qcom,wsa881x";
131 reg = <0x00 0x21170213>;
132 qcom,spkr-sd-n-node = <&wsa_spkr>;
133 };
134
135 wsa881x_214:wsa881x@21170214 {
136 compatible = "qcom,wsa881x";
137 reg = <0x00 0x21170214>;
138 qcom,spkr-sd-n-node = <&wsa_spkr>;
139 };
140 };
Tiequan Luo7984a522018-05-07 11:22:27 +0800141 };
142 };
143
Meng Wange0253bd2018-06-13 09:53:59 +0800144 cdc_pri_mi2s_gpios: msm_cdc_pinctrl_pri {
145 compatible = "qcom,msm-cdc-pinctrl";
146 pinctrl-names = "aud_active", "aud_sleep";
147 pinctrl-0 = <&pri_mi2s_active &pri_mi2s_ws_active
148 &pri_mi2s_dout_active &pri_mi2s_din_active>;
149 pinctrl-1 = <&pri_mi2s_sleep &pri_mi2s_ws_sleep
150 &pri_mi2s_dout_sleep &pri_mi2s_din_sleep>;
151 };
152
153 cdc_quat_tdm_gpios: msm_cdc_pinctrl_quat {
154 compatible = "qcom,msm-cdc-pinctrl";
155 pinctrl-names = "aud_active", "aud_sleep";
156 pinctrl-0 = <&quat_mi2s_active &quat_mi2s_din_active>;
157 pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_din_sleep>;
158 };
159
160 wcd_rst_gpio: wcd_gpio_ctrl {
161 compatible = "qcom,msm-cdc-pinctrl";
162 pinctrl-names = "aud_active", "aud_sleep";
163 pinctrl-0 = <&cdc_reset1_active>;
164 pinctrl-1 = <&cdc_reset1_sleep>;
165 };
166
167 wcd_vdd_gpio: wcd_vdd_gpio_ctrl {
168 compatible = "qcom,msm-cdc-pinctrl";
169 pinctrl-names = "aud_active", "aud_sleep";
170 pinctrl-0 = <&wcd_vdd_en_active>;
171 pinctrl-1 = <&wcd_vdd_en_sleep>;
172 };
173
174 wsa_spkr: msm_cdc_pinctrll {
175 compatible = "qcom,msm-cdc-pinctrl";
176 pinctrl-names = "aud_active", "aud_sleep";
177 pinctrl-0 = <&spkr_en_active>;
178 pinctrl-1 = <&spkr_en_sleep>;
179 };
180
Tiequan Luo7984a522018-05-07 11:22:27 +0800181 vph_pwr_vreg: vph_pwr_vreg {
182 compatible = "regulator-fixed";
183 status = "ok";
184 regulator-name = "vph_pwr";
185 regulator-always-on;
186 };
187
zhaochen5868daf2018-07-09 17:55:17 +0800188 otg_vreg_5p0: otg_vreg_5p0 {
189 compatible = "regulator-fixed";
190 regulator-name = "sbc_vreg_5p0";
191 regulator-min-microvolt = <5000000>;
192 regulator-max-microvolt = <5000000>;
193 status = "ok";
194 enable-active-low;
195 vin-supply = <&vph_pwr_vreg>;
196 };
197
198 vbus_otg_vreg: vbus_otg_vreg {
199 compatible = "regulator-fixed";
200 regulator-name = "vbus_otg_vreg";
201 gpio = <&msm_gpio 74 0>;
202 vin-supply = <&otg_vreg_5p0>;
203 };
204
Tim Jiang6b649f52018-05-08 13:52:17 +0800205 bluetooth: bt_qca9379 {
206 compatible = "qca,qca9379";
207 qca,bt-reset-gpio = <&msm_gpio 47 0>; /* BT_EN */
208 };
bingsc5fca962018-05-08 14:42:14 +0800209 cnss_sdio: qcom,cnss_sdio {
210 compatible = "qcom,cnss_sdio";
211 subsys-name = "AR6320";
212 /**
213 * There is no vdd-wlan on board and this is not for DSRC.
214 * IO and XTAL share the same vreg.
215 */
216 vdd-wlan-io-supply = <&pm8916_l5>;
217 qcom,cap-tsf-gpio = <&msm_gpio 42 1>;
218 qcom,wlan-ramdump-dynamic = <0x200000>;
219 qcom,msm-bus,name = "msm-cnss";
220 qcom,msm-bus,num-cases = <4>;
221 qcom,msm-bus,num-paths = <1>;
222 qcom,msm-bus,vectors-KBps =
223 <79 512 0 0>, /* No vote */
224 <79 512 6250 200000>, /* 50 Mbps */
225 <79 512 25000 200000>, /* 200 Mbps */
226 <79 512 2048000 4096000>; /* MAX */
227 };
taojiangf3ca09d2018-06-21 19:51:00 +0800228
229 gpio_keys {
230 status = "disable";
231 };
Miaoqing Pan99497db2018-06-07 10:30:50 +0800232
233 spi@78ba000 {
234 reg = <0x78ba000 0x600>;
235 spi-max-frequency = <50000000>;
236 status = "okay";
237
238 spi@0 {
239 compatible = "qcom,spi-msm-slave";
240 reg = <0>;
241 spi-max-frequency = <50000000>;
242 };
243 };
bingsc5fca962018-05-08 14:42:14 +0800244};
245
zhaochen024979a2018-06-14 10:33:45 +0800246&i2c_1 {
247 status = "okay";
248 icm20602@68 {
249 compatible = "invensense,icm20602";
250 reg = <0x68>;
251 interrupt-parent = <&msm_gpio>;
252 interrupts = <12 0>;
253 invensense,icm20602-gpio = <&msm_gpio 12 0x0>;
254 vdd-ldo-supply = <&pm8916_l6>;
255 interrupt-names = "icm20602_irq";
256 pinctrl-names = "imu_active","imu_suspend";
257 pinctrl-0 = <&imu_int_active>;
258 pinctrl-1 = <&imu_int_suspend>;
259 status = "ok";
260 };
261 vl53l0x@29 {
262 compatible = "st,stmvl53l0";
263 reg = <0x29>;
264 status = "ok";
Chaojun Wang87a1a162018-08-23 09:48:52 +0800265 tof-id = <2>;
zhaochen024979a2018-06-14 10:33:45 +0800266 };
267};
268
bingsc5fca962018-05-08 14:42:14 +0800269&wcnss {
270 status = "disabled";
271};
272
273&msm_gpio {
274 sdc2_wlan_gpio_on: sdc2_wlan_gpio_on {
275 mux {
276 pins = "gpio43";
277 function = "gpio";
278 };
279 config {
280 pins = "gpio43";
281 drive-strength = <10>;
282 bias-pull-up;
283 output-high;
284 };
285 };
286
287 sdc2_wlan_gpio_off: sdc2_wlan_gpio_off {
288 mux {
289 pins = "gpio43";
290 function = "gpio";
291 };
292 config {
293 pins = "gpio43";
294 drive-strength = <2>;
295 bias-disable;
296 output-low;
297 };
298 };
Tiequan Luo7984a522018-05-07 11:22:27 +0800299};
300
301&sdhc_2 {
bingsc5fca962018-05-08 14:42:14 +0800302 /delete-property/cd-gpios;
303 #address-cells = <0>;
304 interrupt-parent = <&sdhc_2>;
305 interrupts = <0 1 2>;
306 #interrupt-cells = <1>;
307 interrupt-map-mask = <0xffffffff>;
308 interrupt-map = <0 &intc 0 125 0
309 1 &intc 0 221 0
bings9cae9e92018-06-15 08:40:54 +0800310 2 &msm_gpio 40 0x1>;
bingsc5fca962018-05-08 14:42:14 +0800311 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
312
313 qcom,vdd-voltage-level = <1800000 2950000>;
314 qcom,vdd-current-level = <15000 400000>;
315
316 qcom,vdd-io-voltage-level = <1800000 1800000>;
317 qcom,vdd-io-current-level = <200 50000>;
318 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
319 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
320
321 pinctrl-names = "active", "sleep";
322 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on
323 &sdc2_wlan_gpio_on>;
324 pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
325 &sdc2_wlan_gpio_off>;
326 qcom,nonremovable;
327 qcom,core_3_0v_support;
328 status = "ok";
Tiequan Luo7984a522018-05-07 11:22:27 +0800329};
330
331&usb_otg {
332 interrupts = <0 134 0>,<0 140 0>,<0 136 0>;
333 interrupt-names = "core_irq", "async_irq", "phy_irq";
334 qcom,hsusb-otg-mode = <3>;
335 qcom,switch-vbus-w-id;
zhaochen5868daf2018-07-09 17:55:17 +0800336 qcom,phy-id-high-as-peripheral;
337 vbus_otg-supply = <&vbus_otg_vreg>;
Tiequan Luo7984a522018-05-07 11:22:27 +0800338};
339
340&external_image_mem {
Vishwanath Raju K483f90a2018-05-29 13:38:37 +0530341 reg = <0x0 0x87900000 0x0 0x0700000>;
Tiequan Luo7984a522018-05-07 11:22:27 +0800342};
343
344&modem_adsp_mem {
345 reg = <0x0 0x88000000 0x0 0x01e00000>;
346};
347
348&peripheral_mem {
Vishwanath Raju K483f90a2018-05-29 13:38:37 +0530349 status = "disabled";
Tiequan Luo7984a522018-05-07 11:22:27 +0800350};
351
352&pm8916_chg {
353 status = "ok";
354};
355
356&pm8916_bms {
357 status = "ok";
358};
Tim Jiang6b649f52018-05-08 13:52:17 +0800359
360&blsp1_uart2_hs {
361 status = "ok";
362};
Chaojun Wangdf1442e2018-05-22 19:26:39 +0800363
Chaojun Wang87a1a162018-08-23 09:48:52 +0800364&i2c_3 {
Chaojun Wangdf1442e2018-05-22 19:26:39 +0800365 vl53l0x@52 {
366 compatible = "st,stmvl53l0";
367 reg = <0x29>;
368 status = "ok";
Chaojun Wang87a1a162018-08-23 09:48:52 +0800369 tof-id = <1>;
Chaojun Wangdf1442e2018-05-22 19:26:39 +0800370 };
371};
Meng Wange0253bd2018-06-13 09:53:59 +0800372
373
374&wcd_rst_gpio {
375 status = "okay";
376};
377
378&ext_codec {
379 status = "okay";
380};
Chirag Khuranaffb62a92019-09-04 16:51:56 +0530381
382&rpm_bus {
383 rpm-regulator-ldoa4 {
384 status = "okay";
385 pm8916_l4: regulator-l4 {
386 regulator-min-microvolt = <2050000>;
387 regulator-max-microvolt = <2050000>;
388 qcom,init-voltage = <2050000>;
389 regulator-always-on;
390 status = "okay";
391 };
392 };
393};
394
395&mdss_dsi0_pll {
396 status = "okay";
397};
398
Chirag Khurana11cf8602019-11-18 20:01:13 +0530399&mdss_fb0 {
400 /delete-node/ qcom,cont-splash-memory;
401};
402
Chirag Khuranaffb62a92019-09-04 16:51:56 +0530403&mdss_mdp {
404 qcom,mdss-pref-prim-intf = "dsi";
405 status = "okay";
406};
407
Chirag Khuranaad047872020-02-18 16:04:35 +0530408&dsi_ili9806e_fwvga_video {
409 qcom,mdss-dsi-pwm-gpio = <&pm8916_mpps 4 0>;
410 qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
411 qcom,mdss-dsi-panel-timings-phy-v2 = [
412 1E 1A 04 05 02 03 04 a0
413 1E 1A 04 05 02 03 04 a0
414 1E 1A 04 05 02 03 04 a0
415 1E 1A 04 05 02 03 04 a0
416 1E 0B 03 04 02 03 04 a0];
417};
418
Chirag Khuranaffb62a92019-09-04 16:51:56 +0530419&pmx_mdss {
420 mdss_dsi_active: mdss_dsi_active {
421 mux {
422 pins = "gpio28", "gpio37";
423 };
424 };
425
426 mdss_dsi_suspend: mdss_dsi_suspend {
427 mux {
428 pins = "gpio28", "gpio37";
429 };
430 };
431};
432
433&mdss_dsi0 {
Chirag Khurana0fb53a92020-02-18 16:17:07 +0530434 qcom,dsi-pref-prim-pan = <&dsi_ili9806e_fwvga_video>;
Chirag Khuranaffb62a92019-09-04 16:51:56 +0530435
436 pinctrl-names = "mdss_default", "mdss_sleep";
437 pinctrl-0 = <&mdss_dsi_active &mdss_dsi_select_gpio>;
438 pinctrl-1 = <&mdss_dsi_suspend &mdss_dsi_select_gpio>;
439
Chirag Khurana0fb53a92020-02-18 16:17:07 +0530440 qcom,platform-te-gpio = <&msm_gpio 24 0>;
Chirag Khuranaffb62a92019-09-04 16:51:56 +0530441 qcom,platform-reset-gpio = <&msm_gpio 28 0>;
442 qcom,platform-bklight-en-gpio = <&msm_gpio 37 0>;
443
Chirag Khurana0fb53a92020-02-18 16:17:07 +0530444 /delete-property/ qcom,platform-enable-gpio;
Chirag Khuranaffb62a92019-09-04 16:51:56 +0530445 vdd-supply = <&pm8916_l17>;
446 vddio-supply = <&pm8916_l6>;
447 status = "okay";
448};
449
450&pm8916_mpps {
451 pinctrl-names = "default";
452 pinctrl-0 = <&ext_fep_wled_pwr_en_default>;
453 ext_fep_wled_pwr_en_default: ext_fep_wled_pwr_en_default {
454 pins = "mpp4"; /* MPP_4 */
455 function = "digital"; /* Digital */
456 output-high; /* Output */
457 power-source = <1>;
458 status = "okay";
459 };
460};
Chirag Khurana11cf8602019-11-18 20:01:13 +0530461
462/delete-node/ &cont_splash_mem;