blob: 3ec89f467ac3f4713909bbdcd0501086624d767f [file] [log] [blame]
Vineet Gupta3be80aa2013-01-18 15:12:17 +05301/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
9 */
10
11#ifndef __ASM_ARC_PTRACE_H
12#define __ASM_ARC_PTRACE_H
13
14#ifdef __KERNEL__
15
16#ifndef __ASSEMBLY__
17
18/* THE pt_regs: Defines how regs are saved during entry into kernel */
19
20struct pt_regs {
21 /*
22 * 1 word gutter after reg-file has been saved
23 * Technically not needed, Since SP always points to a "full" location
24 * (vs. "empty"). But pt_regs is shared with tools....
25 */
26 long res;
27
28 /* Real registers */
29 long bta; /* bta_l1, bta_l2, erbta */
30 long lp_start;
31 long lp_end;
32 long lp_count;
33 long status32; /* status32_l1, status32_l2, erstatus */
34 long ret; /* ilink1, ilink2 or eret */
35 long blink;
36 long fp;
37 long r26; /* gp */
38 long r12;
39 long r11;
40 long r10;
41 long r9;
42 long r8;
43 long r7;
44 long r6;
45 long r5;
46 long r4;
47 long r3;
48 long r2;
49 long r1;
50 long r0;
51 long sp; /* user/kernel sp depending on where we came from */
52 long orig_r0;
Vineet Gupta5c39c0a2013-02-11 20:01:24 +053053
54 /*to distinguish bet excp, syscall, irq */
55 union {
56#ifdef CONFIG_CPU_BIG_ENDIAN
57 /* so that assembly code is same for LE/BE */
58 unsigned long orig_r8:16, event:16;
59#else
60 unsigned long event:16, orig_r8:16;
61#endif
62 long orig_r8_word;
63 };
Vineet Gupta3be80aa2013-01-18 15:12:17 +053064};
65
66/* Callee saved registers - need to be saved only when you are scheduled out */
67
68struct callee_regs {
69 long res; /* Again this is not needed */
70 long r25;
71 long r24;
72 long r23;
73 long r22;
74 long r21;
75 long r20;
76 long r19;
77 long r18;
78 long r17;
79 long r16;
80 long r15;
81 long r14;
82 long r13;
83};
84
85#define instruction_pointer(regs) ((regs)->ret)
86#define profile_pc(regs) instruction_pointer(regs)
87
88/* return 1 if user mode or 0 if kernel mode */
89#define user_mode(regs) (regs->status32 & STATUS_U_MASK)
90
91#define user_stack_pointer(regs)\
92({ unsigned int sp; \
93 if (user_mode(regs)) \
94 sp = (regs)->sp;\
95 else \
96 sp = -1; \
97 sp; \
98})
Vineet Gupta4adeefe2013-01-18 15:12:18 +053099
Vineet Gupta5c39c0a2013-02-11 20:01:24 +0530100#define in_syscall(regs) (regs->event & orig_r8_IS_SCALL)
101#define in_brkpt_trap(regs) (regs->event & orig_r8_IS_BRKPT)
Vineet Gupta4adeefe2013-01-18 15:12:18 +0530102
Vineet Guptabf90e1e2013-01-18 15:12:18 +0530103#define current_pt_regs() \
104({ \
105 /* open-coded current_thread_info() */ \
106 register unsigned long sp asm ("sp"); \
107 unsigned long pg_start = (sp & ~(THREAD_SIZE - 1)); \
108 (struct pt_regs *)(pg_start + THREAD_SIZE - 4) - 1; \
109})
110
Vineet Gupta3be80aa2013-01-18 15:12:17 +0530111#endif /* !__ASSEMBLY__ */
112
Vineet Gupta5c39c0a2013-02-11 20:01:24 +0530113#define orig_r8_IS_SCALL 0x0001
114#define orig_r8_IS_SCALL_RESTARTED 0x0002
115#define orig_r8_IS_BRKPT 0x0004
116#define orig_r8_IS_EXCPN 0x0004
117#define orig_r8_IS_IRQ1 0x0010
118#define orig_r8_IS_IRQ2 0x0020
119
Vineet Gupta3be80aa2013-01-18 15:12:17 +0530120#endif /* __KERNEL__ */
121
122#ifndef __ASSEMBLY__
123/*
124 * Userspace ABI: Register state needed by
125 * -ptrace (gdbserver)
126 * -sigcontext (SA_SIGNINFO signal frame)
127 *
128 * This is to decouple pt_regs from user-space ABI, to be able to change it
129 * w/o affecting the ABI.
130 * Although the layout (initial padding) is similar to pt_regs to have some
131 * optimizations when copying pt_regs to/from user_regs_struct.
132 *
133 * Also, sigcontext only care about the scratch regs as that is what we really
134 * save/restore for signal handling.
135*/
136struct user_regs_struct {
137
138 struct scratch {
139 long pad;
140 long bta, lp_start, lp_end, lp_count;
141 long status32, ret, blink, fp, gp;
142 long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
143 long sp;
144 } scratch;
145 struct callee {
146 long pad;
147 long r25, r24, r23, r22, r21, r20;
148 long r19, r18, r17, r16, r15, r14, r13;
149 } callee;
150 long efa; /* break pt addr, for break points in delay slots */
151 long stop_pc; /* give dbg stop_pc directly after checking orig_r8 */
152};
153#endif /* !__ASSEMBLY__ */
154
155#endif /* __ASM_PTRACE_H */