Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1 | /* |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 2 | * Support functions for OMAP GPIO |
| 3 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 4 | * Copyright (C) 2003-2005 Nokia Corporation |
Jan Engelhardt | 96de0e2 | 2007-10-19 23:21:04 +0200 | [diff] [blame] | 5 | * Written by Juha Yrjölä <juha.yrjola@nokia.com> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 6 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 7 | * Copyright (C) 2009 Texas Instruments |
| 8 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 9 | * |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 18 | #include <linux/syscore_ops.h> |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 19 | #include <linux/err.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 20 | #include <linux/clk.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 22 | #include <linux/device.h> |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 23 | #include <linux/pm_runtime.h> |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 24 | #include <linux/pm.h> |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/of_device.h> |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 27 | #include <linux/gpio.h> |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 28 | #include <linux/bitops.h> |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 29 | #include <linux/platform_data/gpio-omap.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 30 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 31 | #define OFF_MODE 1 |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 32 | #define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 33 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 34 | static LIST_HEAD(omap_gpio_list); |
| 35 | |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 36 | struct gpio_regs { |
| 37 | u32 irqenable1; |
| 38 | u32 irqenable2; |
| 39 | u32 wake_en; |
| 40 | u32 ctrl; |
| 41 | u32 oe; |
| 42 | u32 leveldetect0; |
| 43 | u32 leveldetect1; |
| 44 | u32 risingdetect; |
| 45 | u32 fallingdetect; |
| 46 | u32 dataout; |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 47 | u32 debounce; |
| 48 | u32 debounce_en; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 49 | }; |
| 50 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 51 | struct gpio_bank { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 52 | struct list_head node; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 53 | void __iomem *base; |
Grygorii Strashko | 30cefea | 2015-09-25 12:06:02 -0700 | [diff] [blame] | 54 | int irq; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 55 | u32 non_wakeup_gpios; |
| 56 | u32 enabled_non_wakeup_gpios; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 57 | struct gpio_regs context; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 58 | u32 saved_datain; |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 59 | u32 level_mask; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 60 | u32 toggle_mask; |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 61 | raw_spinlock_t lock; |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 62 | raw_spinlock_t wa_lock; |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 63 | struct gpio_chip chip; |
Jouni Hogander | 89db948 | 2008-12-10 17:35:24 -0800 | [diff] [blame] | 64 | struct clk *dbck; |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 65 | u32 mod_usage; |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 66 | u32 irq_usage; |
Kevin Hilman | 8865b9b | 2009-01-27 11:15:34 -0800 | [diff] [blame] | 67 | u32 dbck_enable_mask; |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 68 | bool dbck_enabled; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 69 | bool is_mpuio; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 70 | bool dbck_flag; |
Charulatha V | 0cde8d0 | 2011-05-05 20:15:16 +0530 | [diff] [blame] | 71 | bool loses_context; |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 72 | bool context_valid; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 73 | int stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 74 | u32 width; |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 75 | int context_loss_count; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 76 | int power_mode; |
| 77 | bool workaround_enabled; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 78 | |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 79 | void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 80 | int (*get_context_loss_count)(struct device *dev); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 81 | |
| 82 | struct omap_gpio_reg_offs *regs; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 83 | }; |
| 84 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 85 | #define GPIO_MOD_CTRL_BIT BIT(0) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 86 | |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 87 | #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 88 | #define LINE_USED(line, offset) (line & (BIT(offset))) |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 89 | |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 90 | static void omap_gpio_unmask_irq(struct irq_data *d); |
| 91 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 92 | static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) |
Jon Hunter | ede4d7a | 2013-03-01 11:22:47 -0600 | [diff] [blame] | 93 | { |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 94 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 95 | return gpiochip_get_data(chip); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 96 | } |
| 97 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 98 | static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, |
| 99 | int is_input) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 100 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 101 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 102 | u32 l; |
| 103 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 104 | reg += bank->regs->direction; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 105 | l = readl_relaxed(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 106 | if (is_input) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 107 | l |= BIT(gpio); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 108 | else |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 109 | l &= ~(BIT(gpio)); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 110 | writel_relaxed(l, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 111 | bank->context.oe = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 112 | } |
| 113 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 114 | |
| 115 | /* set data out value using dedicate set/clear register */ |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 116 | static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 117 | int enable) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 118 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 119 | void __iomem *reg = bank->base; |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 120 | u32 l = BIT(offset); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 121 | |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 122 | if (enable) { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 123 | reg += bank->regs->set_dataout; |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 124 | bank->context.dataout |= l; |
| 125 | } else { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 126 | reg += bank->regs->clr_dataout; |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 127 | bank->context.dataout &= ~l; |
| 128 | } |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 129 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 130 | writel_relaxed(l, reg); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 131 | } |
| 132 | |
| 133 | /* set data out value using mask register */ |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 134 | static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 135 | int enable) |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 136 | { |
| 137 | void __iomem *reg = bank->base + bank->regs->dataout; |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 138 | u32 gpio_bit = BIT(offset); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 139 | u32 l; |
| 140 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 141 | l = readl_relaxed(reg); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 142 | if (enable) |
| 143 | l |= gpio_bit; |
| 144 | else |
| 145 | l &= ~gpio_bit; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 146 | writel_relaxed(l, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 147 | bank->context.dataout = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 148 | } |
| 149 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 150 | static int omap_get_gpio_datain(struct gpio_bank *bank, int offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 151 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 152 | void __iomem *reg = bank->base + bank->regs->datain; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 153 | |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 154 | return (readl_relaxed(reg) & (BIT(offset))) != 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 155 | } |
| 156 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 157 | static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset) |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 158 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 159 | void __iomem *reg = bank->base + bank->regs->dataout; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 160 | |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 161 | return (readl_relaxed(reg) & (BIT(offset))) != 0; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 162 | } |
| 163 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 164 | static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 165 | { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 166 | int l = readl_relaxed(base + reg); |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 167 | |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 168 | if (set) |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 169 | l |= mask; |
| 170 | else |
| 171 | l &= ~mask; |
| 172 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 173 | writel_relaxed(l, base + reg); |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 174 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 175 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 176 | static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 177 | { |
| 178 | if (bank->dbck_enable_mask && !bank->dbck_enabled) { |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 179 | clk_enable(bank->dbck); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 180 | bank->dbck_enabled = true; |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 181 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 182 | writel_relaxed(bank->dbck_enable_mask, |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 183 | bank->base + bank->regs->debounce_en); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 184 | } |
| 185 | } |
| 186 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 187 | static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 188 | { |
| 189 | if (bank->dbck_enable_mask && bank->dbck_enabled) { |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 190 | /* |
| 191 | * Disable debounce before cutting it's clock. If debounce is |
| 192 | * enabled but the clock is not, GPIO module seems to be unable |
| 193 | * to detect events and generate interrupts at least on OMAP3. |
| 194 | */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 195 | writel_relaxed(0, bank->base + bank->regs->debounce_en); |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 196 | |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 197 | clk_disable(bank->dbck); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 198 | bank->dbck_enabled = false; |
| 199 | } |
| 200 | } |
| 201 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 202 | /** |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 203 | * omap2_set_gpio_debounce - low level gpio debounce time |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 204 | * @bank: the gpio bank we're acting upon |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 205 | * @offset: the gpio number on this @bank |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 206 | * @debounce: debounce time to use |
| 207 | * |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 208 | * OMAP's debounce time is in 31us steps |
| 209 | * <debounce time> = (GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) x 31 |
| 210 | * so we need to convert and round up to the closest unit. |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 211 | * |
| 212 | * Return: 0 on success, negative error otherwise. |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 213 | */ |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 214 | static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, |
| 215 | unsigned debounce) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 216 | { |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 217 | void __iomem *reg; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 218 | u32 val; |
| 219 | u32 l; |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 220 | bool enable = !!debounce; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 221 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 222 | if (!bank->dbck_flag) |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 223 | return -ENOTSUPP; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 224 | |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 225 | if (enable) { |
| 226 | debounce = DIV_ROUND_UP(debounce, 31) - 1; |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 227 | if ((debounce & OMAP4_GPIO_DEBOUNCINGTIME_MASK) != debounce) |
| 228 | return -EINVAL; |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 229 | } |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 230 | |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 231 | l = BIT(offset); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 232 | |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 233 | clk_enable(bank->dbck); |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 234 | reg = bank->base + bank->regs->debounce; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 235 | writel_relaxed(debounce, reg); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 236 | |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 237 | reg = bank->base + bank->regs->debounce_en; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 238 | val = readl_relaxed(reg); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 239 | |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 240 | if (enable) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 241 | val |= l; |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 242 | else |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 243 | val &= ~l; |
Kevin Hilman | f7ec0b0 | 2010-06-09 13:53:07 +0300 | [diff] [blame] | 244 | bank->dbck_enable_mask = val; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 245 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 246 | writel_relaxed(val, reg); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 247 | clk_disable(bank->dbck); |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 248 | /* |
| 249 | * Enable debounce clock per module. |
| 250 | * This call is mandatory because in omap_gpio_request() when |
| 251 | * *_runtime_get_sync() is called, _gpio_dbck_enable() within |
| 252 | * runtime callbck fails to turn on dbck because dbck_enable_mask |
| 253 | * used within _gpio_dbck_enable() is still not initialized at |
| 254 | * that point. Therefore we have to enable dbck here. |
| 255 | */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 256 | omap_gpio_dbck_enable(bank); |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 257 | if (bank->dbck_enable_mask) { |
| 258 | bank->context.debounce = debounce; |
| 259 | bank->context.debounce_en = val; |
| 260 | } |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 261 | |
| 262 | return 0; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 263 | } |
| 264 | |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 265 | /** |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 266 | * omap_clear_gpio_debounce - clear debounce settings for a gpio |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 267 | * @bank: the gpio bank we're acting upon |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 268 | * @offset: the gpio number on this @bank |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 269 | * |
| 270 | * If a gpio is using debounce, then clear the debounce enable bit and if |
| 271 | * this is the only gpio in this bank using debounce, then clear the debounce |
| 272 | * time too. The debounce clock will also be disabled when calling this function |
| 273 | * if this is the only gpio in the bank using debounce. |
| 274 | */ |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 275 | static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset) |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 276 | { |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 277 | u32 gpio_bit = BIT(offset); |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 278 | |
| 279 | if (!bank->dbck_flag) |
| 280 | return; |
| 281 | |
| 282 | if (!(bank->dbck_enable_mask & gpio_bit)) |
| 283 | return; |
| 284 | |
| 285 | bank->dbck_enable_mask &= ~gpio_bit; |
| 286 | bank->context.debounce_en &= ~gpio_bit; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 287 | writel_relaxed(bank->context.debounce_en, |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 288 | bank->base + bank->regs->debounce_en); |
| 289 | |
| 290 | if (!bank->dbck_enable_mask) { |
| 291 | bank->context.debounce = 0; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 292 | writel_relaxed(bank->context.debounce, bank->base + |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 293 | bank->regs->debounce); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 294 | clk_disable(bank->dbck); |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 295 | bank->dbck_enabled = false; |
| 296 | } |
| 297 | } |
| 298 | |
Tony Lindgren | fd8afa9 | 2019-03-25 15:43:18 -0700 | [diff] [blame] | 299 | /* |
| 300 | * Off mode wake-up capable GPIOs in bank(s) that are in the wakeup domain. |
| 301 | * See TRM section for GPIO for "Wake-Up Generation" for the list of GPIOs |
| 302 | * in wakeup domain. If bank->non_wakeup_gpios is not configured, assume none |
| 303 | * are capable waking up the system from off mode. |
| 304 | */ |
| 305 | static bool omap_gpio_is_off_wakeup_capable(struct gpio_bank *bank, u32 gpio_mask) |
| 306 | { |
| 307 | u32 no_wake = bank->non_wakeup_gpios; |
| 308 | |
| 309 | if (no_wake) |
| 310 | return !!(~no_wake & gpio_mask); |
| 311 | |
| 312 | return false; |
| 313 | } |
| 314 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 315 | static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, |
Tarun Kanti DebBarma | 00ece7e | 2011-11-25 15:41:06 +0530 | [diff] [blame] | 316 | unsigned trigger) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 317 | { |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 318 | void __iomem *base = bank->base; |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 319 | u32 gpio_bit = BIT(gpio); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 320 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 321 | omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, |
| 322 | trigger & IRQ_TYPE_LEVEL_LOW); |
| 323 | omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, |
| 324 | trigger & IRQ_TYPE_LEVEL_HIGH); |
| 325 | omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit, |
| 326 | trigger & IRQ_TYPE_EDGE_RISING); |
| 327 | omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, |
| 328 | trigger & IRQ_TYPE_EDGE_FALLING); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 329 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 330 | bank->context.leveldetect0 = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 331 | readl_relaxed(bank->base + bank->regs->leveldetect0); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 332 | bank->context.leveldetect1 = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 333 | readl_relaxed(bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 334 | bank->context.risingdetect = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 335 | readl_relaxed(bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 336 | bank->context.fallingdetect = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 337 | readl_relaxed(bank->base + bank->regs->fallingdetect); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 338 | |
| 339 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 340 | omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 341 | bank->context.wake_en = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 342 | readl_relaxed(bank->base + bank->regs->wkup_en); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 343 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 344 | |
Ambresh K | 55b220c | 2011-06-15 13:40:45 -0700 | [diff] [blame] | 345 | /* This part needs to be executed always for OMAP{34xx, 44xx} */ |
Tony Lindgren | fd8afa9 | 2019-03-25 15:43:18 -0700 | [diff] [blame] | 346 | if (!bank->regs->irqctrl && !omap_gpio_is_off_wakeup_capable(bank, gpio)) { |
Chunqiu Wang | 699117a6 | 2009-06-24 17:13:39 +0000 | [diff] [blame] | 347 | /* |
| 348 | * Log the edge gpio and manually trigger the IRQ |
| 349 | * after resume if the input level changes |
| 350 | * to avoid irq lost during PER RET/OFF mode |
| 351 | * Applies for omap2 non-wakeup gpio and all omap3 gpios |
| 352 | */ |
| 353 | if (trigger & IRQ_TYPE_EDGE_BOTH) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 354 | bank->enabled_non_wakeup_gpios |= gpio_bit; |
| 355 | else |
| 356 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; |
| 357 | } |
Kevin Hilman | 5eb3bb9 | 2007-05-05 11:40:29 -0700 | [diff] [blame] | 358 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 359 | bank->level_mask = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 360 | readl_relaxed(bank->base + bank->regs->leveldetect0) | |
| 361 | readl_relaxed(bank->base + bank->regs->leveldetect1); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 362 | } |
| 363 | |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 364 | #ifdef CONFIG_ARCH_OMAP1 |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 365 | /* |
| 366 | * This only applies to chips that can't do both rising and falling edge |
| 367 | * detection at once. For all other chips, this function is a noop. |
| 368 | */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 369 | static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 370 | { |
| 371 | void __iomem *reg = bank->base; |
| 372 | u32 l = 0; |
| 373 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 374 | if (!bank->regs->irqctrl) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 375 | return; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 376 | |
| 377 | reg += bank->regs->irqctrl; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 378 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 379 | l = readl_relaxed(reg); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 380 | if ((l >> gpio) & 1) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 381 | l &= ~(BIT(gpio)); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 382 | else |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 383 | l |= BIT(gpio); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 384 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 385 | writel_relaxed(l, reg); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 386 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 387 | #else |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 388 | static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 389 | #endif |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 390 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 391 | static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, |
| 392 | unsigned trigger) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 393 | { |
| 394 | void __iomem *reg = bank->base; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 395 | void __iomem *base = bank->base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 396 | u32 l = 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 397 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 398 | if (bank->regs->leveldetect0 && bank->regs->wkup_en) { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 399 | omap_set_gpio_trigger(bank, gpio, trigger); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 400 | } else if (bank->regs->irqctrl) { |
| 401 | reg += bank->regs->irqctrl; |
| 402 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 403 | l = readl_relaxed(reg); |
Janusz Krzysztofik | 2950157 | 2010-04-05 11:38:06 +0000 | [diff] [blame] | 404 | if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 405 | bank->toggle_mask |= BIT(gpio); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 406 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 407 | l |= BIT(gpio); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 408 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 409 | l &= ~(BIT(gpio)); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 410 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 411 | return -EINVAL; |
| 412 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 413 | writel_relaxed(l, reg); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 414 | } else if (bank->regs->edgectrl1) { |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 415 | if (gpio & 0x08) |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 416 | reg += bank->regs->edgectrl2; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 417 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 418 | reg += bank->regs->edgectrl1; |
| 419 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 420 | gpio &= 0x07; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 421 | l = readl_relaxed(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 422 | l &= ~(3 << (gpio << 1)); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 423 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 424 | l |= 2 << (gpio << 1); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 425 | if (trigger & IRQ_TYPE_EDGE_FALLING) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 426 | l |= BIT(gpio << 1); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 427 | |
| 428 | /* Enable wake-up during idle for dynamic tick */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 429 | omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 430 | bank->context.wake_en = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 431 | readl_relaxed(bank->base + bank->regs->wkup_en); |
| 432 | writel_relaxed(l, reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 433 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 434 | return 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 435 | } |
| 436 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 437 | static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 438 | { |
| 439 | if (bank->regs->pinctrl) { |
| 440 | void __iomem *reg = bank->base + bank->regs->pinctrl; |
| 441 | |
| 442 | /* Claim the pin for MPU */ |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 443 | writel_relaxed(readl_relaxed(reg) | (BIT(offset)), reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 444 | } |
| 445 | |
| 446 | if (bank->regs->ctrl && !BANK_USED(bank)) { |
| 447 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 448 | u32 ctrl; |
| 449 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 450 | ctrl = readl_relaxed(reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 451 | /* Module is enabled, clocks are not gated */ |
| 452 | ctrl &= ~GPIO_MOD_CTRL_BIT; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 453 | writel_relaxed(ctrl, reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 454 | bank->context.ctrl = ctrl; |
| 455 | } |
| 456 | } |
| 457 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 458 | static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 459 | { |
| 460 | void __iomem *base = bank->base; |
| 461 | |
| 462 | if (bank->regs->wkup_en && |
| 463 | !LINE_USED(bank->mod_usage, offset) && |
| 464 | !LINE_USED(bank->irq_usage, offset)) { |
| 465 | /* Disable wake-up during idle for dynamic tick */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 466 | omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 467 | bank->context.wake_en = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 468 | readl_relaxed(bank->base + bank->regs->wkup_en); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 469 | } |
| 470 | |
| 471 | if (bank->regs->ctrl && !BANK_USED(bank)) { |
| 472 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 473 | u32 ctrl; |
| 474 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 475 | ctrl = readl_relaxed(reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 476 | /* Module is disabled, clocks are gated */ |
| 477 | ctrl |= GPIO_MOD_CTRL_BIT; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 478 | writel_relaxed(ctrl, reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 479 | bank->context.ctrl = ctrl; |
| 480 | } |
| 481 | } |
| 482 | |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 483 | static int omap_gpio_is_input(struct gpio_bank *bank, unsigned offset) |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 484 | { |
| 485 | void __iomem *reg = bank->base + bank->regs->direction; |
| 486 | |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 487 | return readl_relaxed(reg) & BIT(offset); |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 488 | } |
| 489 | |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 490 | static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned offset) |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 491 | { |
| 492 | if (!LINE_USED(bank->mod_usage, offset)) { |
| 493 | omap_enable_gpio_module(bank, offset); |
| 494 | omap_set_gpio_direction(bank, offset, 1); |
| 495 | } |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 496 | bank->irq_usage |= BIT(offset); |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 497 | } |
| 498 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 499 | static int omap_gpio_irq_type(struct irq_data *d, unsigned type) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 500 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 501 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 502 | int retval; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 503 | unsigned long flags; |
Grygorii Strashko | ea5fbe8 | 2015-03-23 14:18:29 +0200 | [diff] [blame] | 504 | unsigned offset = d->hwirq; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 505 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 506 | if (type & ~IRQ_TYPE_SENSE_MASK) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 507 | return -EINVAL; |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 508 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 509 | if (!bank->regs->leveldetect0 && |
| 510 | (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 511 | return -EINVAL; |
| 512 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 513 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 514 | retval = omap_set_gpio_triggering(bank, offset, type); |
Grygorii Strashko | 977bd8a | 2015-06-24 17:54:17 +0300 | [diff] [blame] | 515 | if (retval) { |
Axel Lin | 627c89b | 2015-08-05 22:37:41 +0800 | [diff] [blame] | 516 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | 1562e46 | 2015-05-22 17:35:49 +0300 | [diff] [blame] | 517 | goto error; |
Grygorii Strashko | 977bd8a | 2015-06-24 17:54:17 +0300 | [diff] [blame] | 518 | } |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 519 | omap_gpio_init_irq(bank, offset); |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 520 | if (!omap_gpio_is_input(bank, offset)) { |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 521 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | 1562e46 | 2015-05-22 17:35:49 +0300 | [diff] [blame] | 522 | retval = -EINVAL; |
| 523 | goto error; |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 524 | } |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 525 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 526 | |
| 527 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
Thomas Gleixner | 43ec2e4 | 2015-06-23 15:52:39 +0200 | [diff] [blame] | 528 | irq_set_handler_locked(d, handle_level_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 529 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
Thomas Gleixner | 43ec2e4 | 2015-06-23 15:52:39 +0200 | [diff] [blame] | 530 | irq_set_handler_locked(d, handle_edge_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 531 | |
Grygorii Strashko | 1562e46 | 2015-05-22 17:35:49 +0300 | [diff] [blame] | 532 | return 0; |
| 533 | |
| 534 | error: |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 535 | return retval; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 536 | } |
| 537 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 538 | static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 539 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 540 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 541 | |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 542 | reg += bank->regs->irqstatus; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 543 | writel_relaxed(gpio_mask, reg); |
Hiroshi DOYU | bee7930 | 2006-09-25 12:41:46 +0300 | [diff] [blame] | 544 | |
| 545 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 546 | if (bank->regs->irqstatus2) { |
| 547 | reg = bank->base + bank->regs->irqstatus2; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 548 | writel_relaxed(gpio_mask, reg); |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 549 | } |
Roger Quadros | bedfd15 | 2009-04-23 11:10:50 -0700 | [diff] [blame] | 550 | |
| 551 | /* Flush posted write for the irq status to avoid spurious interrupts */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 552 | readl_relaxed(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 553 | } |
| 554 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 555 | static inline void omap_clear_gpio_irqstatus(struct gpio_bank *bank, |
| 556 | unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 557 | { |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 558 | omap_clear_gpio_irqbank(bank, BIT(offset)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 559 | } |
| 560 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 561 | static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 562 | { |
| 563 | void __iomem *reg = bank->base; |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 564 | u32 l; |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 565 | u32 mask = (BIT(bank->width)) - 1; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 566 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 567 | reg += bank->regs->irqenable; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 568 | l = readl_relaxed(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 569 | if (bank->regs->irqenable_inv) |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 570 | l = ~l; |
| 571 | l &= mask; |
| 572 | return l; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 573 | } |
| 574 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 575 | static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 576 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 577 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 578 | u32 l; |
| 579 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 580 | if (bank->regs->set_irqenable) { |
| 581 | reg += bank->regs->set_irqenable; |
| 582 | l = gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 583 | bank->context.irqenable1 |= gpio_mask; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 584 | } else { |
| 585 | reg += bank->regs->irqenable; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 586 | l = readl_relaxed(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 587 | if (bank->regs->irqenable_inv) |
| 588 | l &= ~gpio_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 589 | else |
| 590 | l |= gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 591 | bank->context.irqenable1 = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 592 | } |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 593 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 594 | writel_relaxed(l, reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 595 | } |
| 596 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 597 | static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 598 | { |
| 599 | void __iomem *reg = bank->base; |
| 600 | u32 l; |
| 601 | |
| 602 | if (bank->regs->clr_irqenable) { |
| 603 | reg += bank->regs->clr_irqenable; |
| 604 | l = gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 605 | bank->context.irqenable1 &= ~gpio_mask; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 606 | } else { |
| 607 | reg += bank->regs->irqenable; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 608 | l = readl_relaxed(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 609 | if (bank->regs->irqenable_inv) |
| 610 | l |= gpio_mask; |
| 611 | else |
| 612 | l &= ~gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 613 | bank->context.irqenable1 = l; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 614 | } |
| 615 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 616 | writel_relaxed(l, reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 617 | } |
| 618 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 619 | static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, |
| 620 | unsigned offset, int enable) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 621 | { |
Tarun Kanti DebBarma | 8276536c | 2011-11-25 15:27:37 +0530 | [diff] [blame] | 622 | if (enable) |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 623 | omap_enable_gpio_irqbank(bank, BIT(offset)); |
Tarun Kanti DebBarma | 8276536c | 2011-11-25 15:27:37 +0530 | [diff] [blame] | 624 | else |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 625 | omap_disable_gpio_irqbank(bank, BIT(offset)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 626 | } |
| 627 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 628 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 629 | static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 630 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 631 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 632 | |
Grygorii Strashko | 0c0451e | 2016-04-12 13:52:31 +0300 | [diff] [blame] | 633 | return irq_set_irq_wake(bank->irq, enable); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 634 | } |
| 635 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 636 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 637 | { |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 638 | struct gpio_bank *bank = gpiochip_get_data(chip); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 639 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 640 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 641 | /* |
| 642 | * If this is the first gpio_request for the bank, |
| 643 | * enable the bank module. |
| 644 | */ |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 645 | if (!BANK_USED(bank)) |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 646 | pm_runtime_get_sync(chip->parent); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 647 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 648 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | c351817 | 2015-05-22 17:35:51 +0300 | [diff] [blame] | 649 | omap_enable_gpio_module(bank, offset); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 650 | bank->mod_usage |= BIT(offset); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 651 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 652 | |
| 653 | return 0; |
| 654 | } |
| 655 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 656 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 657 | { |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 658 | struct gpio_bank *bank = gpiochip_get_data(chip); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 659 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 660 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 661 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 662 | bank->mod_usage &= ~(BIT(offset)); |
Grygorii Strashko | 5f982c7 | 2015-05-22 17:35:48 +0300 | [diff] [blame] | 663 | if (!LINE_USED(bank->irq_usage, offset)) { |
| 664 | omap_set_gpio_direction(bank, offset, 1); |
| 665 | omap_clear_gpio_debounce(bank, offset); |
| 666 | } |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 667 | omap_disable_gpio_module(bank, offset); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 668 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 669 | |
| 670 | /* |
| 671 | * If this is the last gpio to be freed in the bank, |
| 672 | * disable the bank module. |
| 673 | */ |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 674 | if (!BANK_USED(bank)) |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 675 | pm_runtime_put(chip->parent); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 676 | } |
| 677 | |
| 678 | /* |
| 679 | * We need to unmask the GPIO bank interrupt as soon as possible to |
| 680 | * avoid missing GPIO interrupts for other lines in the bank. |
| 681 | * Then we need to mask-read-clear-unmask the triggered GPIO lines |
| 682 | * in the bank to avoid missing nested interrupts for a GPIO line. |
| 683 | * If we wait to unmask individual GPIO lines in the bank after the |
| 684 | * line's interrupt handler has been run, we may miss some nested |
| 685 | * interrupts. |
| 686 | */ |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 687 | static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 688 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 689 | void __iomem *isr_reg = NULL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 690 | u32 isr; |
Jon Hunter | 3513cde | 2013-04-04 15:16:14 -0500 | [diff] [blame] | 691 | unsigned int bit; |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 692 | struct gpio_bank *bank = gpiobank; |
| 693 | unsigned long wa_lock_flags; |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 694 | unsigned long lock_flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 695 | |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 696 | isr_reg = bank->base + bank->regs->irqstatus; |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 697 | if (WARN_ON(!isr_reg)) |
| 698 | goto exit; |
| 699 | |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 700 | pm_runtime_get_sync(bank->chip.parent); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 701 | |
Laurent Navet | e83507b | 2013-03-20 13:15:57 +0100 | [diff] [blame] | 702 | while (1) { |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 703 | u32 isr_saved, level_mask = 0; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 704 | u32 enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 705 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 706 | raw_spin_lock_irqsave(&bank->lock, lock_flags); |
| 707 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 708 | enabled = omap_get_gpio_irqbank_mask(bank); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 709 | isr_saved = isr = readl_relaxed(isr_reg) & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 710 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 711 | if (bank->level_mask) |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 712 | level_mask = bank->level_mask & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 713 | |
| 714 | /* clear edge sensitive interrupts before handler(s) are |
| 715 | called so that we don't miss any interrupt occurred while |
| 716 | executing them */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 717 | omap_disable_gpio_irqbank(bank, isr_saved & ~level_mask); |
| 718 | omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask); |
| 719 | omap_enable_gpio_irqbank(bank, isr_saved & ~level_mask); |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 720 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 721 | raw_spin_unlock_irqrestore(&bank->lock, lock_flags); |
| 722 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 723 | if (!isr) |
| 724 | break; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 725 | |
Jon Hunter | 3513cde | 2013-04-04 15:16:14 -0500 | [diff] [blame] | 726 | while (isr) { |
| 727 | bit = __ffs(isr); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 728 | isr &= ~(BIT(bit)); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 729 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 730 | raw_spin_lock_irqsave(&bank->lock, lock_flags); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 731 | /* |
| 732 | * Some chips can't respond to both rising and falling |
| 733 | * at the same time. If this irq was requested with |
| 734 | * both flags, we need to flip the ICR data for the IRQ |
| 735 | * to respond to the IRQ for the opposite direction. |
| 736 | * This will be indicated in the bank toggle_mask. |
| 737 | */ |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 738 | if (bank->toggle_mask & (BIT(bit))) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 739 | omap_toggle_gpio_edge_triggering(bank, bit); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 740 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 741 | raw_spin_unlock_irqrestore(&bank->lock, lock_flags); |
| 742 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 743 | raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); |
| 744 | |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 745 | generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, |
| 746 | bit)); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 747 | |
| 748 | raw_spin_unlock_irqrestore(&bank->wa_lock, |
| 749 | wa_lock_flags); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 750 | } |
Tony Lindgren | 1a8bfa1 | 2005-11-10 14:26:50 +0000 | [diff] [blame] | 751 | } |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 752 | exit: |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 753 | pm_runtime_put(bank->chip.parent); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 754 | return IRQ_HANDLED; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 755 | } |
| 756 | |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 757 | static unsigned int omap_gpio_irq_startup(struct irq_data *d) |
| 758 | { |
| 759 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 760 | unsigned long flags; |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 761 | unsigned offset = d->hwirq; |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 762 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 763 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | 121dcb7 | 2015-05-22 17:35:52 +0300 | [diff] [blame] | 764 | |
| 765 | if (!LINE_USED(bank->mod_usage, offset)) |
| 766 | omap_set_gpio_direction(bank, offset, 1); |
| 767 | else if (!omap_gpio_is_input(bank, offset)) |
| 768 | goto err; |
| 769 | omap_enable_gpio_module(bank, offset); |
| 770 | bank->irq_usage |= BIT(offset); |
| 771 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 772 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 773 | omap_gpio_unmask_irq(d); |
| 774 | |
| 775 | return 0; |
Grygorii Strashko | 121dcb7 | 2015-05-22 17:35:52 +0300 | [diff] [blame] | 776 | err: |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 777 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | 121dcb7 | 2015-05-22 17:35:52 +0300 | [diff] [blame] | 778 | return -EINVAL; |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 779 | } |
| 780 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 781 | static void omap_gpio_irq_shutdown(struct irq_data *d) |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 782 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 783 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 784 | unsigned long flags; |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 785 | unsigned offset = d->hwirq; |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 786 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 787 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 788 | bank->irq_usage &= ~(BIT(offset)); |
Grygorii Strashko | 6e96c1b | 2015-05-22 17:35:50 +0300 | [diff] [blame] | 789 | omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
Russell King | f7fa002 | 2019-06-10 20:10:44 +0300 | [diff] [blame] | 790 | omap_clear_gpio_irqstatus(bank, offset); |
| 791 | omap_set_gpio_irqenable(bank, offset, 0); |
Grygorii Strashko | 6e96c1b | 2015-05-22 17:35:50 +0300 | [diff] [blame] | 792 | if (!LINE_USED(bank->mod_usage, offset)) |
| 793 | omap_clear_gpio_debounce(bank, offset); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 794 | omap_disable_gpio_module(bank, offset); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 795 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | aca82d1 | 2015-09-25 12:28:02 -0700 | [diff] [blame] | 796 | } |
| 797 | |
| 798 | static void omap_gpio_irq_bus_lock(struct irq_data *data) |
| 799 | { |
| 800 | struct gpio_bank *bank = omap_irq_data_get_bank(data); |
| 801 | |
| 802 | if (!BANK_USED(bank)) |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 803 | pm_runtime_get_sync(bank->chip.parent); |
Grygorii Strashko | aca82d1 | 2015-09-25 12:28:02 -0700 | [diff] [blame] | 804 | } |
| 805 | |
| 806 | static void gpio_irq_bus_sync_unlock(struct irq_data *data) |
| 807 | { |
| 808 | struct gpio_bank *bank = omap_irq_data_get_bank(data); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 809 | |
| 810 | /* |
| 811 | * If this is the last IRQ to be freed in the bank, |
| 812 | * disable the bank module. |
| 813 | */ |
| 814 | if (!BANK_USED(bank)) |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 815 | pm_runtime_put(bank->chip.parent); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 816 | } |
| 817 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 818 | static void omap_gpio_ack_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 819 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 820 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 821 | unsigned offset = d->hwirq; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 822 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 823 | omap_clear_gpio_irqstatus(bank, offset); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 824 | } |
| 825 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 826 | static void omap_gpio_mask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 827 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 828 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 829 | unsigned offset = d->hwirq; |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 830 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 831 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 832 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 833 | omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
Russell King | f7fa002 | 2019-06-10 20:10:44 +0300 | [diff] [blame] | 834 | omap_set_gpio_irqenable(bank, offset, 0); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 835 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 836 | } |
| 837 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 838 | static void omap_gpio_unmask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 839 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 840 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 841 | unsigned offset = d->hwirq; |
Thomas Gleixner | 8c04a17 | 2011-03-24 12:40:15 +0100 | [diff] [blame] | 842 | u32 trigger = irqd_get_trigger_type(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 843 | unsigned long flags; |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 844 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 845 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 846 | omap_set_gpio_irqenable(bank, offset, 1); |
Russell King | 8b1e0dd | 2019-03-01 11:02:52 -0800 | [diff] [blame] | 847 | |
| 848 | /* |
| 849 | * For level-triggered GPIOs, clearing must be done after the source |
| 850 | * is cleared, thus after the handler has run. OMAP4 needs this done |
| 851 | * after enabing the interrupt to clear the wakeup status. |
| 852 | */ |
Russell King | f7fa002 | 2019-06-10 20:10:44 +0300 | [diff] [blame] | 853 | if (bank->regs->leveldetect0 && bank->regs->wkup_en && |
| 854 | trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) |
Russell King | 8b1e0dd | 2019-03-01 11:02:52 -0800 | [diff] [blame] | 855 | omap_clear_gpio_irqstatus(bank, offset); |
| 856 | |
Russell King | f7fa002 | 2019-06-10 20:10:44 +0300 | [diff] [blame] | 857 | if (trigger) |
| 858 | omap_set_gpio_triggering(bank, offset, trigger); |
| 859 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 860 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 861 | } |
| 862 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 863 | /*---------------------------------------------------------------------*/ |
| 864 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 865 | static int omap_mpuio_suspend_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 866 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 867 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 868 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 869 | void __iomem *mask_reg = bank->base + |
| 870 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 871 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 872 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 873 | raw_spin_lock_irqsave(&bank->lock, flags); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 874 | writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 875 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 876 | |
| 877 | return 0; |
| 878 | } |
| 879 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 880 | static int omap_mpuio_resume_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 881 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 882 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 883 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 884 | void __iomem *mask_reg = bank->base + |
| 885 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 886 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 887 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 888 | raw_spin_lock_irqsave(&bank->lock, flags); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 889 | writel_relaxed(bank->context.wake_en, mask_reg); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 890 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 891 | |
| 892 | return 0; |
| 893 | } |
| 894 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 895 | static const struct dev_pm_ops omap_mpuio_dev_pm_ops = { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 896 | .suspend_noirq = omap_mpuio_suspend_noirq, |
| 897 | .resume_noirq = omap_mpuio_resume_noirq, |
| 898 | }; |
| 899 | |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 900 | /* use platform_driver for this. */ |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 901 | static struct platform_driver omap_mpuio_driver = { |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 902 | .driver = { |
| 903 | .name = "mpuio", |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 904 | .pm = &omap_mpuio_dev_pm_ops, |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 905 | }, |
| 906 | }; |
| 907 | |
| 908 | static struct platform_device omap_mpuio_device = { |
| 909 | .name = "mpuio", |
| 910 | .id = -1, |
| 911 | .dev = { |
| 912 | .driver = &omap_mpuio_driver.driver, |
| 913 | } |
| 914 | /* could list the /proc/iomem resources */ |
| 915 | }; |
| 916 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 917 | static inline void omap_mpuio_init(struct gpio_bank *bank) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 918 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 919 | platform_set_drvdata(&omap_mpuio_device, bank); |
David Brownell | fcf126d | 2007-04-02 12:46:47 -0700 | [diff] [blame] | 920 | |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 921 | if (platform_driver_register(&omap_mpuio_driver) == 0) |
| 922 | (void) platform_device_register(&omap_mpuio_device); |
| 923 | } |
| 924 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 925 | /*---------------------------------------------------------------------*/ |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 926 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 927 | static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 928 | { |
| 929 | struct gpio_bank *bank; |
| 930 | unsigned long flags; |
| 931 | void __iomem *reg; |
| 932 | int dir; |
| 933 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 934 | bank = gpiochip_get_data(chip); |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 935 | reg = bank->base + bank->regs->direction; |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 936 | raw_spin_lock_irqsave(&bank->lock, flags); |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 937 | dir = !!(readl_relaxed(reg) & BIT(offset)); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 938 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 939 | return dir; |
| 940 | } |
| 941 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 942 | static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 943 | { |
| 944 | struct gpio_bank *bank; |
| 945 | unsigned long flags; |
| 946 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 947 | bank = gpiochip_get_data(chip); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 948 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 949 | omap_set_gpio_direction(bank, offset, 1); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 950 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 951 | return 0; |
| 952 | } |
| 953 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 954 | static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 955 | { |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 956 | struct gpio_bank *bank; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 957 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 958 | bank = gpiochip_get_data(chip); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 959 | |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 960 | if (omap_gpio_is_input(bank, offset)) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 961 | return omap_get_gpio_datain(bank, offset); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 962 | else |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 963 | return omap_get_gpio_dataout(bank, offset); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 964 | } |
| 965 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 966 | static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 967 | { |
| 968 | struct gpio_bank *bank; |
| 969 | unsigned long flags; |
| 970 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 971 | bank = gpiochip_get_data(chip); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 972 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 973 | bank->set_dataout(bank, offset, value); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 974 | omap_set_gpio_direction(bank, offset, 0); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 975 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Javier Martinez Canillas | 2f56e0a | 2013-10-16 02:47:30 +0200 | [diff] [blame] | 976 | return 0; |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 977 | } |
| 978 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 979 | static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, |
| 980 | unsigned debounce) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 981 | { |
| 982 | struct gpio_bank *bank; |
| 983 | unsigned long flags; |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 984 | int ret; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 985 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 986 | bank = gpiochip_get_data(chip); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 987 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 988 | raw_spin_lock_irqsave(&bank->lock, flags); |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 989 | ret = omap2_set_gpio_debounce(bank, offset, debounce); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 990 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 991 | |
David Rivshin | 198ab40 | 2017-04-24 18:56:50 -0400 | [diff] [blame] | 992 | if (ret) |
| 993 | dev_info(chip->parent, |
| 994 | "Could not set line %u debounce to %u microseconds (%d)", |
| 995 | offset, debounce, ret); |
| 996 | |
| 997 | return ret; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 998 | } |
| 999 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1000 | static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 1001 | { |
| 1002 | struct gpio_bank *bank; |
| 1003 | unsigned long flags; |
| 1004 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 1005 | bank = gpiochip_get_data(chip); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1006 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1007 | bank->set_dataout(bank, offset, value); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1008 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 1009 | } |
| 1010 | |
| 1011 | /*---------------------------------------------------------------------*/ |
| 1012 | |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1013 | static void __init omap_gpio_show_rev(struct gpio_bank *bank) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1014 | { |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1015 | static bool called; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1016 | u32 rev; |
| 1017 | |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1018 | if (called || bank->regs->revision == USHRT_MAX) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1019 | return; |
| 1020 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1021 | rev = readw_relaxed(bank->base + bank->regs->revision); |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1022 | pr_info("OMAP GPIO hardware version %d.%d\n", |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1023 | (rev >> 4) & 0x0f, rev & 0x0f); |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1024 | |
| 1025 | called = true; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1026 | } |
| 1027 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1028 | static void omap_gpio_mod_init(struct gpio_bank *bank) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1029 | { |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1030 | void __iomem *base = bank->base; |
| 1031 | u32 l = 0xffffffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1032 | |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1033 | if (bank->width == 16) |
| 1034 | l = 0xffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1035 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1036 | if (bank->is_mpuio) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1037 | writel_relaxed(l, bank->base + bank->regs->irqenable); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1038 | return; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1039 | } |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1040 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1041 | omap_gpio_rmw(base, bank->regs->irqenable, l, |
| 1042 | bank->regs->irqenable_inv); |
| 1043 | omap_gpio_rmw(base, bank->regs->irqstatus, l, |
| 1044 | !bank->regs->irqenable_inv); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1045 | if (bank->regs->debounce_en) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1046 | writel_relaxed(0, base + bank->regs->debounce_en); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1047 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1048 | /* Save OE default value (0xffffffff) in the context */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1049 | bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1050 | /* Initialize interface clk ungated, module enabled */ |
| 1051 | if (bank->regs->ctrl) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1052 | writel_relaxed(0, base + bank->regs->ctrl); |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1053 | } |
| 1054 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1055 | static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1056 | { |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1057 | static int gpio; |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1058 | int irq_base = 0; |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1059 | int ret; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1060 | |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1061 | /* |
| 1062 | * REVISIT eventually switch from OMAP-specific gpio structs |
| 1063 | * over to the generic ones |
| 1064 | */ |
| 1065 | bank->chip.request = omap_gpio_request; |
| 1066 | bank->chip.free = omap_gpio_free; |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1067 | bank->chip.get_direction = omap_gpio_get_direction; |
| 1068 | bank->chip.direction_input = omap_gpio_input; |
| 1069 | bank->chip.get = omap_gpio_get; |
| 1070 | bank->chip.direction_output = omap_gpio_output; |
| 1071 | bank->chip.set_debounce = omap_gpio_debounce; |
| 1072 | bank->chip.set = omap_gpio_set; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1073 | if (bank->is_mpuio) { |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1074 | bank->chip.label = "mpuio"; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 1075 | if (bank->regs->wkup_en) |
Linus Walleij | 58383c7 | 2015-11-04 09:56:26 +0100 | [diff] [blame] | 1076 | bank->chip.parent = &omap_mpuio_device.dev; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1077 | bank->chip.base = OMAP_MPUIO(0); |
| 1078 | } else { |
| 1079 | bank->chip.label = "gpio"; |
| 1080 | bank->chip.base = gpio; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1081 | } |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1082 | bank->chip.ngpio = bank->width; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1083 | |
Linus Walleij | d99f7ae | 2015-12-07 11:16:00 +0100 | [diff] [blame] | 1084 | ret = gpiochip_add_data(&bank->chip, bank); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1085 | if (ret) { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1086 | dev_err(bank->chip.parent, |
| 1087 | "Could not register gpio chip %d\n", ret); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1088 | return ret; |
| 1089 | } |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1090 | |
Tony Lindgren | 46d4f7c | 2015-09-03 10:31:27 -0700 | [diff] [blame] | 1091 | if (!bank->is_mpuio) |
| 1092 | gpio += bank->width; |
| 1093 | |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1094 | #ifdef CONFIG_ARCH_OMAP1 |
| 1095 | /* |
| 1096 | * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop |
| 1097 | * irq_alloc_descs() since a base IRQ offset will no longer be needed. |
| 1098 | */ |
| 1099 | irq_base = irq_alloc_descs(-1, 0, bank->width, 0); |
| 1100 | if (irq_base < 0) { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1101 | dev_err(bank->chip.parent, "Couldn't allocate IRQ numbers\n"); |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1102 | return -ENODEV; |
| 1103 | } |
| 1104 | #endif |
| 1105 | |
Tony Lindgren | d2d05c6 | 2015-04-23 16:54:17 -0700 | [diff] [blame] | 1106 | /* MPUIO is a bit different, reading IRQ status clears it */ |
| 1107 | if (bank->is_mpuio) { |
| 1108 | irqc->irq_ack = dummy_irq_chip.irq_ack; |
Tony Lindgren | d2d05c6 | 2015-04-23 16:54:17 -0700 | [diff] [blame] | 1109 | if (!bank->regs->wkup_en) |
| 1110 | irqc->irq_set_wake = NULL; |
| 1111 | } |
| 1112 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1113 | ret = gpiochip_irqchip_add(&bank->chip, irqc, |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1114 | irq_base, handle_bad_irq, |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1115 | IRQ_TYPE_NONE); |
| 1116 | |
| 1117 | if (ret) { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1118 | dev_err(bank->chip.parent, |
| 1119 | "Couldn't add irqchip to gpiochip %d\n", ret); |
Linus Walleij | da26d5d | 2014-09-16 15:11:41 -0700 | [diff] [blame] | 1120 | gpiochip_remove(&bank->chip); |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1121 | return -ENODEV; |
| 1122 | } |
| 1123 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1124 | gpiochip_set_chained_irqchip(&bank->chip, irqc, bank->irq, NULL); |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1125 | |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1126 | ret = devm_request_irq(bank->chip.parent, bank->irq, |
| 1127 | omap_gpio_irq_handler, |
| 1128 | 0, dev_name(bank->chip.parent), bank); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1129 | if (ret) |
| 1130 | gpiochip_remove(&bank->chip); |
| 1131 | |
| 1132 | return ret; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1133 | } |
| 1134 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1135 | static const struct of_device_id omap_gpio_match[]; |
| 1136 | |
Bill Pemberton | 3836309 | 2012-11-19 13:22:34 -0500 | [diff] [blame] | 1137 | static int omap_gpio_probe(struct platform_device *pdev) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1138 | { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1139 | struct device *dev = &pdev->dev; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1140 | struct device_node *node = dev->of_node; |
| 1141 | const struct of_device_id *match; |
Uwe Kleine-König | f6817a2 | 2012-05-21 21:57:39 +0200 | [diff] [blame] | 1142 | const struct omap_gpio_platform_data *pdata; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1143 | struct resource *res; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1144 | struct gpio_bank *bank; |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1145 | struct irq_chip *irqc; |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1146 | int ret; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1147 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1148 | match = of_match_device(of_match_ptr(omap_gpio_match), dev); |
| 1149 | |
Jingoo Han | e56aee1 | 2013-07-30 17:08:05 +0900 | [diff] [blame] | 1150 | pdata = match ? match->data : dev_get_platdata(dev); |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1151 | if (!pdata) |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1152 | return -EINVAL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1153 | |
Tobias Klauser | 086d585 | 2012-10-05 11:37:38 +0200 | [diff] [blame] | 1154 | bank = devm_kzalloc(dev, sizeof(struct gpio_bank), GFP_KERNEL); |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1155 | if (!bank) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1156 | dev_err(dev, "Memory alloc failed\n"); |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1157 | return -ENOMEM; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1158 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1159 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1160 | irqc = devm_kzalloc(dev, sizeof(*irqc), GFP_KERNEL); |
| 1161 | if (!irqc) |
| 1162 | return -ENOMEM; |
| 1163 | |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 1164 | irqc->irq_startup = omap_gpio_irq_startup, |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1165 | irqc->irq_shutdown = omap_gpio_irq_shutdown, |
| 1166 | irqc->irq_ack = omap_gpio_ack_irq, |
| 1167 | irqc->irq_mask = omap_gpio_mask_irq, |
| 1168 | irqc->irq_unmask = omap_gpio_unmask_irq, |
| 1169 | irqc->irq_set_type = omap_gpio_irq_type, |
| 1170 | irqc->irq_set_wake = omap_gpio_wake_enable, |
Grygorii Strashko | aca82d1 | 2015-09-25 12:28:02 -0700 | [diff] [blame] | 1171 | irqc->irq_bus_lock = omap_gpio_irq_bus_lock, |
| 1172 | irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1173 | irqc->name = dev_name(&pdev->dev); |
Grygorii Strashko | 0c0451e | 2016-04-12 13:52:31 +0300 | [diff] [blame] | 1174 | irqc->flags = IRQCHIP_MASK_ON_SUSPEND; |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1175 | |
Grygorii Strashko | 89d18e3 | 2015-08-18 14:10:53 +0300 | [diff] [blame] | 1176 | bank->irq = platform_get_irq(pdev, 0); |
| 1177 | if (bank->irq <= 0) { |
| 1178 | if (!bank->irq) |
| 1179 | bank->irq = -ENXIO; |
| 1180 | if (bank->irq != -EPROBE_DEFER) |
| 1181 | dev_err(dev, |
| 1182 | "can't get irq resource ret=%d\n", bank->irq); |
| 1183 | return bank->irq; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1184 | } |
| 1185 | |
Linus Walleij | 58383c7 | 2015-11-04 09:56:26 +0100 | [diff] [blame] | 1186 | bank->chip.parent = dev; |
Grygorii Strashko | c23837c | 2015-06-25 18:13:33 +0300 | [diff] [blame] | 1187 | bank->chip.owner = THIS_MODULE; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1188 | bank->dbck_flag = pdata->dbck_flag; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 1189 | bank->stride = pdata->bank_stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1190 | bank->width = pdata->bank_width; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1191 | bank->is_mpuio = pdata->is_mpuio; |
Charulatha V | 803a243 | 2011-05-05 17:04:12 +0530 | [diff] [blame] | 1192 | bank->non_wakeup_gpios = pdata->non_wakeup_gpios; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1193 | bank->regs = pdata->regs; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1194 | #ifdef CONFIG_OF_GPIO |
| 1195 | bank->chip.of_node = of_node_get(node); |
| 1196 | #endif |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1197 | if (node) { |
| 1198 | if (!of_property_read_bool(node, "ti,gpio-always-on")) |
| 1199 | bank->loses_context = true; |
| 1200 | } else { |
| 1201 | bank->loses_context = pdata->loses_context; |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1202 | |
| 1203 | if (bank->loses_context) |
| 1204 | bank->get_context_loss_count = |
| 1205 | pdata->get_context_loss_count; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1206 | } |
| 1207 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1208 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1209 | bank->set_dataout = omap_set_gpio_dataout_reg; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1210 | else |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1211 | bank->set_dataout = omap_set_gpio_dataout_mask; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1212 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1213 | raw_spin_lock_init(&bank->lock); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1214 | raw_spin_lock_init(&bank->wa_lock); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1215 | |
| 1216 | /* Static mapping, never released */ |
| 1217 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Jingoo Han | 717f70e | 2014-02-12 11:51:38 +0900 | [diff] [blame] | 1218 | bank->base = devm_ioremap_resource(dev, res); |
| 1219 | if (IS_ERR(bank->base)) { |
Jingoo Han | 717f70e | 2014-02-12 11:51:38 +0900 | [diff] [blame] | 1220 | return PTR_ERR(bank->base); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1221 | } |
| 1222 | |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 1223 | if (bank->dbck_flag) { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1224 | bank->dbck = devm_clk_get(dev, "dbclk"); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 1225 | if (IS_ERR(bank->dbck)) { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1226 | dev_err(dev, |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 1227 | "Could not get gpio dbck. Disable debounce\n"); |
| 1228 | bank->dbck_flag = false; |
| 1229 | } else { |
| 1230 | clk_prepare(bank->dbck); |
| 1231 | } |
| 1232 | } |
| 1233 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1234 | platform_set_drvdata(pdev, bank); |
| 1235 | |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1236 | pm_runtime_enable(dev); |
| 1237 | pm_runtime_irq_safe(dev); |
| 1238 | pm_runtime_get_sync(dev); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1239 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1240 | if (bank->is_mpuio) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1241 | omap_mpuio_init(bank); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1242 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1243 | omap_gpio_mod_init(bank); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1244 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1245 | ret = omap_gpio_chip_init(bank, irqc); |
Tony Lindgren | 5e606ab | 2015-08-28 11:44:49 -0700 | [diff] [blame] | 1246 | if (ret) { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1247 | pm_runtime_put_sync(dev); |
| 1248 | pm_runtime_disable(dev); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1249 | return ret; |
Tony Lindgren | 5e606ab | 2015-08-28 11:44:49 -0700 | [diff] [blame] | 1250 | } |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1251 | |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1252 | omap_gpio_show_rev(bank); |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1253 | |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1254 | pm_runtime_put(dev); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1255 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1256 | list_add_tail(&bank->node, &omap_gpio_list); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1257 | |
Jon Hunter | 879fe32 | 2013-04-04 15:16:12 -0500 | [diff] [blame] | 1258 | return 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1259 | } |
| 1260 | |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1261 | static int omap_gpio_remove(struct platform_device *pdev) |
| 1262 | { |
| 1263 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1264 | |
| 1265 | list_del(&bank->node); |
| 1266 | gpiochip_remove(&bank->chip); |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1267 | pm_runtime_disable(&pdev->dev); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 1268 | if (bank->dbck_flag) |
| 1269 | clk_unprepare(bank->dbck); |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1270 | |
| 1271 | return 0; |
| 1272 | } |
| 1273 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1274 | #ifdef CONFIG_ARCH_OMAP2PLUS |
| 1275 | |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1276 | #if defined(CONFIG_PM) |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1277 | static void omap_gpio_restore_context(struct gpio_bank *bank); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1278 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1279 | static int omap_gpio_runtime_suspend(struct device *dev) |
| 1280 | { |
| 1281 | struct platform_device *pdev = to_platform_device(dev); |
| 1282 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1283 | u32 l1 = 0, l2 = 0; |
| 1284 | unsigned long flags; |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1285 | u32 wake_low, wake_hi; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1286 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1287 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1288 | |
| 1289 | /* |
| 1290 | * Only edges can generate a wakeup event to the PRCM. |
| 1291 | * |
| 1292 | * Therefore, ensure any wake-up capable GPIOs have |
| 1293 | * edge-detection enabled before going idle to ensure a wakeup |
| 1294 | * to the PRCM is generated on a GPIO transition. (c.f. 34xx |
| 1295 | * NDA TRM 25.5.3.1) |
| 1296 | * |
| 1297 | * The normal values will be restored upon ->runtime_resume() |
| 1298 | * by writing back the values saved in bank->context. |
| 1299 | */ |
| 1300 | wake_low = bank->context.leveldetect0 & bank->context.wake_en; |
| 1301 | if (wake_low) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1302 | writel_relaxed(wake_low | bank->context.fallingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1303 | bank->base + bank->regs->fallingdetect); |
| 1304 | wake_hi = bank->context.leveldetect1 & bank->context.wake_en; |
| 1305 | if (wake_hi) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1306 | writel_relaxed(wake_hi | bank->context.risingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1307 | bank->base + bank->regs->risingdetect); |
| 1308 | |
Kevin Hilman | b3c64bc | 2012-05-17 16:42:16 -0700 | [diff] [blame] | 1309 | if (!bank->enabled_non_wakeup_gpios) |
| 1310 | goto update_gpio_context_count; |
| 1311 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1312 | if (bank->power_mode != OFF_MODE) { |
| 1313 | bank->power_mode = 0; |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 1314 | goto update_gpio_context_count; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1315 | } |
| 1316 | /* |
| 1317 | * If going to OFF, remove triggering for all |
| 1318 | * non-wakeup GPIOs. Otherwise spurious IRQs will be |
| 1319 | * generated. See OMAP2420 Errata item 1.101. |
| 1320 | */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1321 | bank->saved_datain = readl_relaxed(bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1322 | bank->regs->datain); |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1323 | l1 = bank->context.fallingdetect; |
| 1324 | l2 = bank->context.risingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1325 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1326 | l1 &= ~bank->enabled_non_wakeup_gpios; |
| 1327 | l2 &= ~bank->enabled_non_wakeup_gpios; |
| 1328 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1329 | writel_relaxed(l1, bank->base + bank->regs->fallingdetect); |
| 1330 | writel_relaxed(l2, bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1331 | |
| 1332 | bank->workaround_enabled = true; |
| 1333 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 1334 | update_gpio_context_count: |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1335 | if (bank->get_context_loss_count) |
| 1336 | bank->context_loss_count = |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1337 | bank->get_context_loss_count(dev); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1338 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1339 | omap_gpio_dbck_disable(bank); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1340 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1341 | |
| 1342 | return 0; |
| 1343 | } |
| 1344 | |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1345 | static void omap_gpio_init_context(struct gpio_bank *p); |
| 1346 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1347 | static int omap_gpio_runtime_resume(struct device *dev) |
| 1348 | { |
| 1349 | struct platform_device *pdev = to_platform_device(dev); |
| 1350 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1351 | u32 l = 0, gen, gen0, gen1; |
| 1352 | unsigned long flags; |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1353 | int c; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1354 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1355 | raw_spin_lock_irqsave(&bank->lock, flags); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1356 | |
| 1357 | /* |
| 1358 | * On the first resume during the probe, the context has not |
| 1359 | * been initialised and so initialise it now. Also initialise |
| 1360 | * the context loss count. |
| 1361 | */ |
| 1362 | if (bank->loses_context && !bank->context_valid) { |
| 1363 | omap_gpio_init_context(bank); |
| 1364 | |
| 1365 | if (bank->get_context_loss_count) |
| 1366 | bank->context_loss_count = |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1367 | bank->get_context_loss_count(dev); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1368 | } |
| 1369 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1370 | omap_gpio_dbck_enable(bank); |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1371 | |
| 1372 | /* |
| 1373 | * In ->runtime_suspend(), level-triggered, wakeup-enabled |
| 1374 | * GPIOs were set to edge trigger also in order to be able to |
| 1375 | * generate a PRCM wakeup. Here we restore the |
| 1376 | * pre-runtime_suspend() values for edge triggering. |
| 1377 | */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1378 | writel_relaxed(bank->context.fallingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1379 | bank->base + bank->regs->fallingdetect); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1380 | writel_relaxed(bank->context.risingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1381 | bank->base + bank->regs->risingdetect); |
| 1382 | |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1383 | if (bank->loses_context) { |
| 1384 | if (!bank->get_context_loss_count) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1385 | omap_gpio_restore_context(bank); |
| 1386 | } else { |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1387 | c = bank->get_context_loss_count(dev); |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1388 | if (c != bank->context_loss_count) { |
| 1389 | omap_gpio_restore_context(bank); |
| 1390 | } else { |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1391 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1392 | return 0; |
| 1393 | } |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1394 | } |
| 1395 | } |
| 1396 | |
Tarun Kanti DebBarma | 1b128703 | 2012-04-27 19:43:38 +0530 | [diff] [blame] | 1397 | if (!bank->workaround_enabled) { |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1398 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 1b128703 | 2012-04-27 19:43:38 +0530 | [diff] [blame] | 1399 | return 0; |
| 1400 | } |
| 1401 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1402 | l = readl_relaxed(bank->base + bank->regs->datain); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1403 | |
| 1404 | /* |
| 1405 | * Check if any of the non-wakeup interrupt GPIOs have changed |
| 1406 | * state. If so, generate an IRQ by software. This is |
| 1407 | * horribly racy, but it's the best we can do to work around |
| 1408 | * this silicon bug. |
| 1409 | */ |
| 1410 | l ^= bank->saved_datain; |
| 1411 | l &= bank->enabled_non_wakeup_gpios; |
| 1412 | |
| 1413 | /* |
| 1414 | * No need to generate IRQs for the rising edge for gpio IRQs |
| 1415 | * configured with falling edge only; and vice versa. |
| 1416 | */ |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1417 | gen0 = l & bank->context.fallingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1418 | gen0 &= bank->saved_datain; |
| 1419 | |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1420 | gen1 = l & bank->context.risingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1421 | gen1 &= ~(bank->saved_datain); |
| 1422 | |
| 1423 | /* FIXME: Consider GPIO IRQs with level detections properly! */ |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1424 | gen = l & (~(bank->context.fallingdetect) & |
| 1425 | ~(bank->context.risingdetect)); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1426 | /* Consider all GPIO IRQs needed to be updated */ |
| 1427 | gen |= gen0 | gen1; |
| 1428 | |
| 1429 | if (gen) { |
| 1430 | u32 old0, old1; |
| 1431 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1432 | old0 = readl_relaxed(bank->base + bank->regs->leveldetect0); |
| 1433 | old1 = readl_relaxed(bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1434 | |
Tarun Kanti DebBarma | 4e962e8 | 2012-04-27 19:43:37 +0530 | [diff] [blame] | 1435 | if (!bank->regs->irqstatus_raw0) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1436 | writel_relaxed(old0 | gen, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1437 | bank->regs->leveldetect0); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1438 | writel_relaxed(old1 | gen, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1439 | bank->regs->leveldetect1); |
| 1440 | } |
| 1441 | |
Tarun Kanti DebBarma | 4e962e8 | 2012-04-27 19:43:37 +0530 | [diff] [blame] | 1442 | if (bank->regs->irqstatus_raw0) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1443 | writel_relaxed(old0 | l, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1444 | bank->regs->leveldetect0); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1445 | writel_relaxed(old1 | l, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1446 | bank->regs->leveldetect1); |
| 1447 | } |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1448 | writel_relaxed(old0, bank->base + bank->regs->leveldetect0); |
| 1449 | writel_relaxed(old1, bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1450 | } |
| 1451 | |
| 1452 | bank->workaround_enabled = false; |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1453 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1454 | |
| 1455 | return 0; |
| 1456 | } |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1457 | #endif /* CONFIG_PM */ |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1458 | |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1459 | #if IS_BUILTIN(CONFIG_GPIO_OMAP) |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1460 | void omap2_gpio_prepare_for_idle(int pwr_mode) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1461 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1462 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1463 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1464 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 1465 | if (!BANK_USED(bank) || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1466 | continue; |
| 1467 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1468 | bank->power_mode = pwr_mode; |
| 1469 | |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1470 | pm_runtime_put_sync_suspend(bank->chip.parent); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1471 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1472 | } |
| 1473 | |
Kevin Hilman | 43ffcd9 | 2009-01-27 11:09:24 -0800 | [diff] [blame] | 1474 | void omap2_gpio_resume_after_idle(void) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1475 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1476 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1477 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1478 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 1479 | if (!BANK_USED(bank) || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1480 | continue; |
| 1481 | |
Grygorii Strashko | 7b1e5dc | 2016-03-04 17:25:35 +0200 | [diff] [blame] | 1482 | pm_runtime_get_sync(bank->chip.parent); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1483 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1484 | } |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1485 | #endif |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1486 | |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1487 | #if defined(CONFIG_PM) |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1488 | static void omap_gpio_init_context(struct gpio_bank *p) |
| 1489 | { |
| 1490 | struct omap_gpio_reg_offs *regs = p->regs; |
| 1491 | void __iomem *base = p->base; |
| 1492 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1493 | p->context.ctrl = readl_relaxed(base + regs->ctrl); |
| 1494 | p->context.oe = readl_relaxed(base + regs->direction); |
| 1495 | p->context.wake_en = readl_relaxed(base + regs->wkup_en); |
| 1496 | p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0); |
| 1497 | p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1); |
| 1498 | p->context.risingdetect = readl_relaxed(base + regs->risingdetect); |
| 1499 | p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); |
| 1500 | p->context.irqenable1 = readl_relaxed(base + regs->irqenable); |
| 1501 | p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1502 | |
| 1503 | if (regs->set_dataout && p->regs->clr_dataout) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1504 | p->context.dataout = readl_relaxed(base + regs->set_dataout); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1505 | else |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1506 | p->context.dataout = readl_relaxed(base + regs->dataout); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1507 | |
| 1508 | p->context_valid = true; |
| 1509 | } |
| 1510 | |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1511 | static void omap_gpio_restore_context(struct gpio_bank *bank) |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1512 | { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1513 | writel_relaxed(bank->context.wake_en, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1514 | bank->base + bank->regs->wkup_en); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1515 | writel_relaxed(bank->context.ctrl, bank->base + bank->regs->ctrl); |
| 1516 | writel_relaxed(bank->context.leveldetect0, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1517 | bank->base + bank->regs->leveldetect0); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1518 | writel_relaxed(bank->context.leveldetect1, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1519 | bank->base + bank->regs->leveldetect1); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1520 | writel_relaxed(bank->context.risingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1521 | bank->base + bank->regs->risingdetect); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1522 | writel_relaxed(bank->context.fallingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1523 | bank->base + bank->regs->fallingdetect); |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1524 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1525 | writel_relaxed(bank->context.dataout, |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1526 | bank->base + bank->regs->set_dataout); |
| 1527 | else |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1528 | writel_relaxed(bank->context.dataout, |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1529 | bank->base + bank->regs->dataout); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1530 | writel_relaxed(bank->context.oe, bank->base + bank->regs->direction); |
Nishanth Menon | 6d13eaa | 2011-08-29 18:54:50 +0530 | [diff] [blame] | 1531 | |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1532 | if (bank->dbck_enable_mask) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1533 | writel_relaxed(bank->context.debounce, bank->base + |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1534 | bank->regs->debounce); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1535 | writel_relaxed(bank->context.debounce_en, |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1536 | bank->base + bank->regs->debounce_en); |
| 1537 | } |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1538 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1539 | writel_relaxed(bank->context.irqenable1, |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1540 | bank->base + bank->regs->irqenable); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1541 | writel_relaxed(bank->context.irqenable2, |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1542 | bank->base + bank->regs->irqenable2); |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1543 | } |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1544 | #endif /* CONFIG_PM */ |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1545 | #else |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1546 | #define omap_gpio_runtime_suspend NULL |
| 1547 | #define omap_gpio_runtime_resume NULL |
Arnd Bergmann | ea4a21a | 2013-05-31 17:59:46 +0200 | [diff] [blame] | 1548 | static inline void omap_gpio_init_context(struct gpio_bank *p) {} |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1549 | #endif |
| 1550 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1551 | static const struct dev_pm_ops gpio_pm_ops = { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1552 | SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, |
| 1553 | NULL) |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1554 | }; |
| 1555 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1556 | #if defined(CONFIG_OF) |
| 1557 | static struct omap_gpio_reg_offs omap2_gpio_regs = { |
| 1558 | .revision = OMAP24XX_GPIO_REVISION, |
| 1559 | .direction = OMAP24XX_GPIO_OE, |
| 1560 | .datain = OMAP24XX_GPIO_DATAIN, |
| 1561 | .dataout = OMAP24XX_GPIO_DATAOUT, |
| 1562 | .set_dataout = OMAP24XX_GPIO_SETDATAOUT, |
| 1563 | .clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT, |
| 1564 | .irqstatus = OMAP24XX_GPIO_IRQSTATUS1, |
| 1565 | .irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2, |
| 1566 | .irqenable = OMAP24XX_GPIO_IRQENABLE1, |
| 1567 | .irqenable2 = OMAP24XX_GPIO_IRQENABLE2, |
| 1568 | .set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1, |
| 1569 | .clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1, |
| 1570 | .debounce = OMAP24XX_GPIO_DEBOUNCE_VAL, |
| 1571 | .debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN, |
| 1572 | .ctrl = OMAP24XX_GPIO_CTRL, |
| 1573 | .wkup_en = OMAP24XX_GPIO_WAKE_EN, |
| 1574 | .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0, |
| 1575 | .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1, |
| 1576 | .risingdetect = OMAP24XX_GPIO_RISINGDETECT, |
| 1577 | .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT, |
| 1578 | }; |
| 1579 | |
| 1580 | static struct omap_gpio_reg_offs omap4_gpio_regs = { |
| 1581 | .revision = OMAP4_GPIO_REVISION, |
| 1582 | .direction = OMAP4_GPIO_OE, |
| 1583 | .datain = OMAP4_GPIO_DATAIN, |
| 1584 | .dataout = OMAP4_GPIO_DATAOUT, |
| 1585 | .set_dataout = OMAP4_GPIO_SETDATAOUT, |
| 1586 | .clr_dataout = OMAP4_GPIO_CLEARDATAOUT, |
| 1587 | .irqstatus = OMAP4_GPIO_IRQSTATUS0, |
| 1588 | .irqstatus2 = OMAP4_GPIO_IRQSTATUS1, |
Russell King | 58337d9 | 2019-06-10 20:10:45 +0300 | [diff] [blame] | 1589 | .irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0, |
| 1590 | .irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1, |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1591 | .irqenable = OMAP4_GPIO_IRQSTATUSSET0, |
| 1592 | .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1, |
| 1593 | .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0, |
| 1594 | .clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0, |
| 1595 | .debounce = OMAP4_GPIO_DEBOUNCINGTIME, |
| 1596 | .debounce_en = OMAP4_GPIO_DEBOUNCENABLE, |
| 1597 | .ctrl = OMAP4_GPIO_CTRL, |
| 1598 | .wkup_en = OMAP4_GPIO_IRQWAKEN0, |
| 1599 | .leveldetect0 = OMAP4_GPIO_LEVELDETECT0, |
| 1600 | .leveldetect1 = OMAP4_GPIO_LEVELDETECT1, |
| 1601 | .risingdetect = OMAP4_GPIO_RISINGDETECT, |
| 1602 | .fallingdetect = OMAP4_GPIO_FALLINGDETECT, |
| 1603 | }; |
| 1604 | |
Chen Gang | e9a65bb | 2013-02-06 18:44:32 +0800 | [diff] [blame] | 1605 | static const struct omap_gpio_platform_data omap2_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1606 | .regs = &omap2_gpio_regs, |
| 1607 | .bank_width = 32, |
| 1608 | .dbck_flag = false, |
| 1609 | }; |
| 1610 | |
Chen Gang | e9a65bb | 2013-02-06 18:44:32 +0800 | [diff] [blame] | 1611 | static const struct omap_gpio_platform_data omap3_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1612 | .regs = &omap2_gpio_regs, |
| 1613 | .bank_width = 32, |
| 1614 | .dbck_flag = true, |
| 1615 | }; |
| 1616 | |
Chen Gang | e9a65bb | 2013-02-06 18:44:32 +0800 | [diff] [blame] | 1617 | static const struct omap_gpio_platform_data omap4_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1618 | .regs = &omap4_gpio_regs, |
| 1619 | .bank_width = 32, |
| 1620 | .dbck_flag = true, |
| 1621 | }; |
| 1622 | |
| 1623 | static const struct of_device_id omap_gpio_match[] = { |
| 1624 | { |
| 1625 | .compatible = "ti,omap4-gpio", |
| 1626 | .data = &omap4_pdata, |
| 1627 | }, |
| 1628 | { |
| 1629 | .compatible = "ti,omap3-gpio", |
| 1630 | .data = &omap3_pdata, |
| 1631 | }, |
| 1632 | { |
| 1633 | .compatible = "ti,omap2-gpio", |
| 1634 | .data = &omap2_pdata, |
| 1635 | }, |
| 1636 | { }, |
| 1637 | }; |
| 1638 | MODULE_DEVICE_TABLE(of, omap_gpio_match); |
| 1639 | #endif |
| 1640 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1641 | static struct platform_driver omap_gpio_driver = { |
| 1642 | .probe = omap_gpio_probe, |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1643 | .remove = omap_gpio_remove, |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1644 | .driver = { |
| 1645 | .name = "omap_gpio", |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1646 | .pm = &gpio_pm_ops, |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1647 | .of_match_table = of_match_ptr(omap_gpio_match), |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1648 | }, |
| 1649 | }; |
| 1650 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1651 | /* |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1652 | * gpio driver register needs to be done before |
| 1653 | * machine_init functions access gpio APIs. |
| 1654 | * Hence omap_gpio_drv_reg() is a postcore_initcall. |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1655 | */ |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1656 | static int __init omap_gpio_drv_reg(void) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1657 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1658 | return platform_driver_register(&omap_gpio_driver); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1659 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1660 | postcore_initcall(omap_gpio_drv_reg); |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1661 | |
| 1662 | static void __exit omap_gpio_exit(void) |
| 1663 | { |
| 1664 | platform_driver_unregister(&omap_gpio_driver); |
| 1665 | } |
| 1666 | module_exit(omap_gpio_exit); |
| 1667 | |
| 1668 | MODULE_DESCRIPTION("omap gpio driver"); |
| 1669 | MODULE_ALIAS("platform:gpio-omap"); |
| 1670 | MODULE_LICENSE("GPL v2"); |