| dmitry pervushin | 5cccd37 | 2009-04-23 12:24:13 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Freescale STMP37XX/STMP378X common interrupt handling code |
| 3 | * |
| 4 | * Author: Vladislav Buzov <vbuzov@embeddedalley.com> |
| 5 | * |
| 6 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. |
| 7 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. |
| 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * The code contained herein is licensed under the GNU General Public |
| 12 | * License. You may obtain a copy of the GNU General Public License |
| 13 | * Version 2 or later at the following locations: |
| 14 | * |
| 15 | * http://www.opensource.org/licenses/gpl-license.html |
| 16 | * http://www.gnu.org/copyleft/gpl.html |
| 17 | */ |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/irq.h> |
| 22 | #include <linux/sysdev.h> |
| 23 | |
| 24 | #include <mach/stmp3xxx.h> |
| 25 | #include <mach/regs-icoll.h> |
| 26 | |
| 27 | void __init stmp3xxx_init_irq(struct irq_chip *chip) |
| 28 | { |
| 29 | unsigned int i; |
| 30 | |
| 31 | /* Reset the interrupt controller */ |
| 32 | HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_CLKGATE); |
| 33 | udelay(10); |
| 34 | HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST); |
| 35 | udelay(10); |
| 36 | HW_ICOLL_CTRL_SET(BM_ICOLL_CTRL_SFTRST); |
| 37 | while (!(HW_ICOLL_CTRL_RD() & BM_ICOLL_CTRL_CLKGATE)) |
| 38 | continue; |
| 39 | HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST | BM_ICOLL_CTRL_CLKGATE); |
| 40 | |
| 41 | /* Disable all interrupts initially */ |
| 42 | for (i = 0; i < NR_REAL_IRQS; i++) { |
| 43 | chip->mask(i); |
| 44 | set_irq_chip(i, chip); |
| 45 | set_irq_handler(i, handle_level_irq); |
| 46 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
| 47 | } |
| 48 | |
| 49 | /* Ensure vector is cleared */ |
| 50 | HW_ICOLL_LEVELACK_WR(1); |
| 51 | HW_ICOLL_LEVELACK_WR(2); |
| 52 | HW_ICOLL_LEVELACK_WR(4); |
| 53 | HW_ICOLL_LEVELACK_WR(8); |
| 54 | |
| 55 | HW_ICOLL_VECTOR_WR(0); |
| 56 | /* Barrier */ |
| 57 | (void) HW_ICOLL_STAT_RD(); |
| 58 | } |
| 59 | |