Ajay Kumar | 96976c3 | 2015-02-05 21:24:04 +0530 | [diff] [blame] | 1 | Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON) |
| 2 | |
| 3 | DECON (Display and Enhancement Controller) is the Display Controller for the |
| 4 | Exynos7 series of SoCs which transfers the image data from a video memory |
| 5 | buffer to an external LCD interface. |
| 6 | |
| 7 | Required properties: |
| 8 | - compatible: value should be "samsung,exynos7-decon"; |
| 9 | |
| 10 | - reg: physical base address and length of the DECON registers set. |
| 11 | |
| 12 | - interrupt-parent: should be the phandle of the decon controller's |
| 13 | parent interrupt controller. |
| 14 | |
| 15 | - interrupts: should contain a list of all DECON IP block interrupts in the |
| 16 | order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier |
| 17 | format depends on the interrupt controller used. |
| 18 | |
| 19 | - interrupt-names: should contain the interrupt names: "fifo", "vsync", |
| 20 | "lcd_sys", in the same order as they were listed in the interrupts |
| 21 | property. |
| 22 | |
| 23 | - pinctrl-0: pin control group to be used for this controller. |
| 24 | |
| 25 | - pinctrl-names: must contain a "default" entry. |
| 26 | |
| 27 | - clocks: must include clock specifiers corresponding to entries in the |
| 28 | clock-names property. |
| 29 | |
| 30 | - clock-names: list of clock names sorted in the same order as the clocks |
| 31 | property. Must contain "pclk_decon0", "aclk_decon0", |
| 32 | "decon0_eclk", "decon0_vclk". |
| 33 | - i80-if-timings: timing configuration for lcd i80 interface support. |
| 34 | |
| 35 | Optional Properties: |
| 36 | - samsung,power-domain: a phandle to DECON power domain node. |
| 37 | - display-timings: timing settings for DECON, as described in document [1]. |
| 38 | Can be used in case timings cannot be provided otherwise |
| 39 | or to override timings provided by the panel. |
| 40 | |
Rob Herring | efdbd73 | 2015-09-21 10:51:09 -0500 | [diff] [blame] | 41 | [1]: Documentation/devicetree/bindings/display/display-timing.txt |
Ajay Kumar | 96976c3 | 2015-02-05 21:24:04 +0530 | [diff] [blame] | 42 | |
| 43 | Example: |
| 44 | |
| 45 | SoC specific DT entry: |
| 46 | |
| 47 | decon@13930000 { |
| 48 | compatible = "samsung,exynos7-decon"; |
| 49 | interrupt-parent = <&combiner>; |
| 50 | reg = <0x13930000 0x1000>; |
| 51 | interrupt-names = "lcd_sys", "vsync", "fifo"; |
| 52 | interrupts = <0 188 0>, <0 189 0>, <0 190 0>; |
| 53 | clocks = <&clock_disp PCLK_DECON_INT>, |
| 54 | <&clock_disp ACLK_DECON_INT>, |
| 55 | <&clock_disp SCLK_DECON_INT_ECLK>, |
| 56 | <&clock_disp SCLK_DECON_INT_EXTCLKPLL>; |
| 57 | clock-names = "pclk_decon0", "aclk_decon0", "decon0_eclk", |
| 58 | "decon0_vclk"; |
| 59 | status = "disabled"; |
| 60 | }; |
| 61 | |
| 62 | Board specific DT entry: |
| 63 | |
| 64 | decon@13930000 { |
| 65 | pinctrl-0 = <&lcd_clk &pwm1_out>; |
| 66 | pinctrl-names = "default"; |
| 67 | status = "okay"; |
| 68 | }; |