blob: bac91f1d2aa8f600a0d0bc4ca8c498fa1c03a48c [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
Tomas Winklere227cea2008-07-18 13:53:05 +080027#ifndef __iwl_agn_rs_h__
28#define __iwl_agn_rs_h__
Zhu Yib481de92007-09-25 17:54:57 -070029
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070030#include "iwl-dev.h"
Zhu Yib481de92007-09-25 17:54:57 -070031
Tomas Winkler1826dcc2008-05-15 13:54:02 +080032struct iwl_rate_info {
Ben Cahill77626352007-11-29 11:09:44 +080033 u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */
34 u8 plcp_siso; /* uCode API: IWL_RATE_SISO_6M_PLCP, etc. */
Guy Cohenfde0db32008-04-21 15:42:01 -070035 u8 plcp_mimo2; /* uCode API: IWL_RATE_MIMO2_6M_PLCP, etc. */
36 u8 plcp_mimo3; /* uCode API: IWL_RATE_MIMO3_6M_PLCP, etc. */
Ben Cahill77626352007-11-29 11:09:44 +080037 u8 ieee; /* MAC header: IWL_RATE_6M_IEEE, etc. */
Zhu Yib481de92007-09-25 17:54:57 -070038 u8 prev_ieee; /* previous rate in IEEE speeds */
39 u8 next_ieee; /* next rate in IEEE speeds */
40 u8 prev_rs; /* previous rate used in rs algo */
41 u8 next_rs; /* next rate used in rs algo */
42 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
43 u8 next_rs_tgg; /* next rate used in TGG rs algo */
44};
45
Ben Cahill9fbab512007-11-29 11:09:47 +080046/*
47 * These serve as indexes into
Tomas Winkler1826dcc2008-05-15 13:54:02 +080048 * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT];
Ben Cahill9fbab512007-11-29 11:09:47 +080049 */
Zhu Yib481de92007-09-25 17:54:57 -070050enum {
51 IWL_RATE_1M_INDEX = 0,
52 IWL_RATE_2M_INDEX,
53 IWL_RATE_5M_INDEX,
54 IWL_RATE_11M_INDEX,
55 IWL_RATE_6M_INDEX,
56 IWL_RATE_9M_INDEX,
57 IWL_RATE_12M_INDEX,
58 IWL_RATE_18M_INDEX,
59 IWL_RATE_24M_INDEX,
60 IWL_RATE_36M_INDEX,
61 IWL_RATE_48M_INDEX,
62 IWL_RATE_54M_INDEX,
63 IWL_RATE_60M_INDEX,
Guy Cohenfde0db32008-04-21 15:42:01 -070064 IWL_RATE_COUNT, /*FIXME:RS:change to IWL_RATE_INDEX_COUNT,*/
Zhu Yib481de92007-09-25 17:54:57 -070065 IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
Guy Cohenfde0db32008-04-21 15:42:01 -070066 IWL_RATE_INVALID = IWL_RATE_COUNT,
Zhu Yib481de92007-09-25 17:54:57 -070067};
68
69enum {
70 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
71 IWL_LAST_OFDM_RATE = IWL_RATE_60M_INDEX,
72 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
73 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
74};
75
76/* #define vs. enum to keep from defaulting to 'large integer' */
Reinette Chatre8a1b0242008-01-14 17:46:25 -080077#define IWL_RATE_6M_MASK (1 << IWL_RATE_6M_INDEX)
78#define IWL_RATE_9M_MASK (1 << IWL_RATE_9M_INDEX)
79#define IWL_RATE_12M_MASK (1 << IWL_RATE_12M_INDEX)
80#define IWL_RATE_18M_MASK (1 << IWL_RATE_18M_INDEX)
81#define IWL_RATE_24M_MASK (1 << IWL_RATE_24M_INDEX)
82#define IWL_RATE_36M_MASK (1 << IWL_RATE_36M_INDEX)
83#define IWL_RATE_48M_MASK (1 << IWL_RATE_48M_INDEX)
84#define IWL_RATE_54M_MASK (1 << IWL_RATE_54M_INDEX)
85#define IWL_RATE_60M_MASK (1 << IWL_RATE_60M_INDEX)
86#define IWL_RATE_1M_MASK (1 << IWL_RATE_1M_INDEX)
87#define IWL_RATE_2M_MASK (1 << IWL_RATE_2M_INDEX)
88#define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX)
89#define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX)
Zhu Yib481de92007-09-25 17:54:57 -070090
Tomas Winklere227cea2008-07-18 13:53:05 +080091/* uCode API values for legacy bit rates, both OFDM and CCK */
Zhu Yib481de92007-09-25 17:54:57 -070092enum {
93 IWL_RATE_6M_PLCP = 13,
94 IWL_RATE_9M_PLCP = 15,
95 IWL_RATE_12M_PLCP = 5,
96 IWL_RATE_18M_PLCP = 7,
97 IWL_RATE_24M_PLCP = 9,
98 IWL_RATE_36M_PLCP = 11,
99 IWL_RATE_48M_PLCP = 1,
100 IWL_RATE_54M_PLCP = 3,
Guy Cohenfde0db32008-04-21 15:42:01 -0700101 IWL_RATE_60M_PLCP = 3,/*FIXME:RS:should be removed*/
Zhu Yib481de92007-09-25 17:54:57 -0700102 IWL_RATE_1M_PLCP = 10,
103 IWL_RATE_2M_PLCP = 20,
104 IWL_RATE_5M_PLCP = 55,
105 IWL_RATE_11M_PLCP = 110,
Guy Cohenfde0db32008-04-21 15:42:01 -0700106 /*FIXME:RS:change to IWL_RATE_LEGACY_??M_PLCP */
107 /*FIXME:RS:add IWL_RATE_LEGACY_INVM_PLCP = 0,*/
Zhu Yib481de92007-09-25 17:54:57 -0700108};
109
Tomas Winklere227cea2008-07-18 13:53:05 +0800110/* uCode API values for OFDM high-throughput (HT) bit rates */
Zhu Yib481de92007-09-25 17:54:57 -0700111enum {
112 IWL_RATE_SISO_6M_PLCP = 0,
113 IWL_RATE_SISO_12M_PLCP = 1,
114 IWL_RATE_SISO_18M_PLCP = 2,
115 IWL_RATE_SISO_24M_PLCP = 3,
116 IWL_RATE_SISO_36M_PLCP = 4,
117 IWL_RATE_SISO_48M_PLCP = 5,
118 IWL_RATE_SISO_54M_PLCP = 6,
119 IWL_RATE_SISO_60M_PLCP = 7,
Guy Cohenfde0db32008-04-21 15:42:01 -0700120 IWL_RATE_MIMO2_6M_PLCP = 0x8,
121 IWL_RATE_MIMO2_12M_PLCP = 0x9,
122 IWL_RATE_MIMO2_18M_PLCP = 0xa,
123 IWL_RATE_MIMO2_24M_PLCP = 0xb,
124 IWL_RATE_MIMO2_36M_PLCP = 0xc,
125 IWL_RATE_MIMO2_48M_PLCP = 0xd,
126 IWL_RATE_MIMO2_54M_PLCP = 0xe,
127 IWL_RATE_MIMO2_60M_PLCP = 0xf,
128 IWL_RATE_MIMO3_6M_PLCP = 0x10,
129 IWL_RATE_MIMO3_12M_PLCP = 0x11,
130 IWL_RATE_MIMO3_18M_PLCP = 0x12,
131 IWL_RATE_MIMO3_24M_PLCP = 0x13,
132 IWL_RATE_MIMO3_36M_PLCP = 0x14,
133 IWL_RATE_MIMO3_48M_PLCP = 0x15,
134 IWL_RATE_MIMO3_54M_PLCP = 0x16,
135 IWL_RATE_MIMO3_60M_PLCP = 0x17,
Zhu Yib481de92007-09-25 17:54:57 -0700136 IWL_RATE_SISO_INVM_PLCP,
Guy Cohenfde0db32008-04-21 15:42:01 -0700137 IWL_RATE_MIMO2_INVM_PLCP = IWL_RATE_SISO_INVM_PLCP,
138 IWL_RATE_MIMO3_INVM_PLCP = IWL_RATE_SISO_INVM_PLCP,
Zhu Yib481de92007-09-25 17:54:57 -0700139};
140
Ben Cahill77626352007-11-29 11:09:44 +0800141/* MAC header values for bit rates */
Zhu Yib481de92007-09-25 17:54:57 -0700142enum {
143 IWL_RATE_6M_IEEE = 12,
144 IWL_RATE_9M_IEEE = 18,
145 IWL_RATE_12M_IEEE = 24,
146 IWL_RATE_18M_IEEE = 36,
147 IWL_RATE_24M_IEEE = 48,
148 IWL_RATE_36M_IEEE = 72,
149 IWL_RATE_48M_IEEE = 96,
150 IWL_RATE_54M_IEEE = 108,
151 IWL_RATE_60M_IEEE = 120,
152 IWL_RATE_1M_IEEE = 2,
153 IWL_RATE_2M_IEEE = 4,
154 IWL_RATE_5M_IEEE = 11,
155 IWL_RATE_11M_IEEE = 22,
156};
157
158#define IWL_CCK_BASIC_RATES_MASK \
159 (IWL_RATE_1M_MASK | \
160 IWL_RATE_2M_MASK)
161
162#define IWL_CCK_RATES_MASK \
163 (IWL_BASIC_RATES_MASK | \
164 IWL_RATE_5M_MASK | \
165 IWL_RATE_11M_MASK)
166
167#define IWL_OFDM_BASIC_RATES_MASK \
168 (IWL_RATE_6M_MASK | \
169 IWL_RATE_12M_MASK | \
170 IWL_RATE_24M_MASK)
171
172#define IWL_OFDM_RATES_MASK \
173 (IWL_OFDM_BASIC_RATES_MASK | \
174 IWL_RATE_9M_MASK | \
175 IWL_RATE_18M_MASK | \
176 IWL_RATE_36M_MASK | \
177 IWL_RATE_48M_MASK | \
178 IWL_RATE_54M_MASK)
179
180#define IWL_BASIC_RATES_MASK \
181 (IWL_OFDM_BASIC_RATES_MASK | \
182 IWL_CCK_BASIC_RATES_MASK)
183
Reinette Chatre8a1b0242008-01-14 17:46:25 -0800184#define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1)
Zhu Yib481de92007-09-25 17:54:57 -0700185
186#define IWL_INVALID_VALUE -1
187
188#define IWL_MIN_RSSI_VAL -100
189#define IWL_MAX_RSSI_VAL 0
190
Ben Cahill77626352007-11-29 11:09:44 +0800191/* These values specify how many Tx frame attempts before
192 * searching for a new modulation mode */
Zhu Yib481de92007-09-25 17:54:57 -0700193#define IWL_LEGACY_FAILURE_LIMIT 160
194#define IWL_LEGACY_SUCCESS_LIMIT 480
195#define IWL_LEGACY_TABLE_COUNT 160
196
197#define IWL_NONE_LEGACY_FAILURE_LIMIT 400
198#define IWL_NONE_LEGACY_SUCCESS_LIMIT 4500
199#define IWL_NONE_LEGACY_TABLE_COUNT 1500
200
Ben Cahill77626352007-11-29 11:09:44 +0800201/* Success ratio (ACKed / attempted tx frames) values (perfect is 128 * 100) */
202#define IWL_RS_GOOD_RATIO 12800 /* 100% */
203#define IWL_RATE_SCALE_SWITCH 10880 /* 85% */
204#define IWL_RATE_HIGH_TH 10880 /* 85% */
205#define IWL_RATE_INCREASE_TH 8960 /* 70% */
206#define IWL_RATE_DECREASE_TH 1920 /* 15% */
Zhu Yib481de92007-09-25 17:54:57 -0700207
Ben Cahill77626352007-11-29 11:09:44 +0800208/* possible actions when in legacy mode */
Guy Cohen3110bef2008-09-09 10:54:54 +0800209#define IWL_LEGACY_SWITCH_ANTENNA1 0
210#define IWL_LEGACY_SWITCH_ANTENNA2 1
211#define IWL_LEGACY_SWITCH_SISO 2
212#define IWL_LEGACY_SWITCH_MIMO2_AB 3
213#define IWL_LEGACY_SWITCH_MIMO2_AC 4
214#define IWL_LEGACY_SWITCH_MIMO2_BC 5
Ben Cahill77626352007-11-29 11:09:44 +0800215
216/* possible actions when in siso mode */
Guy Cohen3110bef2008-09-09 10:54:54 +0800217#define IWL_SISO_SWITCH_ANTENNA1 0
218#define IWL_SISO_SWITCH_ANTENNA2 1
219#define IWL_SISO_SWITCH_MIMO2_AB 2
220#define IWL_SISO_SWITCH_MIMO2_AC 3
221#define IWL_SISO_SWITCH_MIMO2_BC 4
222#define IWL_SISO_SWITCH_GI 5
Zhu Yib481de92007-09-25 17:54:57 -0700223
Ben Cahill77626352007-11-29 11:09:44 +0800224/* possible actions when in mimo mode */
Guy Cohen3110bef2008-09-09 10:54:54 +0800225#define IWL_MIMO2_SWITCH_ANTENNA1 0
226#define IWL_MIMO2_SWITCH_ANTENNA2 1
227#define IWL_MIMO2_SWITCH_SISO_A 2
228#define IWL_MIMO2_SWITCH_SISO_B 3
229#define IWL_MIMO2_SWITCH_SISO_C 4
230#define IWL_MIMO2_SWITCH_GI 5
Guy Cohenfde0db32008-04-21 15:42:01 -0700231
232/*FIXME:RS:add posible acctions for MIMO3*/
233
Ben Cahill77626352007-11-29 11:09:44 +0800234#define IWL_ACTION_LIMIT 3 /* # possible actions */
235
236#define LQ_SIZE 2 /* 2 mode tables: "Active" and "Search" */
Zhu Yib481de92007-09-25 17:54:57 -0700237
Ron Rindjunsky0c11b4d2008-01-28 14:07:26 +0200238/* load per tid defines for A-MPDU activation */
239#define IWL_AGG_TPT_THREHOLD 0
240#define IWL_AGG_LOAD_THRESHOLD 10
241#define IWL_AGG_ALL_TID 0xff
242#define TID_QUEUE_CELL_SPACING 50 /*mS */
243#define TID_QUEUE_MAX_SIZE 20
244#define TID_ROUND_VALUE 5 /* mS */
245#define TID_MAX_LOAD_COUNT 8
246
247#define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
248#define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
249
Tomas Winkler1826dcc2008-05-15 13:54:02 +0800250extern const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT];
Zhu Yib481de92007-09-25 17:54:57 -0700251
Guy Cohenfde0db32008-04-21 15:42:01 -0700252enum iwl_table_type {
Zhu Yib481de92007-09-25 17:54:57 -0700253 LQ_NONE,
Ben Cahill77626352007-11-29 11:09:44 +0800254 LQ_G, /* legacy types */
Zhu Yib481de92007-09-25 17:54:57 -0700255 LQ_A,
Ben Cahill77626352007-11-29 11:09:44 +0800256 LQ_SISO, /* high-throughput types */
Guy Cohenfde0db32008-04-21 15:42:01 -0700257 LQ_MIMO2,
258 LQ_MIMO3,
Zhu Yib481de92007-09-25 17:54:57 -0700259 LQ_MAX,
260};
261
Ben Cahill81cd1102007-11-29 11:09:48 +0800262#define is_legacy(tbl) (((tbl) == LQ_G) || ((tbl) == LQ_A))
Guy Cohenfde0db32008-04-21 15:42:01 -0700263#define is_siso(tbl) ((tbl) == LQ_SISO)
264#define is_mimo2(tbl) ((tbl) == LQ_MIMO2)
265#define is_mimo3(tbl) ((tbl) == LQ_MIMO3)
266#define is_mimo(tbl) (is_mimo2(tbl) || is_mimo3(tbl))
Ben Cahill81cd1102007-11-29 11:09:48 +0800267#define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
Guy Cohenfde0db32008-04-21 15:42:01 -0700268#define is_a_band(tbl) ((tbl) == LQ_A)
269#define is_g_and(tbl) ((tbl) == LQ_G)
Ben Cahill81cd1102007-11-29 11:09:48 +0800270
Guy Cohenfde0db32008-04-21 15:42:01 -0700271#define ANT_NONE 0x0
272#define ANT_A BIT(0)
273#define ANT_B BIT(1)
274#define ANT_AB (ANT_A | ANT_B)
275#define ANT_C BIT(2)
276#define ANT_AC (ANT_A | ANT_C)
277#define ANT_BC (ANT_B | ANT_C)
278#define ANT_ABC (ANT_AB | ANT_C)
279
280static inline u8 num_of_ant(u8 mask)
281{
282 return !!((mask) & ANT_A) +
283 !!((mask) & ANT_B) +
284 !!((mask) & ANT_C);
285}
Zhu Yib481de92007-09-25 17:54:57 -0700286
Tomas Winkler5d664a42008-10-08 09:37:29 +0800287static inline u8 first_antenna(u8 mask)
288{
289 if (mask & ANT_A)
290 return ANT_A;
291 if (mask & ANT_B)
292 return ANT_B;
293 return ANT_C;
294}
295
296
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800297static inline u8 iwl4965_get_prev_ieee_rate(u8 rate_index)
Zhu Yib481de92007-09-25 17:54:57 -0700298{
Tomas Winkler1826dcc2008-05-15 13:54:02 +0800299 u8 rate = iwl_rates[rate_index].prev_ieee;
Zhu Yib481de92007-09-25 17:54:57 -0700300
301 if (rate == IWL_RATE_INVALID)
302 rate = rate_index;
303 return rate;
304}
305
Zhu Yib481de92007-09-25 17:54:57 -0700306/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800307 * iwl4965_rate_control_register - Register the rate control algorithm callbacks
Zhu Yib481de92007-09-25 17:54:57 -0700308 *
309 * Since the rate control algorithm is hardware specific, there is no need
310 * or reason to place it as a stand alone module. The driver can call
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800311 * iwl4965_rate_control_register in order to register the rate control callbacks
Zhu Yib481de92007-09-25 17:54:57 -0700312 * with the mac80211 subsystem. This should be performed prior to calling
313 * ieee80211_register_hw
314 *
315 */
Tomas Winklere227cea2008-07-18 13:53:05 +0800316extern int iwlagn_rate_control_register(void);
Zhu Yib481de92007-09-25 17:54:57 -0700317
318/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800319 * iwl4965_rate_control_unregister - Unregister the rate control callbacks
Zhu Yib481de92007-09-25 17:54:57 -0700320 *
321 * This should be called after calling ieee80211_unregister_hw, but before
322 * the driver is unloaded.
323 */
Tomas Winklere227cea2008-07-18 13:53:05 +0800324extern void iwlagn_rate_control_unregister(void);
Zhu Yib481de92007-09-25 17:54:57 -0700325
Tomas Winklere227cea2008-07-18 13:53:05 +0800326#endif /* __iwl_agn__rs__ */