Mike Frysinger | 5df326a | 2009-11-16 23:49:41 +0000 | [diff] [blame^] | 1 | config BF51x |
| 2 | def_bool y |
| 3 | depends on (BF512 || BF514 || BF516 || BF518) |
| 4 | |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 5 | if (BF51x) |
| 6 | |
| 7 | source "arch/blackfin/mach-bf518/boards/Kconfig" |
| 8 | |
| 9 | menu "BF518 Specific Configuration" |
| 10 | |
| 11 | comment "Alternative Multiplexing Scheme" |
| 12 | |
| 13 | choice |
| 14 | prompt "SPORT0" |
| 15 | default BF518_SPORT0_PORTG |
| 16 | help |
| 17 | Select PORT used for SPORT0. See Hardware Reference Manual |
| 18 | |
| 19 | config BF518_SPORT0_PORTF |
| 20 | bool "PORT F" |
| 21 | help |
| 22 | PORT F |
| 23 | |
| 24 | config BF518_SPORT0_PORTG |
| 25 | bool "PORT G" |
| 26 | help |
| 27 | PORT G |
| 28 | endchoice |
| 29 | |
| 30 | choice |
| 31 | prompt "SPORT0 TSCLK Location" |
| 32 | depends on BF518_SPORT0_PORTG |
| 33 | default BF518_SPORT0_TSCLK_PG10 |
| 34 | help |
| 35 | Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual |
| 36 | |
| 37 | config BF518_SPORT0_TSCLK_PG10 |
| 38 | bool "PORT PG10" |
| 39 | help |
| 40 | PORT PG10 |
| 41 | |
| 42 | config BF518_SPORT0_TSCLK_PG14 |
| 43 | bool "PORT PG14" |
| 44 | help |
| 45 | PORT PG14 |
| 46 | endchoice |
| 47 | |
| 48 | choice |
| 49 | prompt "UART1" |
| 50 | default BF518_UART1_PORTF |
| 51 | help |
| 52 | Select PORT used for UART1. See Hardware Reference Manual |
| 53 | |
| 54 | config BF518_UART1_PORTF |
| 55 | bool "PORT F" |
| 56 | help |
| 57 | PORT F |
| 58 | |
| 59 | config BF518_UART1_PORTG |
| 60 | bool "PORT G" |
| 61 | help |
| 62 | PORT G |
| 63 | endchoice |
| 64 | |
| 65 | comment "Interrupt Priority Assignment" |
| 66 | menu "Priority" |
| 67 | |
| 68 | config IRQ_PLL_WAKEUP |
| 69 | int "IRQ_PLL_WAKEUP" |
| 70 | default 7 |
| 71 | config IRQ_DMA0_ERROR |
| 72 | int "IRQ_DMA0_ERROR" |
| 73 | default 7 |
| 74 | config IRQ_DMAR0_BLK |
| 75 | int "IRQ_DMAR0_BLK" |
| 76 | default 7 |
| 77 | config IRQ_DMAR1_BLK |
| 78 | int "IRQ_DMAR1_BLK" |
| 79 | default 7 |
| 80 | config IRQ_DMAR0_OVR |
| 81 | int "IRQ_DMAR0_OVR" |
| 82 | default 7 |
| 83 | config IRQ_DMAR1_OVR |
| 84 | int "IRQ_DMAR1_OVR" |
| 85 | default 7 |
| 86 | config IRQ_PPI_ERROR |
| 87 | int "IRQ_PPI_ERROR" |
| 88 | default 7 |
| 89 | config IRQ_MAC_ERROR |
| 90 | int "IRQ_MAC_ERROR" |
| 91 | default 7 |
| 92 | config IRQ_SPORT0_ERROR |
| 93 | int "IRQ_SPORT0_ERROR" |
| 94 | default 7 |
| 95 | config IRQ_SPORT1_ERROR |
| 96 | int "IRQ_SPORT1_ERROR" |
| 97 | default 7 |
| 98 | config IRQ_PTP_ERROR |
| 99 | int "IRQ_PTP_ERROR" |
| 100 | default 7 |
| 101 | config IRQ_UART0_ERROR |
| 102 | int "IRQ_UART0_ERROR" |
| 103 | default 7 |
| 104 | config IRQ_UART1_ERROR |
| 105 | int "IRQ_UART1_ERROR" |
| 106 | default 7 |
| 107 | config IRQ_RTC |
| 108 | int "IRQ_RTC" |
| 109 | default 8 |
| 110 | config IRQ_PPI |
| 111 | int "IRQ_PPI" |
| 112 | default 8 |
| 113 | config IRQ_SPORT0_RX |
| 114 | int "IRQ_SPORT0_RX" |
| 115 | default 9 |
| 116 | config IRQ_SPORT0_TX |
| 117 | int "IRQ_SPORT0_TX" |
| 118 | default 9 |
| 119 | config IRQ_SPORT1_RX |
| 120 | int "IRQ_SPORT1_RX" |
| 121 | default 9 |
| 122 | config IRQ_SPORT1_TX |
| 123 | int "IRQ_SPORT1_TX" |
| 124 | default 9 |
| 125 | config IRQ_TWI |
| 126 | int "IRQ_TWI" |
| 127 | default 10 |
| 128 | config IRQ_SPI0 |
| 129 | int "IRQ_SPI" |
| 130 | default 10 |
| 131 | config IRQ_UART0_RX |
| 132 | int "IRQ_UART0_RX" |
| 133 | default 10 |
| 134 | config IRQ_UART0_TX |
| 135 | int "IRQ_UART0_TX" |
| 136 | default 10 |
| 137 | config IRQ_UART1_RX |
| 138 | int "IRQ_UART1_RX" |
| 139 | default 10 |
| 140 | config IRQ_UART1_TX |
| 141 | int "IRQ_UART1_TX" |
| 142 | default 10 |
| 143 | config IRQ_OPTSEC |
| 144 | int "IRQ_OPTSEC" |
| 145 | default 11 |
| 146 | config IRQ_CNT |
| 147 | int "IRQ_CNT" |
| 148 | default 11 |
| 149 | config IRQ_MAC_RX |
| 150 | int "IRQ_MAC_RX" |
| 151 | default 11 |
| 152 | config IRQ_PORTH_INTA |
| 153 | int "IRQ_PORTH_INTA" |
| 154 | default 11 |
| 155 | config IRQ_MAC_TX |
| 156 | int "IRQ_MAC_TX/NFC" |
| 157 | default 11 |
| 158 | config IRQ_PORTH_INTB |
| 159 | int "IRQ_PORTH_INTB" |
| 160 | default 11 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 161 | config IRQ_TIMER0 |
| 162 | int "IRQ_TIMER0" |
Graf Yang | 1fa9be7 | 2009-05-15 11:01:59 +0000 | [diff] [blame] | 163 | default 7 if TICKSOURCE_GPTMR0 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 164 | default 8 |
| 165 | config IRQ_TIMER1 |
| 166 | int "IRQ_TIMER1" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 167 | default 12 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 168 | config IRQ_TIMER2 |
| 169 | int "IRQ_TIMER2" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 170 | default 12 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 171 | config IRQ_TIMER3 |
| 172 | int "IRQ_TIMER3" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 173 | default 12 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 174 | config IRQ_TIMER4 |
| 175 | int "IRQ_TIMER4" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 176 | default 12 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 177 | config IRQ_TIMER5 |
| 178 | int "IRQ_TIMER5" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 179 | default 12 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 180 | config IRQ_TIMER6 |
| 181 | int "IRQ_TIMER6" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 182 | default 12 |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 183 | config IRQ_TIMER7 |
| 184 | int "IRQ_TIMER7" |
Bryan Wu | 2f6f4bc | 2008-11-18 17:48:21 +0800 | [diff] [blame] | 185 | default 12 |
| 186 | config IRQ_PORTG_INTA |
| 187 | int "IRQ_PORTG_INTA" |
| 188 | default 12 |
| 189 | config IRQ_PORTG_INTB |
| 190 | int "IRQ_PORTG_INTB" |
| 191 | default 12 |
| 192 | config IRQ_MEM_DMA0 |
| 193 | int "IRQ_MEM_DMA0" |
| 194 | default 13 |
| 195 | config IRQ_MEM_DMA1 |
| 196 | int "IRQ_MEM_DMA1" |
| 197 | default 13 |
| 198 | config IRQ_WATCH |
| 199 | int "IRQ_WATCH" |
| 200 | default 13 |
| 201 | config IRQ_PORTF_INTA |
| 202 | int "IRQ_PORTF_INTA" |
| 203 | default 13 |
| 204 | config IRQ_PORTF_INTB |
| 205 | int "IRQ_PORTF_INTB" |
| 206 | default 13 |
| 207 | config IRQ_SPI0_ERROR |
| 208 | int "IRQ_SPI0_ERROR" |
| 209 | default 7 |
| 210 | config IRQ_SPI1_ERROR |
| 211 | int "IRQ_SPI1_ERROR" |
| 212 | default 7 |
| 213 | config IRQ_RSI_INT0 |
| 214 | int "IRQ_RSI_INT0" |
| 215 | default 7 |
| 216 | config IRQ_RSI_INT1 |
| 217 | int "IRQ_RSI_INT1" |
| 218 | default 7 |
| 219 | config IRQ_PWM_TRIP |
| 220 | int "IRQ_PWM_TRIP" |
| 221 | default 10 |
| 222 | config IRQ_PWM_SYNC |
| 223 | int "IRQ_PWM_SYNC" |
| 224 | default 10 |
| 225 | config IRQ_PTP_STAT |
| 226 | int "IRQ_PTP_STAT" |
| 227 | default 10 |
| 228 | |
| 229 | help |
| 230 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. |
| 231 | This applies to all the above. It is not recommended to assign the |
| 232 | highest priority number 7 to UART or any other device. |
| 233 | |
| 234 | endmenu |
| 235 | |
| 236 | endmenu |
| 237 | |
| 238 | endif |