blob: 539336d1be4bec76e1bd0f0a42003051986c62fb [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25
26#include "htc.h"
27#include "hw.h"
28#include "targaddrs.h"
29#include "wmi.h"
30#include "../ath.h"
31#include "../regd.h"
32
33#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
34#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
35#define WO(_f) ((_f##_OFFSET) >> 2)
36
37#define ATH10K_SCAN_ID 0
38#define WMI_READY_TIMEOUT (5 * HZ)
39#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
40
41/* Antenna noise floor */
42#define ATH10K_DEFAULT_NOISE_FLOOR -95
43
44struct ath10k;
45
46enum ath10k_bus {
47 ATH10K_BUS_PCI,
48};
49
50struct ath10k_skb_cb {
51 dma_addr_t paddr;
52 bool is_mapped;
53 bool is_aborted;
54
55 struct {
56 u8 vdev_id;
57 u16 msdu_id;
58 u8 tid;
59 bool is_offchan;
60 bool is_conf;
61 bool discard;
62 bool no_ack;
63 u8 refcount;
64 struct sk_buff *txfrag;
65 struct sk_buff *msdu;
66 } __packed htt;
67
68 /* 4 bytes left on 64bit arch */
69} __packed;
70
71static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
72{
73 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
74 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
75 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
76}
77
78static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
79{
80 if (ATH10K_SKB_CB(skb)->is_mapped)
81 return -EINVAL;
82
83 ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
84 DMA_TO_DEVICE);
85
86 if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
87 return -EIO;
88
89 ATH10K_SKB_CB(skb)->is_mapped = true;
90 return 0;
91}
92
93static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
94{
95 if (!ATH10K_SKB_CB(skb)->is_mapped)
96 return -EINVAL;
97
98 dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
99 DMA_TO_DEVICE);
100 ATH10K_SKB_CB(skb)->is_mapped = false;
101 return 0;
102}
103
104static inline u32 host_interest_item_address(u32 item_offset)
105{
106 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
107}
108
109struct ath10k_bmi {
110 bool done_sent;
111};
112
113struct ath10k_wmi {
114 enum ath10k_htc_ep_id eid;
115 struct completion service_ready;
116 struct completion unified_ready;
117 atomic_t pending_tx_count;
118 wait_queue_head_t wq;
119
120 struct sk_buff_head wmi_event_list;
121 struct work_struct wmi_event_work;
122};
123
124struct ath10k_peer_stat {
125 u8 peer_macaddr[ETH_ALEN];
126 u32 peer_rssi;
127 u32 peer_tx_rate;
128};
129
130struct ath10k_target_stats {
131 /* PDEV stats */
132 s32 ch_noise_floor;
133 u32 tx_frame_count;
134 u32 rx_frame_count;
135 u32 rx_clear_count;
136 u32 cycle_count;
137 u32 phy_err_count;
138 u32 chan_tx_power;
139
140 /* PDEV TX stats */
141 s32 comp_queued;
142 s32 comp_delivered;
143 s32 msdu_enqued;
144 s32 mpdu_enqued;
145 s32 wmm_drop;
146 s32 local_enqued;
147 s32 local_freed;
148 s32 hw_queued;
149 s32 hw_reaped;
150 s32 underrun;
151 s32 tx_abort;
152 s32 mpdus_requed;
153 u32 tx_ko;
154 u32 data_rc;
155 u32 self_triggers;
156 u32 sw_retry_failure;
157 u32 illgl_rate_phy_err;
158 u32 pdev_cont_xretry;
159 u32 pdev_tx_timeout;
160 u32 pdev_resets;
161 u32 phy_underrun;
162 u32 txop_ovf;
163
164 /* PDEV RX stats */
165 s32 mid_ppdu_route_change;
166 s32 status_rcvd;
167 s32 r0_frags;
168 s32 r1_frags;
169 s32 r2_frags;
170 s32 r3_frags;
171 s32 htt_msdus;
172 s32 htt_mpdus;
173 s32 loc_msdus;
174 s32 loc_mpdus;
175 s32 oversize_amsdu;
176 s32 phy_errs;
177 s32 phy_err_drop;
178 s32 mpdu_errs;
179
180 /* VDEV STATS */
181
182 /* PEER STATS */
183 u8 peers;
184 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
185
186 /* TODO: Beacon filter stats */
187
188};
189
190#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
191
192struct ath10k_peer {
193 struct list_head list;
194 int vdev_id;
195 u8 addr[ETH_ALEN];
196 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
197 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
198};
199
200#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
201
202struct ath10k_vif {
203 u32 vdev_id;
204 enum wmi_vdev_type vdev_type;
205 enum wmi_vdev_subtype vdev_subtype;
206 u32 beacon_interval;
207 u32 dtim_period;
208
209 struct ath10k *ar;
210 struct ieee80211_vif *vif;
211
212 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
213 u8 def_wep_key_index;
214
215 u16 tx_seq_no;
216
217 union {
218 struct {
219 u8 bssid[ETH_ALEN];
220 u32 uapsd;
221 } sta;
222 struct {
223 /* 127 stations; wmi limit */
224 u8 tim_bitmap[16];
225 u8 tim_len;
226 u32 ssid_len;
227 u8 ssid[IEEE80211_MAX_SSID_LEN];
228 bool hidden_ssid;
229 /* P2P_IE with NoA attribute for P2P_GO case */
230 u32 noa_len;
231 u8 *noa_data;
232 } ap;
233 struct {
234 u8 bssid[ETH_ALEN];
235 } ibss;
236 } u;
237};
238
239struct ath10k_vif_iter {
240 u32 vdev_id;
241 struct ath10k_vif *arvif;
242};
243
244struct ath10k_debug {
245 struct dentry *debugfs_phy;
246
247 struct ath10k_target_stats target_stats;
248 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
249
250 struct completion event_stats_compl;
251};
252
253struct ath10k {
254 struct ath_common ath_common;
255 struct ieee80211_hw *hw;
256 struct device *dev;
257 u8 mac_addr[ETH_ALEN];
258
259 u32 target_version;
260 u8 fw_version_major;
261 u32 fw_version_minor;
262 u16 fw_version_release;
263 u16 fw_version_build;
264 u32 phy_capability;
265 u32 hw_min_tx_power;
266 u32 hw_max_tx_power;
267 u32 ht_cap_info;
268 u32 vht_cap_info;
269
270 struct targetdef *targetdef;
271 struct hostdef *hostdef;
272
273 bool p2p;
274
275 struct {
276 void *priv;
277 enum ath10k_bus bus;
278 const struct ath10k_hif_ops *ops;
279 } hif;
280
281 struct ath10k_wmi wmi;
282
283 wait_queue_head_t event_queue;
284 bool is_target_paused;
285
286 struct ath10k_bmi bmi;
287
288 struct ath10k_htc *htc;
289 struct ath10k_htt *htt;
290
291 struct ath10k_hw_params {
292 u32 id;
293 const char *name;
294 u32 patch_load_addr;
295
296 struct ath10k_hw_params_fw {
297 const char *dir;
298 const char *fw;
299 const char *otp;
300 const char *board;
301 } fw;
302 } hw_params;
303
304 struct {
305 struct completion started;
306 struct completion completed;
307 struct completion on_channel;
308 struct timer_list timeout;
309 bool is_roc;
310 bool in_progress;
311 bool aborting;
312 int vdev_id;
313 int roc_freq;
314 } scan;
315
316 struct {
317 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
318 } mac;
319
320 /* should never be NULL; needed for regular htt rx */
321 struct ieee80211_channel *rx_channel;
322
323 /* valid during scan; needed for mgmt rx during scan */
324 struct ieee80211_channel *scan_channel;
325
326 int free_vdev_map;
327 int monitor_vdev_id;
328 bool monitor_enabled;
329 bool monitor_present;
330 unsigned int filter_flags;
331
332 struct wmi_pdev_set_wmm_params_arg wmm_params;
333 struct completion install_key_done;
334
335 struct completion vdev_setup_done;
336
337 struct workqueue_struct *workqueue;
338
339 /* prevents concurrent FW reconfiguration */
340 struct mutex conf_mutex;
341
342 /* protects shared structure data */
343 spinlock_t data_lock;
344
345 struct list_head peers;
346 wait_queue_head_t peer_mapping_wq;
347
348 struct work_struct offchan_tx_work;
349 struct sk_buff_head offchan_tx_queue;
350 struct completion offchan_tx_completed;
351 struct sk_buff *offchan_tx_skb;
352
353#ifdef CONFIG_ATH10K_DEBUGFS
354 struct ath10k_debug debug;
355#endif
356};
357
358struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
359 enum ath10k_bus bus,
360 const struct ath10k_hif_ops *hif_ops);
361void ath10k_core_destroy(struct ath10k *ar);
362
363int ath10k_core_register(struct ath10k *ar);
364void ath10k_core_unregister(struct ath10k *ar);
365
366int ath10k_core_target_suspend(struct ath10k *ar);
367int ath10k_core_target_resume(struct ath10k *ar);
368
369#endif /* _CORE_H_ */