Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 1 | #ifndef _LINUX_IRQ_H |
| 2 | #define _LINUX_IRQ_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
| 4 | /* |
| 5 | * Please do not include this file in generic code. There is currently |
| 6 | * no requirement for any architecture to implement anything held |
| 7 | * within this file. |
| 8 | * |
| 9 | * Thanks. --rmk |
| 10 | */ |
| 11 | |
Adrian Bunk | 23f9b31 | 2005-12-21 02:27:50 +0100 | [diff] [blame] | 12 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 14 | #ifndef CONFIG_S390 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | |
| 16 | #include <linux/linkage.h> |
| 17 | #include <linux/cache.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/cpumask.h> |
Ralf Baechle | 503e576 | 2009-03-29 12:59:50 +0200 | [diff] [blame] | 20 | #include <linux/gfp.h> |
Jan Beulich | 908dcec | 2006-06-23 02:06:00 -0700 | [diff] [blame] | 21 | #include <linux/irqreturn.h> |
Thomas Gleixner | dd3a1db | 2008-10-16 18:20:58 +0200 | [diff] [blame] | 22 | #include <linux/irqnr.h> |
David Howells | 77904fd | 2007-02-28 20:13:26 -0800 | [diff] [blame] | 23 | #include <linux/errno.h> |
Ralf Baechle | 503e576 | 2009-03-29 12:59:50 +0200 | [diff] [blame] | 24 | #include <linux/topology.h> |
Thomas Gleixner | 3aa551c | 2009-03-23 18:28:15 +0100 | [diff] [blame] | 25 | #include <linux/wait.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
| 27 | #include <asm/irq.h> |
| 28 | #include <asm/ptrace.h> |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 29 | #include <asm/irq_regs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
Thomas Gleixner | ab7798f | 2011-03-25 16:48:50 +0100 | [diff] [blame] | 31 | struct seq_file; |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 32 | struct irq_desc; |
Thomas Gleixner | 7812957 | 2011-02-10 15:14:20 +0100 | [diff] [blame] | 33 | struct irq_data; |
Harvey Harrison | ec70158 | 2008-02-08 04:19:55 -0800 | [diff] [blame] | 34 | typedef void (*irq_flow_handler_t)(unsigned int irq, |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 35 | struct irq_desc *desc); |
Thomas Gleixner | 7812957 | 2011-02-10 15:14:20 +0100 | [diff] [blame] | 36 | typedef void (*irq_preflow_handler_t)(struct irq_data *data); |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 37 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | /* |
| 39 | * IRQ line status. |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 40 | * |
Thomas Gleixner | 5d4d8fc | 2011-02-08 17:27:18 +0100 | [diff] [blame] | 41 | * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 42 | * |
Thomas Gleixner | 5d4d8fc | 2011-02-08 17:27:18 +0100 | [diff] [blame] | 43 | * IRQ_TYPE_NONE - default, unspecified type |
| 44 | * IRQ_TYPE_EDGE_RISING - rising edge triggered |
| 45 | * IRQ_TYPE_EDGE_FALLING - falling edge triggered |
| 46 | * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered |
| 47 | * IRQ_TYPE_LEVEL_HIGH - high level triggered |
| 48 | * IRQ_TYPE_LEVEL_LOW - low level triggered |
| 49 | * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits |
| 50 | * IRQ_TYPE_SENSE_MASK - Mask for all the above bits |
| 51 | * IRQ_TYPE_PROBE - Special flag for probing in progress |
| 52 | * |
| 53 | * Bits which can be modified via irq_set/clear/modify_status_flags() |
| 54 | * IRQ_LEVEL - Interrupt is level type. Will be also |
| 55 | * updated in the code when the above trigger |
| 56 | * bits are modified via set_irq_type() |
| 57 | * IRQ_PER_CPU - Mark an interrupt PER_CPU. Will protect |
| 58 | * it from affinity setting |
| 59 | * IRQ_NOPROBE - Interrupt cannot be probed by autoprobing |
| 60 | * IRQ_NOREQUEST - Interrupt cannot be requested via |
| 61 | * request_irq() |
| 62 | * IRQ_NOAUTOEN - Interrupt is not automatically enabled in |
| 63 | * request/setup_irq() |
| 64 | * IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set) |
| 65 | * IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context |
| 66 | * IRQ_NESTED_TRHEAD - Interrupt nests into another thread |
| 67 | * |
| 68 | * Deprecated bits. They are kept updated as long as |
| 69 | * CONFIG_GENERIC_HARDIRQS_NO_COMPAT is not set. Will go away soon. These bits |
| 70 | * are internal state of the core code and if you really need to acces |
| 71 | * them then talk to the genirq maintainer instead of hacking |
| 72 | * something weird. |
| 73 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | */ |
Thomas Gleixner | 5d4d8fc | 2011-02-08 17:27:18 +0100 | [diff] [blame] | 75 | enum { |
| 76 | IRQ_TYPE_NONE = 0x00000000, |
| 77 | IRQ_TYPE_EDGE_RISING = 0x00000001, |
| 78 | IRQ_TYPE_EDGE_FALLING = 0x00000002, |
| 79 | IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING), |
| 80 | IRQ_TYPE_LEVEL_HIGH = 0x00000004, |
| 81 | IRQ_TYPE_LEVEL_LOW = 0x00000008, |
| 82 | IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH), |
| 83 | IRQ_TYPE_SENSE_MASK = 0x0000000f, |
Thomas Gleixner | 876dbd4 | 2011-02-08 17:28:12 +0100 | [diff] [blame] | 84 | |
Thomas Gleixner | 5d4d8fc | 2011-02-08 17:27:18 +0100 | [diff] [blame] | 85 | IRQ_TYPE_PROBE = 0x00000010, |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 86 | |
Thomas Gleixner | 5d4d8fc | 2011-02-08 17:27:18 +0100 | [diff] [blame] | 87 | IRQ_LEVEL = (1 << 8), |
| 88 | IRQ_PER_CPU = (1 << 9), |
| 89 | IRQ_NOPROBE = (1 << 10), |
| 90 | IRQ_NOREQUEST = (1 << 11), |
| 91 | IRQ_NOAUTOEN = (1 << 12), |
| 92 | IRQ_NO_BALANCING = (1 << 13), |
| 93 | IRQ_MOVE_PCNTXT = (1 << 14), |
| 94 | IRQ_NESTED_THREAD = (1 << 15), |
Thomas Gleixner | 5d4d8fc | 2011-02-08 17:27:18 +0100 | [diff] [blame] | 95 | }; |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 96 | |
Thomas Gleixner | 4424718 | 2010-09-28 10:40:18 +0200 | [diff] [blame] | 97 | #define IRQF_MODIFY_MASK \ |
| 98 | (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \ |
Thomas Gleixner | 872434d | 2011-02-05 16:25:25 +0100 | [diff] [blame] | 99 | IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \ |
Thomas Gleixner | 6f91a52 | 2011-02-14 13:33:16 +0100 | [diff] [blame] | 100 | IRQ_PER_CPU | IRQ_NESTED_THREAD) |
Thomas Gleixner | 4424718 | 2010-09-28 10:40:18 +0200 | [diff] [blame] | 101 | |
Thomas Gleixner | 8f53f92 | 2011-02-08 16:50:00 +0100 | [diff] [blame] | 102 | #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) |
| 103 | |
| 104 | static inline __deprecated bool CHECK_IRQ_PER_CPU(unsigned int status) |
| 105 | { |
| 106 | return status & IRQ_PER_CPU; |
| 107 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | |
Thomas Gleixner | 3b8249e | 2011-02-07 16:02:20 +0100 | [diff] [blame] | 109 | /* |
| 110 | * Return value for chip->irq_set_affinity() |
| 111 | * |
| 112 | * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity |
| 113 | * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity |
| 114 | */ |
| 115 | enum { |
| 116 | IRQ_SET_MASK_OK = 0, |
| 117 | IRQ_SET_MASK_OK_NOCOPY, |
| 118 | }; |
| 119 | |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 120 | struct msi_desc; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 121 | |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 122 | /** |
Thomas Gleixner | ff7dcd4 | 2010-09-27 12:44:25 +0000 | [diff] [blame] | 123 | * struct irq_data - per irq and irq chip data passed down to chip functions |
| 124 | * @irq: interrupt number |
| 125 | * @node: node index useful for balancing |
Randy Dunlap | 30398bf | 2011-03-18 09:33:56 -0700 | [diff] [blame] | 126 | * @state_use_accessors: status information for irq chip functions. |
Thomas Gleixner | 91c4991 | 2011-02-03 20:48:29 +0100 | [diff] [blame] | 127 | * Use accessor functions to deal with it |
Thomas Gleixner | ff7dcd4 | 2010-09-27 12:44:25 +0000 | [diff] [blame] | 128 | * @chip: low level interrupt hardware access |
| 129 | * @handler_data: per-IRQ data for the irq_chip methods |
| 130 | * @chip_data: platform-specific per-chip private data for the chip |
| 131 | * methods, to allow shared chip implementations |
| 132 | * @msi_desc: MSI descriptor |
| 133 | * @affinity: IRQ affinity on SMP |
Thomas Gleixner | ff7dcd4 | 2010-09-27 12:44:25 +0000 | [diff] [blame] | 134 | * |
| 135 | * The fields here need to overlay the ones in irq_desc until we |
| 136 | * cleaned up the direct references and switched everything over to |
| 137 | * irq_data. |
| 138 | */ |
| 139 | struct irq_data { |
| 140 | unsigned int irq; |
| 141 | unsigned int node; |
Thomas Gleixner | 91c4991 | 2011-02-03 20:48:29 +0100 | [diff] [blame] | 142 | unsigned int state_use_accessors; |
Thomas Gleixner | ff7dcd4 | 2010-09-27 12:44:25 +0000 | [diff] [blame] | 143 | struct irq_chip *chip; |
| 144 | void *handler_data; |
| 145 | void *chip_data; |
| 146 | struct msi_desc *msi_desc; |
| 147 | #ifdef CONFIG_SMP |
| 148 | cpumask_var_t affinity; |
| 149 | #endif |
Thomas Gleixner | ff7dcd4 | 2010-09-27 12:44:25 +0000 | [diff] [blame] | 150 | }; |
| 151 | |
Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 152 | /* |
| 153 | * Bit masks for irq_data.state |
| 154 | * |
Thomas Gleixner | 876dbd4 | 2011-02-08 17:28:12 +0100 | [diff] [blame] | 155 | * IRQD_TRIGGER_MASK - Mask for the trigger type bits |
Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 156 | * IRQD_SETAFFINITY_PENDING - Affinity setting is pending |
Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame] | 157 | * IRQD_NO_BALANCING - Balancing disabled for this IRQ |
| 158 | * IRQD_PER_CPU - Interrupt is per cpu |
Thomas Gleixner | 2bdd105 | 2011-02-08 17:22:00 +0100 | [diff] [blame] | 159 | * IRQD_AFFINITY_SET - Interrupt affinity was set |
Thomas Gleixner | 876dbd4 | 2011-02-08 17:28:12 +0100 | [diff] [blame] | 160 | * IRQD_LEVEL - Interrupt is level triggered |
Thomas Gleixner | 7f94226 | 2011-02-10 19:46:26 +0100 | [diff] [blame] | 161 | * IRQD_WAKEUP_STATE - Interrupt is configured for wakeup |
| 162 | * from suspend |
Thomas Gleixner | e1ef824 | 2011-02-10 22:25:31 +0100 | [diff] [blame] | 163 | * IRDQ_MOVE_PCNTXT - Interrupt can be moved in process |
| 164 | * context |
Thomas Gleixner | 32f4125 | 2011-03-28 14:10:52 +0200 | [diff] [blame] | 165 | * IRQD_IRQ_DISABLED - Disabled state of the interrupt |
| 166 | * IRQD_IRQ_MASKED - Masked state of the interrupt |
| 167 | * IRQD_IRQ_INPROGRESS - In progress state of the interrupt |
Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 168 | */ |
| 169 | enum { |
Thomas Gleixner | 876dbd4 | 2011-02-08 17:28:12 +0100 | [diff] [blame] | 170 | IRQD_TRIGGER_MASK = 0xf, |
Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame] | 171 | IRQD_SETAFFINITY_PENDING = (1 << 8), |
| 172 | IRQD_NO_BALANCING = (1 << 10), |
| 173 | IRQD_PER_CPU = (1 << 11), |
Thomas Gleixner | 2bdd105 | 2011-02-08 17:22:00 +0100 | [diff] [blame] | 174 | IRQD_AFFINITY_SET = (1 << 12), |
Thomas Gleixner | 876dbd4 | 2011-02-08 17:28:12 +0100 | [diff] [blame] | 175 | IRQD_LEVEL = (1 << 13), |
Thomas Gleixner | 7f94226 | 2011-02-10 19:46:26 +0100 | [diff] [blame] | 176 | IRQD_WAKEUP_STATE = (1 << 14), |
Thomas Gleixner | e1ef824 | 2011-02-10 22:25:31 +0100 | [diff] [blame] | 177 | IRQD_MOVE_PCNTXT = (1 << 15), |
Thomas Gleixner | 801a0e9 | 2011-03-27 11:02:49 +0200 | [diff] [blame] | 178 | IRQD_IRQ_DISABLED = (1 << 16), |
Thomas Gleixner | 32f4125 | 2011-03-28 14:10:52 +0200 | [diff] [blame] | 179 | IRQD_IRQ_MASKED = (1 << 17), |
| 180 | IRQD_IRQ_INPROGRESS = (1 << 18), |
Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 181 | }; |
| 182 | |
| 183 | static inline bool irqd_is_setaffinity_pending(struct irq_data *d) |
| 184 | { |
| 185 | return d->state_use_accessors & IRQD_SETAFFINITY_PENDING; |
| 186 | } |
| 187 | |
Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame] | 188 | static inline bool irqd_is_per_cpu(struct irq_data *d) |
| 189 | { |
| 190 | return d->state_use_accessors & IRQD_PER_CPU; |
| 191 | } |
| 192 | |
| 193 | static inline bool irqd_can_balance(struct irq_data *d) |
| 194 | { |
| 195 | return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING)); |
| 196 | } |
| 197 | |
Thomas Gleixner | 2bdd105 | 2011-02-08 17:22:00 +0100 | [diff] [blame] | 198 | static inline bool irqd_affinity_was_set(struct irq_data *d) |
| 199 | { |
| 200 | return d->state_use_accessors & IRQD_AFFINITY_SET; |
| 201 | } |
| 202 | |
Thomas Gleixner | ee38c04 | 2011-03-28 17:11:13 +0200 | [diff] [blame] | 203 | static inline void irqd_mark_affinity_was_set(struct irq_data *d) |
| 204 | { |
| 205 | d->state_use_accessors |= IRQD_AFFINITY_SET; |
| 206 | } |
| 207 | |
Thomas Gleixner | 876dbd4 | 2011-02-08 17:28:12 +0100 | [diff] [blame] | 208 | static inline u32 irqd_get_trigger_type(struct irq_data *d) |
| 209 | { |
| 210 | return d->state_use_accessors & IRQD_TRIGGER_MASK; |
| 211 | } |
| 212 | |
| 213 | /* |
| 214 | * Must only be called inside irq_chip.irq_set_type() functions. |
| 215 | */ |
| 216 | static inline void irqd_set_trigger_type(struct irq_data *d, u32 type) |
| 217 | { |
| 218 | d->state_use_accessors &= ~IRQD_TRIGGER_MASK; |
| 219 | d->state_use_accessors |= type & IRQD_TRIGGER_MASK; |
| 220 | } |
| 221 | |
| 222 | static inline bool irqd_is_level_type(struct irq_data *d) |
| 223 | { |
| 224 | return d->state_use_accessors & IRQD_LEVEL; |
| 225 | } |
| 226 | |
Thomas Gleixner | 7f94226 | 2011-02-10 19:46:26 +0100 | [diff] [blame] | 227 | static inline bool irqd_is_wakeup_set(struct irq_data *d) |
| 228 | { |
| 229 | return d->state_use_accessors & IRQD_WAKEUP_STATE; |
| 230 | } |
| 231 | |
Thomas Gleixner | e1ef824 | 2011-02-10 22:25:31 +0100 | [diff] [blame] | 232 | static inline bool irqd_can_move_in_process_context(struct irq_data *d) |
| 233 | { |
| 234 | return d->state_use_accessors & IRQD_MOVE_PCNTXT; |
| 235 | } |
| 236 | |
Thomas Gleixner | 801a0e9 | 2011-03-27 11:02:49 +0200 | [diff] [blame] | 237 | static inline bool irqd_irq_disabled(struct irq_data *d) |
| 238 | { |
| 239 | return d->state_use_accessors & IRQD_IRQ_DISABLED; |
| 240 | } |
| 241 | |
Thomas Gleixner | 32f4125 | 2011-03-28 14:10:52 +0200 | [diff] [blame] | 242 | static inline bool irqd_irq_masked(struct irq_data *d) |
| 243 | { |
| 244 | return d->state_use_accessors & IRQD_IRQ_MASKED; |
| 245 | } |
| 246 | |
| 247 | static inline bool irqd_irq_inprogress(struct irq_data *d) |
| 248 | { |
| 249 | return d->state_use_accessors & IRQD_IRQ_INPROGRESS; |
| 250 | } |
| 251 | |
Thomas Gleixner | 9cff60d | 2011-03-28 16:41:14 +0200 | [diff] [blame] | 252 | /* |
| 253 | * Functions for chained handlers which can be enabled/disabled by the |
| 254 | * standard disable_irq/enable_irq calls. Must be called with |
| 255 | * irq_desc->lock held. |
| 256 | */ |
| 257 | static inline void irqd_set_chained_irq_inprogress(struct irq_data *d) |
| 258 | { |
| 259 | d->state_use_accessors |= IRQD_IRQ_INPROGRESS; |
| 260 | } |
| 261 | |
| 262 | static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d) |
| 263 | { |
| 264 | d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS; |
| 265 | } |
| 266 | |
Thomas Gleixner | ff7dcd4 | 2010-09-27 12:44:25 +0000 | [diff] [blame] | 267 | /** |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 268 | * struct irq_chip - hardware interrupt chip descriptor |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 269 | * |
| 270 | * @name: name for /proc/interrupts |
Thomas Gleixner | f882265 | 2010-09-27 12:44:32 +0000 | [diff] [blame] | 271 | * @startup: deprecated, replaced by irq_startup |
| 272 | * @shutdown: deprecated, replaced by irq_shutdown |
| 273 | * @enable: deprecated, replaced by irq_enable |
| 274 | * @disable: deprecated, replaced by irq_disable |
| 275 | * @ack: deprecated, replaced by irq_ack |
| 276 | * @mask: deprecated, replaced by irq_mask |
| 277 | * @mask_ack: deprecated, replaced by irq_mask_ack |
| 278 | * @unmask: deprecated, replaced by irq_unmask |
| 279 | * @eoi: deprecated, replaced by irq_eoi |
| 280 | * @end: deprecated, will go away with __do_IRQ() |
| 281 | * @set_affinity: deprecated, replaced by irq_set_affinity |
| 282 | * @retrigger: deprecated, replaced by irq_retrigger |
| 283 | * @set_type: deprecated, replaced by irq_set_type |
| 284 | * @set_wake: deprecated, replaced by irq_wake |
| 285 | * @bus_lock: deprecated, replaced by irq_bus_lock |
| 286 | * @bus_sync_unlock: deprecated, replaced by irq_bus_sync_unlock |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 287 | * |
Thomas Gleixner | f882265 | 2010-09-27 12:44:32 +0000 | [diff] [blame] | 288 | * @irq_startup: start up the interrupt (defaults to ->enable if NULL) |
| 289 | * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL) |
| 290 | * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL) |
| 291 | * @irq_disable: disable the interrupt |
| 292 | * @irq_ack: start of a new interrupt |
| 293 | * @irq_mask: mask an interrupt source |
| 294 | * @irq_mask_ack: ack and mask an interrupt source |
| 295 | * @irq_unmask: unmask an interrupt source |
| 296 | * @irq_eoi: end of interrupt |
| 297 | * @irq_set_affinity: set the CPU affinity on SMP machines |
| 298 | * @irq_retrigger: resend an IRQ to the CPU |
| 299 | * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ |
| 300 | * @irq_set_wake: enable/disable power-management wake-on of an IRQ |
| 301 | * @irq_bus_lock: function to lock access to slow bus (i2c) chips |
| 302 | * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips |
David Daney | 0fdb4b2 | 2011-03-25 12:38:49 -0700 | [diff] [blame] | 303 | * @irq_cpu_online: configure an interrupt source for a secondary CPU |
| 304 | * @irq_cpu_offline: un-configure an interrupt source for a secondary CPU |
Thomas Gleixner | ab7798f | 2011-03-25 16:48:50 +0100 | [diff] [blame] | 305 | * @irq_print_chip: optional to print special chip info in show_interrupts |
Thomas Gleixner | 2bff17a | 2011-02-10 13:08:38 +0100 | [diff] [blame] | 306 | * @flags: chip specific flags |
Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 307 | * |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 308 | * @release: release function solely used by UML |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 310 | struct irq_chip { |
| 311 | const char *name; |
Thomas Gleixner | f882265 | 2010-09-27 12:44:32 +0000 | [diff] [blame] | 312 | unsigned int (*irq_startup)(struct irq_data *data); |
| 313 | void (*irq_shutdown)(struct irq_data *data); |
| 314 | void (*irq_enable)(struct irq_data *data); |
| 315 | void (*irq_disable)(struct irq_data *data); |
| 316 | |
| 317 | void (*irq_ack)(struct irq_data *data); |
| 318 | void (*irq_mask)(struct irq_data *data); |
| 319 | void (*irq_mask_ack)(struct irq_data *data); |
| 320 | void (*irq_unmask)(struct irq_data *data); |
| 321 | void (*irq_eoi)(struct irq_data *data); |
| 322 | |
| 323 | int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force); |
| 324 | int (*irq_retrigger)(struct irq_data *data); |
| 325 | int (*irq_set_type)(struct irq_data *data, unsigned int flow_type); |
| 326 | int (*irq_set_wake)(struct irq_data *data, unsigned int on); |
| 327 | |
| 328 | void (*irq_bus_lock)(struct irq_data *data); |
| 329 | void (*irq_bus_sync_unlock)(struct irq_data *data); |
| 330 | |
David Daney | 0fdb4b2 | 2011-03-25 12:38:49 -0700 | [diff] [blame] | 331 | void (*irq_cpu_online)(struct irq_data *data); |
| 332 | void (*irq_cpu_offline)(struct irq_data *data); |
| 333 | |
Thomas Gleixner | ab7798f | 2011-03-25 16:48:50 +0100 | [diff] [blame] | 334 | void (*irq_print_chip)(struct irq_data *data, struct seq_file *p); |
| 335 | |
Thomas Gleixner | 2bff17a | 2011-02-10 13:08:38 +0100 | [diff] [blame] | 336 | unsigned long flags; |
| 337 | |
Paolo 'Blaisorblade' Giarrusso | b77d6ad | 2005-06-21 17:16:24 -0700 | [diff] [blame] | 338 | /* Currently used only by UML, might disappear one day.*/ |
| 339 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 340 | void (*release)(unsigned int irq, void *dev_id); |
Paolo 'Blaisorblade' Giarrusso | b77d6ad | 2005-06-21 17:16:24 -0700 | [diff] [blame] | 341 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | }; |
| 343 | |
Thomas Gleixner | d4d5e08 | 2011-02-10 13:16:14 +0100 | [diff] [blame] | 344 | /* |
| 345 | * irq_chip specific flags |
| 346 | * |
Thomas Gleixner | 77694b4 | 2011-02-15 10:33:57 +0100 | [diff] [blame] | 347 | * IRQCHIP_SET_TYPE_MASKED: Mask before calling chip.irq_set_type() |
| 348 | * IRQCHIP_EOI_IF_HANDLED: Only issue irq_eoi() when irq was handled |
Thomas Gleixner | d209a69 | 2011-03-11 21:22:14 +0100 | [diff] [blame] | 349 | * IRQCHIP_MASK_ON_SUSPEND: Mask non wake irqs in the suspend path |
Thomas Gleixner | b3d4223 | 2011-03-27 16:05:36 +0200 | [diff] [blame] | 350 | * IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks |
| 351 | * when irq enabled |
Thomas Gleixner | d4d5e08 | 2011-02-10 13:16:14 +0100 | [diff] [blame] | 352 | */ |
| 353 | enum { |
| 354 | IRQCHIP_SET_TYPE_MASKED = (1 << 0), |
Thomas Gleixner | 77694b4 | 2011-02-15 10:33:57 +0100 | [diff] [blame] | 355 | IRQCHIP_EOI_IF_HANDLED = (1 << 1), |
Thomas Gleixner | d209a69 | 2011-03-11 21:22:14 +0100 | [diff] [blame] | 356 | IRQCHIP_MASK_ON_SUSPEND = (1 << 2), |
Thomas Gleixner | b3d4223 | 2011-03-27 16:05:36 +0200 | [diff] [blame] | 357 | IRQCHIP_ONOFFLINE_ENABLED = (1 << 3), |
Thomas Gleixner | d4d5e08 | 2011-02-10 13:16:14 +0100 | [diff] [blame] | 358 | }; |
| 359 | |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 360 | /* This include will go away once we isolated irq_desc usage to core code */ |
| 361 | #include <linux/irqdesc.h> |
Thomas Gleixner | c6b7674 | 2008-10-15 14:31:29 +0200 | [diff] [blame] | 362 | |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 363 | /* |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 364 | * Pick up the arch-dependent methods: |
| 365 | */ |
| 366 | #include <asm/hw_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | |
Thomas Gleixner | b683de2 | 2010-09-27 20:55:03 +0200 | [diff] [blame] | 368 | #ifndef NR_IRQS_LEGACY |
| 369 | # define NR_IRQS_LEGACY 0 |
| 370 | #endif |
| 371 | |
Thomas Gleixner | 1318a48 | 2010-09-27 21:01:37 +0200 | [diff] [blame] | 372 | #ifndef ARCH_IRQ_INIT_FLAGS |
| 373 | # define ARCH_IRQ_INIT_FLAGS 0 |
| 374 | #endif |
| 375 | |
Thomas Gleixner | c1594b7 | 2011-02-07 22:11:30 +0100 | [diff] [blame] | 376 | #define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS |
Thomas Gleixner | 1318a48 | 2010-09-27 21:01:37 +0200 | [diff] [blame] | 377 | |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 378 | struct irqaction; |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 379 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
Magnus Damm | cbf94f0 | 2009-03-12 21:05:51 +0900 | [diff] [blame] | 380 | extern void remove_irq(unsigned int irq, struct irqaction *act); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | |
David Daney | 0fdb4b2 | 2011-03-25 12:38:49 -0700 | [diff] [blame] | 382 | extern void irq_cpu_online(void); |
| 383 | extern void irq_cpu_offline(void); |
David Daney | c2d0c55 | 2011-03-25 12:38:50 -0700 | [diff] [blame] | 384 | extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask); |
David Daney | 0fdb4b2 | 2011-03-25 12:38:49 -0700 | [diff] [blame] | 385 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | #ifdef CONFIG_GENERIC_HARDIRQS |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 387 | |
Thomas Gleixner | 3a3856d0 | 2010-10-04 13:47:12 +0200 | [diff] [blame] | 388 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ) |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 389 | void irq_move_irq(struct irq_data *data); |
| 390 | void irq_move_masked_irq(struct irq_data *data); |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 391 | #else |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 392 | static inline void irq_move_irq(struct irq_data *data) { } |
| 393 | static inline void irq_move_masked_irq(struct irq_data *data) { } |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 394 | #endif |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 395 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | extern int no_irq_affinity; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 397 | |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 398 | /* |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 399 | * Built-in IRQ handlers for various IRQ types, |
Krzysztof Halasa | bebd04c | 2009-11-15 18:57:24 +0100 | [diff] [blame] | 400 | * callable via desc->handle_irq() |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 401 | */ |
Harvey Harrison | ec70158 | 2008-02-08 04:19:55 -0800 | [diff] [blame] | 402 | extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); |
| 403 | extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); |
| 404 | extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); |
Thomas Gleixner | 0521c8f | 2011-03-28 16:13:24 +0200 | [diff] [blame] | 405 | extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc); |
Harvey Harrison | ec70158 | 2008-02-08 04:19:55 -0800 | [diff] [blame] | 406 | extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); |
| 407 | extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); |
| 408 | extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); |
Mark Brown | 31b47cf | 2009-08-24 20:28:04 +0100 | [diff] [blame] | 409 | extern void handle_nested_irq(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 410 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 411 | /* Handling of unhandled and spurious interrupts: */ |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 412 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, |
Thomas Gleixner | bedd30d | 2008-09-30 23:14:27 +0200 | [diff] [blame] | 413 | irqreturn_t action_ret); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 414 | |
Thomas Gleixner | a4633adc | 2006-06-29 02:24:48 -0700 | [diff] [blame] | 415 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 416 | /* Enable/disable irq debugging output: */ |
| 417 | extern int noirqdebug_setup(char *str); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 419 | /* Checks whether the interrupt can be requested by request_irq(): */ |
| 420 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); |
| 421 | |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 422 | /* Dummy irq-chip implementations: */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 423 | extern struct irq_chip no_irq_chip; |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 424 | extern struct irq_chip dummy_irq_chip; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 425 | |
| 426 | extern void |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 427 | irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 428 | irq_flow_handler_t handle, const char *name); |
| 429 | |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 430 | static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip, |
| 431 | irq_flow_handler_t handle) |
| 432 | { |
| 433 | irq_set_chip_and_handler_name(irq, chip, handle, NULL); |
| 434 | } |
| 435 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 436 | extern void |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 437 | __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 438 | const char *name); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 439 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 440 | static inline void |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 441 | irq_set_handler(unsigned int irq, irq_flow_handler_t handle) |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 442 | { |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 443 | __irq_set_handler(irq, handle, 0, NULL); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 444 | } |
| 445 | |
| 446 | /* |
| 447 | * Set a highlevel chained flow handler for a given IRQ. |
| 448 | * (a chained handler is automatically enabled and set to |
| 449 | * IRQ_NOREQUEST and IRQ_NOPROBE) |
| 450 | */ |
| 451 | static inline void |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 452 | irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle) |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 453 | { |
Thomas Gleixner | 3836ca0 | 2011-02-14 20:09:19 +0100 | [diff] [blame] | 454 | __irq_set_handler(irq, handle, 1, NULL); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 455 | } |
| 456 | |
Thomas Gleixner | 4424718 | 2010-09-28 10:40:18 +0200 | [diff] [blame] | 457 | void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set); |
| 458 | |
| 459 | static inline void irq_set_status_flags(unsigned int irq, unsigned long set) |
| 460 | { |
| 461 | irq_modify_status(irq, 0, set); |
| 462 | } |
| 463 | |
| 464 | static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr) |
| 465 | { |
| 466 | irq_modify_status(irq, clr, 0); |
| 467 | } |
| 468 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 469 | static inline void irq_set_noprobe(unsigned int irq) |
Thomas Gleixner | 4424718 | 2010-09-28 10:40:18 +0200 | [diff] [blame] | 470 | { |
| 471 | irq_modify_status(irq, 0, IRQ_NOPROBE); |
| 472 | } |
| 473 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 474 | static inline void irq_set_probe(unsigned int irq) |
Thomas Gleixner | 4424718 | 2010-09-28 10:40:18 +0200 | [diff] [blame] | 475 | { |
| 476 | irq_modify_status(irq, IRQ_NOPROBE, 0); |
| 477 | } |
Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 478 | |
Thomas Gleixner | 6f91a52 | 2011-02-14 13:33:16 +0100 | [diff] [blame] | 479 | static inline void irq_set_nested_thread(unsigned int irq, bool nest) |
| 480 | { |
| 481 | if (nest) |
| 482 | irq_set_status_flags(irq, IRQ_NESTED_THREAD); |
| 483 | else |
| 484 | irq_clear_status_flags(irq, IRQ_NESTED_THREAD); |
| 485 | } |
| 486 | |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 487 | /* Handle dynamic irq creation and destruction */ |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 488 | extern unsigned int create_irq_nr(unsigned int irq_want, int node); |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 489 | extern int create_irq(void); |
| 490 | extern void destroy_irq(unsigned int irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 491 | |
Thomas Gleixner | b7b2933 | 2010-09-29 18:46:55 +0200 | [diff] [blame] | 492 | /* |
| 493 | * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and |
| 494 | * irq_free_desc instead. |
| 495 | */ |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 496 | extern void dynamic_irq_cleanup(unsigned int irq); |
Thomas Gleixner | b7b2933 | 2010-09-29 18:46:55 +0200 | [diff] [blame] | 497 | static inline void dynamic_irq_init(unsigned int irq) |
| 498 | { |
| 499 | dynamic_irq_cleanup(irq); |
| 500 | } |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 501 | |
| 502 | /* Set/get chip/data for an IRQ: */ |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 503 | extern int irq_set_chip(unsigned int irq, struct irq_chip *chip); |
| 504 | extern int irq_set_handler_data(unsigned int irq, void *data); |
| 505 | extern int irq_set_chip_data(unsigned int irq, void *data); |
| 506 | extern int irq_set_irq_type(unsigned int irq, unsigned int type); |
| 507 | extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry); |
Thomas Gleixner | f303a6d | 2010-09-28 17:34:01 +0200 | [diff] [blame] | 508 | extern struct irq_data *irq_get_irq_data(unsigned int irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 509 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 510 | static inline struct irq_chip *irq_get_chip(unsigned int irq) |
Thomas Gleixner | f303a6d | 2010-09-28 17:34:01 +0200 | [diff] [blame] | 511 | { |
| 512 | struct irq_data *d = irq_get_irq_data(irq); |
| 513 | return d ? d->chip : NULL; |
| 514 | } |
| 515 | |
| 516 | static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d) |
| 517 | { |
| 518 | return d->chip; |
| 519 | } |
| 520 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 521 | static inline void *irq_get_chip_data(unsigned int irq) |
Thomas Gleixner | f303a6d | 2010-09-28 17:34:01 +0200 | [diff] [blame] | 522 | { |
| 523 | struct irq_data *d = irq_get_irq_data(irq); |
| 524 | return d ? d->chip_data : NULL; |
| 525 | } |
| 526 | |
| 527 | static inline void *irq_data_get_irq_chip_data(struct irq_data *d) |
| 528 | { |
| 529 | return d->chip_data; |
| 530 | } |
| 531 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 532 | static inline void *irq_get_handler_data(unsigned int irq) |
Thomas Gleixner | f303a6d | 2010-09-28 17:34:01 +0200 | [diff] [blame] | 533 | { |
| 534 | struct irq_data *d = irq_get_irq_data(irq); |
| 535 | return d ? d->handler_data : NULL; |
| 536 | } |
| 537 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 538 | static inline void *irq_data_get_irq_handler_data(struct irq_data *d) |
Thomas Gleixner | f303a6d | 2010-09-28 17:34:01 +0200 | [diff] [blame] | 539 | { |
| 540 | return d->handler_data; |
| 541 | } |
| 542 | |
Thomas Gleixner | a0cd9ca | 2011-02-10 11:36:33 +0100 | [diff] [blame] | 543 | static inline struct msi_desc *irq_get_msi_desc(unsigned int irq) |
Thomas Gleixner | f303a6d | 2010-09-28 17:34:01 +0200 | [diff] [blame] | 544 | { |
| 545 | struct irq_data *d = irq_get_irq_data(irq); |
| 546 | return d ? d->msi_desc : NULL; |
| 547 | } |
| 548 | |
| 549 | static inline struct msi_desc *irq_data_get_msi(struct irq_data *d) |
| 550 | { |
| 551 | return d->msi_desc; |
| 552 | } |
| 553 | |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 554 | int irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node); |
| 555 | void irq_free_descs(unsigned int irq, unsigned int cnt); |
Thomas Gleixner | 06f6c33 | 2010-10-12 12:31:46 +0200 | [diff] [blame] | 556 | int irq_reserve_irqs(unsigned int from, unsigned int cnt); |
Thomas Gleixner | 1f5a5b8 | 2010-09-27 17:48:26 +0200 | [diff] [blame] | 557 | |
| 558 | static inline int irq_alloc_desc(int node) |
| 559 | { |
| 560 | return irq_alloc_descs(-1, 0, 1, node); |
| 561 | } |
| 562 | |
| 563 | static inline int irq_alloc_desc_at(unsigned int at, int node) |
| 564 | { |
| 565 | return irq_alloc_descs(at, at, 1, node); |
| 566 | } |
| 567 | |
| 568 | static inline int irq_alloc_desc_from(unsigned int from, int node) |
| 569 | { |
| 570 | return irq_alloc_descs(-1, from, 1, node); |
| 571 | } |
| 572 | |
| 573 | static inline void irq_free_desc(unsigned int irq) |
| 574 | { |
| 575 | irq_free_descs(irq, 1); |
| 576 | } |
| 577 | |
Paul Mundt | 639bd12 | 2010-10-26 16:19:13 +0900 | [diff] [blame] | 578 | static inline int irq_reserve_irq(unsigned int irq) |
| 579 | { |
| 580 | return irq_reserve_irqs(irq, 1); |
| 581 | } |
| 582 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 583 | #endif /* CONFIG_GENERIC_HARDIRQS */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 585 | #endif /* !CONFIG_S390 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 587 | #endif /* _LINUX_IRQ_H */ |