blob: e7b8befa872950c43d7289e12f49ae7850d6c3c9 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/arm/mach-ixp4xx/ixdp425-setup.c
3 *
Krzysztof Hałasa9bf4d672009-11-16 15:24:41 +01004 * IXDP425/IXCDP1100 board-setup
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Copyright (C) 2003-2005 MontaVista Software, Inc.
7 *
8 * Author: Deepak Saxena <dsaxena@plexity.net>
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/serial.h>
15#include <linux/tty.h>
16#include <linux/serial_8250.h>
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +010017#include <linux/i2c-gpio.h>
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010018#include <linux/io.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/partitions.h>
Russell King8029db12008-09-06 12:11:37 +010022#include <linux/delay.h>
Linus Walleij8040dd02013-09-10 11:19:55 +020023#include <linux/gpio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#include <asm/types.h>
25#include <asm/setup.h>
26#include <asm/memory.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <asm/mach-types.h>
29#include <asm/irq.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/flash.h>
32
Krzysztof Hałasa9bf4d672009-11-16 15:24:41 +010033#define IXDP425_SDA_PIN 7
34#define IXDP425_SCL_PIN 6
35
36/* NAND Flash pins */
37#define IXDP425_NAND_NCE_PIN 12
38
39#define IXDP425_NAND_CMD_BYTE 0x01
40#define IXDP425_NAND_ADDR_BYTE 0x02
41
Linus Torvalds1da177e2005-04-16 15:20:36 -070042static struct flash_platform_data ixdp425_flash_data = {
43 .map_name = "cfi_probe",
44 .width = 2,
45};
46
47static struct resource ixdp425_flash_resource = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 .flags = IORESOURCE_MEM,
49};
50
51static struct platform_device ixdp425_flash = {
52 .name = "IXP4XX-Flash",
53 .id = 0,
54 .dev = {
55 .platform_data = &ixdp425_flash_data,
56 },
57 .num_resources = 1,
58 .resource = &ixdp425_flash_resource,
59};
60
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010061#if defined(CONFIG_MTD_NAND_PLATFORM) || \
62 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
63
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010064static struct mtd_partition ixdp425_partitions[] = {
65 {
66 .name = "ixp400 NAND FS 0",
67 .offset = 0,
68 .size = SZ_8M
69 }, {
70 .name = "ixp400 NAND FS 1",
71 .offset = MTDPART_OFS_APPEND,
72 .size = MTDPART_SIZ_FULL
73 },
74};
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010075
76static void
77ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
78{
79 struct nand_chip *this = mtd->priv;
80 int offset = (int)this->priv;
81
82 if (ctrl & NAND_CTRL_CHANGE) {
83 if (ctrl & NAND_NCE) {
Linus Walleij8040dd02013-09-10 11:19:55 +020084 gpio_set_value(IXDP425_NAND_NCE_PIN, 0);
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010085 udelay(5);
86 } else
Linus Walleij8040dd02013-09-10 11:19:55 +020087 gpio_set_value(IXDP425_NAND_NCE_PIN, 1);
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010088
89 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
90 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
91 this->priv = (void *)offset;
92 }
93
94 if (cmd != NAND_CMD_NONE)
95 writeb(cmd, this->IO_ADDR_W + offset);
96}
97
98static struct platform_nand_data ixdp425_flash_nand_data = {
99 .chip = {
Marek Vasutef077172010-08-12 02:14:54 +0100100 .nr_chips = 1,
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100101 .chip_delay = 30,
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100102 .partitions = ixdp425_partitions,
103 .nr_partitions = ARRAY_SIZE(ixdp425_partitions),
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100104 },
105 .ctrl = {
106 .cmd_ctrl = ixdp425_flash_nand_cmd_ctrl
107 }
108};
109
110static struct resource ixdp425_flash_nand_resource = {
111 .flags = IORESOURCE_MEM,
112};
113
114static struct platform_device ixdp425_flash_nand = {
115 .name = "gen_nand",
116 .id = -1,
117 .dev = {
118 .platform_data = &ixdp425_flash_nand_data,
119 },
120 .num_resources = 1,
121 .resource = &ixdp425_flash_nand_resource,
122};
123#endif /* CONFIG_MTD_NAND_PLATFORM */
124
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100125static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 .sda_pin = IXDP425_SDA_PIN,
127 .scl_pin = IXDP425_SCL_PIN,
128};
129
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100130static struct platform_device ixdp425_i2c_gpio = {
131 .name = "i2c-gpio",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132 .id = 0,
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100133 .dev = {
134 .platform_data = &ixdp425_i2c_gpio_data,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136};
137
138static struct resource ixdp425_uart_resources[] = {
139 {
140 .start = IXP4XX_UART1_BASE_PHYS,
141 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
142 .flags = IORESOURCE_MEM
143 },
144 {
145 .start = IXP4XX_UART2_BASE_PHYS,
146 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
147 .flags = IORESOURCE_MEM
148 }
149};
150
151static struct plat_serial8250_port ixdp425_uart_data[] = {
152 {
153 .mapbase = IXP4XX_UART1_BASE_PHYS,
154 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
155 .irq = IRQ_IXP4XX_UART1,
Deepak Saxena8c741ed2005-08-03 19:58:21 +0100156 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 .iotype = UPIO_MEM,
158 .regshift = 2,
159 .uartclk = IXP4XX_UART_XTAL,
160 },
161 {
162 .mapbase = IXP4XX_UART2_BASE_PHYS,
163 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Jeff Hansena35d6c92005-12-01 15:50:35 +0000164 .irq = IRQ_IXP4XX_UART2,
Deepak Saxena8c741ed2005-08-03 19:58:21 +0100165 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 .iotype = UPIO_MEM,
167 .regshift = 2,
168 .uartclk = IXP4XX_UART_XTAL,
Stefan Sorensenbcaafbe2005-07-06 23:06:04 +0100169 },
170 { },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171};
172
173static struct platform_device ixdp425_uart = {
174 .name = "serial8250",
Russell King6df29de2005-09-08 16:04:41 +0100175 .id = PLAT8250_DEV_PLATFORM,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 .dev.platform_data = ixdp425_uart_data,
177 .num_resources = 2,
178 .resource = ixdp425_uart_resources
179};
180
Rod Whitby78225912008-01-31 12:44:03 +0100181/* Built-in 10/100 Ethernet MAC interfaces */
182static struct eth_plat_info ixdp425_plat_eth[] = {
183 {
184 .phy = 0,
185 .rxq = 3,
186 .txreadyq = 20,
187 }, {
188 .phy = 1,
189 .rxq = 4,
190 .txreadyq = 21,
191 }
192};
193
194static struct platform_device ixdp425_eth[] = {
195 {
196 .name = "ixp4xx_eth",
197 .id = IXP4XX_ETH_NPEB,
198 .dev.platform_data = ixdp425_plat_eth,
199 }, {
200 .name = "ixp4xx_eth",
201 .id = IXP4XX_ETH_NPEC,
202 .dev.platform_data = ixdp425_plat_eth + 1,
203 }
204};
205
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206static struct platform_device *ixdp425_devices[] __initdata = {
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100207 &ixdp425_i2c_gpio,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 &ixdp425_flash,
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100209#if defined(CONFIG_MTD_NAND_PLATFORM) || \
210 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
211 &ixdp425_flash_nand,
212#endif
Rod Whitby78225912008-01-31 12:44:03 +0100213 &ixdp425_uart,
214 &ixdp425_eth[0],
215 &ixdp425_eth[1],
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216};
217
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218static void __init ixdp425_init(void)
219{
220 ixp4xx_sys_init();
221
Deepak Saxena54e269e2006-01-05 20:59:29 +0000222 ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
223 ixdp425_flash_resource.end =
224 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100226#if defined(CONFIG_MTD_NAND_PLATFORM) || \
227 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
228 ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
229 ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
230
Linus Walleij8040dd02013-09-10 11:19:55 +0200231 gpio_request(IXDP425_NAND_NCE_PIN, "NAND NCE pin");
232 gpio_direction_output(IXDP425_NAND_NCE_PIN, 0);
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100233
234 /* Configure expansion bus for NAND Flash */
235 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
236 IXP4XX_EXP_BUS_STROBE_T(1) | /* extend by 1 clock */
237 IXP4XX_EXP_BUS_CYCLES(0) | /* Intel cycles */
238 IXP4XX_EXP_BUS_SIZE(0) | /* 512bytes addr space*/
239 IXP4XX_EXP_BUS_WR_EN |
240 IXP4XX_EXP_BUS_BYTE_EN; /* 8 bit data bus */
241#endif
242
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100243 if (cpu_is_ixp43x()) {
244 ixdp425_uart.num_resources = 1;
245 ixdp425_uart_data[1].flags = 0;
246 }
247
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
249}
250
Deepak Saxenab38708f2005-09-28 18:07:01 -0700251#ifdef CONFIG_ARCH_IXDP425
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100253 /* Maintainer: MontaVista Software, Inc. */
Deepak Saxenae605ecd2005-08-29 22:46:29 +0100254 .map_io = ixp4xx_map_io,
Rob Herringf4495882012-03-06 15:01:53 -0600255 .init_early = ixp4xx_init_early,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100256 .init_irq = ixp4xx_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700257 .init_time = ixp4xx_timer_init,
Nicolas Pitree022c722011-07-05 22:38:13 -0400258 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100259 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400260#if defined(CONFIG_PCI)
261 .dma_zone_size = SZ_64M,
262#endif
Russell Kingd1b860f2011-11-05 12:10:55 +0000263 .restart = ixp4xx_restart,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264MACHINE_END
Deepak Saxenae0a20082005-09-18 21:11:56 +0100265#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
Deepak Saxenae0a20082005-09-18 21:11:56 +0100267#ifdef CONFIG_MACH_IXDP465
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100269 /* Maintainer: MontaVista Software, Inc. */
Deepak Saxenae605ecd2005-08-29 22:46:29 +0100270 .map_io = ixp4xx_map_io,
Rob Herringf4495882012-03-06 15:01:53 -0600271 .init_early = ixp4xx_init_early,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100272 .init_irq = ixp4xx_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700273 .init_time = ixp4xx_timer_init,
Nicolas Pitree022c722011-07-05 22:38:13 -0400274 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100275 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400276#if defined(CONFIG_PCI)
277 .dma_zone_size = SZ_64M,
278#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279MACHINE_END
Deepak Saxenae0a20082005-09-18 21:11:56 +0100280#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281
Deepak Saxenae0a20082005-09-18 21:11:56 +0100282#ifdef CONFIG_ARCH_PRPMC1100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100284 /* Maintainer: MontaVista Software, Inc. */
Deepak Saxenae605ecd2005-08-29 22:46:29 +0100285 .map_io = ixp4xx_map_io,
Rob Herringf4495882012-03-06 15:01:53 -0600286 .init_early = ixp4xx_init_early,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100287 .init_irq = ixp4xx_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700288 .init_time = ixp4xx_timer_init,
Nicolas Pitree022c722011-07-05 22:38:13 -0400289 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100290 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400291#if defined(CONFIG_PCI)
292 .dma_zone_size = SZ_64M,
293#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294MACHINE_END
Deepak Saxenae0a20082005-09-18 21:11:56 +0100295#endif
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100296
297#ifdef CONFIG_MACH_KIXRP435
298MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
299 /* Maintainer: MontaVista Software, Inc. */
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100300 .map_io = ixp4xx_map_io,
Rob Herringf4495882012-03-06 15:01:53 -0600301 .init_early = ixp4xx_init_early,
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100302 .init_irq = ixp4xx_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700303 .init_time = ixp4xx_timer_init,
Nicolas Pitree022c722011-07-05 22:38:13 -0400304 .atag_offset = 0x100,
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100305 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400306#if defined(CONFIG_PCI)
307 .dma_zone_size = SZ_64M,
308#endif
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100309MACHINE_END
310#endif