blob: 048447ac4ca011464e6b4e43fb1351cf66bd60dc [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Enterprise Fibre Channel Host Bus Adapters. *
4 * Refer to the README file included with this package for *
5 * driver version and adapter support. *
6 * Copyright (C) 2004 Emulex Corporation. *
7 * www.emulex.com *
8 * *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of the GNU General Public License *
11 * as published by the Free Software Foundation; either version 2 *
12 * of the License, or (at your option) any later version. *
13 * *
14 * This program is distributed in the hope that it will be useful, *
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
17 * GNU General Public License for more details, a copy of which *
18 * can be found in the file COPYING included with this package. *
19 *******************************************************************/
20
21/*
22 * $Id: lpfc_sli.c 1.232 2005/04/13 11:59:16EDT sf_support Exp $
23 */
24
25#include <linux/blkdev.h>
26#include <linux/pci.h>
27#include <linux/interrupt.h>
28#include <linux/delay.h>
29
30#include <scsi/scsi_cmnd.h>
31#include <scsi/scsi_device.h>
32#include <scsi/scsi_host.h>
33
34#include "lpfc_hw.h"
35#include "lpfc_sli.h"
36#include "lpfc_disc.h"
37#include "lpfc_scsi.h"
38#include "lpfc.h"
39#include "lpfc_crtn.h"
40#include "lpfc_logmsg.h"
41#include "lpfc_compat.h"
42
43/*
44 * Define macro to log: Mailbox command x%x cannot issue Data
45 * This allows multiple uses of lpfc_msgBlk0311
46 * w/o perturbing log msg utility.
47 */
48#define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
49 lpfc_printf_log(phba, \
50 KERN_INFO, \
51 LOG_MBOX | LOG_SLI, \
52 "%d:0311 Mailbox command x%x cannot issue " \
53 "Data: x%x x%x x%x\n", \
54 phba->brd_no, \
55 mb->mbxCommand, \
56 phba->hba_state, \
57 psli->sli_flag, \
58 flag);
59
60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
69/*
70 * Translate the iocb command to an iocb command type used to decide the final
71 * disposition of each completed IOCB.
72 */
73static lpfc_iocb_type
74lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
75{
76 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
77
78 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
79 return 0;
80
81 switch (iocb_cmnd) {
82 case CMD_XMIT_SEQUENCE_CR:
83 case CMD_XMIT_SEQUENCE_CX:
84 case CMD_XMIT_BCAST_CN:
85 case CMD_XMIT_BCAST_CX:
86 case CMD_ELS_REQUEST_CR:
87 case CMD_ELS_REQUEST_CX:
88 case CMD_CREATE_XRI_CR:
89 case CMD_CREATE_XRI_CX:
90 case CMD_GET_RPI_CN:
91 case CMD_XMIT_ELS_RSP_CX:
92 case CMD_GET_RPI_CR:
93 case CMD_FCP_IWRITE_CR:
94 case CMD_FCP_IWRITE_CX:
95 case CMD_FCP_IREAD_CR:
96 case CMD_FCP_IREAD_CX:
97 case CMD_FCP_ICMND_CR:
98 case CMD_FCP_ICMND_CX:
99 case CMD_ADAPTER_MSG:
100 case CMD_ADAPTER_DUMP:
101 case CMD_XMIT_SEQUENCE64_CR:
102 case CMD_XMIT_SEQUENCE64_CX:
103 case CMD_XMIT_BCAST64_CN:
104 case CMD_XMIT_BCAST64_CX:
105 case CMD_ELS_REQUEST64_CR:
106 case CMD_ELS_REQUEST64_CX:
107 case CMD_FCP_IWRITE64_CR:
108 case CMD_FCP_IWRITE64_CX:
109 case CMD_FCP_IREAD64_CR:
110 case CMD_FCP_IREAD64_CX:
111 case CMD_FCP_ICMND64_CR:
112 case CMD_FCP_ICMND64_CX:
113 case CMD_GEN_REQUEST64_CR:
114 case CMD_GEN_REQUEST64_CX:
115 case CMD_XMIT_ELS_RSP64_CX:
116 type = LPFC_SOL_IOCB;
117 break;
118 case CMD_ABORT_XRI_CN:
119 case CMD_ABORT_XRI_CX:
120 case CMD_CLOSE_XRI_CN:
121 case CMD_CLOSE_XRI_CX:
122 case CMD_XRI_ABORTED_CX:
123 case CMD_ABORT_MXRI64_CN:
124 type = LPFC_ABORT_IOCB;
125 break;
126 case CMD_RCV_SEQUENCE_CX:
127 case CMD_RCV_ELS_REQ_CX:
128 case CMD_RCV_SEQUENCE64_CX:
129 case CMD_RCV_ELS_REQ64_CX:
130 type = LPFC_UNSOL_IOCB;
131 break;
132 default:
133 type = LPFC_UNKNOWN_IOCB;
134 break;
135 }
136
137 return type;
138}
139
140static int
141lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
142{
143 struct lpfc_sli *psli = &phba->sli;
144 MAILBOX_t *pmbox = &pmb->mb;
145 int i, rc;
146
147 for (i = 0; i < psli->num_rings; i++) {
148 phba->hba_state = LPFC_INIT_MBX_CMDS;
149 lpfc_config_ring(phba, i, pmb);
150 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
151 if (rc != MBX_SUCCESS) {
152 lpfc_printf_log(phba,
153 KERN_ERR,
154 LOG_INIT,
155 "%d:0446 Adapter failed to init, "
156 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
157 "ring %d\n",
158 phba->brd_no,
159 pmbox->mbxCommand,
160 pmbox->mbxStatus,
161 i);
162 phba->hba_state = LPFC_HBA_ERROR;
163 return -ENXIO;
164 }
165 }
166 return 0;
167}
168
169static int
170lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
171 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
172{
173 uint16_t iotag;
174
175 list_add_tail(&piocb->list, &pring->txcmplq);
176 pring->txcmplq_cnt++;
177 if (unlikely(pring->ringno == LPFC_ELS_RING))
178 mod_timer(&phba->els_tmofunc,
179 jiffies + HZ * (phba->fc_ratov << 1));
180
181 if (pring->fast_lookup) {
182 /* Setup fast lookup based on iotag for completion */
183 iotag = piocb->iocb.ulpIoTag;
184 if (iotag && (iotag < pring->fast_iotag))
185 *(pring->fast_lookup + iotag) = piocb;
186 else {
187
188 /* Cmd ring <ringno> put: iotag <iotag> greater then
189 configured max <fast_iotag> wd0 <icmd> */
190 lpfc_printf_log(phba,
191 KERN_ERR,
192 LOG_SLI,
193 "%d:0316 Cmd ring %d put: iotag x%x "
194 "greater then configured max x%x "
195 "wd0 x%x\n",
196 phba->brd_no,
197 pring->ringno, iotag,
198 pring->fast_iotag,
199 *(((uint32_t *)(&piocb->iocb)) + 7));
200 }
201 }
202 return (0);
203}
204
205static struct lpfc_iocbq *
206lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
207{
208 struct list_head *dlp;
209 struct lpfc_iocbq *cmd_iocb;
210
211 dlp = &pring->txq;
212 cmd_iocb = NULL;
213 list_remove_head((&pring->txq), cmd_iocb,
214 struct lpfc_iocbq,
215 list);
216 if (cmd_iocb) {
217 /* If the first ptr is not equal to the list header,
218 * deque the IOCBQ_t and return it.
219 */
220 pring->txq_cnt--;
221 }
222 return (cmd_iocb);
223}
224
225static IOCB_t *
226lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
227{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400228 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500229 uint32_t max_cmd_idx = pring->numCiocb;
230 IOCB_t *iocb = NULL;
231
232 if ((pring->next_cmdidx == pring->cmdidx) &&
233 (++pring->next_cmdidx >= max_cmd_idx))
234 pring->next_cmdidx = 0;
235
236 if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
237
238 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
239
240 if (unlikely(pring->local_getidx >= max_cmd_idx)) {
241 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
242 "%d:0315 Ring %d issue: portCmdGet %d "
243 "is bigger then cmd ring %d\n",
244 phba->brd_no, pring->ringno,
245 pring->local_getidx, max_cmd_idx);
246
247 phba->hba_state = LPFC_HBA_ERROR;
248 /*
249 * All error attention handlers are posted to
250 * worker thread
251 */
252 phba->work_ha |= HA_ERATT;
253 phba->work_hs = HS_FFER3;
254 if (phba->work_wait)
255 wake_up(phba->work_wait);
256
257 return NULL;
258 }
259
260 if (pring->local_getidx == pring->next_cmdidx)
261 return NULL;
262 }
263
264 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
265
266 return iocb;
267}
268
269static uint32_t
270lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
271{
272 uint32_t search_start;
273
274 if (pring->fast_lookup == NULL) {
275 pring->iotag_ctr++;
276 if (pring->iotag_ctr >= pring->iotag_max)
277 pring->iotag_ctr = 1;
278 return pring->iotag_ctr;
279 }
280
281 search_start = pring->iotag_ctr;
282
283 do {
284 pring->iotag_ctr++;
285 if (pring->iotag_ctr >= pring->fast_iotag)
286 pring->iotag_ctr = 1;
287
288 if (*(pring->fast_lookup + pring->iotag_ctr) == NULL)
289 return pring->iotag_ctr;
290
291 } while (pring->iotag_ctr != search_start);
292
293 /*
294 * Outstanding I/O count for ring <ringno> is at max <fast_iotag>
295 */
296 lpfc_printf_log(phba,
297 KERN_ERR,
298 LOG_SLI,
299 "%d:0318 Outstanding I/O count for ring %d is at max x%x\n",
300 phba->brd_no,
301 pring->ringno,
302 pring->fast_iotag);
303 return (0);
304}
305
306static void
307lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
308 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
309{
310 /*
311 * Allocate and set up an iotag
312 */
313 nextiocb->iocb.ulpIoTag =
314 lpfc_sli_next_iotag(phba, &phba->sli.ring[phba->sli.fcp_ring]);
315
316 /*
317 * Issue iocb command to adapter
318 */
319 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
320 wmb();
321 pring->stats.iocb_cmd++;
322
323 /*
324 * If there is no completion routine to call, we can release the
325 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
326 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
327 */
328 if (nextiocb->iocb_cmpl)
329 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
330 else {
331 list_add_tail(&nextiocb->list, &phba->lpfc_iocb_list);
332 }
333
334 /*
335 * Let the HBA know what IOCB slot will be the next one the
336 * driver will put a command into.
337 */
338 pring->cmdidx = pring->next_cmdidx;
339 writeb(pring->cmdidx, phba->MBslimaddr
340 + (SLIMOFF + (pring->ringno * 2)) * 4);
341}
342
343static void
344lpfc_sli_update_full_ring(struct lpfc_hba * phba,
345 struct lpfc_sli_ring *pring)
346{
347 int ringno = pring->ringno;
348
349 pring->flag |= LPFC_CALL_RING_AVAILABLE;
350
351 wmb();
352
353 /*
354 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
355 * The HBA will tell us when an IOCB entry is available.
356 */
357 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
358 readl(phba->CAregaddr); /* flush */
359
360 pring->stats.iocb_cmd_full++;
361}
362
363static void
364lpfc_sli_update_ring(struct lpfc_hba * phba,
365 struct lpfc_sli_ring *pring)
366{
367 int ringno = pring->ringno;
368
369 /*
370 * Tell the HBA that there is work to do in this ring.
371 */
372 wmb();
373 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
374 readl(phba->CAregaddr); /* flush */
375}
376
377static void
378lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
379{
380 IOCB_t *iocb;
381 struct lpfc_iocbq *nextiocb;
382
383 /*
384 * Check to see if:
385 * (a) there is anything on the txq to send
386 * (b) link is up
387 * (c) link attention events can be processed (fcp ring only)
388 * (d) IOCB processing is not blocked by the outstanding mbox command.
389 */
390 if (pring->txq_cnt &&
391 (phba->hba_state > LPFC_LINK_DOWN) &&
392 (pring->ringno != phba->sli.fcp_ring ||
393 phba->sli.sli_flag & LPFC_PROCESS_LA) &&
394 !(pring->flag & LPFC_STOP_IOCB_MBX)) {
395
396 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
397 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
398 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
399
400 if (iocb)
401 lpfc_sli_update_ring(phba, pring);
402 else
403 lpfc_sli_update_full_ring(phba, pring);
404 }
405
406 return;
407}
408
409/* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
410static void
411lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
412{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400413 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
dea31012005-04-17 16:05:31 -0500414
415 /* If the ring is active, flag it */
416 if (phba->sli.ring[ringno].cmdringaddr) {
417 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
418 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
419 /*
420 * Force update of the local copy of cmdGetInx
421 */
422 phba->sli.ring[ringno].local_getidx
423 = le32_to_cpu(pgp->cmdGetInx);
424 spin_lock_irq(phba->host->host_lock);
425 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
426 spin_unlock_irq(phba->host->host_lock);
427 }
428 }
429}
430
431static int
432lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
433{
434 uint8_t ret;
435
436 switch (mbxCommand) {
437 case MBX_LOAD_SM:
438 case MBX_READ_NV:
439 case MBX_WRITE_NV:
440 case MBX_RUN_BIU_DIAG:
441 case MBX_INIT_LINK:
442 case MBX_DOWN_LINK:
443 case MBX_CONFIG_LINK:
444 case MBX_CONFIG_RING:
445 case MBX_RESET_RING:
446 case MBX_READ_CONFIG:
447 case MBX_READ_RCONFIG:
448 case MBX_READ_SPARM:
449 case MBX_READ_STATUS:
450 case MBX_READ_RPI:
451 case MBX_READ_XRI:
452 case MBX_READ_REV:
453 case MBX_READ_LNK_STAT:
454 case MBX_REG_LOGIN:
455 case MBX_UNREG_LOGIN:
456 case MBX_READ_LA:
457 case MBX_CLEAR_LA:
458 case MBX_DUMP_MEMORY:
459 case MBX_DUMP_CONTEXT:
460 case MBX_RUN_DIAGS:
461 case MBX_RESTART:
462 case MBX_UPDATE_CFG:
463 case MBX_DOWN_LOAD:
464 case MBX_DEL_LD_ENTRY:
465 case MBX_RUN_PROGRAM:
466 case MBX_SET_MASK:
467 case MBX_SET_SLIM:
468 case MBX_UNREG_D_ID:
469 case MBX_CONFIG_FARP:
470 case MBX_LOAD_AREA:
471 case MBX_RUN_BIU_DIAG64:
472 case MBX_CONFIG_PORT:
473 case MBX_READ_SPARM64:
474 case MBX_READ_RPI64:
475 case MBX_REG_LOGIN64:
476 case MBX_READ_LA64:
477 case MBX_FLASH_WR_ULA:
478 case MBX_SET_DEBUG:
479 case MBX_LOAD_EXP_ROM:
480 ret = mbxCommand;
481 break;
482 default:
483 ret = MBX_SHUTDOWN;
484 break;
485 }
486 return (ret);
487}
488static void
489lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
490{
491 wait_queue_head_t *pdone_q;
492
493 /*
494 * If pdone_q is empty, the driver thread gave up waiting and
495 * continued running.
496 */
497 pdone_q = (wait_queue_head_t *) pmboxq->context1;
498 if (pdone_q)
499 wake_up_interruptible(pdone_q);
500 return;
501}
502
503void
504lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
505{
506 struct lpfc_dmabuf *mp;
507 mp = (struct lpfc_dmabuf *) (pmb->context1);
508 if (mp) {
509 lpfc_mbuf_free(phba, mp->virt, mp->phys);
510 kfree(mp);
511 }
512 mempool_free( pmb, phba->mbox_mem_pool);
513 return;
514}
515
516int
517lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
518{
519 MAILBOX_t *mbox;
520 MAILBOX_t *pmbox;
521 LPFC_MBOXQ_t *pmb;
522 struct lpfc_sli *psli;
523 int i, rc;
524 uint32_t process_next;
525
526 psli = &phba->sli;
527 /* We should only get here if we are in SLI2 mode */
528 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
529 return (1);
530 }
531
532 phba->sli.slistat.mbox_event++;
533
534 /* Get a Mailbox buffer to setup mailbox commands for callback */
535 if ((pmb = phba->sli.mbox_active)) {
536 pmbox = &pmb->mb;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400537 mbox = &phba->slim2p->mbx;
dea31012005-04-17 16:05:31 -0500538
539 /* First check out the status word */
540 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
541
542 /* Sanity check to ensure the host owns the mailbox */
543 if (pmbox->mbxOwner != OWN_HOST) {
544 /* Lets try for a while */
545 for (i = 0; i < 10240; i++) {
546 /* First copy command data */
547 lpfc_sli_pcimem_bcopy(mbox, pmbox,
548 sizeof (uint32_t));
549 if (pmbox->mbxOwner == OWN_HOST)
550 goto mbout;
551 }
552 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
553 <status> */
554 lpfc_printf_log(phba,
555 KERN_ERR,
556 LOG_MBOX | LOG_SLI,
557 "%d:0304 Stray Mailbox Interrupt "
558 "mbxCommand x%x mbxStatus x%x\n",
559 phba->brd_no,
560 pmbox->mbxCommand,
561 pmbox->mbxStatus);
562
563 spin_lock_irq(phba->host->host_lock);
564 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
565 spin_unlock_irq(phba->host->host_lock);
566 return (1);
567 }
568
569 mbout:
570 del_timer_sync(&phba->sli.mbox_tmo);
571 phba->work_hba_events &= ~WORKER_MBOX_TMO;
572
573 /*
574 * It is a fatal error if unknown mbox command completion.
575 */
576 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
577 MBX_SHUTDOWN) {
578
579 /* Unknow mailbox command compl */
580 lpfc_printf_log(phba,
581 KERN_ERR,
582 LOG_MBOX | LOG_SLI,
583 "%d:0323 Unknown Mailbox command %x Cmpl\n",
584 phba->brd_no,
585 pmbox->mbxCommand);
586 phba->hba_state = LPFC_HBA_ERROR;
587 phba->work_hs = HS_FFER3;
588 lpfc_handle_eratt(phba);
589 return (0);
590 }
591
592 phba->sli.mbox_active = NULL;
593 if (pmbox->mbxStatus) {
594 phba->sli.slistat.mbox_stat_err++;
595 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
596 /* Mbox cmd cmpl error - RETRYing */
597 lpfc_printf_log(phba,
598 KERN_INFO,
599 LOG_MBOX | LOG_SLI,
600 "%d:0305 Mbox cmd cmpl error - "
601 "RETRYing Data: x%x x%x x%x x%x\n",
602 phba->brd_no,
603 pmbox->mbxCommand,
604 pmbox->mbxStatus,
605 pmbox->un.varWords[0],
606 phba->hba_state);
607 pmbox->mbxStatus = 0;
608 pmbox->mbxOwner = OWN_HOST;
609 spin_lock_irq(phba->host->host_lock);
610 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
611 spin_unlock_irq(phba->host->host_lock);
612 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
613 if (rc == MBX_SUCCESS)
614 return (0);
615 }
616 }
617
618 /* Mailbox cmd <cmd> Cmpl <cmpl> */
619 lpfc_printf_log(phba,
620 KERN_INFO,
621 LOG_MBOX | LOG_SLI,
622 "%d:0307 Mailbox cmd x%x Cmpl x%p "
623 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
624 phba->brd_no,
625 pmbox->mbxCommand,
626 pmb->mbox_cmpl,
627 *((uint32_t *) pmbox),
628 pmbox->un.varWords[0],
629 pmbox->un.varWords[1],
630 pmbox->un.varWords[2],
631 pmbox->un.varWords[3],
632 pmbox->un.varWords[4],
633 pmbox->un.varWords[5],
634 pmbox->un.varWords[6],
635 pmbox->un.varWords[7]);
636
637 if (pmb->mbox_cmpl) {
638 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
639 pmb->mbox_cmpl(phba,pmb);
640 }
641 }
642
643
644 do {
645 process_next = 0; /* by default don't loop */
646 spin_lock_irq(phba->host->host_lock);
647 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
648
649 /* Process next mailbox command if there is one */
650 if ((pmb = lpfc_mbox_get(phba))) {
651 spin_unlock_irq(phba->host->host_lock);
652 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
653 if (rc == MBX_NOT_FINISHED) {
654 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
655 pmb->mbox_cmpl(phba,pmb);
656 process_next = 1;
657 continue; /* loop back */
658 }
659 } else {
660 spin_unlock_irq(phba->host->host_lock);
661 /* Turn on IOCB processing */
662 for (i = 0; i < phba->sli.num_rings; i++) {
663 lpfc_sli_turn_on_ring(phba, i);
664 }
665
666 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
667 while (!list_empty(&phba->freebufList)) {
668 struct lpfc_dmabuf *mp;
669
670 mp = NULL;
671 list_remove_head((&phba->freebufList),
672 mp,
673 struct lpfc_dmabuf,
674 list);
675 if (mp) {
676 lpfc_mbuf_free(phba, mp->virt,
677 mp->phys);
678 kfree(mp);
679 }
680 }
681 }
682
683 } while (process_next);
684
685 return (0);
686}
687static int
688lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
689 struct lpfc_iocbq *saveq)
690{
691 IOCB_t * irsp;
692 WORD5 * w5p;
693 uint32_t Rctl, Type;
694 uint32_t match, i;
695
696 match = 0;
697 irsp = &(saveq->iocb);
698 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
699 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
700 Rctl = FC_ELS_REQ;
701 Type = FC_ELS_DATA;
702 } else {
703 w5p =
704 (WORD5 *) & (saveq->iocb.un.
705 ulpWord[5]);
706 Rctl = w5p->hcsw.Rctl;
707 Type = w5p->hcsw.Type;
708
709 /* Firmware Workaround */
710 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
711 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
712 Rctl = FC_ELS_REQ;
713 Type = FC_ELS_DATA;
714 w5p->hcsw.Rctl = Rctl;
715 w5p->hcsw.Type = Type;
716 }
717 }
718 /* unSolicited Responses */
719 if (pring->prt[0].profile) {
720 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
721 match = 1;
722 } else {
723 /* We must search, based on rctl / type
724 for the right routine */
725 for (i = 0; i < pring->num_mask;
726 i++) {
727 if ((pring->prt[i].rctl ==
728 Rctl)
729 && (pring->prt[i].
730 type == Type)) {
731 (pring->prt[i].lpfc_sli_rcv_unsol_event)
732 (phba, pring, saveq);
733 match = 1;
734 break;
735 }
736 }
737 }
738 if (match == 0) {
739 /* Unexpected Rctl / Type received */
740 /* Ring <ringno> handler: unexpected
741 Rctl <Rctl> Type <Type> received */
742 lpfc_printf_log(phba,
743 KERN_WARNING,
744 LOG_SLI,
745 "%d:0313 Ring %d handler: unexpected Rctl x%x "
746 "Type x%x received \n",
747 phba->brd_no,
748 pring->ringno,
749 Rctl,
750 Type);
751 }
752 return(1);
753}
754
755static struct lpfc_iocbq *
756lpfc_sli_txcmpl_ring_search_slow(struct lpfc_sli_ring * pring,
757 struct lpfc_iocbq * prspiocb)
758{
759 IOCB_t *icmd = NULL;
760 IOCB_t *irsp = NULL;
761 struct lpfc_iocbq *cmd_iocb;
762 struct lpfc_iocbq *iocb, *next_iocb;
763 uint16_t iotag;
764
765 irsp = &prspiocb->iocb;
766 iotag = irsp->ulpIoTag;
767 cmd_iocb = NULL;
768
769 /* Search through txcmpl from the begining */
770 list_for_each_entry_safe(iocb, next_iocb, &(pring->txcmplq), list) {
771 icmd = &iocb->iocb;
772 if (iotag == icmd->ulpIoTag) {
773 /* Found a match. */
774 cmd_iocb = iocb;
775 list_del(&iocb->list);
776 pring->txcmplq_cnt--;
777 break;
778 }
779 }
780
781 return (cmd_iocb);
782}
783
784static struct lpfc_iocbq *
785lpfc_sli_txcmpl_ring_iotag_lookup(struct lpfc_hba * phba,
786 struct lpfc_sli_ring * pring,
787 struct lpfc_iocbq * prspiocb)
788{
789 IOCB_t *irsp = NULL;
790 struct lpfc_iocbq *cmd_iocb = NULL;
791 uint16_t iotag;
792
793 if (unlikely(pring->fast_lookup == NULL))
794 return NULL;
795
796 /* Use fast lookup based on iotag for completion */
797 irsp = &prspiocb->iocb;
798 iotag = irsp->ulpIoTag;
799 if (iotag < pring->fast_iotag) {
800 cmd_iocb = *(pring->fast_lookup + iotag);
801 *(pring->fast_lookup + iotag) = NULL;
802 if (cmd_iocb) {
803 list_del(&cmd_iocb->list);
804 pring->txcmplq_cnt--;
805 return cmd_iocb;
806 } else {
807 /*
808 * This is clearly an error. A ring that uses iotags
809 * should never have a interrupt for a completion that
810 * is not on the ring. Return NULL and log a error.
811 */
812 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
813 "%d:0327 Rsp ring %d error - command "
814 "completion for iotag x%x not found\n",
815 phba->brd_no, pring->ringno, iotag);
816 return NULL;
817 }
818 }
819
820 /*
821 * Rsp ring <ringno> get: iotag <iotag> greater then
822 * configured max <fast_iotag> wd0 <irsp>. This is an
823 * error. Just return NULL.
824 */
825 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
826 "%d:0317 Rsp ring %d get: iotag x%x greater then "
827 "configured max x%x wd0 x%x\n",
828 phba->brd_no, pring->ringno, iotag, pring->fast_iotag,
829 *(((uint32_t *) irsp) + 7));
830 return NULL;
831}
832
833static int
834lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
835 struct lpfc_iocbq *saveq)
836{
837 struct lpfc_iocbq * cmdiocbp;
838 int rc = 1;
839 unsigned long iflag;
840
841 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
842 spin_lock_irqsave(phba->host->host_lock, iflag);
843 cmdiocbp = lpfc_sli_txcmpl_ring_search_slow(pring, saveq);
844 if (cmdiocbp) {
845 if (cmdiocbp->iocb_cmpl) {
846 /*
847 * Post all ELS completions to the worker thread.
848 * All other are passed to the completion callback.
849 */
850 if (pring->ringno == LPFC_ELS_RING) {
851 spin_unlock_irqrestore(phba->host->host_lock,
852 iflag);
853 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
854 spin_lock_irqsave(phba->host->host_lock, iflag);
855 }
856 else {
857 if (cmdiocbp->iocb_flag & LPFC_IO_POLL)
858 rc = 0;
859
860 spin_unlock_irqrestore(phba->host->host_lock,
861 iflag);
862 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
863 spin_lock_irqsave(phba->host->host_lock, iflag);
864 }
865 } else {
866 list_add_tail(&cmdiocbp->list, &phba->lpfc_iocb_list);
867 }
868 } else {
869 /*
870 * Unknown initiating command based on the response iotag.
871 * This could be the case on the ELS ring because of
872 * lpfc_els_abort().
873 */
874 if (pring->ringno != LPFC_ELS_RING) {
875 /*
876 * Ring <ringno> handler: unexpected completion IoTag
877 * <IoTag>
878 */
879 lpfc_printf_log(phba,
880 KERN_WARNING,
881 LOG_SLI,
882 "%d:0322 Ring %d handler: unexpected "
883 "completion IoTag x%x Data: x%x x%x x%x x%x\n",
884 phba->brd_no,
885 pring->ringno,
886 saveq->iocb.ulpIoTag,
887 saveq->iocb.ulpStatus,
888 saveq->iocb.un.ulpWord[4],
889 saveq->iocb.ulpCommand,
890 saveq->iocb.ulpContext);
891 }
892 }
893 spin_unlock_irqrestore(phba->host->host_lock, iflag);
894 return rc;
895}
896
897/*
898 * This routine presumes LPFC_FCP_RING handling and doesn't bother
899 * to check it explicitly.
900 */
901static int
902lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
903 struct lpfc_sli_ring * pring, uint32_t mask)
904{
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400905 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -0500906 IOCB_t *irsp = NULL;
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -0400907 IOCB_t *entry = NULL;
dea31012005-04-17 16:05:31 -0500908 struct lpfc_iocbq *cmdiocbq = NULL;
909 struct lpfc_iocbq rspiocbq;
dea31012005-04-17 16:05:31 -0500910 uint32_t status;
911 uint32_t portRspPut, portRspMax;
912 int rc = 1;
913 lpfc_iocb_type type;
914 unsigned long iflag;
915 uint32_t rsp_cmpl = 0;
916 void __iomem *to_slim;
917
918 spin_lock_irqsave(phba->host->host_lock, iflag);
919 pring->stats.iocb_event++;
920
dea31012005-04-17 16:05:31 -0500921 /*
922 * The next available response entry should never exceed the maximum
923 * entries. If it does, treat it as an adapter hardware error.
924 */
925 portRspMax = pring->numRiocb;
926 portRspPut = le32_to_cpu(pgp->rspPutInx);
927 if (unlikely(portRspPut >= portRspMax)) {
928 /*
929 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
930 * rsp ring <portRspMax>
931 */
932 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
933 "%d:0312 Ring %d handler: portRspPut %d "
934 "is bigger then rsp ring %d\n",
935 phba->brd_no, pring->ringno, portRspPut,
936 portRspMax);
937
938 phba->hba_state = LPFC_HBA_ERROR;
939
940 /* All error attention handlers are posted to worker thread */
941 phba->work_ha |= HA_ERATT;
942 phba->work_hs = HS_FFER3;
943 if (phba->work_wait)
944 wake_up(phba->work_wait);
945
946 spin_unlock_irqrestore(phba->host->host_lock, iflag);
947 return 1;
948 }
949
950 rmb();
951 while (pring->rspidx != portRspPut) {
James.Smart@Emulex.Com87f6eaf2005-06-25 10:34:13 -0400952 /*
953 * Fetch an entry off the ring and copy it into a local data
954 * structure. The copy involves a byte-swap since the
955 * network byte order and pci byte orders are different.
956 */
957 entry = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
958 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
959 (uint32_t *) &rspiocbq.iocb,
960 sizeof (IOCB_t));
961 irsp = &rspiocbq.iocb;
962
dea31012005-04-17 16:05:31 -0500963 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
964 pring->stats.iocb_rsp++;
965 rsp_cmpl++;
966
967 if (unlikely(irsp->ulpStatus)) {
968 /* Rsp ring <ringno> error: IOCB */
969 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
970 "%d:0326 Rsp Ring %d error: IOCB Data: "
971 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
972 phba->brd_no, pring->ringno,
973 irsp->un.ulpWord[0], irsp->un.ulpWord[1],
974 irsp->un.ulpWord[2], irsp->un.ulpWord[3],
975 irsp->un.ulpWord[4], irsp->un.ulpWord[5],
976 *(((uint32_t *) irsp) + 6),
977 *(((uint32_t *) irsp) + 7));
978 }
979
980 switch (type) {
981 case LPFC_ABORT_IOCB:
982 case LPFC_SOL_IOCB:
983 /*
984 * Idle exchange closed via ABTS from port. No iocb
985 * resources need to be recovered.
986 */
987 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
988 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
989 "Skipping completion\n", __FUNCTION__,
990 irsp->ulpCommand);
991 break;
992 }
993
dea31012005-04-17 16:05:31 -0500994 cmdiocbq = lpfc_sli_txcmpl_ring_iotag_lookup(phba,
995 pring,
996 &rspiocbq);
997 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
998 spin_unlock_irqrestore(
999 phba->host->host_lock, iflag);
1000 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
1001 &rspiocbq);
1002 spin_lock_irqsave(phba->host->host_lock,
1003 iflag);
1004 }
1005 break;
1006 default:
1007 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1008 char adaptermsg[LPFC_MAX_ADPTMSG];
1009 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
1010 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1011 MAX_MSG_DATA);
1012 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
1013 phba->brd_no, adaptermsg);
1014 } else {
1015 /* Unknown IOCB command */
1016 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1017 "%d:0321 Unknown IOCB command "
1018 "Data: x%x, x%x x%x x%x x%x\n",
1019 phba->brd_no, type, irsp->ulpCommand,
1020 irsp->ulpStatus, irsp->ulpIoTag,
1021 irsp->ulpContext);
1022 }
1023 break;
1024 }
1025
1026 /*
1027 * The response IOCB has been processed. Update the ring
1028 * pointer in SLIM. If the port response put pointer has not
1029 * been updated, sync the pgp->rspPutInx and fetch the new port
1030 * response put pointer.
1031 */
1032 if (++pring->rspidx >= portRspMax)
1033 pring->rspidx = 0;
1034
1035 to_slim = phba->MBslimaddr +
1036 (SLIMOFF + (pring->ringno * 2) + 1) * 4;
1037 writeb(pring->rspidx, to_slim);
1038
1039 if (pring->rspidx == portRspPut)
1040 portRspPut = le32_to_cpu(pgp->rspPutInx);
1041 }
1042
1043 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
1044 pring->stats.iocb_rsp_full++;
1045 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1046 writel(status, phba->CAregaddr);
1047 readl(phba->CAregaddr);
1048 }
1049 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1050 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1051 pring->stats.iocb_cmd_empty++;
1052
1053 /* Force update of the local copy of cmdGetInx */
1054 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1055 lpfc_sli_resume_iocb(phba, pring);
1056
1057 if ((pring->lpfc_sli_cmd_available))
1058 (pring->lpfc_sli_cmd_available) (phba, pring);
1059
1060 }
1061
1062 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1063 return rc;
1064}
1065
1066
1067int
1068lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
1069 struct lpfc_sli_ring * pring, uint32_t mask)
1070{
1071 IOCB_t *entry;
1072 IOCB_t *irsp = NULL;
1073 struct lpfc_iocbq *rspiocbp = NULL;
1074 struct lpfc_iocbq *next_iocb;
1075 struct lpfc_iocbq *cmdiocbp;
1076 struct lpfc_iocbq *saveq;
1077 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001078 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
dea31012005-04-17 16:05:31 -05001079 uint8_t iocb_cmd_type;
1080 lpfc_iocb_type type;
1081 uint32_t status, free_saveq;
1082 uint32_t portRspPut, portRspMax;
1083 int rc = 1;
1084 unsigned long iflag;
1085 void __iomem *to_slim;
1086
1087 spin_lock_irqsave(phba->host->host_lock, iflag);
1088 pring->stats.iocb_event++;
1089
dea31012005-04-17 16:05:31 -05001090 /*
1091 * The next available response entry should never exceed the maximum
1092 * entries. If it does, treat it as an adapter hardware error.
1093 */
1094 portRspMax = pring->numRiocb;
1095 portRspPut = le32_to_cpu(pgp->rspPutInx);
1096 if (portRspPut >= portRspMax) {
1097 /*
1098 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
1099 * rsp ring <portRspMax>
1100 */
1101 lpfc_printf_log(phba,
1102 KERN_ERR,
1103 LOG_SLI,
1104 "%d:0312 Ring %d handler: portRspPut %d "
1105 "is bigger then rsp ring %d\n",
1106 phba->brd_no,
1107 pring->ringno, portRspPut, portRspMax);
1108
1109 phba->hba_state = LPFC_HBA_ERROR;
1110 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1111
1112 phba->work_hs = HS_FFER3;
1113 lpfc_handle_eratt(phba);
1114
1115 return 1;
1116 }
1117
1118 rmb();
1119 lpfc_iocb_list = &phba->lpfc_iocb_list;
1120 while (pring->rspidx != portRspPut) {
1121 /*
1122 * Build a completion list and call the appropriate handler.
1123 * The process is to get the next available response iocb, get
1124 * a free iocb from the list, copy the response data into the
1125 * free iocb, insert to the continuation list, and update the
1126 * next response index to slim. This process makes response
1127 * iocb's in the ring available to DMA as fast as possible but
1128 * pays a penalty for a copy operation. Since the iocb is
1129 * only 32 bytes, this penalty is considered small relative to
1130 * the PCI reads for register values and a slim write. When
1131 * the ulpLe field is set, the entire Command has been
1132 * received.
1133 */
1134 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
1135 list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
1136 list);
1137 if (rspiocbp == NULL) {
1138 printk(KERN_ERR "%s: out of buffers! Failing "
1139 "completion.\n", __FUNCTION__);
1140 break;
1141 }
1142
1143 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
1144 irsp = &rspiocbp->iocb;
1145
1146 if (++pring->rspidx >= portRspMax)
1147 pring->rspidx = 0;
1148
1149 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
1150 + 1) * 4;
1151 writeb(pring->rspidx, to_slim);
1152
1153 if (list_empty(&(pring->iocb_continueq))) {
1154 list_add(&rspiocbp->list, &(pring->iocb_continueq));
1155 } else {
1156 list_add_tail(&rspiocbp->list,
1157 &(pring->iocb_continueq));
1158 }
1159
1160 pring->iocb_continueq_cnt++;
1161 if (irsp->ulpLe) {
1162 /*
1163 * By default, the driver expects to free all resources
1164 * associated with this iocb completion.
1165 */
1166 free_saveq = 1;
1167 saveq = list_get_first(&pring->iocb_continueq,
1168 struct lpfc_iocbq, list);
1169 irsp = &(saveq->iocb);
1170 list_del_init(&pring->iocb_continueq);
1171 pring->iocb_continueq_cnt = 0;
1172
1173 pring->stats.iocb_rsp++;
1174
1175 if (irsp->ulpStatus) {
1176 /* Rsp ring <ringno> error: IOCB */
1177 lpfc_printf_log(phba,
1178 KERN_WARNING,
1179 LOG_SLI,
1180 "%d:0328 Rsp Ring %d error: IOCB Data: "
1181 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
1182 phba->brd_no,
1183 pring->ringno,
1184 irsp->un.ulpWord[0],
1185 irsp->un.ulpWord[1],
1186 irsp->un.ulpWord[2],
1187 irsp->un.ulpWord[3],
1188 irsp->un.ulpWord[4],
1189 irsp->un.ulpWord[5],
1190 *(((uint32_t *) irsp) + 6),
1191 *(((uint32_t *) irsp) + 7));
1192 }
1193
1194 /*
1195 * Fetch the IOCB command type and call the correct
1196 * completion routine. Solicited and Unsolicited
1197 * IOCBs on the ELS ring get freed back to the
1198 * lpfc_iocb_list by the discovery kernel thread.
1199 */
1200 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
1201 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
1202 if (type == LPFC_SOL_IOCB) {
1203 spin_unlock_irqrestore(phba->host->host_lock,
1204 iflag);
1205 rc = lpfc_sli_process_sol_iocb(phba, pring,
1206 saveq);
1207 spin_lock_irqsave(phba->host->host_lock, iflag);
1208 } else if (type == LPFC_UNSOL_IOCB) {
1209 spin_unlock_irqrestore(phba->host->host_lock,
1210 iflag);
1211 rc = lpfc_sli_process_unsol_iocb(phba, pring,
1212 saveq);
1213 spin_lock_irqsave(phba->host->host_lock, iflag);
1214 } else if (type == LPFC_ABORT_IOCB) {
1215 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
1216 ((cmdiocbp =
1217 lpfc_sli_txcmpl_ring_search_slow(pring,
1218 saveq)))) {
1219 /* Call the specified completion
1220 routine */
1221 if (cmdiocbp->iocb_cmpl) {
1222 spin_unlock_irqrestore(
1223 phba->host->host_lock,
1224 iflag);
1225 (cmdiocbp->iocb_cmpl) (phba,
1226 cmdiocbp, saveq);
1227 spin_lock_irqsave(
1228 phba->host->host_lock,
1229 iflag);
1230 } else {
1231 list_add_tail(&cmdiocbp->list,
1232 lpfc_iocb_list);
1233 }
1234 }
1235 } else if (type == LPFC_UNKNOWN_IOCB) {
1236 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
1237
1238 char adaptermsg[LPFC_MAX_ADPTMSG];
1239
1240 memset(adaptermsg, 0,
1241 LPFC_MAX_ADPTMSG);
1242 memcpy(&adaptermsg[0], (uint8_t *) irsp,
1243 MAX_MSG_DATA);
1244 dev_warn(&((phba->pcidev)->dev),
1245 "lpfc%d: %s",
1246 phba->brd_no, adaptermsg);
1247 } else {
1248 /* Unknown IOCB command */
1249 lpfc_printf_log(phba,
1250 KERN_ERR,
1251 LOG_SLI,
1252 "%d:0321 Unknown IOCB command "
1253 "Data: x%x x%x x%x x%x\n",
1254 phba->brd_no,
1255 irsp->ulpCommand,
1256 irsp->ulpStatus,
1257 irsp->ulpIoTag,
1258 irsp->ulpContext);
1259 }
1260 }
1261
1262 if (free_saveq) {
1263 if (!list_empty(&saveq->list)) {
1264 list_for_each_entry_safe(rspiocbp,
1265 next_iocb,
1266 &saveq->list,
1267 list) {
1268 list_add_tail(&rspiocbp->list,
1269 lpfc_iocb_list);
1270 }
1271 }
1272
1273 list_add_tail(&saveq->list, lpfc_iocb_list);
1274 }
1275 }
1276
1277 /*
1278 * If the port response put pointer has not been updated, sync
1279 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
1280 * response put pointer.
1281 */
1282 if (pring->rspidx == portRspPut) {
1283 portRspPut = le32_to_cpu(pgp->rspPutInx);
1284 }
1285 } /* while (pring->rspidx != portRspPut) */
1286
1287 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
1288 /* At least one response entry has been freed */
1289 pring->stats.iocb_rsp_full++;
1290 /* SET RxRE_RSP in Chip Att register */
1291 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
1292 writel(status, phba->CAregaddr);
1293 readl(phba->CAregaddr); /* flush */
1294 }
1295 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
1296 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
1297 pring->stats.iocb_cmd_empty++;
1298
1299 /* Force update of the local copy of cmdGetInx */
1300 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
1301 lpfc_sli_resume_iocb(phba, pring);
1302
1303 if ((pring->lpfc_sli_cmd_available))
1304 (pring->lpfc_sli_cmd_available) (phba, pring);
1305
1306 }
1307
1308 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1309 return rc;
1310}
1311
1312int
1313lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1314{
1315 struct lpfc_iocbq *iocb, *next_iocb;
1316 IOCB_t *icmd = NULL, *cmd = NULL;
1317 int errcnt;
1318 uint16_t iotag;
1319
1320 errcnt = 0;
1321
1322 /* Error everything on txq and txcmplq
1323 * First do the txq.
1324 */
1325 spin_lock_irq(phba->host->host_lock);
1326 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
1327 list_del_init(&iocb->list);
1328 if (iocb->iocb_cmpl) {
1329 icmd = &iocb->iocb;
1330 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1331 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1332 spin_unlock_irq(phba->host->host_lock);
1333 (iocb->iocb_cmpl) (phba, iocb, iocb);
1334 spin_lock_irq(phba->host->host_lock);
1335 } else {
1336 list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
1337 }
1338 }
1339 pring->txq_cnt = 0;
1340 INIT_LIST_HEAD(&(pring->txq));
1341
1342 /* Next issue ABTS for everything on the txcmplq */
1343 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
1344 cmd = &iocb->iocb;
1345
1346 /*
1347 * Imediate abort of IOCB, clear fast_lookup entry,
1348 * if any, deque and call compl
1349 */
1350 iotag = cmd->ulpIoTag;
1351 if (iotag && pring->fast_lookup &&
1352 (iotag < pring->fast_iotag))
1353 pring->fast_lookup[iotag] = NULL;
1354
1355 list_del_init(&iocb->list);
1356 pring->txcmplq_cnt--;
1357
1358 if (iocb->iocb_cmpl) {
1359 cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
1360 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
1361 spin_unlock_irq(phba->host->host_lock);
1362 (iocb->iocb_cmpl) (phba, iocb, iocb);
1363 spin_lock_irq(phba->host->host_lock);
1364 } else {
1365 list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
1366 }
1367 }
1368
1369 INIT_LIST_HEAD(&pring->txcmplq);
1370 pring->txcmplq_cnt = 0;
1371 spin_unlock_irq(phba->host->host_lock);
1372
1373 return errcnt;
1374}
1375
1376/******************************************************************************
1377* lpfc_sli_send_reset
1378*
1379* Note: After returning from this function, the HBA cannot be accessed for
1380* 1 ms. Since we do not wish to delay in interrupt context, it is the
1381* responsibility of the caller to perform the mdelay(1) and flush via readl().
1382******************************************************************************/
1383static int
1384lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
1385{
1386 MAILBOX_t *swpmb;
1387 volatile uint32_t word0;
1388 void __iomem *to_slim;
1389 unsigned long flags = 0;
1390
1391 spin_lock_irqsave(phba->host->host_lock, flags);
1392
1393 /* A board reset must use REAL SLIM. */
1394 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1395
1396 word0 = 0;
1397 swpmb = (MAILBOX_t *) & word0;
1398 swpmb->mbxCommand = MBX_RESTART;
1399 swpmb->mbxHc = 1;
1400
1401 to_slim = phba->MBslimaddr;
1402 writel(*(uint32_t *) swpmb, to_slim);
1403 readl(to_slim); /* flush */
1404
1405 /* Only skip post after fc_ffinit is completed */
1406 if (skip_post) {
1407 word0 = 1; /* This is really setting up word1 */
1408 } else {
1409 word0 = 0; /* This is really setting up word1 */
1410 }
1411 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1412 writel(*(uint32_t *) swpmb, to_slim);
1413 readl(to_slim); /* flush */
1414
1415 /* Turn off parity checking and serr during the physical reset */
1416 pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
1417 pci_write_config_word(phba->pcidev, PCI_COMMAND,
1418 (phba->pci_cfg_value &
1419 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
1420
1421 writel(HC_INITFF, phba->HCregaddr);
1422
1423 phba->hba_state = LPFC_INIT_START;
1424 spin_unlock_irqrestore(phba->host->host_lock, flags);
1425
1426 return 0;
1427}
1428
1429static int
1430lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
1431{
1432 struct lpfc_sli_ring *pring;
1433 int i;
1434 struct lpfc_dmabuf *mp, *next_mp;
1435 unsigned long flags = 0;
1436
1437 lpfc_sli_send_reset(phba, skip_post);
1438 mdelay(1);
1439
1440 spin_lock_irqsave(phba->host->host_lock, flags);
1441 /* Risk the write on flush case ie no delay after the readl */
1442 readl(phba->HCregaddr); /* flush */
1443 /* Now toggle INITFF bit set by lpfc_sli_send_reset */
1444 writel(0, phba->HCregaddr);
1445 readl(phba->HCregaddr); /* flush */
1446
1447 /* Restore PCI cmd register */
1448 pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
1449
1450 /* perform board reset */
1451 phba->fc_eventTag = 0;
1452 phba->fc_myDID = 0;
1453 phba->fc_prevDID = Mask_DID;
1454
1455 /* Reset HBA */
1456 lpfc_printf_log(phba,
1457 KERN_INFO,
1458 LOG_SLI,
1459 "%d:0325 Reset HBA Data: x%x x%x x%x\n",
1460 phba->brd_no,
1461 phba->hba_state,
1462 phba->sli.sli_flag,
1463 skip_post);
1464
1465 /* Initialize relevant SLI info */
1466 for (i = 0; i < phba->sli.num_rings; i++) {
1467 pring = &phba->sli.ring[i];
1468 pring->flag = 0;
1469 pring->rspidx = 0;
1470 pring->next_cmdidx = 0;
1471 pring->local_getidx = 0;
1472 pring->cmdidx = 0;
1473 pring->missbufcnt = 0;
1474 }
1475 spin_unlock_irqrestore(phba->host->host_lock, flags);
1476
1477 if (skip_post) {
1478 mdelay(100);
1479 } else {
1480 mdelay(2000);
1481 }
1482
1483 spin_lock_irqsave(phba->host->host_lock, flags);
1484 /* Cleanup preposted buffers on the ELS ring */
1485 pring = &phba->sli.ring[LPFC_ELS_RING];
1486 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
1487 list_del(&mp->list);
1488 pring->postbufq_cnt--;
1489 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1490 kfree(mp);
1491 }
1492 spin_unlock_irqrestore(phba->host->host_lock, flags);
1493
1494 for (i = 0; i < phba->sli.num_rings; i++)
1495 lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
1496
1497 return 0;
1498}
1499
1500static int
1501lpfc_sli_chipset_init(struct lpfc_hba *phba)
1502{
1503 uint32_t status, i = 0;
1504
1505 /* Read the HBA Host Status Register */
1506 status = readl(phba->HSregaddr);
1507
1508 /* Check status register to see what current state is */
1509 i = 0;
1510 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
1511
1512 /* Check every 100ms for 5 retries, then every 500ms for 5, then
1513 * every 2.5 sec for 5, then reset board and every 2.5 sec for
1514 * 4.
1515 */
1516 if (i++ >= 20) {
1517 /* Adapter failed to init, timeout, status reg
1518 <status> */
1519 lpfc_printf_log(phba,
1520 KERN_ERR,
1521 LOG_INIT,
1522 "%d:0436 Adapter failed to init, "
1523 "timeout, status reg x%x\n",
1524 phba->brd_no,
1525 status);
1526 phba->hba_state = LPFC_HBA_ERROR;
1527 return -ETIMEDOUT;
1528 }
1529
1530 /* Check to see if any errors occurred during init */
1531 if (status & HS_FFERM) {
1532 /* ERROR: During chipset initialization */
1533 /* Adapter failed to init, chipset, status reg
1534 <status> */
1535 lpfc_printf_log(phba,
1536 KERN_ERR,
1537 LOG_INIT,
1538 "%d:0437 Adapter failed to init, "
1539 "chipset, status reg x%x\n",
1540 phba->brd_no,
1541 status);
1542 phba->hba_state = LPFC_HBA_ERROR;
1543 return -EIO;
1544 }
1545
1546 if (i <= 5) {
1547 msleep(10);
1548 } else if (i <= 10) {
1549 msleep(500);
1550 } else {
1551 msleep(2500);
1552 }
1553
1554 if (i == 15) {
1555 lpfc_sli_brdreset(phba, 0);
1556 }
1557 /* Read the HBA Host Status Register */
1558 status = readl(phba->HSregaddr);
1559 }
1560
1561 /* Check to see if any errors occurred during init */
1562 if (status & HS_FFERM) {
1563 /* ERROR: During chipset initialization */
1564 /* Adapter failed to init, chipset, status reg <status> */
1565 lpfc_printf_log(phba,
1566 KERN_ERR,
1567 LOG_INIT,
1568 "%d:0438 Adapter failed to init, chipset, "
1569 "status reg x%x\n",
1570 phba->brd_no,
1571 status);
1572 phba->hba_state = LPFC_HBA_ERROR;
1573 return -EIO;
1574 }
1575
1576 /* Clear all interrupt enable conditions */
1577 writel(0, phba->HCregaddr);
1578 readl(phba->HCregaddr); /* flush */
1579
1580 /* setup host attn register */
1581 writel(0xffffffff, phba->HAregaddr);
1582 readl(phba->HAregaddr); /* flush */
1583 return 0;
1584}
1585
1586int
1587lpfc_sli_hba_setup(struct lpfc_hba * phba)
1588{
1589 LPFC_MBOXQ_t *pmb;
1590 uint32_t resetcount = 0, rc = 0, done = 0;
1591
1592 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1593 if (!pmb) {
1594 phba->hba_state = LPFC_HBA_ERROR;
1595 return -ENOMEM;
1596 }
1597
1598 while (resetcount < 2 && !done) {
1599 phba->hba_state = 0;
1600 lpfc_sli_brdreset(phba, 0);
1601 msleep(2500);
1602 rc = lpfc_sli_chipset_init(phba);
1603 if (rc)
1604 break;
1605
1606 resetcount++;
1607
1608 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
1609 * means the call was successful. Any other nonzero value is a failure,
1610 * but if ERESTART is returned, the driver may reset the HBA and try
1611 * again.
1612 */
1613 rc = lpfc_config_port_prep(phba);
1614 if (rc == -ERESTART) {
1615 phba->hba_state = 0;
1616 continue;
1617 } else if (rc) {
1618 break;
1619 }
1620
1621 phba->hba_state = LPFC_INIT_MBX_CMDS;
1622 lpfc_config_port(phba, pmb);
1623 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1624 if (rc == MBX_SUCCESS)
1625 done = 1;
1626 else {
1627 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1628 "%d:0442 Adapter failed to init, mbxCmd x%x "
1629 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
1630 phba->brd_no, pmb->mb.mbxCommand,
1631 pmb->mb.mbxStatus, 0);
1632 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
1633 }
1634 }
1635 if (!done)
1636 goto lpfc_sli_hba_setup_error;
1637
1638 rc = lpfc_sli_ring_map(phba, pmb);
1639
1640 if (rc)
1641 goto lpfc_sli_hba_setup_error;
1642
1643 phba->sli.sli_flag |= LPFC_PROCESS_LA;
1644
1645 rc = lpfc_config_port_post(phba);
1646 if (rc)
1647 goto lpfc_sli_hba_setup_error;
1648
1649 goto lpfc_sli_hba_setup_exit;
1650lpfc_sli_hba_setup_error:
1651 phba->hba_state = LPFC_HBA_ERROR;
1652lpfc_sli_hba_setup_exit:
1653 mempool_free(pmb, phba->mbox_mem_pool);
1654 return rc;
1655}
1656
1657static void
1658lpfc_mbox_abort(struct lpfc_hba * phba)
1659{
1660 LPFC_MBOXQ_t *pmbox;
1661 MAILBOX_t *mb;
1662
1663 if (phba->sli.mbox_active) {
1664 del_timer_sync(&phba->sli.mbox_tmo);
1665 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1666 pmbox = phba->sli.mbox_active;
1667 mb = &pmbox->mb;
1668 phba->sli.mbox_active = NULL;
1669 if (pmbox->mbox_cmpl) {
1670 mb->mbxStatus = MBX_NOT_FINISHED;
1671 (pmbox->mbox_cmpl) (phba, pmbox);
1672 }
1673 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1674 }
1675
1676 /* Abort all the non active mailbox commands. */
1677 spin_lock_irq(phba->host->host_lock);
1678 pmbox = lpfc_mbox_get(phba);
1679 while (pmbox) {
1680 mb = &pmbox->mb;
1681 if (pmbox->mbox_cmpl) {
1682 mb->mbxStatus = MBX_NOT_FINISHED;
1683 spin_unlock_irq(phba->host->host_lock);
1684 (pmbox->mbox_cmpl) (phba, pmbox);
1685 spin_lock_irq(phba->host->host_lock);
1686 }
1687 pmbox = lpfc_mbox_get(phba);
1688 }
1689 spin_unlock_irq(phba->host->host_lock);
1690 return;
1691}
1692
1693/*! lpfc_mbox_timeout
1694 *
1695 * \pre
1696 * \post
1697 * \param hba Pointer to per struct lpfc_hba structure
1698 * \param l1 Pointer to the driver's mailbox queue.
1699 * \return
1700 * void
1701 *
1702 * \b Description:
1703 *
1704 * This routine handles mailbox timeout events at timer interrupt context.
1705 */
1706void
1707lpfc_mbox_timeout(unsigned long ptr)
1708{
1709 struct lpfc_hba *phba;
1710 unsigned long iflag;
1711
1712 phba = (struct lpfc_hba *)ptr;
1713 spin_lock_irqsave(phba->host->host_lock, iflag);
1714 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1715 phba->work_hba_events |= WORKER_MBOX_TMO;
1716 if (phba->work_wait)
1717 wake_up(phba->work_wait);
1718 }
1719 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1720}
1721
1722void
1723lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
1724{
1725 LPFC_MBOXQ_t *pmbox;
1726 MAILBOX_t *mb;
1727
1728 spin_lock_irq(phba->host->host_lock);
1729 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
1730 spin_unlock_irq(phba->host->host_lock);
1731 return;
1732 }
1733
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001734 phba->work_hba_events &= ~WORKER_MBOX_TMO;
1735
dea31012005-04-17 16:05:31 -05001736 pmbox = phba->sli.mbox_active;
1737 mb = &pmbox->mb;
1738
1739 /* Mbox cmd <mbxCommand> timeout */
1740 lpfc_printf_log(phba,
1741 KERN_ERR,
1742 LOG_MBOX | LOG_SLI,
1743 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
1744 phba->brd_no,
1745 mb->mbxCommand,
1746 phba->hba_state,
1747 phba->sli.sli_flag,
1748 phba->sli.mbox_active);
1749
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001750 phba->sli.mbox_active = NULL;
1751 if (pmbox->mbox_cmpl) {
1752 mb->mbxStatus = MBX_NOT_FINISHED;
1753 spin_unlock_irq(phba->host->host_lock);
1754 (pmbox->mbox_cmpl) (phba, pmbox);
1755 spin_lock_irq(phba->host->host_lock);
dea31012005-04-17 16:05:31 -05001756 }
James.Smart@Emulex.Comdb468d12005-06-25 10:34:08 -04001757 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
dea31012005-04-17 16:05:31 -05001758
1759 spin_unlock_irq(phba->host->host_lock);
1760 lpfc_mbox_abort(phba);
1761 return;
1762}
1763
1764int
1765lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
1766{
dea31012005-04-17 16:05:31 -05001767 MAILBOX_t *mb;
1768 struct lpfc_sli *psli;
1769 uint32_t status, evtctr;
1770 uint32_t ha_copy;
1771 int i;
1772 unsigned long drvr_flag = 0;
1773 volatile uint32_t word0, ldata;
1774 void __iomem *to_slim;
1775
1776 psli = &phba->sli;
1777
1778 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1779
1780
1781 mb = &pmbox->mb;
1782 status = MBX_SUCCESS;
1783
1784 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
1785 /* Polling for a mbox command when another one is already active
1786 * is not allowed in SLI. Also, the driver must have established
1787 * SLI2 mode to queue and process multiple mbox commands.
1788 */
1789
1790 if (flag & MBX_POLL) {
1791 spin_unlock_irqrestore(phba->host->host_lock,
1792 drvr_flag);
1793
1794 /* Mbox command <mbxCommand> cannot issue */
1795 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1796 return (MBX_NOT_FINISHED);
1797 }
1798
1799 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1800 spin_unlock_irqrestore(phba->host->host_lock,
1801 drvr_flag);
1802 /* Mbox command <mbxCommand> cannot issue */
1803 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
1804 return (MBX_NOT_FINISHED);
1805 }
1806
1807 /* Handle STOP IOCB processing flag. This is only meaningful
1808 * if we are not polling for mbox completion.
1809 */
1810 if (flag & MBX_STOP_IOCB) {
1811 flag &= ~MBX_STOP_IOCB;
1812 /* Now flag each ring */
1813 for (i = 0; i < psli->num_rings; i++) {
1814 /* If the ring is active, flag it */
1815 if (psli->ring[i].cmdringaddr) {
1816 psli->ring[i].flag |=
1817 LPFC_STOP_IOCB_MBX;
1818 }
1819 }
1820 }
1821
1822 /* Another mailbox command is still being processed, queue this
1823 * command to be processed later.
1824 */
1825 lpfc_mbox_put(phba, pmbox);
1826
1827 /* Mbox cmd issue - BUSY */
1828 lpfc_printf_log(phba,
1829 KERN_INFO,
1830 LOG_MBOX | LOG_SLI,
1831 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
1832 phba->brd_no,
1833 mb->mbxCommand,
1834 phba->hba_state,
1835 psli->sli_flag,
1836 flag);
1837
1838 psli->slistat.mbox_busy++;
1839 spin_unlock_irqrestore(phba->host->host_lock,
1840 drvr_flag);
1841
1842 return (MBX_BUSY);
1843 }
1844
1845 /* Handle STOP IOCB processing flag. This is only meaningful
1846 * if we are not polling for mbox completion.
1847 */
1848 if (flag & MBX_STOP_IOCB) {
1849 flag &= ~MBX_STOP_IOCB;
1850 if (flag == MBX_NOWAIT) {
1851 /* Now flag each ring */
1852 for (i = 0; i < psli->num_rings; i++) {
1853 /* If the ring is active, flag it */
1854 if (psli->ring[i].cmdringaddr) {
1855 psli->ring[i].flag |=
1856 LPFC_STOP_IOCB_MBX;
1857 }
1858 }
1859 }
1860 }
1861
1862 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
1863
1864 /* If we are not polling, we MUST be in SLI2 mode */
1865 if (flag != MBX_POLL) {
1866 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
1867 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1868 spin_unlock_irqrestore(phba->host->host_lock,
1869 drvr_flag);
1870 /* Mbox command <mbxCommand> cannot issue */
1871 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
1872 return (MBX_NOT_FINISHED);
1873 }
1874 /* timeout active mbox command */
1875 mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
1876 }
1877
1878 /* Mailbox cmd <cmd> issue */
1879 lpfc_printf_log(phba,
1880 KERN_INFO,
1881 LOG_MBOX | LOG_SLI,
1882 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
1883 phba->brd_no,
1884 mb->mbxCommand,
1885 phba->hba_state,
1886 psli->sli_flag,
1887 flag);
1888
1889 psli->slistat.mbox_cmd++;
1890 evtctr = psli->slistat.mbox_event;
1891
1892 /* next set own bit for the adapter and copy over command word */
1893 mb->mbxOwner = OWN_CHIP;
1894
1895 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05001896 /* First copy command data to host SLIM area */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001897 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001898 } else {
1899 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1900 /* copy command data into host mbox for cmpl */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001901 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
1902 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05001903 }
1904
1905 /* First copy mbox command data to HBA SLIM, skip past first
1906 word */
1907 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1908 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
1909 MAILBOX_CMD_SIZE - sizeof (uint32_t));
1910
1911 /* Next copy over first word, with mbxOwner set */
1912 ldata = *((volatile uint32_t *)mb);
1913 to_slim = phba->MBslimaddr;
1914 writel(ldata, to_slim);
1915 readl(to_slim); /* flush */
1916
1917 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1918 /* switch over to host mailbox */
1919 psli->sli_flag |= LPFC_SLI2_ACTIVE;
1920 }
1921 }
1922
1923 wmb();
1924 /* interrupt board to doit right away */
1925 writel(CA_MBATT, phba->CAregaddr);
1926 readl(phba->CAregaddr); /* flush */
1927
1928 switch (flag) {
1929 case MBX_NOWAIT:
1930 /* Don't wait for it to finish, just return */
1931 psli->mbox_active = pmbox;
1932 break;
1933
1934 case MBX_POLL:
1935 i = 0;
1936 psli->mbox_active = NULL;
1937 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1938 /* First read mbox status word */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001939 word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05001940 word0 = le32_to_cpu(word0);
1941 } else {
1942 /* First read mbox status word */
1943 word0 = readl(phba->MBslimaddr);
1944 }
1945
1946 /* Read the HBA Host Attention Register */
1947 ha_copy = readl(phba->HAregaddr);
1948
1949 /* Wait for command to complete */
1950 while (((word0 & OWN_CHIP) == OWN_CHIP)
1951 || !(ha_copy & HA_MBATT)) {
1952 if (i++ >= 100) {
1953 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1954 spin_unlock_irqrestore(phba->host->host_lock,
1955 drvr_flag);
1956 return (MBX_NOT_FINISHED);
1957 }
1958
1959 /* Check if we took a mbox interrupt while we were
1960 polling */
1961 if (((word0 & OWN_CHIP) != OWN_CHIP)
1962 && (evtctr != psli->slistat.mbox_event))
1963 break;
1964
1965 spin_unlock_irqrestore(phba->host->host_lock,
1966 drvr_flag);
1967
1968 /* Can be in interrupt context, do not sleep */
1969 /* (or might be called with interrupts disabled) */
1970 mdelay(i);
1971
1972 spin_lock_irqsave(phba->host->host_lock, drvr_flag);
1973
1974 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
1975 /* First copy command data */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04001976 word0 = *((volatile uint32_t *)
1977 &phba->slim2p->mbx);
dea31012005-04-17 16:05:31 -05001978 word0 = le32_to_cpu(word0);
1979 if (mb->mbxCommand == MBX_CONFIG_PORT) {
1980 MAILBOX_t *slimmb;
1981 volatile uint32_t slimword0;
1982 /* Check real SLIM for any errors */
1983 slimword0 = readl(phba->MBslimaddr);
1984 slimmb = (MAILBOX_t *) & slimword0;
1985 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
1986 && slimmb->mbxStatus) {
1987 psli->sli_flag &=
1988 ~LPFC_SLI2_ACTIVE;
1989 word0 = slimword0;
1990 }
1991 }
1992 } else {
1993 /* First copy command data */
1994 word0 = readl(phba->MBslimaddr);
1995 }
1996 /* Read the HBA Host Attention Register */
1997 ha_copy = readl(phba->HAregaddr);
1998 }
1999
2000 if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
dea31012005-04-17 16:05:31 -05002001 /* copy results back to user */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -04002002 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
2003 MAILBOX_CMD_SIZE);
dea31012005-04-17 16:05:31 -05002004 } else {
2005 /* First copy command data */
2006 lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
2007 MAILBOX_CMD_SIZE);
2008 if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
2009 pmbox->context2) {
2010 lpfc_memcpy_from_slim((void *)pmbox->context2,
2011 phba->MBslimaddr + DMP_RSP_OFFSET,
2012 mb->un.varDmp.word_cnt);
2013 }
2014 }
2015
2016 writel(HA_MBATT, phba->HAregaddr);
2017 readl(phba->HAregaddr); /* flush */
2018
2019 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2020 status = mb->mbxStatus;
2021 }
2022
2023 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
2024 return (status);
2025}
2026
2027static int
2028lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2029 struct lpfc_iocbq * piocb)
2030{
2031 /* Insert the caller's iocb in the txq tail for later processing. */
2032 list_add_tail(&piocb->list, &pring->txq);
2033 pring->txq_cnt++;
2034 return (0);
2035}
2036
2037static struct lpfc_iocbq *
2038lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2039 struct lpfc_iocbq ** piocb)
2040{
2041 struct lpfc_iocbq * nextiocb;
2042
2043 nextiocb = lpfc_sli_ringtx_get(phba, pring);
2044 if (!nextiocb) {
2045 nextiocb = *piocb;
2046 *piocb = NULL;
2047 }
2048
2049 return nextiocb;
2050}
2051
2052int
2053lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2054 struct lpfc_iocbq *piocb, uint32_t flag)
2055{
2056 struct lpfc_iocbq *nextiocb;
2057 IOCB_t *iocb;
2058
2059 /*
2060 * We should never get an IOCB if we are in a < LINK_DOWN state
2061 */
2062 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2063 return IOCB_ERROR;
2064
2065 /*
2066 * Check to see if we are blocking IOCB processing because of a
2067 * outstanding mbox command.
2068 */
2069 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
2070 goto iocb_busy;
2071
2072 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
2073 /*
2074 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
2075 * can be issued if the link is not up.
2076 */
2077 switch (piocb->iocb.ulpCommand) {
2078 case CMD_QUE_RING_BUF_CN:
2079 case CMD_QUE_RING_BUF64_CN:
dea31012005-04-17 16:05:31 -05002080 /*
2081 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
2082 * completion, iocb_cmpl MUST be 0.
2083 */
2084 if (piocb->iocb_cmpl)
2085 piocb->iocb_cmpl = NULL;
2086 /*FALLTHROUGH*/
2087 case CMD_CREATE_XRI_CR:
2088 break;
2089 default:
2090 goto iocb_busy;
2091 }
2092
2093 /*
2094 * For FCP commands, we must be in a state where we can process link
2095 * attention events.
2096 */
2097 } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
2098 !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
2099 goto iocb_busy;
2100
2101 /*
2102 * Check to see if this is a high priority command.
2103 * If so bypass tx queue processing.
2104 */
2105 if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
2106 (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
2107 lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
2108 piocb = NULL;
2109 }
2110
2111 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
2112 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
2113 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
2114
2115 if (iocb)
2116 lpfc_sli_update_ring(phba, pring);
2117 else
2118 lpfc_sli_update_full_ring(phba, pring);
2119
2120 if (!piocb)
2121 return IOCB_SUCCESS;
2122
2123 goto out_busy;
2124
2125 iocb_busy:
2126 pring->stats.iocb_cmd_delay++;
2127
2128 out_busy:
2129
2130 if (!(flag & SLI_IOCB_RET_IOCB)) {
2131 lpfc_sli_ringtx_put(phba, pring, piocb);
2132 return IOCB_SUCCESS;
2133 }
2134
2135 return IOCB_BUSY;
2136}
2137
2138int
2139lpfc_sli_setup(struct lpfc_hba *phba)
2140{
2141 int i, totiocb = 0;
2142 struct lpfc_sli *psli = &phba->sli;
2143 struct lpfc_sli_ring *pring;
2144
2145 psli->num_rings = MAX_CONFIGURED_RINGS;
2146 psli->sli_flag = 0;
2147 psli->fcp_ring = LPFC_FCP_RING;
2148 psli->next_ring = LPFC_FCP_NEXT_RING;
2149 psli->ip_ring = LPFC_IP_RING;
2150
2151 for (i = 0; i < psli->num_rings; i++) {
2152 pring = &psli->ring[i];
2153 switch (i) {
2154 case LPFC_FCP_RING: /* ring 0 - FCP */
2155 /* numCiocb and numRiocb are used in config_port */
2156 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
2157 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
2158 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
2159 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
2160 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
2161 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
2162 pring->iotag_ctr = 0;
2163 pring->iotag_max =
2164 (phba->cfg_hba_queue_depth * 2);
2165 pring->fast_iotag = pring->iotag_max;
2166 pring->num_mask = 0;
2167 break;
2168 case LPFC_IP_RING: /* ring 1 - IP */
2169 /* numCiocb and numRiocb are used in config_port */
2170 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
2171 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
2172 pring->num_mask = 0;
2173 break;
2174 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
2175 /* numCiocb and numRiocb are used in config_port */
2176 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
2177 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
2178 pring->fast_iotag = 0;
2179 pring->iotag_ctr = 0;
2180 pring->iotag_max = 4096;
2181 pring->num_mask = 4;
2182 pring->prt[0].profile = 0; /* Mask 0 */
2183 pring->prt[0].rctl = FC_ELS_REQ;
2184 pring->prt[0].type = FC_ELS_DATA;
2185 pring->prt[0].lpfc_sli_rcv_unsol_event =
2186 lpfc_els_unsol_event;
2187 pring->prt[1].profile = 0; /* Mask 1 */
2188 pring->prt[1].rctl = FC_ELS_RSP;
2189 pring->prt[1].type = FC_ELS_DATA;
2190 pring->prt[1].lpfc_sli_rcv_unsol_event =
2191 lpfc_els_unsol_event;
2192 pring->prt[2].profile = 0; /* Mask 2 */
2193 /* NameServer Inquiry */
2194 pring->prt[2].rctl = FC_UNSOL_CTL;
2195 /* NameServer */
2196 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
2197 pring->prt[2].lpfc_sli_rcv_unsol_event =
2198 lpfc_ct_unsol_event;
2199 pring->prt[3].profile = 0; /* Mask 3 */
2200 /* NameServer response */
2201 pring->prt[3].rctl = FC_SOL_CTL;
2202 /* NameServer */
2203 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
2204 pring->prt[3].lpfc_sli_rcv_unsol_event =
2205 lpfc_ct_unsol_event;
2206 break;
2207 }
2208 totiocb += (pring->numCiocb + pring->numRiocb);
2209 }
2210 if (totiocb > MAX_SLI2_IOCB) {
2211 /* Too many cmd / rsp ring entries in SLI2 SLIM */
2212 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2213 "%d:0462 Too many cmd / rsp ring entries in "
2214 "SLI2 SLIM Data: x%x x%x\n",
2215 phba->brd_no, totiocb, MAX_SLI2_IOCB);
2216 }
2217
2218 return 0;
2219}
2220
2221int
2222lpfc_sli_queue_setup(struct lpfc_hba * phba)
2223{
2224 struct lpfc_sli *psli;
2225 struct lpfc_sli_ring *pring;
2226 int i, cnt;
2227
2228 psli = &phba->sli;
2229 spin_lock_irq(phba->host->host_lock);
2230 INIT_LIST_HEAD(&psli->mboxq);
2231 /* Initialize list headers for txq and txcmplq as double linked lists */
2232 for (i = 0; i < psli->num_rings; i++) {
2233 pring = &psli->ring[i];
2234 pring->ringno = i;
2235 pring->next_cmdidx = 0;
2236 pring->local_getidx = 0;
2237 pring->cmdidx = 0;
2238 INIT_LIST_HEAD(&pring->txq);
2239 INIT_LIST_HEAD(&pring->txcmplq);
2240 INIT_LIST_HEAD(&pring->iocb_continueq);
2241 INIT_LIST_HEAD(&pring->postbufq);
2242 cnt = pring->fast_iotag;
2243 spin_unlock_irq(phba->host->host_lock);
2244 if (cnt) {
2245 pring->fast_lookup =
2246 kmalloc(cnt * sizeof (struct lpfc_iocbq *),
2247 GFP_KERNEL);
2248 if (pring->fast_lookup == 0) {
2249 return (0);
2250 }
2251 memset((char *)pring->fast_lookup, 0,
2252 cnt * sizeof (struct lpfc_iocbq *));
2253 }
2254 spin_lock_irq(phba->host->host_lock);
2255 }
2256 spin_unlock_irq(phba->host->host_lock);
2257 return (1);
2258}
2259
2260int
2261lpfc_sli_hba_down(struct lpfc_hba * phba)
2262{
2263 struct lpfc_sli *psli;
2264 struct lpfc_sli_ring *pring;
2265 LPFC_MBOXQ_t *pmb;
2266 struct lpfc_iocbq *iocb, *next_iocb;
2267 IOCB_t *icmd = NULL;
2268 int i;
2269 unsigned long flags = 0;
2270
2271 psli = &phba->sli;
2272 lpfc_hba_down_prep(phba);
2273
2274 spin_lock_irqsave(phba->host->host_lock, flags);
2275
2276 for (i = 0; i < psli->num_rings; i++) {
2277 pring = &psli->ring[i];
2278 pring->flag |= LPFC_DEFERRED_RING_EVENT;
2279
2280 /*
2281 * Error everything on the txq since these iocbs have not been
2282 * given to the FW yet.
2283 */
2284 pring->txq_cnt = 0;
2285
2286 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
2287 list_del_init(&iocb->list);
2288 if (iocb->iocb_cmpl) {
2289 icmd = &iocb->iocb;
2290 icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
2291 icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
2292 spin_unlock_irqrestore(phba->host->host_lock,
2293 flags);
2294 (iocb->iocb_cmpl) (phba, iocb, iocb);
2295 spin_lock_irqsave(phba->host->host_lock, flags);
2296 } else {
2297 list_add_tail(&iocb->list,
2298 &phba->lpfc_iocb_list);
2299 }
2300 }
2301
2302 INIT_LIST_HEAD(&(pring->txq));
2303
2304 if (pring->fast_lookup) {
2305 kfree(pring->fast_lookup);
2306 pring->fast_lookup = NULL;
2307 }
2308
2309 }
2310
2311 spin_unlock_irqrestore(phba->host->host_lock, flags);
2312
2313 /* Return any active mbox cmds */
2314 del_timer_sync(&psli->mbox_tmo);
2315 spin_lock_irqsave(phba->host->host_lock, flags);
2316 phba->work_hba_events &= ~WORKER_MBOX_TMO;
2317 if (psli->mbox_active) {
2318 pmb = psli->mbox_active;
2319 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2320 if (pmb->mbox_cmpl) {
2321 spin_unlock_irqrestore(phba->host->host_lock, flags);
2322 pmb->mbox_cmpl(phba,pmb);
2323 spin_lock_irqsave(phba->host->host_lock, flags);
2324 }
2325 }
2326 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2327 psli->mbox_active = NULL;
2328
2329 /* Return any pending mbox cmds */
2330 while ((pmb = lpfc_mbox_get(phba)) != NULL) {
2331 pmb->mb.mbxStatus = MBX_NOT_FINISHED;
2332 if (pmb->mbox_cmpl) {
2333 spin_unlock_irqrestore(phba->host->host_lock, flags);
2334 pmb->mbox_cmpl(phba,pmb);
2335 spin_lock_irqsave(phba->host->host_lock, flags);
2336 }
2337 }
2338
2339 INIT_LIST_HEAD(&psli->mboxq);
2340
2341 spin_unlock_irqrestore(phba->host->host_lock, flags);
2342
2343 /*
2344 * Provided the hba is not in an error state, reset it. It is not
2345 * capable of IO anymore.
2346 */
2347 if (phba->hba_state != LPFC_HBA_ERROR) {
2348 phba->hba_state = LPFC_INIT_START;
2349 lpfc_sli_brdreset(phba, 1);
2350 }
2351
2352 return 1;
2353}
2354
2355void
2356lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
2357{
2358 uint32_t *src = srcp;
2359 uint32_t *dest = destp;
2360 uint32_t ldata;
2361 int i;
2362
2363 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
2364 ldata = *src;
2365 ldata = le32_to_cpu(ldata);
2366 *dest = ldata;
2367 src++;
2368 dest++;
2369 }
2370}
2371
2372int
2373lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
2374 struct lpfc_dmabuf * mp)
2375{
2376 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
2377 later */
2378 list_add_tail(&mp->list, &pring->postbufq);
2379
2380 pring->postbufq_cnt++;
2381 return 0;
2382}
2383
2384
2385struct lpfc_dmabuf *
2386lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2387 dma_addr_t phys)
2388{
2389 struct lpfc_dmabuf *mp, *next_mp;
2390 struct list_head *slp = &pring->postbufq;
2391
2392 /* Search postbufq, from the begining, looking for a match on phys */
2393 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
2394 if (mp->phys == phys) {
2395 list_del_init(&mp->list);
2396 pring->postbufq_cnt--;
2397 return mp;
2398 }
2399 }
2400
2401 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2402 "%d:0410 Cannot find virtual addr for mapped buf on "
2403 "ring %d Data x%llx x%p x%p x%x\n",
2404 phba->brd_no, pring->ringno, (unsigned long long)phys,
2405 slp->next, slp->prev, pring->postbufq_cnt);
2406 return NULL;
2407}
2408
2409static void
2410lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2411 struct lpfc_iocbq * rspiocb)
2412{
2413 struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
2414 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
2415 * just aborted.
2416 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
2417 */
2418 if (cmdiocb->context2) {
2419 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
2420
2421 /* Free the response IOCB before completing the abort
2422 command. */
2423 buf_ptr = NULL;
2424 list_remove_head((&buf_ptr1->list), buf_ptr,
2425 struct lpfc_dmabuf, list);
2426 if (buf_ptr) {
2427 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2428 kfree(buf_ptr);
2429 }
2430 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
2431 kfree(buf_ptr1);
2432 }
2433
2434 if (cmdiocb->context3) {
2435 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
2436 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
2437 kfree(buf_ptr);
2438 }
2439
2440 list_add_tail(&cmdiocb->list, &phba->lpfc_iocb_list);
2441 return;
2442}
2443
2444int
2445lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
2446 struct lpfc_sli_ring * pring,
2447 struct lpfc_iocbq * cmdiocb)
2448{
2449 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2450 struct lpfc_iocbq *abtsiocbp = NULL;
2451 IOCB_t *icmd = NULL;
2452 IOCB_t *iabt = NULL;
2453
2454 /* issue ABTS for this IOCB based on iotag */
2455 list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
2456 if (abtsiocbp == NULL)
2457 return 0;
2458 memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
2459
2460 iabt = &abtsiocbp->iocb;
2461 icmd = &cmdiocb->iocb;
2462 switch (icmd->ulpCommand) {
2463 case CMD_ELS_REQUEST64_CR:
2464 /* Even though we abort the ELS command, the firmware may access
2465 * the BPL or other resources before it processes our
2466 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
2467 * resources till the actual abort request completes.
2468 */
2469 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
2470 abtsiocbp->context2 = cmdiocb->context2;
2471 abtsiocbp->context3 = cmdiocb->context3;
2472 cmdiocb->context2 = NULL;
2473 cmdiocb->context3 = NULL;
2474 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
2475 break;
2476 default:
2477 list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
2478 return 0;
2479 }
2480
2481 iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
2482 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
2483
2484 iabt->ulpLe = 1;
2485 iabt->ulpClass = CLASS3;
2486 iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
2487
2488 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
2489 list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
2490 return 0;
2491 }
2492
2493 return 1;
2494}
2495
2496static int
2497lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
2498 uint64_t lun_id, struct lpfc_iocbq *iocb,
2499 uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
2500{
2501 int rc = 1;
2502
2503 if (lpfc_cmd == NULL)
2504 return rc;
2505
2506 switch (ctx_cmd) {
2507 case LPFC_CTX_LUN:
2508 if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
2509 (lpfc_cmd->pCmd->device->lun == lun_id))
2510 rc = 0;
2511 break;
2512 case LPFC_CTX_TGT:
2513 if (lpfc_cmd->pCmd->device->id == tgt_id)
2514 rc = 0;
2515 break;
2516 case LPFC_CTX_CTX:
2517 if (iocb->iocb.ulpContext == ctx)
2518 rc = 0;
2519 case LPFC_CTX_HOST:
2520 rc = 0;
2521 break;
2522 default:
2523 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
2524 __FUNCTION__, ctx_cmd);
2525 break;
2526 }
2527
2528 return rc;
2529}
2530
2531int
2532lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2533 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
2534{
2535 struct lpfc_iocbq *iocb, *next_iocb;
2536 IOCB_t *cmd = NULL;
2537 struct lpfc_scsi_buf *lpfc_cmd;
2538 int sum = 0, ret_val = 0;
2539
2540 /* Next check the txcmplq */
2541 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2542 cmd = &iocb->iocb;
2543
2544 /* Must be a FCP command */
2545 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2546 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2547 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2548 continue;
2549 }
2550
2551 /* context1 MUST be a struct lpfc_scsi_buf */
2552 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2553 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2554 NULL, 0, ctx_cmd);
2555 if (ret_val != 0)
2556 continue;
2557 sum++;
2558 }
2559 return sum;
2560}
2561
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002562void
2563lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
2564 struct lpfc_iocbq * rspiocb)
2565{
2566 spin_lock_irq(phba->host->host_lock);
2567 list_add_tail(&cmdiocb->list, &phba->lpfc_iocb_list);
2568 spin_unlock_irq(phba->host->host_lock);
2569 return;
2570}
2571
dea31012005-04-17 16:05:31 -05002572int
2573lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2574 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
2575 lpfc_ctx_cmd abort_cmd)
2576{
2577 struct lpfc_iocbq *iocb, *next_iocb;
2578 struct lpfc_iocbq *abtsiocb = NULL;
2579 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
2580 IOCB_t *cmd = NULL;
2581 struct lpfc_scsi_buf *lpfc_cmd;
2582 int errcnt = 0, ret_val = 0;
2583
2584 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
2585 cmd = &iocb->iocb;
2586
2587 /* Must be a FCP command */
2588 if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
2589 (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
2590 (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
2591 continue;
2592 }
2593
2594 /* context1 MUST be a struct lpfc_scsi_buf */
2595 lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
2596 ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
2597 iocb, ctx, abort_cmd);
2598 if (ret_val != 0)
2599 continue;
2600
2601 /* issue ABTS for this IOCB based on iotag */
2602 list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
2603 list);
2604 if (abtsiocb == NULL) {
2605 errcnt++;
2606 continue;
2607 }
2608 memset(abtsiocb, 0, sizeof (struct lpfc_iocbq));
2609
2610 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
2611 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
2612 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
2613 abtsiocb->iocb.ulpLe = 1;
2614 abtsiocb->iocb.ulpClass = cmd->ulpClass;
2615
2616 if (phba->hba_state >= LPFC_LINK_UP)
2617 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
2618 else
2619 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
2620
James.Smart@Emulex.Com5eb95af2005-06-25 10:34:30 -04002621 /* Setup callback routine and issue the command. */
2622 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
dea31012005-04-17 16:05:31 -05002623 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
2624 if (ret_val == IOCB_ERROR) {
2625 list_add_tail(&abtsiocb->list, lpfc_iocb_list);
2626 errcnt++;
2627 continue;
2628 }
2629 }
2630
2631 return errcnt;
2632}
2633
2634void
2635lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
2636 struct lpfc_iocbq * queue1,
2637 struct lpfc_iocbq * queue2)
2638{
2639 if (queue1->context2 && queue2)
2640 memcpy(queue1->context2, queue2, sizeof (struct lpfc_iocbq));
2641
2642 /* The waiter is looking for LPFC_IO_HIPRI bit to be set
2643 as a signal to wake up */
2644 queue1->iocb_flag |= LPFC_IO_HIPRI;
2645 return;
2646}
2647
2648int
2649lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
2650 struct lpfc_sli_ring * pring,
2651 struct lpfc_iocbq * piocb,
2652 uint32_t flag,
2653 struct lpfc_iocbq * prspiocbq,
2654 uint32_t timeout)
2655{
2656 int j, delay_time, retval = IOCB_ERROR;
2657
2658 /* The caller must left context1 empty. */
2659 if (piocb->context_un.hipri_wait_queue != 0) {
2660 return IOCB_ERROR;
2661 }
2662
2663 /*
2664 * If the caller has provided a response iocbq buffer, context2 must
2665 * be NULL or its an error.
2666 */
2667 if (prspiocbq && piocb->context2) {
2668 return IOCB_ERROR;
2669 }
2670
2671 piocb->context2 = prspiocbq;
2672
2673 /* Setup callback routine and issue the command. */
2674 piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
2675 retval = lpfc_sli_issue_iocb(phba, pring, piocb,
2676 flag | SLI_IOCB_HIGH_PRIORITY);
2677 if (retval != IOCB_SUCCESS) {
2678 piocb->context2 = NULL;
2679 return IOCB_ERROR;
2680 }
2681
2682 /*
2683 * This high-priority iocb was sent out-of-band. Poll for its
2684 * completion rather than wait for a signal. Note that the host_lock
2685 * is held by the midlayer and must be released here to allow the
2686 * interrupt handlers to complete the IO and signal this routine via
2687 * the iocb_flag.
2688 * Also, the delay_time is computed to be one second longer than
2689 * the scsi command timeout to give the FW time to abort on
2690 * timeout rather than the driver just giving up. Typically,
2691 * the midlayer does not specify a time for this command so the
2692 * driver is free to enforce its own timeout.
2693 */
2694
2695 delay_time = ((timeout + 1) * 1000) >> 6;
2696 retval = IOCB_ERROR;
2697 spin_unlock_irq(phba->host->host_lock);
2698 for (j = 0; j < 64; j++) {
2699 msleep(delay_time);
2700 if (piocb->iocb_flag & LPFC_IO_HIPRI) {
2701 piocb->iocb_flag &= ~LPFC_IO_HIPRI;
2702 retval = IOCB_SUCCESS;
2703 break;
2704 }
2705 }
2706
2707 spin_lock_irq(phba->host->host_lock);
2708 piocb->context2 = NULL;
2709 return retval;
2710}
2711int
2712lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
2713 uint32_t timeout)
2714{
2715 DECLARE_WAIT_QUEUE_HEAD(done_q);
2716 DECLARE_WAITQUEUE(wq_entry, current);
2717 uint32_t timeleft = 0;
2718 int retval;
2719
2720 /* The caller must leave context1 empty. */
2721 if (pmboxq->context1 != 0) {
2722 return (MBX_NOT_FINISHED);
2723 }
2724
2725 /* setup wake call as IOCB callback */
2726 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
2727 /* setup context field to pass wait_queue pointer to wake function */
2728 pmboxq->context1 = &done_q;
2729
2730 /* start to sleep before we wait, to avoid races */
2731 set_current_state(TASK_INTERRUPTIBLE);
2732 add_wait_queue(&done_q, &wq_entry);
2733
2734 /* now issue the command */
2735 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
2736
2737 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
2738 timeleft = schedule_timeout(timeout * HZ);
2739 pmboxq->context1 = NULL;
2740 /* if schedule_timeout returns 0, we timed out and were not
2741 woken up */
2742 if (timeleft == 0) {
2743 retval = MBX_TIMEOUT;
2744 } else {
2745 retval = MBX_SUCCESS;
2746 }
2747 }
2748
2749
2750 set_current_state(TASK_RUNNING);
2751 remove_wait_queue(&done_q, &wq_entry);
2752 return retval;
2753}
2754
2755irqreturn_t
2756lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
2757{
2758 struct lpfc_hba *phba;
2759 uint32_t ha_copy;
2760 uint32_t work_ha_copy;
2761 unsigned long status;
2762 int i;
2763 uint32_t control;
2764
2765 /*
2766 * Get the driver's phba structure from the dev_id and
2767 * assume the HBA is not interrupting.
2768 */
2769 phba = (struct lpfc_hba *) dev_id;
2770
2771 if (unlikely(!phba))
2772 return IRQ_NONE;
2773
2774 phba->sli.slistat.sli_intr++;
2775
2776 /*
2777 * Call the HBA to see if it is interrupting. If not, don't claim
2778 * the interrupt
2779 */
2780
2781 /* Ignore all interrupts during initialization. */
2782 if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
2783 return IRQ_NONE;
2784
2785 /*
2786 * Read host attention register to determine interrupt source
2787 * Clear Attention Sources, except Error Attention (to
2788 * preserve status) and Link Attention
2789 */
2790 spin_lock(phba->host->host_lock);
2791 ha_copy = readl(phba->HAregaddr);
2792 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
2793 readl(phba->HAregaddr); /* flush */
2794 spin_unlock(phba->host->host_lock);
2795
2796 if (unlikely(!ha_copy))
2797 return IRQ_NONE;
2798
2799 work_ha_copy = ha_copy & phba->work_ha_mask;
2800
2801 if (unlikely(work_ha_copy)) {
2802 if (work_ha_copy & HA_LATT) {
2803 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
2804 /*
2805 * Turn off Link Attention interrupts
2806 * until CLEAR_LA done
2807 */
2808 spin_lock(phba->host->host_lock);
2809 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
2810 control = readl(phba->HCregaddr);
2811 control &= ~HC_LAINT_ENA;
2812 writel(control, phba->HCregaddr);
2813 readl(phba->HCregaddr); /* flush */
2814 spin_unlock(phba->host->host_lock);
2815 }
2816 else
2817 work_ha_copy &= ~HA_LATT;
2818 }
2819
2820 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
2821 for (i = 0; i < phba->sli.num_rings; i++) {
2822 if (work_ha_copy & (HA_RXATT << (4*i))) {
2823 /*
2824 * Turn off Slow Rings interrupts
2825 */
2826 spin_lock(phba->host->host_lock);
2827 control = readl(phba->HCregaddr);
2828 control &= ~(HC_R0INT_ENA << i);
2829 writel(control, phba->HCregaddr);
2830 readl(phba->HCregaddr); /* flush */
2831 spin_unlock(phba->host->host_lock);
2832 }
2833 }
2834 }
2835
2836 if (work_ha_copy & HA_ERATT) {
2837 phba->hba_state = LPFC_HBA_ERROR;
2838 /*
2839 * There was a link/board error. Read the
2840 * status register to retrieve the error event
2841 * and process it.
2842 */
2843 phba->sli.slistat.err_attn_event++;
2844 /* Save status info */
2845 phba->work_hs = readl(phba->HSregaddr);
2846 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
2847 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
2848
2849 /* Clear Chip error bit */
2850 writel(HA_ERATT, phba->HAregaddr);
2851 readl(phba->HAregaddr); /* flush */
2852
2853 /*
2854 * Reseting the HBA is the only reliable way
2855 * to shutdown interrupt when there is a
2856 * ERROR.
2857 */
2858 lpfc_sli_send_reset(phba, phba->hba_state);
2859 }
2860
2861 spin_lock(phba->host->host_lock);
2862 phba->work_ha |= work_ha_copy;
2863 if (phba->work_wait)
2864 wake_up(phba->work_wait);
2865 spin_unlock(phba->host->host_lock);
2866 }
2867
2868 ha_copy &= ~(phba->work_ha_mask);
2869
2870 /*
2871 * Process all events on FCP ring. Take the optimized path for
2872 * FCP IO. Any other IO is slow path and is handled by
2873 * the worker thread.
2874 */
2875 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
2876 status >>= (4*LPFC_FCP_RING);
2877 if (status & HA_RXATT)
2878 lpfc_sli_handle_fast_ring_event(phba,
2879 &phba->sli.ring[LPFC_FCP_RING],
2880 status);
2881 return IRQ_HANDLED;
2882
2883} /* lpfc_intr_handler */