Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Exynos specific support for Samsung pinctrl/gpiolib driver with eint support. |
| 3 | * |
| 4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * Copyright (c) 2012 Linaro Ltd |
| 7 | * http://www.linaro.org |
| 8 | * |
| 9 | * Author: Thomas Abraham <thomas.ab@samsung.com> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This file contains the Samsung Exynos specific information required by the |
| 17 | * the Samsung pinctrl/gpiolib driver. It also includes the implementation of |
| 18 | * external gpio and wakeup interrupt support. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/irqdomain.h> |
| 25 | #include <linux/irq.h> |
Catalin Marinas | de88cbb | 2013-01-18 15:31:37 +0000 | [diff] [blame] | 26 | #include <linux/irqchip/chained_irq.h> |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 27 | #include <linux/of_irq.h> |
| 28 | #include <linux/io.h> |
| 29 | #include <linux/slab.h> |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 30 | #include <linux/spinlock.h> |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 31 | #include <linux/err.h> |
| 32 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 33 | #include "pinctrl-samsung.h" |
| 34 | #include "pinctrl-exynos.h" |
| 35 | |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 36 | |
| 37 | static struct samsung_pin_bank_type bank_type_off = { |
| 38 | .fld_width = { 4, 1, 2, 2, 2, 2, }, |
Tomasz Figa | 43fc9e7 | 2013-03-18 22:31:53 +0100 | [diff] [blame] | 39 | .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | static struct samsung_pin_bank_type bank_type_alive = { |
| 43 | .fld_width = { 4, 1, 2, 2, }, |
Tomasz Figa | 43fc9e7 | 2013-03-18 22:31:53 +0100 | [diff] [blame] | 44 | .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 45 | }; |
| 46 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 47 | /* list of external wakeup controllers supported */ |
| 48 | static const struct of_device_id exynos_wkup_irq_ids[] = { |
| 49 | { .compatible = "samsung,exynos4210-wakeup-eint", }, |
Axel Lin | afa538c | 2012-11-02 21:46:13 +0800 | [diff] [blame] | 50 | { } |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 51 | }; |
| 52 | |
| 53 | static void exynos_gpio_irq_unmask(struct irq_data *irqd) |
| 54 | { |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 55 | struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); |
| 56 | struct samsung_pinctrl_drv_data *d = bank->drvdata; |
| 57 | unsigned long reg_mask = d->ctrl->geint_mask + bank->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 58 | unsigned long mask; |
| 59 | |
| 60 | mask = readl(d->virt_base + reg_mask); |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 61 | mask &= ~(1 << irqd->hwirq); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 62 | writel(mask, d->virt_base + reg_mask); |
| 63 | } |
| 64 | |
| 65 | static void exynos_gpio_irq_mask(struct irq_data *irqd) |
| 66 | { |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 67 | struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); |
| 68 | struct samsung_pinctrl_drv_data *d = bank->drvdata; |
| 69 | unsigned long reg_mask = d->ctrl->geint_mask + bank->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 70 | unsigned long mask; |
| 71 | |
| 72 | mask = readl(d->virt_base + reg_mask); |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 73 | mask |= 1 << irqd->hwirq; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 74 | writel(mask, d->virt_base + reg_mask); |
| 75 | } |
| 76 | |
| 77 | static void exynos_gpio_irq_ack(struct irq_data *irqd) |
| 78 | { |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 79 | struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); |
| 80 | struct samsung_pinctrl_drv_data *d = bank->drvdata; |
| 81 | unsigned long reg_pend = d->ctrl->geint_pend + bank->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 82 | |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 83 | writel(1 << irqd->hwirq, d->virt_base + reg_pend); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) |
| 87 | { |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 88 | struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 89 | struct samsung_pin_bank_type *bank_type = bank->type; |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 90 | struct samsung_pinctrl_drv_data *d = bank->drvdata; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 91 | struct samsung_pin_ctrl *ctrl = d->ctrl; |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 92 | unsigned int pin = irqd->hwirq; |
| 93 | unsigned int shift = EXYNOS_EINT_CON_LEN * pin; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 94 | unsigned int con, trig_type; |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 95 | unsigned long reg_con = ctrl->geint_con + bank->eint_offset; |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 96 | unsigned long flags; |
Tomasz Figa | ee2f573 | 2012-09-21 07:33:48 +0900 | [diff] [blame] | 97 | unsigned int mask; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 98 | |
| 99 | switch (type) { |
| 100 | case IRQ_TYPE_EDGE_RISING: |
| 101 | trig_type = EXYNOS_EINT_EDGE_RISING; |
| 102 | break; |
| 103 | case IRQ_TYPE_EDGE_FALLING: |
| 104 | trig_type = EXYNOS_EINT_EDGE_FALLING; |
| 105 | break; |
| 106 | case IRQ_TYPE_EDGE_BOTH: |
| 107 | trig_type = EXYNOS_EINT_EDGE_BOTH; |
| 108 | break; |
| 109 | case IRQ_TYPE_LEVEL_HIGH: |
| 110 | trig_type = EXYNOS_EINT_LEVEL_HIGH; |
| 111 | break; |
| 112 | case IRQ_TYPE_LEVEL_LOW: |
| 113 | trig_type = EXYNOS_EINT_LEVEL_LOW; |
| 114 | break; |
| 115 | default: |
| 116 | pr_err("unsupported external interrupt type\n"); |
| 117 | return -EINVAL; |
| 118 | } |
| 119 | |
| 120 | if (type & IRQ_TYPE_EDGE_BOTH) |
| 121 | __irq_set_handler_locked(irqd->irq, handle_edge_irq); |
| 122 | else |
| 123 | __irq_set_handler_locked(irqd->irq, handle_level_irq); |
| 124 | |
| 125 | con = readl(d->virt_base + reg_con); |
| 126 | con &= ~(EXYNOS_EINT_CON_MASK << shift); |
| 127 | con |= trig_type << shift; |
| 128 | writel(con, d->virt_base + reg_con); |
Tomasz Figa | ee2f573 | 2012-09-21 07:33:48 +0900 | [diff] [blame] | 129 | |
Tomasz Figa | 43fc9e7 | 2013-03-18 22:31:53 +0100 | [diff] [blame] | 130 | reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC]; |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 131 | shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; |
| 132 | mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; |
Tomasz Figa | ee2f573 | 2012-09-21 07:33:48 +0900 | [diff] [blame] | 133 | |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 134 | spin_lock_irqsave(&bank->slock, flags); |
| 135 | |
Tomasz Figa | ee2f573 | 2012-09-21 07:33:48 +0900 | [diff] [blame] | 136 | con = readl(d->virt_base + reg_con); |
| 137 | con &= ~(mask << shift); |
| 138 | con |= EXYNOS_EINT_FUNC << shift; |
| 139 | writel(con, d->virt_base + reg_con); |
| 140 | |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 141 | spin_unlock_irqrestore(&bank->slock, flags); |
| 142 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | /* |
| 147 | * irq_chip for gpio interrupts. |
| 148 | */ |
| 149 | static struct irq_chip exynos_gpio_irq_chip = { |
| 150 | .name = "exynos_gpio_irq_chip", |
| 151 | .irq_unmask = exynos_gpio_irq_unmask, |
| 152 | .irq_mask = exynos_gpio_irq_mask, |
| 153 | .irq_ack = exynos_gpio_irq_ack, |
| 154 | .irq_set_type = exynos_gpio_irq_set_type, |
| 155 | }; |
| 156 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 157 | static int exynos_gpio_irq_map(struct irq_domain *h, unsigned int virq, |
| 158 | irq_hw_number_t hw) |
| 159 | { |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 160 | struct samsung_pin_bank *b = h->host_data; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 161 | |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 162 | irq_set_chip_data(virq, b); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 163 | irq_set_chip_and_handler(virq, &exynos_gpio_irq_chip, |
| 164 | handle_level_irq); |
| 165 | set_irq_flags(virq, IRQF_VALID); |
| 166 | return 0; |
| 167 | } |
| 168 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 169 | /* |
| 170 | * irq domain callbacks for external gpio interrupt controller. |
| 171 | */ |
| 172 | static const struct irq_domain_ops exynos_gpio_irqd_ops = { |
| 173 | .map = exynos_gpio_irq_map, |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 174 | .xlate = irq_domain_xlate_twocell, |
| 175 | }; |
| 176 | |
| 177 | static irqreturn_t exynos_eint_gpio_irq(int irq, void *data) |
| 178 | { |
| 179 | struct samsung_pinctrl_drv_data *d = data; |
| 180 | struct samsung_pin_ctrl *ctrl = d->ctrl; |
| 181 | struct samsung_pin_bank *bank = ctrl->pin_banks; |
| 182 | unsigned int svc, group, pin, virq; |
| 183 | |
| 184 | svc = readl(d->virt_base + ctrl->svc); |
| 185 | group = EXYNOS_SVC_GROUP(svc); |
| 186 | pin = svc & EXYNOS_SVC_NUM_MASK; |
| 187 | |
| 188 | if (!group) |
| 189 | return IRQ_HANDLED; |
| 190 | bank += (group - 1); |
| 191 | |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 192 | virq = irq_linear_revmap(bank->irq_domain, pin); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 193 | if (!virq) |
| 194 | return IRQ_NONE; |
| 195 | generic_handle_irq(virq); |
| 196 | return IRQ_HANDLED; |
| 197 | } |
| 198 | |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 199 | struct exynos_eint_gpio_save { |
| 200 | u32 eint_con; |
| 201 | u32 eint_fltcon0; |
| 202 | u32 eint_fltcon1; |
| 203 | }; |
| 204 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 205 | /* |
| 206 | * exynos_eint_gpio_init() - setup handling of external gpio interrupts. |
| 207 | * @d: driver data of samsung pinctrl driver. |
| 208 | */ |
| 209 | static int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d) |
| 210 | { |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 211 | struct samsung_pin_bank *bank; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 212 | struct device *dev = d->dev; |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 213 | int ret; |
| 214 | int i; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 215 | |
| 216 | if (!d->irq) { |
| 217 | dev_err(dev, "irq number not available\n"); |
| 218 | return -EINVAL; |
| 219 | } |
| 220 | |
| 221 | ret = devm_request_irq(dev, d->irq, exynos_eint_gpio_irq, |
| 222 | 0, dev_name(dev), d); |
| 223 | if (ret) { |
| 224 | dev_err(dev, "irq request failed\n"); |
| 225 | return -ENXIO; |
| 226 | } |
| 227 | |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 228 | bank = d->ctrl->pin_banks; |
| 229 | for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) { |
| 230 | if (bank->eint_type != EINT_TYPE_GPIO) |
| 231 | continue; |
| 232 | bank->irq_domain = irq_domain_add_linear(bank->of_node, |
| 233 | bank->nr_pins, &exynos_gpio_irqd_ops, bank); |
| 234 | if (!bank->irq_domain) { |
| 235 | dev_err(dev, "gpio irq domain add failed\n"); |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 236 | ret = -ENXIO; |
| 237 | goto err_domains; |
| 238 | } |
| 239 | |
| 240 | bank->soc_priv = devm_kzalloc(d->dev, |
| 241 | sizeof(struct exynos_eint_gpio_save), GFP_KERNEL); |
| 242 | if (!bank->soc_priv) { |
| 243 | irq_domain_remove(bank->irq_domain); |
| 244 | ret = -ENOMEM; |
| 245 | goto err_domains; |
Tomasz Figa | 595be72 | 2012-10-11 10:11:16 +0200 | [diff] [blame] | 246 | } |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | return 0; |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 250 | |
| 251 | err_domains: |
| 252 | for (--i, --bank; i >= 0; --i, --bank) { |
| 253 | if (bank->eint_type != EINT_TYPE_GPIO) |
| 254 | continue; |
| 255 | irq_domain_remove(bank->irq_domain); |
| 256 | } |
| 257 | |
| 258 | return ret; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 259 | } |
| 260 | |
| 261 | static void exynos_wkup_irq_unmask(struct irq_data *irqd) |
| 262 | { |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 263 | struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd); |
| 264 | struct samsung_pinctrl_drv_data *d = b->drvdata; |
| 265 | unsigned long reg_mask = d->ctrl->weint_mask + b->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 266 | unsigned long mask; |
| 267 | |
| 268 | mask = readl(d->virt_base + reg_mask); |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 269 | mask &= ~(1 << irqd->hwirq); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 270 | writel(mask, d->virt_base + reg_mask); |
| 271 | } |
| 272 | |
| 273 | static void exynos_wkup_irq_mask(struct irq_data *irqd) |
| 274 | { |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 275 | struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd); |
| 276 | struct samsung_pinctrl_drv_data *d = b->drvdata; |
| 277 | unsigned long reg_mask = d->ctrl->weint_mask + b->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 278 | unsigned long mask; |
| 279 | |
| 280 | mask = readl(d->virt_base + reg_mask); |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 281 | mask |= 1 << irqd->hwirq; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 282 | writel(mask, d->virt_base + reg_mask); |
| 283 | } |
| 284 | |
| 285 | static void exynos_wkup_irq_ack(struct irq_data *irqd) |
| 286 | { |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 287 | struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd); |
| 288 | struct samsung_pinctrl_drv_data *d = b->drvdata; |
| 289 | unsigned long pend = d->ctrl->weint_pend + b->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 290 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 291 | writel(1 << irqd->hwirq, d->virt_base + pend); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | static int exynos_wkup_irq_set_type(struct irq_data *irqd, unsigned int type) |
| 295 | { |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 296 | struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 297 | struct samsung_pin_bank_type *bank_type = bank->type; |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 298 | struct samsung_pinctrl_drv_data *d = bank->drvdata; |
| 299 | unsigned int pin = irqd->hwirq; |
| 300 | unsigned long reg_con = d->ctrl->weint_con + bank->eint_offset; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 301 | unsigned long shift = EXYNOS_EINT_CON_LEN * pin; |
| 302 | unsigned long con, trig_type; |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 303 | unsigned long flags; |
Tomasz Figa | 22b9ba0 | 2012-10-11 10:11:19 +0200 | [diff] [blame] | 304 | unsigned int mask; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 305 | |
| 306 | switch (type) { |
| 307 | case IRQ_TYPE_EDGE_RISING: |
| 308 | trig_type = EXYNOS_EINT_EDGE_RISING; |
| 309 | break; |
| 310 | case IRQ_TYPE_EDGE_FALLING: |
| 311 | trig_type = EXYNOS_EINT_EDGE_FALLING; |
| 312 | break; |
| 313 | case IRQ_TYPE_EDGE_BOTH: |
| 314 | trig_type = EXYNOS_EINT_EDGE_BOTH; |
| 315 | break; |
| 316 | case IRQ_TYPE_LEVEL_HIGH: |
| 317 | trig_type = EXYNOS_EINT_LEVEL_HIGH; |
| 318 | break; |
| 319 | case IRQ_TYPE_LEVEL_LOW: |
| 320 | trig_type = EXYNOS_EINT_LEVEL_LOW; |
| 321 | break; |
| 322 | default: |
| 323 | pr_err("unsupported external interrupt type\n"); |
| 324 | return -EINVAL; |
| 325 | } |
| 326 | |
| 327 | if (type & IRQ_TYPE_EDGE_BOTH) |
| 328 | __irq_set_handler_locked(irqd->irq, handle_edge_irq); |
| 329 | else |
| 330 | __irq_set_handler_locked(irqd->irq, handle_level_irq); |
| 331 | |
| 332 | con = readl(d->virt_base + reg_con); |
| 333 | con &= ~(EXYNOS_EINT_CON_MASK << shift); |
| 334 | con |= trig_type << shift; |
| 335 | writel(con, d->virt_base + reg_con); |
Tomasz Figa | 22b9ba0 | 2012-10-11 10:11:19 +0200 | [diff] [blame] | 336 | |
Tomasz Figa | 43fc9e7 | 2013-03-18 22:31:53 +0100 | [diff] [blame] | 337 | reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC]; |
Tomasz Figa | 499147c | 2013-03-18 22:31:52 +0100 | [diff] [blame] | 338 | shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; |
| 339 | mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; |
Tomasz Figa | 22b9ba0 | 2012-10-11 10:11:19 +0200 | [diff] [blame] | 340 | |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 341 | spin_lock_irqsave(&bank->slock, flags); |
| 342 | |
Tomasz Figa | 22b9ba0 | 2012-10-11 10:11:19 +0200 | [diff] [blame] | 343 | con = readl(d->virt_base + reg_con); |
| 344 | con &= ~(mask << shift); |
| 345 | con |= EXYNOS_EINT_FUNC << shift; |
| 346 | writel(con, d->virt_base + reg_con); |
| 347 | |
Tomasz Figa | 1984695 | 2013-03-18 22:31:50 +0100 | [diff] [blame] | 348 | spin_unlock_irqrestore(&bank->slock, flags); |
| 349 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 350 | return 0; |
| 351 | } |
| 352 | |
Tomasz Figa | ad350cd | 2013-05-17 18:24:27 +0200 | [diff] [blame] | 353 | static u32 exynos_eint_wake_mask = 0xffffffff; |
| 354 | |
| 355 | u32 exynos_get_eint_wake_mask(void) |
| 356 | { |
| 357 | return exynos_eint_wake_mask; |
| 358 | } |
| 359 | |
| 360 | static int exynos_wkup_irq_set_wake(struct irq_data *irqd, unsigned int on) |
| 361 | { |
| 362 | struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); |
| 363 | unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); |
| 364 | |
| 365 | pr_info("wake %s for irq %d\n", on ? "enabled" : "disabled", irqd->irq); |
| 366 | |
| 367 | if (!on) |
| 368 | exynos_eint_wake_mask |= bit; |
| 369 | else |
| 370 | exynos_eint_wake_mask &= ~bit; |
| 371 | |
| 372 | return 0; |
| 373 | } |
| 374 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 375 | /* |
| 376 | * irq_chip for wakeup interrupts |
| 377 | */ |
| 378 | static struct irq_chip exynos_wkup_irq_chip = { |
| 379 | .name = "exynos_wkup_irq_chip", |
| 380 | .irq_unmask = exynos_wkup_irq_unmask, |
| 381 | .irq_mask = exynos_wkup_irq_mask, |
| 382 | .irq_ack = exynos_wkup_irq_ack, |
| 383 | .irq_set_type = exynos_wkup_irq_set_type, |
Tomasz Figa | ad350cd | 2013-05-17 18:24:27 +0200 | [diff] [blame] | 384 | .irq_set_wake = exynos_wkup_irq_set_wake, |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 385 | }; |
| 386 | |
| 387 | /* interrupt handler for wakeup interrupts 0..15 */ |
| 388 | static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) |
| 389 | { |
| 390 | struct exynos_weint_data *eintd = irq_get_handler_data(irq); |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 391 | struct samsung_pin_bank *bank = eintd->bank; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 392 | struct irq_chip *chip = irq_get_chip(irq); |
| 393 | int eint_irq; |
| 394 | |
| 395 | chained_irq_enter(chip, desc); |
| 396 | chip->irq_mask(&desc->irq_data); |
| 397 | |
| 398 | if (chip->irq_ack) |
| 399 | chip->irq_ack(&desc->irq_data); |
| 400 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 401 | eint_irq = irq_linear_revmap(bank->irq_domain, eintd->irq); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 402 | generic_handle_irq(eint_irq); |
| 403 | chip->irq_unmask(&desc->irq_data); |
| 404 | chained_irq_exit(chip, desc); |
| 405 | } |
| 406 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 407 | static inline void exynos_irq_demux_eint(unsigned long pend, |
| 408 | struct irq_domain *domain) |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 409 | { |
| 410 | unsigned int irq; |
| 411 | |
| 412 | while (pend) { |
| 413 | irq = fls(pend) - 1; |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 414 | generic_handle_irq(irq_find_mapping(domain, irq)); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 415 | pend &= ~(1 << irq); |
| 416 | } |
| 417 | } |
| 418 | |
| 419 | /* interrupt handler for wakeup interrupt 16 */ |
| 420 | static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) |
| 421 | { |
| 422 | struct irq_chip *chip = irq_get_chip(irq); |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 423 | struct exynos_muxed_weint_data *eintd = irq_get_handler_data(irq); |
| 424 | struct samsung_pinctrl_drv_data *d = eintd->banks[0]->drvdata; |
| 425 | struct samsung_pin_ctrl *ctrl = d->ctrl; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 426 | unsigned long pend; |
Tomasz Figa | de59049 | 2012-09-21 07:33:55 +0900 | [diff] [blame] | 427 | unsigned long mask; |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 428 | int i; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 429 | |
| 430 | chained_irq_enter(chip, desc); |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 431 | |
| 432 | for (i = 0; i < eintd->nr_banks; ++i) { |
| 433 | struct samsung_pin_bank *b = eintd->banks[i]; |
| 434 | pend = readl(d->virt_base + ctrl->weint_pend + b->eint_offset); |
| 435 | mask = readl(d->virt_base + ctrl->weint_mask + b->eint_offset); |
| 436 | exynos_irq_demux_eint(pend & ~mask, b->irq_domain); |
| 437 | } |
| 438 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 439 | chained_irq_exit(chip, desc); |
| 440 | } |
| 441 | |
| 442 | static int exynos_wkup_irq_map(struct irq_domain *h, unsigned int virq, |
| 443 | irq_hw_number_t hw) |
| 444 | { |
| 445 | irq_set_chip_and_handler(virq, &exynos_wkup_irq_chip, handle_level_irq); |
| 446 | irq_set_chip_data(virq, h->host_data); |
| 447 | set_irq_flags(virq, IRQF_VALID); |
| 448 | return 0; |
| 449 | } |
| 450 | |
| 451 | /* |
| 452 | * irq domain callbacks for external wakeup interrupt controller. |
| 453 | */ |
| 454 | static const struct irq_domain_ops exynos_wkup_irqd_ops = { |
| 455 | .map = exynos_wkup_irq_map, |
| 456 | .xlate = irq_domain_xlate_twocell, |
| 457 | }; |
| 458 | |
| 459 | /* |
| 460 | * exynos_eint_wkup_init() - setup handling of external wakeup interrupts. |
| 461 | * @d: driver data of samsung pinctrl driver. |
| 462 | */ |
| 463 | static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d) |
| 464 | { |
| 465 | struct device *dev = d->dev; |
Tomasz Figa | c3ad056 | 2012-09-21 07:34:01 +0900 | [diff] [blame] | 466 | struct device_node *wkup_np = NULL; |
| 467 | struct device_node *np; |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 468 | struct samsung_pin_bank *bank; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 469 | struct exynos_weint_data *weint_data; |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 470 | struct exynos_muxed_weint_data *muxed_data; |
| 471 | unsigned int muxed_banks = 0; |
| 472 | unsigned int i; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 473 | int idx, irq; |
| 474 | |
Tomasz Figa | c3ad056 | 2012-09-21 07:34:01 +0900 | [diff] [blame] | 475 | for_each_child_of_node(dev->of_node, np) { |
| 476 | if (of_match_node(exynos_wkup_irq_ids, np)) { |
| 477 | wkup_np = np; |
| 478 | break; |
| 479 | } |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 480 | } |
Tomasz Figa | c3ad056 | 2012-09-21 07:34:01 +0900 | [diff] [blame] | 481 | if (!wkup_np) |
| 482 | return -ENODEV; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 483 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 484 | bank = d->ctrl->pin_banks; |
| 485 | for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) { |
| 486 | if (bank->eint_type != EINT_TYPE_WKUP) |
| 487 | continue; |
| 488 | |
| 489 | bank->irq_domain = irq_domain_add_linear(bank->of_node, |
| 490 | bank->nr_pins, &exynos_wkup_irqd_ops, bank); |
| 491 | if (!bank->irq_domain) { |
| 492 | dev_err(dev, "wkup irq domain add failed\n"); |
| 493 | return -ENXIO; |
| 494 | } |
| 495 | |
| 496 | if (!of_find_property(bank->of_node, "interrupts", NULL)) { |
| 497 | bank->eint_type = EINT_TYPE_WKUP_MUX; |
| 498 | ++muxed_banks; |
| 499 | continue; |
| 500 | } |
| 501 | |
| 502 | weint_data = devm_kzalloc(dev, bank->nr_pins |
| 503 | * sizeof(*weint_data), GFP_KERNEL); |
| 504 | if (!weint_data) { |
| 505 | dev_err(dev, "could not allocate memory for weint_data\n"); |
| 506 | return -ENOMEM; |
| 507 | } |
| 508 | |
| 509 | for (idx = 0; idx < bank->nr_pins; ++idx) { |
| 510 | irq = irq_of_parse_and_map(bank->of_node, idx); |
| 511 | if (!irq) { |
| 512 | dev_err(dev, "irq number for eint-%s-%d not found\n", |
| 513 | bank->name, idx); |
| 514 | continue; |
| 515 | } |
| 516 | weint_data[idx].irq = idx; |
| 517 | weint_data[idx].bank = bank; |
| 518 | irq_set_handler_data(irq, &weint_data[idx]); |
| 519 | irq_set_chained_handler(irq, exynos_irq_eint0_15); |
| 520 | } |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 521 | } |
| 522 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 523 | if (!muxed_banks) |
| 524 | return 0; |
| 525 | |
| 526 | irq = irq_of_parse_and_map(wkup_np, 0); |
| 527 | if (!irq) { |
| 528 | dev_err(dev, "irq number for muxed EINTs not found\n"); |
| 529 | return 0; |
| 530 | } |
| 531 | |
| 532 | muxed_data = devm_kzalloc(dev, sizeof(*muxed_data) |
| 533 | + muxed_banks*sizeof(struct samsung_pin_bank *), GFP_KERNEL); |
| 534 | if (!muxed_data) { |
| 535 | dev_err(dev, "could not allocate memory for muxed_data\n"); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 536 | return -ENOMEM; |
| 537 | } |
| 538 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 539 | irq_set_chained_handler(irq, exynos_irq_demux_eint16_31); |
| 540 | irq_set_handler_data(irq, muxed_data); |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 541 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 542 | bank = d->ctrl->pin_banks; |
| 543 | idx = 0; |
| 544 | for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) { |
| 545 | if (bank->eint_type != EINT_TYPE_WKUP_MUX) |
| 546 | continue; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 547 | |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 548 | muxed_data->banks[idx++] = bank; |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 549 | } |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 550 | muxed_data->nr_banks = muxed_banks; |
| 551 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 552 | return 0; |
| 553 | } |
| 554 | |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 555 | static void exynos_pinctrl_suspend_bank( |
| 556 | struct samsung_pinctrl_drv_data *drvdata, |
| 557 | struct samsung_pin_bank *bank) |
| 558 | { |
| 559 | struct exynos_eint_gpio_save *save = bank->soc_priv; |
| 560 | void __iomem *regs = drvdata->virt_base; |
| 561 | |
| 562 | save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET |
| 563 | + bank->eint_offset); |
| 564 | save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET |
| 565 | + 2 * bank->eint_offset); |
| 566 | save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET |
| 567 | + 2 * bank->eint_offset + 4); |
| 568 | |
| 569 | pr_debug("%s: save con %#010x\n", bank->name, save->eint_con); |
| 570 | pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0); |
| 571 | pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1); |
| 572 | } |
| 573 | |
| 574 | static void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata) |
| 575 | { |
| 576 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
| 577 | struct samsung_pin_bank *bank = ctrl->pin_banks; |
| 578 | int i; |
| 579 | |
| 580 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) |
| 581 | if (bank->eint_type == EINT_TYPE_GPIO) |
| 582 | exynos_pinctrl_suspend_bank(drvdata, bank); |
| 583 | } |
| 584 | |
| 585 | static void exynos_pinctrl_resume_bank( |
| 586 | struct samsung_pinctrl_drv_data *drvdata, |
| 587 | struct samsung_pin_bank *bank) |
| 588 | { |
| 589 | struct exynos_eint_gpio_save *save = bank->soc_priv; |
| 590 | void __iomem *regs = drvdata->virt_base; |
| 591 | |
| 592 | pr_debug("%s: con %#010x => %#010x\n", bank->name, |
| 593 | readl(regs + EXYNOS_GPIO_ECON_OFFSET |
| 594 | + bank->eint_offset), save->eint_con); |
| 595 | pr_debug("%s: fltcon0 %#010x => %#010x\n", bank->name, |
| 596 | readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET |
| 597 | + 2 * bank->eint_offset), save->eint_fltcon0); |
| 598 | pr_debug("%s: fltcon1 %#010x => %#010x\n", bank->name, |
| 599 | readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET |
| 600 | + 2 * bank->eint_offset + 4), save->eint_fltcon1); |
| 601 | |
| 602 | writel(save->eint_con, regs + EXYNOS_GPIO_ECON_OFFSET |
| 603 | + bank->eint_offset); |
| 604 | writel(save->eint_fltcon0, regs + EXYNOS_GPIO_EFLTCON_OFFSET |
| 605 | + 2 * bank->eint_offset); |
| 606 | writel(save->eint_fltcon1, regs + EXYNOS_GPIO_EFLTCON_OFFSET |
| 607 | + 2 * bank->eint_offset + 4); |
| 608 | } |
| 609 | |
| 610 | static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) |
| 611 | { |
| 612 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
| 613 | struct samsung_pin_bank *bank = ctrl->pin_banks; |
| 614 | int i; |
| 615 | |
| 616 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) |
| 617 | if (bank->eint_type == EINT_TYPE_GPIO) |
| 618 | exynos_pinctrl_resume_bank(drvdata, bank); |
| 619 | } |
| 620 | |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 621 | /* pin banks of exynos4210 pin-controller 0 */ |
| 622 | static struct samsung_pin_bank exynos4210_pin_banks0[] = { |
Tomasz Figa | 1b6056d | 2012-10-11 10:11:15 +0200 | [diff] [blame] | 623 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), |
| 624 | EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), |
| 625 | EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08), |
| 626 | EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c), |
| 627 | EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10), |
| 628 | EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpd0", 0x14), |
| 629 | EXYNOS_PIN_BANK_EINTG(4, 0x0C0, "gpd1", 0x18), |
| 630 | EXYNOS_PIN_BANK_EINTG(5, 0x0E0, "gpe0", 0x1c), |
| 631 | EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20), |
| 632 | EXYNOS_PIN_BANK_EINTG(6, 0x120, "gpe2", 0x24), |
| 633 | EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpe3", 0x28), |
| 634 | EXYNOS_PIN_BANK_EINTG(8, 0x160, "gpe4", 0x2c), |
| 635 | EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf0", 0x30), |
| 636 | EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpf1", 0x34), |
| 637 | EXYNOS_PIN_BANK_EINTG(8, 0x1C0, "gpf2", 0x38), |
| 638 | EXYNOS_PIN_BANK_EINTG(6, 0x1E0, "gpf3", 0x3c), |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 639 | }; |
| 640 | |
| 641 | /* pin banks of exynos4210 pin-controller 1 */ |
| 642 | static struct samsung_pin_bank exynos4210_pin_banks1[] = { |
Tomasz Figa | 1b6056d | 2012-10-11 10:11:15 +0200 | [diff] [blame] | 643 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpj0", 0x00), |
| 644 | EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpj1", 0x04), |
| 645 | EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpk0", 0x08), |
| 646 | EXYNOS_PIN_BANK_EINTG(7, 0x060, "gpk1", 0x0c), |
| 647 | EXYNOS_PIN_BANK_EINTG(7, 0x080, "gpk2", 0x10), |
| 648 | EXYNOS_PIN_BANK_EINTG(7, 0x0A0, "gpk3", 0x14), |
| 649 | EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpl0", 0x18), |
| 650 | EXYNOS_PIN_BANK_EINTG(3, 0x0E0, "gpl1", 0x1c), |
| 651 | EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpl2", 0x20), |
Tomasz Figa | 40ba622 | 2012-10-11 10:11:09 +0200 | [diff] [blame] | 652 | EXYNOS_PIN_BANK_EINTN(6, 0x120, "gpy0"), |
| 653 | EXYNOS_PIN_BANK_EINTN(4, 0x140, "gpy1"), |
| 654 | EXYNOS_PIN_BANK_EINTN(6, 0x160, "gpy2"), |
| 655 | EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy3"), |
| 656 | EXYNOS_PIN_BANK_EINTN(8, 0x1A0, "gpy4"), |
| 657 | EXYNOS_PIN_BANK_EINTN(8, 0x1C0, "gpy5"), |
| 658 | EXYNOS_PIN_BANK_EINTN(8, 0x1E0, "gpy6"), |
Tomasz Figa | a04b07c | 2012-10-11 10:11:18 +0200 | [diff] [blame] | 659 | EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), |
| 660 | EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), |
| 661 | EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), |
| 662 | EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 663 | }; |
| 664 | |
| 665 | /* pin banks of exynos4210 pin-controller 2 */ |
| 666 | static struct samsung_pin_bank exynos4210_pin_banks2[] = { |
Tomasz Figa | 40ba622 | 2012-10-11 10:11:09 +0200 | [diff] [blame] | 667 | EXYNOS_PIN_BANK_EINTN(7, 0x000, "gpz"), |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 668 | }; |
| 669 | |
| 670 | /* |
| 671 | * Samsung pinctrl driver data for Exynos4210 SoC. Exynos4210 SoC includes |
| 672 | * three gpio/pin-mux/pinconfig controllers. |
| 673 | */ |
| 674 | struct samsung_pin_ctrl exynos4210_pin_ctrl[] = { |
| 675 | { |
| 676 | /* pin-controller instance 0 data */ |
| 677 | .pin_banks = exynos4210_pin_banks0, |
| 678 | .nr_banks = ARRAY_SIZE(exynos4210_pin_banks0), |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 679 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 680 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 681 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 682 | .svc = EXYNOS_SVC_OFFSET, |
| 683 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 684 | .suspend = exynos_pinctrl_suspend, |
| 685 | .resume = exynos_pinctrl_resume, |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 686 | .label = "exynos4210-gpio-ctrl0", |
| 687 | }, { |
| 688 | /* pin-controller instance 1 data */ |
| 689 | .pin_banks = exynos4210_pin_banks1, |
| 690 | .nr_banks = ARRAY_SIZE(exynos4210_pin_banks1), |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 691 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 692 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 693 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 694 | .weint_con = EXYNOS_WKUP_ECON_OFFSET, |
| 695 | .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, |
| 696 | .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, |
| 697 | .svc = EXYNOS_SVC_OFFSET, |
| 698 | .eint_gpio_init = exynos_eint_gpio_init, |
| 699 | .eint_wkup_init = exynos_eint_wkup_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 700 | .suspend = exynos_pinctrl_suspend, |
| 701 | .resume = exynos_pinctrl_resume, |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 702 | .label = "exynos4210-gpio-ctrl1", |
| 703 | }, { |
| 704 | /* pin-controller instance 2 data */ |
| 705 | .pin_banks = exynos4210_pin_banks2, |
| 706 | .nr_banks = ARRAY_SIZE(exynos4210_pin_banks2), |
Thomas Abraham | 43b169d | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 707 | .label = "exynos4210-gpio-ctrl2", |
| 708 | }, |
| 709 | }; |
Tomasz Figa | 6edc794 | 2012-11-07 08:44:59 +0900 | [diff] [blame] | 710 | |
| 711 | /* pin banks of exynos4x12 pin-controller 0 */ |
| 712 | static struct samsung_pin_bank exynos4x12_pin_banks0[] = { |
| 713 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), |
| 714 | EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), |
| 715 | EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08), |
| 716 | EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c), |
| 717 | EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10), |
| 718 | EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpd0", 0x14), |
| 719 | EXYNOS_PIN_BANK_EINTG(4, 0x0C0, "gpd1", 0x18), |
| 720 | EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf0", 0x30), |
| 721 | EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpf1", 0x34), |
| 722 | EXYNOS_PIN_BANK_EINTG(8, 0x1C0, "gpf2", 0x38), |
| 723 | EXYNOS_PIN_BANK_EINTG(6, 0x1E0, "gpf3", 0x3c), |
| 724 | EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x40), |
| 725 | EXYNOS_PIN_BANK_EINTG(5, 0x260, "gpj1", 0x44), |
| 726 | }; |
| 727 | |
| 728 | /* pin banks of exynos4x12 pin-controller 1 */ |
| 729 | static struct samsung_pin_bank exynos4x12_pin_banks1[] = { |
| 730 | EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpk0", 0x08), |
| 731 | EXYNOS_PIN_BANK_EINTG(7, 0x060, "gpk1", 0x0c), |
| 732 | EXYNOS_PIN_BANK_EINTG(7, 0x080, "gpk2", 0x10), |
| 733 | EXYNOS_PIN_BANK_EINTG(7, 0x0A0, "gpk3", 0x14), |
| 734 | EXYNOS_PIN_BANK_EINTG(7, 0x0C0, "gpl0", 0x18), |
| 735 | EXYNOS_PIN_BANK_EINTG(2, 0x0E0, "gpl1", 0x1c), |
| 736 | EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpl2", 0x20), |
| 737 | EXYNOS_PIN_BANK_EINTG(8, 0x260, "gpm0", 0x24), |
| 738 | EXYNOS_PIN_BANK_EINTG(7, 0x280, "gpm1", 0x28), |
| 739 | EXYNOS_PIN_BANK_EINTG(5, 0x2A0, "gpm2", 0x2c), |
| 740 | EXYNOS_PIN_BANK_EINTG(8, 0x2C0, "gpm3", 0x30), |
| 741 | EXYNOS_PIN_BANK_EINTG(8, 0x2E0, "gpm4", 0x34), |
| 742 | EXYNOS_PIN_BANK_EINTN(6, 0x120, "gpy0"), |
| 743 | EXYNOS_PIN_BANK_EINTN(4, 0x140, "gpy1"), |
| 744 | EXYNOS_PIN_BANK_EINTN(6, 0x160, "gpy2"), |
| 745 | EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy3"), |
| 746 | EXYNOS_PIN_BANK_EINTN(8, 0x1A0, "gpy4"), |
| 747 | EXYNOS_PIN_BANK_EINTN(8, 0x1C0, "gpy5"), |
| 748 | EXYNOS_PIN_BANK_EINTN(8, 0x1E0, "gpy6"), |
| 749 | EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), |
| 750 | EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), |
| 751 | EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), |
| 752 | EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), |
| 753 | }; |
| 754 | |
| 755 | /* pin banks of exynos4x12 pin-controller 2 */ |
| 756 | static struct samsung_pin_bank exynos4x12_pin_banks2[] = { |
| 757 | EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00), |
| 758 | }; |
| 759 | |
| 760 | /* pin banks of exynos4x12 pin-controller 3 */ |
| 761 | static struct samsung_pin_bank exynos4x12_pin_banks3[] = { |
| 762 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00), |
| 763 | EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04), |
| 764 | EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpv2", 0x08), |
| 765 | EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv3", 0x0c), |
| 766 | EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpv4", 0x10), |
| 767 | }; |
| 768 | |
| 769 | /* |
| 770 | * Samsung pinctrl driver data for Exynos4x12 SoC. Exynos4x12 SoC includes |
| 771 | * four gpio/pin-mux/pinconfig controllers. |
| 772 | */ |
| 773 | struct samsung_pin_ctrl exynos4x12_pin_ctrl[] = { |
| 774 | { |
| 775 | /* pin-controller instance 0 data */ |
| 776 | .pin_banks = exynos4x12_pin_banks0, |
| 777 | .nr_banks = ARRAY_SIZE(exynos4x12_pin_banks0), |
| 778 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 779 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 780 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 781 | .svc = EXYNOS_SVC_OFFSET, |
| 782 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 783 | .suspend = exynos_pinctrl_suspend, |
| 784 | .resume = exynos_pinctrl_resume, |
Tomasz Figa | 6edc794 | 2012-11-07 08:44:59 +0900 | [diff] [blame] | 785 | .label = "exynos4x12-gpio-ctrl0", |
| 786 | }, { |
| 787 | /* pin-controller instance 1 data */ |
| 788 | .pin_banks = exynos4x12_pin_banks1, |
| 789 | .nr_banks = ARRAY_SIZE(exynos4x12_pin_banks1), |
| 790 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 791 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 792 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 793 | .weint_con = EXYNOS_WKUP_ECON_OFFSET, |
| 794 | .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, |
| 795 | .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, |
| 796 | .svc = EXYNOS_SVC_OFFSET, |
| 797 | .eint_gpio_init = exynos_eint_gpio_init, |
| 798 | .eint_wkup_init = exynos_eint_wkup_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 799 | .suspend = exynos_pinctrl_suspend, |
| 800 | .resume = exynos_pinctrl_resume, |
Tomasz Figa | 6edc794 | 2012-11-07 08:44:59 +0900 | [diff] [blame] | 801 | .label = "exynos4x12-gpio-ctrl1", |
| 802 | }, { |
| 803 | /* pin-controller instance 2 data */ |
| 804 | .pin_banks = exynos4x12_pin_banks2, |
| 805 | .nr_banks = ARRAY_SIZE(exynos4x12_pin_banks2), |
| 806 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 807 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 808 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 809 | .svc = EXYNOS_SVC_OFFSET, |
| 810 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 811 | .suspend = exynos_pinctrl_suspend, |
| 812 | .resume = exynos_pinctrl_resume, |
Tomasz Figa | 6edc794 | 2012-11-07 08:44:59 +0900 | [diff] [blame] | 813 | .label = "exynos4x12-gpio-ctrl2", |
| 814 | }, { |
| 815 | /* pin-controller instance 3 data */ |
| 816 | .pin_banks = exynos4x12_pin_banks3, |
| 817 | .nr_banks = ARRAY_SIZE(exynos4x12_pin_banks3), |
| 818 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 819 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 820 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 821 | .svc = EXYNOS_SVC_OFFSET, |
| 822 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 823 | .suspend = exynos_pinctrl_suspend, |
| 824 | .resume = exynos_pinctrl_resume, |
Tomasz Figa | 6edc794 | 2012-11-07 08:44:59 +0900 | [diff] [blame] | 825 | .label = "exynos4x12-gpio-ctrl3", |
| 826 | }, |
| 827 | }; |
Thomas Abraham | f67faf4 | 2012-12-28 10:37:27 -0800 | [diff] [blame] | 828 | |
| 829 | /* pin banks of exynos5250 pin-controller 0 */ |
| 830 | static struct samsung_pin_bank exynos5250_pin_banks0[] = { |
| 831 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), |
| 832 | EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), |
| 833 | EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08), |
| 834 | EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c), |
| 835 | EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpb1", 0x10), |
| 836 | EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpb2", 0x14), |
| 837 | EXYNOS_PIN_BANK_EINTG(4, 0x0C0, "gpb3", 0x18), |
| 838 | EXYNOS_PIN_BANK_EINTG(7, 0x0E0, "gpc0", 0x1c), |
| 839 | EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc1", 0x20), |
| 840 | EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc2", 0x24), |
| 841 | EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc3", 0x28), |
| 842 | EXYNOS_PIN_BANK_EINTG(4, 0x160, "gpd0", 0x2c), |
| 843 | EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x30), |
| 844 | EXYNOS_PIN_BANK_EINTG(7, 0x2E0, "gpc4", 0x34), |
| 845 | EXYNOS_PIN_BANK_EINTN(6, 0x1A0, "gpy0"), |
| 846 | EXYNOS_PIN_BANK_EINTN(4, 0x1C0, "gpy1"), |
| 847 | EXYNOS_PIN_BANK_EINTN(6, 0x1E0, "gpy2"), |
| 848 | EXYNOS_PIN_BANK_EINTN(8, 0x200, "gpy3"), |
| 849 | EXYNOS_PIN_BANK_EINTN(8, 0x220, "gpy4"), |
| 850 | EXYNOS_PIN_BANK_EINTN(8, 0x240, "gpy5"), |
| 851 | EXYNOS_PIN_BANK_EINTN(8, 0x260, "gpy6"), |
| 852 | EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), |
| 853 | EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), |
| 854 | EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), |
| 855 | EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), |
| 856 | }; |
| 857 | |
| 858 | /* pin banks of exynos5250 pin-controller 1 */ |
| 859 | static struct samsung_pin_bank exynos5250_pin_banks1[] = { |
| 860 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00), |
| 861 | EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04), |
| 862 | EXYNOS_PIN_BANK_EINTG(4, 0x040, "gpf0", 0x08), |
| 863 | EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf1", 0x0c), |
| 864 | EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10), |
| 865 | EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14), |
| 866 | EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpg2", 0x18), |
| 867 | EXYNOS_PIN_BANK_EINTG(4, 0x0E0, "gph0", 0x1c), |
| 868 | EXYNOS_PIN_BANK_EINTG(8, 0x100, "gph1", 0x20), |
| 869 | }; |
| 870 | |
| 871 | /* pin banks of exynos5250 pin-controller 2 */ |
| 872 | static struct samsung_pin_bank exynos5250_pin_banks2[] = { |
| 873 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00), |
| 874 | EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04), |
| 875 | EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08), |
| 876 | EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpv3", 0x0c), |
| 877 | EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpv4", 0x10), |
| 878 | }; |
| 879 | |
| 880 | /* pin banks of exynos5250 pin-controller 3 */ |
| 881 | static struct samsung_pin_bank exynos5250_pin_banks3[] = { |
| 882 | EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00), |
| 883 | }; |
| 884 | |
| 885 | /* |
| 886 | * Samsung pinctrl driver data for Exynos5250 SoC. Exynos5250 SoC includes |
| 887 | * four gpio/pin-mux/pinconfig controllers. |
| 888 | */ |
| 889 | struct samsung_pin_ctrl exynos5250_pin_ctrl[] = { |
| 890 | { |
| 891 | /* pin-controller instance 0 data */ |
| 892 | .pin_banks = exynos5250_pin_banks0, |
| 893 | .nr_banks = ARRAY_SIZE(exynos5250_pin_banks0), |
| 894 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 895 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 896 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 897 | .weint_con = EXYNOS_WKUP_ECON_OFFSET, |
| 898 | .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, |
| 899 | .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, |
| 900 | .svc = EXYNOS_SVC_OFFSET, |
| 901 | .eint_gpio_init = exynos_eint_gpio_init, |
| 902 | .eint_wkup_init = exynos_eint_wkup_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 903 | .suspend = exynos_pinctrl_suspend, |
| 904 | .resume = exynos_pinctrl_resume, |
Thomas Abraham | f67faf4 | 2012-12-28 10:37:27 -0800 | [diff] [blame] | 905 | .label = "exynos5250-gpio-ctrl0", |
| 906 | }, { |
| 907 | /* pin-controller instance 1 data */ |
| 908 | .pin_banks = exynos5250_pin_banks1, |
| 909 | .nr_banks = ARRAY_SIZE(exynos5250_pin_banks1), |
| 910 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 911 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 912 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 913 | .svc = EXYNOS_SVC_OFFSET, |
| 914 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 915 | .suspend = exynos_pinctrl_suspend, |
| 916 | .resume = exynos_pinctrl_resume, |
Thomas Abraham | f67faf4 | 2012-12-28 10:37:27 -0800 | [diff] [blame] | 917 | .label = "exynos5250-gpio-ctrl1", |
| 918 | }, { |
| 919 | /* pin-controller instance 2 data */ |
| 920 | .pin_banks = exynos5250_pin_banks2, |
| 921 | .nr_banks = ARRAY_SIZE(exynos5250_pin_banks2), |
| 922 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 923 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 924 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 925 | .svc = EXYNOS_SVC_OFFSET, |
| 926 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 927 | .suspend = exynos_pinctrl_suspend, |
| 928 | .resume = exynos_pinctrl_resume, |
Thomas Abraham | f67faf4 | 2012-12-28 10:37:27 -0800 | [diff] [blame] | 929 | .label = "exynos5250-gpio-ctrl2", |
| 930 | }, { |
| 931 | /* pin-controller instance 3 data */ |
| 932 | .pin_banks = exynos5250_pin_banks3, |
| 933 | .nr_banks = ARRAY_SIZE(exynos5250_pin_banks3), |
| 934 | .geint_con = EXYNOS_GPIO_ECON_OFFSET, |
| 935 | .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, |
| 936 | .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, |
| 937 | .svc = EXYNOS_SVC_OFFSET, |
| 938 | .eint_gpio_init = exynos_eint_gpio_init, |
Tomasz Figa | 7ccbc60 | 2013-05-22 16:03:17 +0200 | [diff] [blame] | 939 | .suspend = exynos_pinctrl_suspend, |
| 940 | .resume = exynos_pinctrl_resume, |
Thomas Abraham | f67faf4 | 2012-12-28 10:37:27 -0800 | [diff] [blame] | 941 | .label = "exynos5250-gpio-ctrl3", |
| 942 | }, |
| 943 | }; |