Aneesh V | 7ec9445 | 2012-04-27 17:54:05 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Definitions for TI EMIF device platform data |
| 3 | * |
| 4 | * Copyright (C) 2012 Texas Instruments, Inc. |
| 5 | * |
| 6 | * Aneesh V <aneesh@ti.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | #ifndef __EMIF_PLAT_H |
| 13 | #define __EMIF_PLAT_H |
| 14 | |
| 15 | /* Low power modes - EMIF_PWR_MGMT_CTRL */ |
| 16 | #define EMIF_LP_MODE_DISABLE 0 |
| 17 | #define EMIF_LP_MODE_CLOCK_STOP 1 |
| 18 | #define EMIF_LP_MODE_SELF_REFRESH 2 |
| 19 | #define EMIF_LP_MODE_PWR_DN 4 |
| 20 | |
| 21 | /* Hardware capabilities */ |
| 22 | #define EMIF_HW_CAPS_LL_INTERFACE 0x00000001 |
| 23 | |
| 24 | /* |
| 25 | * EMIF IP Revisions |
| 26 | * EMIF4D - Used in OMAP4 |
| 27 | * EMIF4D5 - Used in OMAP5 |
| 28 | */ |
| 29 | #define EMIF_4D 1 |
| 30 | #define EMIF_4D5 2 |
| 31 | |
| 32 | /* |
| 33 | * PHY types |
| 34 | * ATTILAPHY - Used in OMAP4 |
| 35 | * INTELLIPHY - Used in OMAP5 |
| 36 | */ |
| 37 | #define EMIF_PHY_TYPE_ATTILAPHY 1 |
| 38 | #define EMIF_PHY_TYPE_INTELLIPHY 2 |
| 39 | |
| 40 | /* Custom config requests */ |
| 41 | #define EMIF_CUSTOM_CONFIG_LPMODE 0x00000001 |
| 42 | #define EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL 0x00000002 |
Nishanth Menon | f91a595 | 2013-03-16 11:46:44 +0530 | [diff] [blame] | 43 | #define EMIF_CUSTOM_CONFIG_EXTENDED_TEMP_PART 0x00000004 |
Aneesh V | 7ec9445 | 2012-04-27 17:54:05 +0530 | [diff] [blame] | 44 | |
| 45 | #ifndef __ASSEMBLY__ |
| 46 | /** |
| 47 | * struct ddr_device_info - All information about the DDR device except AC |
| 48 | * timing parameters |
| 49 | * @type: Device type (LPDDR2-S4, LPDDR2-S2 etc) |
| 50 | * @density: Device density |
| 51 | * @io_width: Bus width |
| 52 | * @cs1_used: Whether there is a DDR device attached to the second |
| 53 | * chip-select(CS1) of this EMIF instance |
| 54 | * @cal_resistors_per_cs: Whether there is one calibration resistor per |
| 55 | * chip-select or whether it's a single one for both |
| 56 | * @manufacturer: Manufacturer name string |
| 57 | */ |
| 58 | struct ddr_device_info { |
| 59 | u32 type; |
| 60 | u32 density; |
| 61 | u32 io_width; |
| 62 | u32 cs1_used; |
| 63 | u32 cal_resistors_per_cs; |
| 64 | char manufacturer[10]; |
| 65 | }; |
| 66 | |
| 67 | /** |
| 68 | * struct emif_custom_configs - Custom configuration parameters/policies |
| 69 | * passed from the platform layer |
| 70 | * @mask: Mask to indicate which configs are requested |
| 71 | * @lpmode: LPMODE to be used in PWR_MGMT_CTRL register |
| 72 | * @lpmode_timeout_performance: Timeout before LPMODE entry when higher |
| 73 | * performance is desired at the cost of power (typically |
| 74 | * at higher OPPs) |
| 75 | * @lpmode_timeout_power: Timeout before LPMODE entry when better power |
| 76 | * savings is desired and performance is not important |
| 77 | * (typically at lower loads indicated by lower OPPs) |
| 78 | * @lpmode_freq_threshold: The DDR frequency threshold to identify between |
| 79 | * the above two cases: |
| 80 | * timeout = (freq >= lpmode_freq_threshold) ? |
| 81 | * lpmode_timeout_performance : |
| 82 | * lpmode_timeout_power; |
| 83 | * @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal |
| 84 | * temperature(in milliseconds). When temperature is high |
| 85 | * polling is done 4 times as frequently. |
| 86 | */ |
| 87 | struct emif_custom_configs { |
| 88 | u32 mask; |
| 89 | u32 lpmode; |
| 90 | u32 lpmode_timeout_performance; |
| 91 | u32 lpmode_timeout_power; |
| 92 | u32 lpmode_freq_threshold; |
| 93 | u32 temp_alert_poll_interval_ms; |
| 94 | }; |
| 95 | |
| 96 | /** |
| 97 | * struct emif_platform_data - Platform data passed on EMIF platform |
| 98 | * device creation. Used by the driver. |
| 99 | * @hw_caps: Hw capabilities of the EMIF IP in the respective SoC |
| 100 | * @device_info: Device info structure containing information such |
| 101 | * as type, bus width, density etc |
| 102 | * @timings: Timings information from device datasheet passed |
| 103 | * as an array of 'struct lpddr2_timings'. Can be NULL |
| 104 | * if if default timings are ok |
| 105 | * @timings_arr_size: Size of the timings array. Depends on the number |
| 106 | * of different frequencies for which timings data |
| 107 | * is provided |
| 108 | * @min_tck: Minimum value of some timing parameters in terms |
| 109 | * of number of cycles. Can be NULL if default values |
| 110 | * are ok |
| 111 | * @custom_configs: Custom configurations requested by SoC or board |
| 112 | * code and the data for them. Can be NULL if default |
| 113 | * configurations done by the driver are ok. See |
| 114 | * documentation for 'struct emif_custom_configs' for |
| 115 | * more details |
| 116 | */ |
| 117 | struct emif_platform_data { |
| 118 | u32 hw_caps; |
| 119 | struct ddr_device_info *device_info; |
| 120 | const struct lpddr2_timings *timings; |
| 121 | u32 timings_arr_size; |
| 122 | const struct lpddr2_min_tck *min_tck; |
| 123 | struct emif_custom_configs *custom_configs; |
| 124 | u32 ip_rev; |
| 125 | u32 phy_type; |
| 126 | }; |
| 127 | #endif /* __ASSEMBLY__ */ |
| 128 | |
| 129 | #endif /* __LINUX_EMIF_H */ |