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Lorenzo Pieralisia0ae02402011-11-17 17:31:51 +00001* ARM CPUs binding description
2
3The device tree allows to describe the layout of CPUs in a system through
4the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
5defining properties for every cpu.
6
7Bindings for CPU nodes follow the ePAPR standard, available from:
8
9http://devicetree.org
10
11For the ARM architecture every CPU node must contain the following properties:
12
13- device_type: must be "cpu"
14- reg: property matching the CPU MPIDR[23:0] register bits
15 reg[31:24] bits must be set to 0
16- compatible: should be one of:
17 "arm,arm1020"
18 "arm,arm1020e"
19 "arm,arm1022"
20 "arm,arm1026"
21 "arm,arm720"
22 "arm,arm740"
23 "arm,arm7tdmi"
24 "arm,arm920"
25 "arm,arm922"
26 "arm,arm925"
27 "arm,arm926"
28 "arm,arm940"
29 "arm,arm946"
30 "arm,arm9tdmi"
31 "arm,cortex-a5"
32 "arm,cortex-a7"
33 "arm,cortex-a8"
34 "arm,cortex-a9"
35 "arm,cortex-a15"
36 "arm,arm1136"
37 "arm,arm1156"
38 "arm,arm1176"
39 "arm,arm11mpcore"
40 "faraday,fa526"
41 "intel,sa110"
42 "intel,sa1100"
43 "marvell,feroceon"
44 "marvell,mohawk"
45 "marvell,xsc3"
46 "marvell,xscale"
47
48Example:
49
50 cpus {
51 #size-cells = <0>;
52 #address-cells = <1>;
53
54 CPU0: cpu@0 {
55 device_type = "cpu";
56 compatible = "arm,cortex-a15";
57 reg = <0x0>;
58 };
59
60 CPU1: cpu@1 {
61 device_type = "cpu";
62 compatible = "arm,cortex-a15";
63 reg = <0x1>;
64 };
65
66 CPU2: cpu@100 {
67 device_type = "cpu";
68 compatible = "arm,cortex-a7";
69 reg = <0x100>;
70 };
71
72 CPU3: cpu@101 {
73 device_type = "cpu";
74 compatible = "arm,cortex-a7";
75 reg = <0x101>;
76 };
77 };