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gerrit-public.fairphone.software / kernel / msm-4.9 / 60d648877d1812fdc46b6b912f6e8e6bb9079c98 / . / arch / arm64 / boot / dts / qcom / sdm845-smp2p.dtsi
blob: 7b8b425c627fa49e332ada7ae261977dfd0de069 [file] [log] [blame]
Ghanim Fodi154110e2017-04-07 19:27:15 +0300[diff] [blame]1/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Karthikeyan Ramasubramanian2ebcc5b2016-09-19 15:39:51 -0600[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <dt-bindings/interrupt-controller/arm-gic.h>
14
15&soc {
16 qcom,smp2p-modem@1799000c {
17 compatible = "qcom,smp2p";
18 reg = <0x1799000c 0x4>;
19 qcom,remote-pid = <1>;
20 qcom,irq-bitmask = <0x4000>;
21 interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
22 };
23
24 qcom,smp2p-adsp@1799000c {
25 compatible = "qcom,smp2p";
26 reg = <0x1799000c 0x4>;
27 qcom,remote-pid = <2>;
28 qcom,irq-bitmask = <0x400>;
29 interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
30 };
31
32 qcom,smp2p-dsps@1799000c {
33 compatible = "qcom,smp2p";
34 reg = <0x1799000c 0x4>;
35 qcom,remote-pid = <3>;
36 qcom,irq-bitmask = <0x4000000>;
37 interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
38 };
39
40 qcom,smp2p-cdsp@1799000c {
41 compatible = "qcom,smp2p";
42 reg = <0x1799000c 0x4>;
43 qcom,remote-pid = <5>;
44 qcom,irq-bitmask = <0x40>;
45 interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
46 };
47
48
49 smp2pgpio_smp2p_15_in: qcom,smp2pgpio-smp2p-15-in {
50 compatible = "qcom,smp2pgpio";
51 qcom,entry-name = "smp2p";
52 qcom,remote-pid = <15>;
53 qcom,is-inbound;
54 gpio-controller;
55 #gpio-cells = <2>;
56 interrupt-controller;
57 #interrupt-cells = <2>;
58 };
59
60 qcom,smp2pgpio_test_smp2p_15_in {
61 compatible = "qcom,smp2pgpio_test_smp2p_15_in";
62 gpios = <&smp2pgpio_smp2p_15_in 0 0>;
63 };
64
65 smp2pgpio_smp2p_15_out: qcom,smp2pgpio-smp2p-15-out {
66 compatible = "qcom,smp2pgpio";
67 qcom,entry-name = "smp2p";
68 qcom,remote-pid = <15>;
69 gpio-controller;
70 #gpio-cells = <2>;
71 interrupt-controller;
72 #interrupt-cells = <2>;
73 };
74
75 qcom,smp2pgpio_test_smp2p_15_out {
76 compatible = "qcom,smp2pgpio_test_smp2p_15_out";
77 gpios = <&smp2pgpio_smp2p_15_out 0 0>;
78 };
79
80 smp2pgpio_smp2p_1_in: qcom,smp2pgpio-smp2p-1-in {
81 compatible = "qcom,smp2pgpio";
82 qcom,entry-name = "smp2p";
83 qcom,remote-pid = <1>;
84 qcom,is-inbound;
85 gpio-controller;
86 #gpio-cells = <2>;
87 interrupt-controller;
88 #interrupt-cells = <2>;
89 };
90
91 qcom,smp2pgpio_test_smp2p_1_in {
92 compatible = "qcom,smp2pgpio_test_smp2p_1_in";
93 gpios = <&smp2pgpio_smp2p_1_in 0 0>;
94 };
95
96 smp2pgpio_smp2p_1_out: qcom,smp2pgpio-smp2p-1-out {
97 compatible = "qcom,smp2pgpio";
98 qcom,entry-name = "smp2p";
99 qcom,remote-pid = <1>;
100 gpio-controller;
101 #gpio-cells = <2>;
102 interrupt-controller;
103 #interrupt-cells = <2>;
104 };
105
106 qcom,smp2pgpio_test_smp2p_1_out {
107 compatible = "qcom,smp2pgpio_test_smp2p_1_out";
108 gpios = <&smp2pgpio_smp2p_1_out 0 0>;
109 };
110
111 smp2pgpio_smp2p_2_in: qcom,smp2pgpio-smp2p-2-in {
112 compatible = "qcom,smp2pgpio";
113 qcom,entry-name = "smp2p";
114 qcom,remote-pid = <2>;
115 qcom,is-inbound;
116 gpio-controller;
117 #gpio-cells = <2>;
118 interrupt-controller;
119 #interrupt-cells = <2>;
120 };
121
122 qcom,smp2pgpio_test_smp2p_2_in {
123 compatible = "qcom,smp2pgpio_test_smp2p_2_in";
124 gpios = <&smp2pgpio_smp2p_2_in 0 0>;
125 };
126
127 smp2pgpio_smp2p_2_out: qcom,smp2pgpio-smp2p-2-out {
128 compatible = "qcom,smp2pgpio";
129 qcom,entry-name = "smp2p";
130 qcom,remote-pid = <2>;
131 gpio-controller;
132 #gpio-cells = <2>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
135 };
136
137 qcom,smp2pgpio_test_smp2p_2_out {
138 compatible = "qcom,smp2pgpio_test_smp2p_2_out";
139 gpios = <&smp2pgpio_smp2p_2_out 0 0>;
140 };
141
142 smp2pgpio_smp2p_3_in: qcom,smp2pgpio-smp2p-3-in {
143 compatible = "qcom,smp2pgpio";
144 qcom,entry-name = "smp2p";
145 qcom,remote-pid = <3>;
146 qcom,is-inbound;
147 gpio-controller;
148 #gpio-cells = <2>;
149 interrupt-controller;
150 #interrupt-cells = <2>;
151 };
152
153 qcom,smp2pgpio_test_smp2p_3_in {
154 compatible = "qcom,smp2pgpio_test_smp2p_3_in";
155 gpios = <&smp2pgpio_smp2p_3_in 0 0>;
156 };
157
158 smp2pgpio_smp2p_3_out: qcom,smp2pgpio-smp2p-3-out {
159 compatible = "qcom,smp2pgpio";
160 qcom,entry-name = "smp2p";
161 qcom,remote-pid = <3>;
162 gpio-controller;
163 #gpio-cells = <2>;
164 interrupt-controller;
165 #interrupt-cells = <2>;
166 };
167
168 qcom,smp2pgpio_test_smp2p_3_out {
169 compatible = "qcom,smp2pgpio_test_smp2p_3_out";
170 gpios = <&smp2pgpio_smp2p_3_out 0 0>;
171 };
172
173 smp2pgpio_smp2p_5_in: qcom,smp2pgpio-smp2p-5-in {
174 compatible = "qcom,smp2pgpio";
175 qcom,entry-name = "smp2p";
176 qcom,remote-pid = <5>;
177 qcom,is-inbound;
178 gpio-controller;
179 #gpio-cells = <2>;
180 interrupt-controller;
181 #interrupt-cells = <2>;
182 };
183
184 qcom,smp2pgpio_test_smp2p_5_in {
185 compatible = "qcom,smp2pgpio_test_smp2p_5_in";
186 gpios = <&smp2pgpio_smp2p_5_in 0 0>;
187 };
188
189 smp2pgpio_smp2p_5_out: qcom,smp2pgpio-smp2p-5-out {
190 compatible = "qcom,smp2pgpio";
191 qcom,entry-name = "smp2p";
192 qcom,remote-pid = <5>;
193 gpio-controller;
194 #gpio-cells = <2>;
195 interrupt-controller;
196 #interrupt-cells = <2>;
197 };
198
199 qcom,smp2pgpio_test_smp2p_5_out {
200 compatible = "qcom,smp2pgpio_test_smp2p_5_out";
201 gpios = <&smp2pgpio_smp2p_5_out 0 0>;
202 };
203
204 smp2pgpio_sleepstate_3_out: qcom,smp2pgpio-sleepstate-gpio-3-out {
205 compatible = "qcom,smp2pgpio";
206 qcom,entry-name = "sleepstate";
207 qcom,remote-pid = <3>;
208 gpio-controller;
209 #gpio-cells = <2>;
210 interrupt-controller;
211 #interrupt-cells = <2>;
212 };
213
214 qcom,smp2pgpio-sleepstate-3-out {
215 compatible = "qcom,smp2pgpio_sleepstate_3_out";
216 gpios = <&smp2pgpio_sleepstate_3_out 0 0>;
217 };
Kyle Yan384b13c2016-10-18 11:11:37 -0700[diff] [blame]218
219 /* ssr - inbound entry from mss */
220 smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in {
221 compatible = "qcom,smp2pgpio";
222 qcom,entry-name = "slave-kernel";
223 qcom,remote-pid = <1>;
224 qcom,is-inbound;
225 gpio-controller;
226 #gpio-cells = <2>;
227 interrupt-controller;
228 #interrupt-cells = <2>;
229 };
230
231 /* ssr - outbound entry to mss */
232 smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out {
233 compatible = "qcom,smp2pgpio";
234 qcom,entry-name = "master-kernel";
235 qcom,remote-pid = <1>;
236 gpio-controller;
237 #gpio-cells = <2>;
238 interrupt-controller;
239 #interrupt-cells = <2>;
240 };
Kyle Yan02e95f72016-10-18 14:38:41 -0700[diff] [blame]241
Kyle Yand119cf82016-10-19 14:49:04 -0700[diff] [blame]242 /* ssr - inbound entry from lpass */
243 smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in {
244 compatible = "qcom,smp2pgpio";
245 qcom,entry-name = "slave-kernel";
246 qcom,remote-pid = <2>;
247 qcom,is-inbound;
248 gpio-controller;
249 #gpio-cells = <2>;
250 interrupt-controller;
251 #interrupt-cells = <2>;
252 };
253
254 /* ssr - outbound entry to lpass */
255 smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out {
256 compatible = "qcom,smp2pgpio";
257 qcom,entry-name = "master-kernel";
258 qcom,remote-pid = <2>;
259 gpio-controller;
260 #gpio-cells = <2>;
261 interrupt-controller;
262 #interrupt-cells = <2>;
263 };
264
Kyle Yanb693da32016-10-20 14:01:09 -0700[diff] [blame]265 /* ssr - inbound entry from ssc */
266 smp2pgpio_ssr_smp2p_3_in: qcom,smp2pgpio-ssr-smp2p-3-in {
267 compatible = "qcom,smp2pgpio";
268 qcom,entry-name = "slave-kernel";
269 qcom,remote-pid = <3>;
270 qcom,is-inbound;
271 gpio-controller;
272 #gpio-cells = <2>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
275 };
276
277 /* ssr - outbound entry to ssc */
278 smp2pgpio_ssr_smp2p_3_out: qcom,smp2pgpio-ssr-smp2p-3-out {
279 compatible = "qcom,smp2pgpio";
280 qcom,entry-name = "master-kernel";
281 qcom,remote-pid = <3>;
282 gpio-controller;
283 #gpio-cells = <2>;
284 interrupt-controller;
285 #interrupt-cells = <2>;
286 };
287
Kyle Yan02e95f72016-10-18 14:38:41 -0700[diff] [blame]288 /* ssr - inbound entry from cdsp */
289 smp2pgpio_ssr_smp2p_5_in: qcom,smp2pgpio-ssr-smp2p-5-in {
290 compatible = "qcom,smp2pgpio";
291 qcom,entry-name = "slave-kernel";
292 qcom,remote-pid = <5>;
293 qcom,is-inbound;
294 gpio-controller;
295 #gpio-cells = <2>;
296 interrupt-controller;
297 #interrupt-cells = <2>;
298 };
299
300 /* ssr - outbound entry to cdsp */
301 smp2pgpio_ssr_smp2p_5_out: qcom,smp2pgpio-ssr-smp2p-5-out {
302 compatible = "qcom,smp2pgpio";
303 qcom,entry-name = "master-kernel";
304 qcom,remote-pid = <5>;
305 gpio-controller;
306 #gpio-cells = <2>;
307 interrupt-controller;
308 #interrupt-cells = <2>;
309 };
Ghanim Fodi154110e2017-04-07 19:27:15 +0300[diff] [blame]310
311 /* ipa - outbound entry to mss */
312 smp2pgpio_ipa_1_out: qcom,smp2pgpio-ipa-1-out {
313 compatible = "qcom,smp2pgpio";
314 qcom,entry-name = "ipa";
315 qcom,remote-pid = <1>;
316 gpio-controller;
317 #gpio-cells = <2>;
318 interrupt-controller;
319 #interrupt-cells = <2>;
320 };
321
322 /* ipa - inbound entry from mss */
323 smp2pgpio_ipa_1_in: qcom,smp2pgpio-ipa-1-in {
324 compatible = "qcom,smp2pgpio";
325 qcom,entry-name = "ipa";
326 qcom,remote-pid = <1>;
327 qcom,is-inbound;
328 gpio-controller;
329 #gpio-cells = <2>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
332 };
Karthikeyan Ramasubramanian2ebcc5b2016-09-19 15:39:51 -0600[diff] [blame]333};