blob: 99498a4b42161cadaffd530566f28674a16986bf [file] [log] [blame]
Ruud Derwig2924cd12014-12-03 15:52:41 +01001/*
2 * Support for peripherals on the AXS10x mainboard (VDK version)
3 *
4 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/ {
12 axs10x_mb_vdk {
13 compatible = "simple-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
16 ranges = <0x00000000 0xe0000000 0x10000000>;
17 interrupt-parent = <&mb_intc>;
18
19 clocks {
20 apbclk: apbclk {
21 compatible = "fixed-clock";
22 clock-frequency = <50000000>;
23 #clock-cells = <0>;
24 };
25
Alexey Brodkinc8f1daa2016-06-06 10:52:51 +030026 pguclk: pguclk {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <25175000>;
30 };
Ruud Derwig2924cd12014-12-03 15:52:41 +010031 };
32
33 ethernet@0x18000 {
34 #interrupt-cells = <1>;
35 compatible = "snps,dwmac";
36 reg = < 0x18000 0x2000 >;
37 interrupts = < 4 >;
38 interrupt-names = "macirq";
39 phy-mode = "rgmii";
40 snps,phy-addr = < 0 >; // VDK model phy address is 0
41 snps,pbl = < 32 >;
42 clocks = <&apbclk>;
43 clock-names = "stmmaceth";
44 };
45
46 ehci@0x40000 {
47 compatible = "generic-ehci";
48 reg = < 0x40000 0x100 >;
49 interrupts = < 8 >;
50 };
51
52 uart@0x20000 {
53 compatible = "snps,dw-apb-uart";
54 reg = <0x20000 0x100>;
55 clock-frequency = <2403200>;
56 interrupts = <17>;
57 baud = <115200>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 };
61
62 uart@0x21000 {
63 compatible = "snps,dw-apb-uart";
64 reg = <0x21000 0x100>;
65 clock-frequency = <2403200>;
66 interrupts = <18>;
67 baud = <115200>;
68 reg-shift = <2>;
69 reg-io-width = <4>;
70 };
71
72 uart@0x22000 {
73 compatible = "snps,dw-apb-uart";
74 reg = <0x22000 0x100>;
75 clock-frequency = <2403200>;
76 interrupts = <19>;
77 baud = <115200>;
78 reg-shift = <2>;
79 reg-io-width = <4>;
80 };
81
82/* PGU output directly sent to virtual LCD screen; hdmi controller not modelled */
Alexey Brodkinc8f1daa2016-06-06 10:52:51 +030083 pgu@17000 {
84 compatible = "snps,arcpgu";
Ruud Derwig2924cd12014-12-03 15:52:41 +010085 reg = <0x17000 0x400>;
Alexey Brodkinc8f1daa2016-06-06 10:52:51 +030086 clocks = <&pguclk>;
87 clock-names = "pxlclk";
Ruud Derwig2924cd12014-12-03 15:52:41 +010088 };
89
90/* VDK has additional ps2 keyboard/mouse interface integrated in LCD screen model */
91 ps2: ps2@e0017400 {
92 compatible = "snps,arc_ps2";
93 reg = <0x17400 0x14>;
94 interrupts = <5>;
95 interrupt-names = "arc_ps2_irq";
96 };
97 };
98};