Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 13 | #include <dt-bindings/soc/qcom,tcs-mbox.h> |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 14 | #include "skeleton.dtsi" |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 15 | #include <dt-bindings/clock/qcom,rpmh.h> |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 16 | #include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h> |
Tirupathi Reddy | 242c131 | 2017-08-17 11:01:16 +0530 | [diff] [blame] | 17 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Amit Nischal | 226ef5b | 2017-09-07 12:56:07 +0530 | [diff] [blame] | 18 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 19 | |
| 20 | / { |
| 21 | model = "Qualcomm Technologies, Inc. SDX POORWILLS"; |
| 22 | compatible = "qcom,sdxpoorwills"; |
Jeevan Shriram | 71f2f49 | 2017-11-21 13:13:00 -0800 | [diff] [blame] | 23 | qcom,msm-id = <334 0x0>, <335 0x0>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 24 | interrupt-parent = <&intc>; |
| 25 | |
| 26 | reserved-memory { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <1>; |
| 29 | ranges; |
| 30 | |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 31 | peripheral2_mem: peripheral2_region@8fe00000 { |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 32 | compatible = "removed-dma-pool"; |
| 33 | no-map; |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 34 | reg = <0x8fe00000 0x200000>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 35 | label = "peripheral2_mem"; |
| 36 | }; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 37 | |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 38 | sbl_region: sbl_region@8fd00000 { |
| 39 | no-map; |
| 40 | reg = <0x8fd00000 0x100000>; |
| 41 | label = "sbl_mem"; |
| 42 | }; |
| 43 | |
| 44 | hyp_region: hyp_region@8fc00000 { |
| 45 | no-map; |
| 46 | reg = <0x8fc00000 0x80000>; |
| 47 | label = "hyp_mem"; |
| 48 | }; |
| 49 | |
| 50 | mss_mem: mss_region@87400000 { |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 51 | compatible = "removed-dma-pool"; |
| 52 | no-map; |
Raghavendra Rao Ananta | 3314e0f | 2017-12-01 14:08:51 -0800 | [diff] [blame] | 53 | reg = <0x87400000 0x8300000>; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 54 | label = "mss_mem"; |
| 55 | }; |
Xiaoyu Ye | 84364ce | 2017-10-20 16:02:43 -0700 | [diff] [blame] | 56 | |
| 57 | audio_mem: audio_region@0 { |
| 58 | compatible = "shared-dma-pool"; |
| 59 | reusable; |
| 60 | size = <0x400000>; |
| 61 | }; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 62 | }; |
| 63 | |
| 64 | cpus { |
| 65 | #size-cells = <0>; |
| 66 | #address-cells = <1>; |
| 67 | |
| 68 | CPU0: cpu@0 { |
| 69 | device-type = "cpu"; |
| 70 | compatible = "arm,cortex-a7"; |
| 71 | reg = <0x0>; |
Ram Chandrasekar | c6b9e8c | 2017-10-11 15:52:31 -0600 | [diff] [blame] | 72 | #cooling-cells = <2>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 73 | }; |
| 74 | }; |
| 75 | |
Sahitya Tummala | 61f1d32 | 2017-06-06 13:49:19 +0530 | [diff] [blame] | 76 | aliases { |
| 77 | qpic_nand1 = &qnand_1; |
| 78 | }; |
| 79 | |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 80 | soc: soc { }; |
| 81 | }; |
| 82 | |
| 83 | |
| 84 | &soc { |
| 85 | #address-cells = <1>; |
| 86 | #size-cells = <1>; |
| 87 | ranges; |
| 88 | |
| 89 | intc: interrupt-controller@17800000 { |
| 90 | compatible = "qcom,msm-qgic2"; |
| 91 | interrupt-controller; |
| 92 | #interrupt-cells = <3>; |
| 93 | reg = <0x17800000 0x1000>, |
| 94 | <0x17802000 0x1000>; |
| 95 | }; |
| 96 | |
| 97 | timer { |
| 98 | compatible = "arm,armv7-timer"; |
| 99 | interrupts = <1 13 0xf08>, |
| 100 | <1 12 0xf08>, |
| 101 | <1 10 0xf08>, |
| 102 | <1 11 0xf08>; |
| 103 | clock-frequency = <19200000>; |
| 104 | }; |
| 105 | |
| 106 | timer@17820000 { |
| 107 | #address-cells = <1>; |
| 108 | #size-cells = <1>; |
| 109 | ranges; |
| 110 | compatible = "arm,armv7-timer-mem"; |
| 111 | reg = <0x17820000 0x1000>; |
| 112 | clock-frequency = <19200000>; |
| 113 | |
| 114 | frame@17821000 { |
| 115 | frame-number = <0>; |
| 116 | interrupts = <0 7 0x4>, |
| 117 | <0 6 0x4>; |
| 118 | reg = <0x17821000 0x1000>, |
| 119 | <0x17822000 0x1000>; |
| 120 | }; |
| 121 | |
| 122 | frame@17823000 { |
| 123 | frame-number = <1>; |
| 124 | interrupts = <0 8 0x4>; |
| 125 | reg = <0x17823000 0x1000>; |
| 126 | status = "disabled"; |
| 127 | }; |
| 128 | |
| 129 | frame@17824000 { |
| 130 | frame-number = <2>; |
| 131 | interrupts = <0 9 0x4>; |
| 132 | reg = <0x17824000 0x1000>; |
| 133 | status = "disabled"; |
| 134 | }; |
| 135 | |
| 136 | frame@17825000 { |
| 137 | frame-number = <3>; |
| 138 | interrupts = <0 10 0x4>; |
| 139 | reg = <0x17825000 0x1000>; |
| 140 | status = "disabled"; |
| 141 | }; |
| 142 | |
| 143 | frame@17826000 { |
| 144 | frame-number = <4>; |
| 145 | interrupts = <0 11 0x4>; |
| 146 | reg = <0x17826000 0x1000>; |
| 147 | status = "disabled"; |
| 148 | }; |
| 149 | |
| 150 | frame@17827000 { |
| 151 | frame-number = <5>; |
| 152 | interrupts = <0 12 0x4>; |
| 153 | reg = <0x17827000 0x1000>; |
| 154 | status = "disabled"; |
| 155 | }; |
| 156 | |
| 157 | frame@17828000 { |
| 158 | frame-number = <6>; |
| 159 | interrupts = <0 13 0x4>; |
| 160 | reg = <0x17828000 0x1000>; |
| 161 | status = "disabled"; |
| 162 | }; |
| 163 | |
| 164 | frame@17829000 { |
| 165 | frame-number = <7>; |
| 166 | interrupts = <0 14 0x4>; |
| 167 | reg = <0x17829000 0x1000>; |
| 168 | status = "disabled"; |
| 169 | }; |
| 170 | }; |
| 171 | |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 172 | clock_gcc: qcom,gcc@100000 { |
Vicky Wallace | 8ca25b9 | 2017-09-20 18:21:59 -0700 | [diff] [blame] | 173 | compatible = "qcom,gcc-sdxpoorwills"; |
| 174 | reg = <0x100000 0x1f0000>; |
| 175 | reg-names = "cc_base"; |
| 176 | vdd_cx-supply = <&pmxpoorwills_s5_level>; |
| 177 | vdd_cx_ao-supply = <&pmxpoorwills_s5_level_ao>; |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 178 | #clock-cells = <1>; |
Deepak Katragadda | ef38d7b | 2017-05-30 15:29:19 -0700 | [diff] [blame] | 179 | #reset-cells = <1>; |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 180 | }; |
| 181 | |
Amit Nischal | 226ef5b | 2017-09-07 12:56:07 +0530 | [diff] [blame] | 182 | clock_cpu: qcom,clock-a7@17808100 { |
| 183 | compatible = "qcom,cpu-sdxpoorwills"; |
| 184 | clocks = <&clock_rpmh RPMH_CXO_CLK_A>; |
| 185 | clock-names = "xo_ao"; |
| 186 | qcom,a7cc-init-rate = <1497600000>; |
| 187 | reg = <0x17808100 0x7F10>; |
| 188 | reg-names = "apcs_pll"; |
| 189 | qcom,rcg-reg-offset = <0x7F08>; |
| 190 | |
| 191 | vdd_dig_ao-supply = <&pmxpoorwills_s5_level_ao>; |
| 192 | cpu-vdd-supply = <&pmxpoorwills_s5_level_ao>; |
| 193 | qcom,speed0-bin-v0 = |
| 194 | < 0 RPMH_REGULATOR_LEVEL_OFF>, |
| 195 | < 345600000 RPMH_REGULATOR_LEVEL_LOW_SVS>, |
| 196 | < 576000000 RPMH_REGULATOR_LEVEL_SVS>, |
| 197 | < 1094400000 RPMH_REGULATOR_LEVEL_NOM>, |
| 198 | < 1497600000 RPMH_REGULATOR_LEVEL_TURBO>; |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 199 | #clock-cells = <1>; |
| 200 | }; |
| 201 | |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 202 | clock_rpmh: qcom,rpmhclk { |
Tirupathi Reddy | eaf28a2 | 2017-10-31 09:32:02 +0530 | [diff] [blame] | 203 | compatible = "qcom,rpmh-clk-sdxpoorwills"; |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 204 | #clock-cells = <1>; |
Tirupathi Reddy | eaf28a2 | 2017-10-31 09:32:02 +0530 | [diff] [blame] | 205 | mboxes = <&apps_rsc 0>; |
| 206 | mbox-names = "apps"; |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 207 | }; |
| 208 | |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 209 | blsp1_uart2: serial@831000 { |
| 210 | compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; |
| 211 | reg = <0x831000 0x200>; |
| 212 | interrupts = <0 26 0>; |
| 213 | status = "disabled"; |
Vicky Wallace | df79778 | 2017-10-27 17:35:34 -0700 | [diff] [blame] | 214 | clocks = <&clock_gcc GCC_BLSP1_UART3_APPS_CLK>, |
Runmin Wang | 8dce5869 | 2017-05-01 15:19:18 -0700 | [diff] [blame] | 215 | <&clock_gcc GCC_BLSP1_AHB_CLK>; |
| 216 | clock-names = "core", "iface"; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 217 | }; |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 218 | |
| 219 | gdsc_usb30: qcom,gdsc@10b004 { |
| 220 | compatible = "qcom,gdsc"; |
| 221 | regulator-name = "gdsc_usb30"; |
| 222 | reg = <0x0010b004 0x4>; |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 223 | }; |
| 224 | |
Yan He | bd0e961 | 2017-07-06 16:21:41 -0700 | [diff] [blame] | 225 | qcom,sps { |
| 226 | compatible = "qcom,msm_sps_4k"; |
| 227 | qcom,pipe-attr-ee; |
| 228 | }; |
| 229 | |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 230 | gdsc_pcie: qcom,gdsc@137004 { |
| 231 | compatible = "qcom,gdsc"; |
| 232 | regulator-name = "gdsc_pcie"; |
| 233 | reg = <0x00137004 0x4>; |
Vicky Wallace | 8ca25b9 | 2017-09-20 18:21:59 -0700 | [diff] [blame] | 234 | }; |
| 235 | |
| 236 | gdsc_emac: qcom,gdsc@147004 { |
| 237 | compatible = "qcom,gdsc"; |
| 238 | regulator-name = "gdsc_emac"; |
| 239 | reg = <0x00147004 0x4>; |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 240 | }; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 241 | |
Sahitya Tummala | 61f1d32 | 2017-06-06 13:49:19 +0530 | [diff] [blame] | 242 | qnand_1: nand@1b00000 { |
| 243 | compatible = "qcom,msm-nand"; |
| 244 | reg = < 0x01b00000 0x10000>, |
| 245 | <0x01b04000 0x1a000>; |
| 246 | reg-names = "nand_phys", |
| 247 | "bam_phys"; |
| 248 | qcom,reg-adjustment-offset = <0x4000>; |
| 249 | qcom,qpic-clk-rpmh; |
| 250 | |
| 251 | interrupts = <0 135 0>; |
| 252 | interrupt-names = "bam_irq"; |
| 253 | |
| 254 | qcom,msm-bus,name = "qpic_nand"; |
| 255 | qcom,msm-bus,num-cases = <2>; |
| 256 | qcom,msm-bus,num-paths = <1>; |
| 257 | |
| 258 | qcom,msm-bus,vectors-KBps = |
| 259 | <91 512 0 0>, |
| 260 | /* Voting for max b/w on PNOC bus for now */ |
| 261 | <91 512 400000 400000>; |
| 262 | |
| 263 | status = "disabled"; |
| 264 | }; |
| 265 | |
Raghavendra Rao Ananta | 2f2615d | 2017-10-26 10:51:32 -0700 | [diff] [blame] | 266 | qcom,msm-imem@1468B000 { |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 267 | compatible = "qcom,msm-imem"; |
Raghavendra Rao Ananta | 2f2615d | 2017-10-26 10:51:32 -0700 | [diff] [blame] | 268 | reg = <0x1468B000 0x1000>; /* Address and size of IMEM */ |
| 269 | ranges = <0x0 0x1468B000 0x1000>; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 270 | #address-cells = <1>; |
| 271 | #size-cells = <1>; |
| 272 | |
| 273 | mem_dump_table@10 { |
| 274 | compatible = "qcom,msm-imem-mem_dump_table"; |
| 275 | reg = <0x10 8>; |
| 276 | }; |
| 277 | |
| 278 | restart_reason@65c { |
| 279 | compatible = "qcom,msm-imem-restart_reason"; |
| 280 | reg = <0x65c 4>; |
| 281 | }; |
| 282 | |
| 283 | boot_stats@6b0 { |
| 284 | compatible = "qcom,msm-imem-boot_stats"; |
| 285 | reg = <0x6b0 32>; |
| 286 | }; |
Raghavendra Rao Ananta | 2f2615d | 2017-10-26 10:51:32 -0700 | [diff] [blame] | 287 | |
| 288 | pil@94c { |
| 289 | compatible = "qcom,msm-imem-pil"; |
| 290 | reg = <0x94c 200>; |
| 291 | }; |
| 292 | |
| 293 | diag_dload@c8 { |
| 294 | compatible = "qcom,msm-imem-diag-dload"; |
| 295 | reg = <0xc8 200>; |
| 296 | }; |
| 297 | }; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 298 | |
| 299 | restart@4ab000 { |
| 300 | compatible = "qcom,pshold"; |
| 301 | reg = <0x4ab000 0x4>, |
| 302 | <0x193d100 0x4>; |
| 303 | reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| 304 | }; |
| 305 | |
Siddartha Mohanadoss | 6bbf859 | 2017-07-13 14:15:41 -0700 | [diff] [blame] | 306 | tsens0: tsens@c222000 { |
| 307 | compatible = "qcom,tsens24xx"; |
| 308 | reg = <0xc222000 0x4>, |
| 309 | <0xc263000 0x1ff>; |
| 310 | reg-names = "tsens_srot_physical", |
| 311 | "tsens_tm_physical"; |
| 312 | interrupts = <0 163 0>, <0 165 0>; |
| 313 | interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| 314 | #thermal-sensor-cells = <1>; |
| 315 | }; |
| 316 | |
Ram Chandrasekar | c6b9e8c | 2017-10-11 15:52:31 -0600 | [diff] [blame] | 317 | thermal_zones: thermal-zones { }; |
Siddartha Mohanadoss | 6bbf859 | 2017-07-13 14:15:41 -0700 | [diff] [blame] | 318 | |
Ghanim Fodi | c389d57 | 2017-08-03 17:56:27 +0300 | [diff] [blame] | 319 | qcom,ipa_fws { |
| 320 | compatible = "qcom,pil-tz-generic"; |
| 321 | qcom,pas-id = <0xf>; |
| 322 | qcom,firmware-name = "ipa_fws"; |
| 323 | }; |
Tirupathi Reddy | 242c131 | 2017-08-17 11:01:16 +0530 | [diff] [blame] | 324 | |
| 325 | spmi_bus: qcom,spmi@c440000 { |
| 326 | compatible = "qcom,spmi-pmic-arb"; |
| 327 | reg = <0xc440000 0x1100>, |
| 328 | <0xc600000 0x2000000>, |
| 329 | <0xe600000 0x100000>, |
| 330 | <0xe700000 0xa0000>, |
| 331 | <0xc40a000 0x26000>; |
| 332 | reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| 333 | interrupt-names = "periph_irq"; |
| 334 | interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>; |
| 335 | qcom,ee = <0>; |
| 336 | qcom,channel = <0>; |
| 337 | #address-cells = <2>; |
| 338 | #size-cells = <0>; |
| 339 | interrupt-controller; |
| 340 | #interrupt-cells = <4>; |
| 341 | cell-index = <0>; |
| 342 | }; |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 343 | |
| 344 | qcom,ipc-spinlock@1f40000 { |
| 345 | compatible = "qcom,ipc-spinlock-sfpb"; |
| 346 | reg = <0x1f40000 0x8000>; |
| 347 | qcom,num-locks = <8>; |
| 348 | }; |
| 349 | |
| 350 | qcom,smem@8fe40000 { |
| 351 | compatible = "qcom,smem"; |
| 352 | reg = <0x8fe40000 0xc0000>, |
| 353 | <0x17811008 0x4>, |
| 354 | <0x1fd4000 0x8>; |
| 355 | reg-names = "smem", "irq-reg-base", |
| 356 | "smem_targ_info_reg"; |
| 357 | qcom,mpu-enabled; |
| 358 | }; |
| 359 | |
| 360 | qcom,glink-smem-native-xprt-modem@8fe40000 { |
| 361 | compatible = "qcom,glink-smem-native-xprt"; |
| 362 | reg = <0x8fe40000 0xc0000>, |
| 363 | <0x17811008 0x4>; |
| 364 | reg-names = "smem", "irq-reg-base"; |
Chris Lew | b9a1e96 | 2017-10-20 10:31:55 -0700 | [diff] [blame] | 365 | qcom,irq-mask = <0x8000>; |
| 366 | interrupts = <GIC_SPI 114 IRQ_TYPE_EDGE_RISING>; |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 367 | label = "mpss"; |
| 368 | }; |
| 369 | |
| 370 | qcom,ipc_router { |
| 371 | compatible = "qcom,ipc_router"; |
| 372 | qcom,node-id = <1>; |
| 373 | }; |
| 374 | |
| 375 | qcom,ipc_router_modem_xprt { |
| 376 | compatible = "qcom,ipc_router_glink_xprt"; |
| 377 | qcom,ch-name = "IPCRTR"; |
| 378 | qcom,xprt-remote = "mpss"; |
| 379 | qcom,glink-xprt = "smem"; |
| 380 | qcom,xprt-linkid = <1>; |
| 381 | qcom,xprt-version = <1>; |
| 382 | qcom,fragmented-data; |
| 383 | }; |
| 384 | |
| 385 | qcom,glink_pkt { |
| 386 | compatible = "qcom,glinkpkt"; |
| 387 | |
| 388 | qcom,glinkpkt-at-mdm0 { |
| 389 | qcom,glinkpkt-transport = "smem"; |
| 390 | qcom,glinkpkt-edge = "mpss"; |
| 391 | qcom,glinkpkt-ch-name = "DS"; |
| 392 | qcom,glinkpkt-dev-name = "at_mdm0"; |
| 393 | }; |
| 394 | |
| 395 | qcom,glinkpkt-loopback_cntl { |
| 396 | qcom,glinkpkt-transport = "lloop"; |
| 397 | qcom,glinkpkt-edge = "local"; |
| 398 | qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| 399 | qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| 400 | }; |
| 401 | |
| 402 | qcom,glinkpkt-loopback_data { |
| 403 | qcom,glinkpkt-transport = "lloop"; |
| 404 | qcom,glinkpkt-edge = "local"; |
| 405 | qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| 406 | qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| 407 | }; |
| 408 | |
| 409 | qcom,glinkpkt-data40-cntl { |
| 410 | qcom,glinkpkt-transport = "smem"; |
| 411 | qcom,glinkpkt-edge = "mpss"; |
| 412 | qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| 413 | qcom,glinkpkt-dev-name = "smdcntl8"; |
| 414 | }; |
| 415 | |
| 416 | qcom,glinkpkt-data1 { |
| 417 | qcom,glinkpkt-transport = "smem"; |
| 418 | qcom,glinkpkt-edge = "mpss"; |
| 419 | qcom,glinkpkt-ch-name = "DATA1"; |
| 420 | qcom,glinkpkt-dev-name = "smd7"; |
| 421 | }; |
| 422 | |
| 423 | qcom,glinkpkt-data4 { |
| 424 | qcom,glinkpkt-transport = "smem"; |
| 425 | qcom,glinkpkt-edge = "mpss"; |
| 426 | qcom,glinkpkt-ch-name = "DATA4"; |
| 427 | qcom,glinkpkt-dev-name = "smd8"; |
| 428 | }; |
| 429 | |
| 430 | qcom,glinkpkt-data11 { |
| 431 | qcom,glinkpkt-transport = "smem"; |
| 432 | qcom,glinkpkt-edge = "mpss"; |
| 433 | qcom,glinkpkt-ch-name = "DATA11"; |
| 434 | qcom,glinkpkt-dev-name = "smd11"; |
| 435 | }; |
| 436 | }; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 437 | |
| 438 | pil_modem: qcom,mss@4080000 { |
| 439 | compatible = "qcom,pil-tz-generic"; |
| 440 | reg = <0x4080000 0x100>; |
| 441 | interrupts = <0 250 1>; |
| 442 | |
| 443 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 444 | clock-names = "xo"; |
| 445 | qcom,proxy-clock-names = "xo"; |
| 446 | |
| 447 | vdd_cx-supply = <&pmxpoorwills_s5_level>; |
| 448 | qcom,proxy-reg-names = "vdd_cx"; |
| 449 | |
| 450 | qcom,pas-id = <0>; |
| 451 | qcom,smem-id = <421>; |
| 452 | qcom,proxy-timeout-ms = <10000>; |
| 453 | qcom,sysmon-id = <0>; |
| 454 | qcom,ssctl-instance-id = <0x12>; |
| 455 | qcom,firmware-name = "modem"; |
| 456 | memory-region = <&mss_mem>; |
| 457 | status = "ok"; |
| 458 | |
| 459 | /* GPIO inputs from mss */ |
| 460 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| 461 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| 462 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| 463 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; |
| 464 | |
| 465 | /* GPIO output to mss */ |
| 466 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
| 467 | }; |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 468 | |
| 469 | apps_rsc: mailbox@17840000 { |
| 470 | compatible = "qcom,tcs-drv"; |
| 471 | label = "apps_rsc"; |
| 472 | reg = <0x17840000 0x100>, <0x17840d00 0x3000>; |
| 473 | interrupts = <0 17 0>; |
| 474 | #mbox-cells = <1>; |
| 475 | qcom,drv-id = <1>; |
| 476 | qcom,tcs-config = <ACTIVE_TCS 2>, |
| 477 | <SLEEP_TCS 2>, |
| 478 | <WAKE_TCS 2>, |
| 479 | <CONTROL_TCS 1>; |
| 480 | }; |
| 481 | |
Mahesh Sivasubramanian | d306a2c | 2017-11-09 10:09:26 -0700 | [diff] [blame] | 482 | cmd_db: qcom,cmd-db@c37000c { |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 483 | compatible = "qcom,cmd-db"; |
Mahesh Sivasubramanian | d306a2c | 2017-11-09 10:09:26 -0700 | [diff] [blame] | 484 | reg = <0xc37000c 8>; |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 485 | }; |
| 486 | |
| 487 | system_pm { |
| 488 | compatible = "qcom,system-pm"; |
| 489 | mboxes = <&apps_rsc 0>; |
| 490 | }; |
Sunil Paidimarri | 6c422bc | 2017-10-05 12:41:32 -0700 | [diff] [blame] | 491 | |
| 492 | emac_hw: qcom,emac@00020000 { |
| 493 | compatible = "qcom,emac-dwc-eqos"; |
| 494 | reg = <0x20000 0x10000>, |
| 495 | <0x36000 0x100>; |
| 496 | reg-names = "emac-base", "rgmii-base"; |
| 497 | interrupts = <0 62 4>, <0 60 4>, |
| 498 | <0 45 4>, <0 49 4>, |
| 499 | <0 50 4>, <0 51 4>, |
| 500 | <0 52 4>, <0 53 4>, |
| 501 | <0 54 4>, <0 55 4>, |
| 502 | <0 56 4>, <0 57 4>; |
| 503 | interrupt-names = "sbd-intr", "lpi-intr", |
| 504 | "wol-intr", "tx-ch0-intr", |
| 505 | "tx-ch1-intr", "tx-ch2-intr", |
| 506 | "tx-ch3-intr", "tx-ch4-intr", |
| 507 | "rx-ch0-intr", "rx-ch1-intr", |
| 508 | "rx-ch2-intr", "rx-ch3-intr"; |
| 509 | io-macro-info { |
| 510 | io-macro-bypass-mode = <0>; |
| 511 | io-interface = "rgmii"; |
| 512 | }; |
| 513 | }; |
Chris Lew | a4245c9 | 2017-10-11 16:34:51 -0700 | [diff] [blame] | 514 | |
| 515 | qmp_aop: qcom,qmp-aop@c300000 { |
| 516 | compatible = "qcom,qmp-mbox"; |
| 517 | label = "aop"; |
| 518 | reg = <0xc300000 0x400>, |
| 519 | <0x17811008 0x4>; |
| 520 | reg-names = "msgram", "irq-reg-base"; |
| 521 | qcom,irq-mask = <0x1>; |
| 522 | interrupts = <GIC_SPI 221 IRQ_TYPE_EDGE_RISING>; |
| 523 | priority = <0>; |
| 524 | mbox-desc-offset = <0x0>; |
| 525 | #mbox-cells = <1>; |
| 526 | }; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 527 | }; |
Anirudh Ghayal | 1a97b5c | 2017-05-03 16:16:26 +0530 | [diff] [blame] | 528 | |
Tirupathi Reddy | 8cbe498 | 2017-08-17 12:01:11 +0530 | [diff] [blame] | 529 | #include "pmxpoorwills.dtsi" |
Shrey Vijay | a139af9 | 2017-08-10 12:00:44 +0530 | [diff] [blame] | 530 | #include "sdxpoorwills-blsp.dtsi" |
Anirudh Ghayal | 1a97b5c | 2017-05-03 16:16:26 +0530 | [diff] [blame] | 531 | #include "sdxpoorwills-regulator.dtsi" |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 532 | #include "sdxpoorwills-smp2p.dtsi" |
Devdutt Patnaik | 4ff5bcd6 | 2017-05-05 19:45:01 -0700 | [diff] [blame] | 533 | #include "sdxpoorwills-usb.dtsi" |
David Dai | 8e41b1f | 2017-06-19 16:01:01 -0700 | [diff] [blame] | 534 | #include "sdxpoorwills-bus.dtsi" |
Ram Chandrasekar | c6b9e8c | 2017-10-11 15:52:31 -0600 | [diff] [blame] | 535 | #include "sdxpoorwills-thermal.dtsi" |
Xiaoyu Ye | 84364ce | 2017-10-20 16:02:43 -0700 | [diff] [blame] | 536 | #include "sdxpoorwills-audio.dtsi" |