Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | &soc { |
| 13 | |
| 14 | replicator_qdss: replicator@6046000 { |
| 15 | compatible = "arm,primecell"; |
| 16 | arm,primecell-periphid = <0x0003b909>; |
| 17 | |
| 18 | reg = <0x6046000 0x1000>; |
| 19 | reg-names = "replicator-base"; |
| 20 | |
| 21 | coresight-name = "coresight-replicator"; |
| 22 | |
| 23 | clocks = <&clock_aop QDSS_CLK>; |
| 24 | clock-names = "apb_pclk"; |
| 25 | |
| 26 | ports { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <0>; |
| 29 | |
| 30 | port@0 { |
| 31 | reg = <0>; |
| 32 | replicator_out_tmc_etr: endpoint { |
| 33 | remote-endpoint = |
| 34 | <&tmc_etr_in_replicator>; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | port@1 { |
| 39 | reg = <0>; |
| 40 | replicator_in_tmc_etf: endpoint { |
| 41 | slave-mode; |
| 42 | remote-endpoint = |
| 43 | <&tmc_etf_out_replicator>; |
| 44 | }; |
| 45 | }; |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | tmc_etr: tmc@6048000 { |
| 50 | compatible = "arm,primecell"; |
| 51 | arm,primecell-periphid = <0x0003b961>; |
| 52 | |
| 53 | reg = <0x6048000 0x1000>, |
| 54 | <0x6064000 0x15000>; |
| 55 | reg-names = "tmc-base", "bam-base"; |
| 56 | |
| 57 | arm,buffer-size = <0x400000>; |
| 58 | arm,sg-enable; |
| 59 | |
| 60 | coresight-name = "coresight-tmc-etr"; |
| 61 | coresight-ctis = <&cti0 &cti8>; |
| 62 | |
| 63 | clocks = <&clock_aop QDSS_CLK>; |
| 64 | clock-names = "apb_pclk"; |
| 65 | |
| 66 | port { |
| 67 | tmc_etr_in_replicator: endpoint { |
| 68 | slave-mode; |
| 69 | remote-endpoint = <&replicator_out_tmc_etr>; |
| 70 | }; |
| 71 | }; |
| 72 | }; |
| 73 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 74 | replicator_swao: replicator@6b0a000 { |
| 75 | compatible = "arm,primecell"; |
| 76 | arm,primecell-periphid = <0x0003b909>; |
| 77 | |
| 78 | reg = <0x6b0a000 0x1000>; |
| 79 | reg-names = "replicator-base"; |
| 80 | |
| 81 | coresight-name = "coresight-replicator-swao"; |
| 82 | |
| 83 | clocks = <&clock_aop QDSS_CLK>; |
| 84 | clock-names = "apb_pclk"; |
| 85 | |
| 86 | ports { |
| 87 | #address-cells = <1>; |
| 88 | #size-cells = <0>; |
| 89 | |
| 90 | port@0 { |
| 91 | reg = <0>; |
| 92 | replicator_swao_in_tmc_etf_swao: endpoint { |
| 93 | slave-mode; |
| 94 | remote-endpoint = |
| 95 | <&tmc_etf_swao_out_replicator>; |
| 96 | }; |
| 97 | }; |
| 98 | |
| 99 | port@1 { |
| 100 | reg = <0>; |
| 101 | replicator_swao_out_funnel_in2: endpoint { |
| 102 | remote-endpoint = |
| 103 | <&funnel_in2_in_replicator_swao>; |
| 104 | }; |
| 105 | }; |
| 106 | }; |
| 107 | }; |
| 108 | |
| 109 | tmc_etf_swao: tmc@6b09000 { |
| 110 | compatible = "arm,primecell"; |
| 111 | arm,primecell-periphid = <0x0003b961>; |
| 112 | |
| 113 | reg = <0x6b09000 0x1000>; |
| 114 | reg-names = "tmc-base"; |
| 115 | |
| 116 | coresight-name = "coresight-tmc-etf-swao"; |
| 117 | |
| 118 | clocks = <&clock_aop QDSS_CLK>; |
| 119 | clock-names = "apb_pclk"; |
| 120 | |
| 121 | ports { |
| 122 | #address-cells = <1>; |
| 123 | #size-cells = <0>; |
| 124 | |
| 125 | port@0 { |
| 126 | reg = <0>; |
| 127 | tmc_etf_swao_out_replicator: endpoint { |
| 128 | remote-endpoint= |
| 129 | <&replicator_swao_in_tmc_etf_swao>; |
| 130 | }; |
| 131 | }; |
| 132 | |
| 133 | port@1 { |
| 134 | reg = <0>; |
| 135 | tmc_etf_swao_in_funnel_swao: endpoint { |
| 136 | slave-mode; |
| 137 | remote-endpoint= |
| 138 | <&funnel_swao_out_tmc_etf_swao>; |
| 139 | }; |
| 140 | }; |
| 141 | }; |
| 142 | }; |
| 143 | |
| 144 | funnel_swao:funnel@0x6b08000 { |
| 145 | compatible = "arm,primecell"; |
| 146 | arm,primecell-periphid = <0x0003b908>; |
| 147 | |
| 148 | reg = <0x6b08000 0x1000>; |
| 149 | reg-names = "funnel-base"; |
| 150 | |
| 151 | coresight-name = "coresight-funnel-swao"; |
| 152 | |
| 153 | clocks = <&clock_aop QDSS_CLK>; |
| 154 | clock-names = "apb_pclk"; |
| 155 | |
| 156 | ports { |
| 157 | #address-cells = <1>; |
| 158 | #size-cells = <0>; |
| 159 | |
| 160 | port@0 { |
| 161 | reg = <0>; |
| 162 | funnel_swao_out_tmc_etf_swao: endpoint { |
| 163 | remote-endpoint = |
| 164 | <&tmc_etf_swao_in_funnel_swao>; |
| 165 | }; |
| 166 | }; |
| 167 | |
| 168 | port@1 { |
| 169 | reg = <7>; |
| 170 | funnel_swao_in_tpda_swao: endpoint { |
| 171 | slave-mode; |
| 172 | remote-endpoint= |
| 173 | <&tpda_swao_out_funnel_swao>; |
| 174 | }; |
| 175 | }; |
| 176 | }; |
| 177 | }; |
| 178 | |
| 179 | tpda_swao: tpda@6b01000 { |
| 180 | compatible = "arm,primecell"; |
| 181 | arm,primecell-periphid = <0x0003b969>; |
| 182 | reg = <0x6b01000 0x1000>; |
| 183 | reg-names = "tpda-base"; |
| 184 | |
| 185 | coresight-name = "coresight-tpda-swao"; |
| 186 | |
| 187 | qcom,tpda-atid = <71>; |
| 188 | qcom,dsb-elem-size = <1 32>; |
| 189 | qcom,cmb-elem-size = <0 64>; |
| 190 | |
| 191 | clocks = <&clock_aop QDSS_CLK>; |
| 192 | clock-names = "apb_pclk"; |
| 193 | |
| 194 | ports { |
| 195 | #address-cells = <1>; |
| 196 | #size-cells = <0>; |
| 197 | |
| 198 | port@0 { |
| 199 | reg = <0>; |
| 200 | tpda_swao_out_funnel_swao: endpoint { |
| 201 | remote-endpoint = |
| 202 | <&funnel_swao_in_tpda_swao>; |
| 203 | }; |
| 204 | }; |
| 205 | |
| 206 | port@1 { |
| 207 | reg = <0>; |
| 208 | tpda_swao_in_tpdm_swao0: endpoint { |
| 209 | slave-mode; |
| 210 | remote-endpoint = |
| 211 | <&tpdm_swao0_out_tpda_swao>; |
| 212 | }; |
| 213 | }; |
| 214 | |
| 215 | port@2 { |
| 216 | reg = <1>; |
| 217 | tpda_swao_in_tpdm_swao1: endpoint { |
| 218 | slave-mode; |
| 219 | remote-endpoint = |
| 220 | <&tpdm_swao1_out_tpda_swao>; |
| 221 | }; |
| 222 | }; |
| 223 | }; |
| 224 | }; |
| 225 | |
| 226 | tpdm_swao0: tpdm@6b02000 { |
| 227 | compatible = "arm,primecell"; |
| 228 | arm,primecell-periphid = <0x0003b968>; |
| 229 | |
| 230 | reg = <0x6b02000 0x1000>; |
| 231 | reg-names = "tpdm-base"; |
| 232 | |
| 233 | coresight-name = "coresight-tpdm-swao-0"; |
| 234 | |
| 235 | clocks = <&clock_aop QDSS_CLK>; |
| 236 | clock-names = "apb_pclk"; |
| 237 | |
| 238 | port { |
| 239 | tpdm_swao0_out_tpda_swao: endpoint { |
| 240 | remote-endpoint = <&tpda_swao_in_tpdm_swao0>; |
| 241 | }; |
| 242 | }; |
| 243 | }; |
| 244 | |
| 245 | tpdm_swao1: tpdm@6b03000 { |
| 246 | compatible = "arm,primecell"; |
| 247 | arm,primecell-periphid = <0x0003b968>; |
| 248 | reg = <0x6b03000 0x1000>; |
| 249 | reg-names = "tpdm-base"; |
| 250 | |
| 251 | coresight-name="coresight-tpdm-swao-1"; |
| 252 | |
| 253 | clocks = <&clock_aop QDSS_CLK>; |
| 254 | clock-names = "apb_pclk"; |
| 255 | |
| 256 | qcom,msr-fix-req; |
| 257 | |
| 258 | port { |
| 259 | tpdm_swao1_out_tpda_swao: endpoint { |
| 260 | remote-endpoint = <&tpda_swao_in_tpdm_swao1>; |
| 261 | }; |
| 262 | }; |
| 263 | }; |
| 264 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 265 | tmc_etf: tmc@6047000 { |
| 266 | compatible = "arm,primecell"; |
| 267 | arm,primecell-periphid = <0x0003b961>; |
| 268 | |
| 269 | reg = <0x6047000 0x1000>; |
| 270 | reg-names = "tmc-base"; |
| 271 | |
| 272 | coresight-name = "coresight-tmc-etf"; |
| 273 | coresight-ctis = <&cti0 &cti8>; |
| 274 | arm,default-sink; |
| 275 | |
| 276 | clocks = <&clock_aop QDSS_CLK>; |
| 277 | clock-names = "apb_pclk"; |
| 278 | |
| 279 | ports { |
| 280 | #address-cells = <1>; |
| 281 | #size-cells = <0>; |
| 282 | |
| 283 | port@0 { |
| 284 | reg = <0>; |
| 285 | tmc_etf_out_replicator: endpoint { |
| 286 | remote-endpoint = |
| 287 | <&replicator_in_tmc_etf>; |
| 288 | }; |
| 289 | }; |
| 290 | |
| 291 | port@1 { |
| 292 | reg = <1>; |
| 293 | tmc_etf_in_funnel_merg: endpoint { |
| 294 | slave-mode; |
| 295 | remote-endpoint = |
| 296 | <&funnel_merg_out_tmc_etf>; |
| 297 | }; |
| 298 | }; |
| 299 | }; |
| 300 | |
| 301 | }; |
| 302 | |
| 303 | funnel_merg: funnel@6045000 { |
| 304 | compatible = "arm,primecell"; |
| 305 | arm,primecell-periphid = <0x0003b908>; |
| 306 | |
| 307 | reg = <0x6045000 0x1000>; |
| 308 | reg-names = "funnel-base"; |
| 309 | |
| 310 | coresight-name = "coresight-funnel-merg"; |
| 311 | |
| 312 | clocks = <&clock_aop QDSS_CLK>; |
| 313 | clock-names = "apb_pclk"; |
| 314 | |
| 315 | ports { |
| 316 | #address-cells = <1>; |
| 317 | #size-cells = <0>; |
| 318 | |
| 319 | port@0 { |
| 320 | reg = <0>; |
| 321 | funnel_merg_out_tmc_etf: endpoint { |
| 322 | remote-endpoint = |
| 323 | <&tmc_etf_in_funnel_merg>; |
| 324 | }; |
| 325 | }; |
| 326 | |
| 327 | port@1 { |
| 328 | reg = <0>; |
| 329 | funnel_merg_in_funnel_in0: endpoint { |
| 330 | slave-mode; |
| 331 | remote-endpoint = |
| 332 | <&funnel_in0_out_funnel_merg>; |
| 333 | }; |
| 334 | }; |
| 335 | |
| 336 | port@2 { |
| 337 | reg = <1>; |
| 338 | funnel_merg_in_funnel_in1: endpoint { |
| 339 | slave-mode; |
| 340 | remote-endpoint = |
| 341 | <&funnel_in1_out_funnel_merg>; |
| 342 | }; |
| 343 | }; |
| 344 | |
| 345 | port@3 { |
| 346 | reg = <2>; |
| 347 | funnel_merg_in_funnel_in2: endpoint { |
| 348 | slave-mode; |
| 349 | remote-endpoint = |
| 350 | <&funnel_in2_out_funnel_merg>; |
| 351 | }; |
| 352 | }; |
| 353 | }; |
| 354 | }; |
| 355 | |
| 356 | stm: stm@6002000 { |
| 357 | compatible = "arm,primecell"; |
| 358 | arm,primecell-periphid = <0x0003b962>; |
| 359 | |
| 360 | reg = <0x6002000 0x1000>, |
| 361 | <0x16280000 0x180000>; |
| 362 | reg-names = "stm-base", "stm-stimulus-base"; |
| 363 | |
| 364 | coresight-name = "coresight-stm"; |
| 365 | |
| 366 | clocks = <&clock_aop QDSS_CLK>; |
| 367 | clock-names = "apb_pclk"; |
| 368 | |
| 369 | port { |
| 370 | stm_out_funnel_in0: endpoint { |
| 371 | remote-endpoint = <&funnel_in0_in_stm>; |
| 372 | }; |
| 373 | }; |
| 374 | |
| 375 | }; |
| 376 | |
| 377 | hwevent: hwevent@0x014066f0 { |
| 378 | compatible = "qcom,coresight-hwevent"; |
| 379 | reg = <0x14066f0 0x4>, |
| 380 | <0x14166f0 0x4>, |
| 381 | <0x1406038 0x4>, |
| 382 | <0x1416038 0x4>; |
| 383 | reg-names = "ddr-ch0-cfg", "ddr-ch23-cfg", "ddr-ch0-ctrl", |
| 384 | "ddr-ch23-ctrl"; |
| 385 | |
| 386 | coresight-name = "coresight-hwevent"; |
| 387 | |
| 388 | clocks = <&clock_aop QDSS_CLK>; |
| 389 | clock-names = "apb_pclk"; |
| 390 | }; |
| 391 | |
| 392 | csr: csr@6001000 { |
| 393 | compatible = "qcom,coresight-csr"; |
| 394 | reg = <0x6001000 0x1000>; |
| 395 | reg-names = "csr-base"; |
| 396 | |
| 397 | coresight-name = "coresight-csr"; |
| 398 | |
| 399 | qcom,blk-size = <1>; |
| 400 | }; |
| 401 | |
| 402 | funnel_in0: funnel@0x6041000 { |
| 403 | compatible = "arm,primecell"; |
| 404 | arm,primecell-periphid = <0x0003b908>; |
| 405 | |
| 406 | reg = <0x6041000 0x1000>; |
| 407 | reg-names = "funnel-base"; |
| 408 | |
| 409 | coresight-name = "coresight-funnel-in0"; |
| 410 | |
| 411 | clocks = <&clock_aop QDSS_CLK>; |
| 412 | clock-names = "apb_pclk"; |
| 413 | |
| 414 | ports { |
| 415 | #address-cells = <1>; |
| 416 | #size-cells = <0>; |
| 417 | |
| 418 | port@0 { |
| 419 | reg = <0>; |
| 420 | funnel_in0_out_funnel_merg: endpoint { |
| 421 | remote-endpoint = |
| 422 | <&funnel_merg_in_funnel_in0>; |
| 423 | }; |
| 424 | }; |
| 425 | |
| 426 | port@1 { |
| 427 | reg = <6>; |
| 428 | funnel_in0_in_funnel_qatb: endpoint { |
| 429 | slave-mode; |
| 430 | remote-endpoint = |
| 431 | <&funnel_qatb_out_funnel_in0>; |
| 432 | }; |
| 433 | }; |
| 434 | |
| 435 | port@2 { |
| 436 | reg = <7>; |
| 437 | funnel_in0_in_stm: endpoint { |
| 438 | slave-mode; |
| 439 | remote-endpoint = <&stm_out_funnel_in0>; |
| 440 | }; |
| 441 | }; |
| 442 | }; |
| 443 | }; |
| 444 | |
| 445 | funnel_in1: funnel@0x6042000 { |
| 446 | compatible = "arm,primecell"; |
| 447 | arm,primecell-periphid = <0x0003b908>; |
| 448 | |
| 449 | reg = <0x6042000 0x1000>; |
| 450 | reg-names = "funnel-base"; |
| 451 | |
| 452 | coresight-name = "coresight-funnel-in1"; |
| 453 | |
| 454 | clocks = <&clock_aop QDSS_CLK>; |
| 455 | clock-names = "apb_pclk"; |
| 456 | |
| 457 | |
| 458 | ports { |
| 459 | #address-cells = <1>; |
| 460 | #size-cells = <0>; |
| 461 | |
| 462 | port@0 { |
| 463 | reg = <0>; |
| 464 | funnel_in1_out_funnel_merg: endpoint { |
| 465 | remote-endpoint = |
| 466 | <&funnel_merg_in_funnel_in1>; |
| 467 | }; |
| 468 | }; |
| 469 | |
| 470 | port@1 { |
Saranya Chidura | f2d195e | 2017-10-18 11:06:15 +0530 | [diff] [blame] | 471 | reg = <0>; |
| 472 | funnel_in1_in_audio_etm0: endpoint { |
| 473 | slave-mode; |
| 474 | remote-endpoint = |
| 475 | <&audio_etm0_out_funnel_in1>; |
| 476 | }; |
| 477 | }; |
| 478 | |
| 479 | port@2 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 480 | reg = <3>; |
| 481 | funnel_in1_in_funnel_modem: endpoint { |
| 482 | slave-mode; |
| 483 | remote-endpoint = |
| 484 | <&funnel_modem_out_funnel_in1>; |
| 485 | }; |
| 486 | }; |
| 487 | }; |
| 488 | }; |
| 489 | |
| 490 | funnel_in2: funnel@0x6043000 { |
| 491 | compatible = "arm,primecell"; |
| 492 | arm,primecell-periphid = <0x0003b908>; |
| 493 | |
| 494 | reg = <0x6043000 0x1000>; |
| 495 | reg-names = "funnel-base"; |
| 496 | |
| 497 | coresight-name = "coresight-funnel-in2"; |
| 498 | |
| 499 | clocks = <&clock_aop QDSS_CLK>; |
| 500 | clock-names = "apb_pclk"; |
| 501 | |
| 502 | ports { |
| 503 | #address-cells = <1>; |
| 504 | #size-cells = <0>; |
| 505 | |
| 506 | port@0 { |
| 507 | reg = <0>; |
| 508 | funnel_in2_out_funnel_merg: endpoint { |
| 509 | remote-endpoint = |
| 510 | <&funnel_merg_in_funnel_in2>; |
| 511 | }; |
| 512 | }; |
| 513 | |
| 514 | port@1 { |
| 515 | reg = <0>; |
| 516 | funnel_in2_in_modem_etm0: endpoint { |
| 517 | slave-mode; |
| 518 | remote-endpoint = |
| 519 | <&modem_etm0_out_funnel_in2>; |
| 520 | }; |
| 521 | |
| 522 | }; |
| 523 | |
| 524 | port@2 { |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 525 | reg = <1>; |
| 526 | funnel_in2_in_replicator_swao: endpoint { |
| 527 | slave-mode; |
| 528 | remote-endpoint = |
| 529 | <&replicator_swao_out_funnel_in2>; |
| 530 | }; |
| 531 | }; |
| 532 | port@3 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 533 | reg = <5>; |
| 534 | funnel_in2_in_funnel_apss_merg: endpoint { |
| 535 | slave-mode; |
| 536 | remote-endpoint = |
| 537 | <&funnel_apss_merg_out_funnel_in2>; |
| 538 | }; |
| 539 | }; |
Saranya Chidura | 8e0d6bd | 2017-11-03 07:38:04 +0530 | [diff] [blame] | 540 | port@4 { |
| 541 | reg = <6>; |
| 542 | funnel_in2_in_funnel_gfx: endpoint { |
| 543 | slave-mode; |
| 544 | remote-endpoint = |
| 545 | <&funnel_gfx_out_funnel_in2>; |
| 546 | }; |
| 547 | }; |
| 548 | }; |
| 549 | }; |
| 550 | |
| 551 | funnel_gfx: funnel@0x6943000 { |
| 552 | compatible = "arm,primecell"; |
| 553 | arm,primecell-periphid = <0x0003b908>; |
| 554 | |
| 555 | reg = <0x6943000 0x1000>; |
| 556 | reg-names = "funnel-base"; |
| 557 | |
| 558 | coresight-name = "coresight-funnel-gfx"; |
| 559 | |
| 560 | clocks = <&clock_aop QDSS_CLK>; |
| 561 | clock-names = "apb_pclk"; |
| 562 | |
| 563 | ports { |
| 564 | #address-cells = <1>; |
| 565 | #size-cells = <0>; |
| 566 | |
| 567 | port@0 { |
| 568 | reg = <0>; |
| 569 | funnel_gfx_out_funnel_in2: endpoint { |
| 570 | remote-endpoint = |
| 571 | <&funnel_in2_in_funnel_gfx>; |
| 572 | }; |
| 573 | }; |
| 574 | |
| 575 | port@1 { |
| 576 | reg = <0>; |
| 577 | funnel_in2_in_gfx: endpoint { |
| 578 | slave-mode; |
| 579 | remote-endpoint = |
| 580 | <&gfx_out_funnel_in2>; |
| 581 | }; |
| 582 | }; |
| 583 | |
| 584 | port@2 { |
| 585 | reg = <1>; |
| 586 | funnel_in2_in_gfx_cx: endpoint { |
| 587 | slave-mode; |
| 588 | remote-endpoint = |
| 589 | <&gfx_cx_out_funnel_in2>; |
| 590 | }; |
| 591 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 592 | }; |
| 593 | }; |
| 594 | |
| 595 | tpda: tpda@6004000 { |
| 596 | compatible = "arm,primecell"; |
| 597 | arm,primecell-periphid = <0x0003b969>; |
| 598 | reg = <0x6004000 0x1000>; |
| 599 | reg-names = "tpda-base"; |
| 600 | |
| 601 | coresight-name = "coresight-tpda"; |
| 602 | |
| 603 | qcom,tpda-atid = <65>; |
| 604 | qcom,bc-elem-size = <10 32>, |
| 605 | <13 32>; |
| 606 | qcom,tc-elem-size = <13 32>; |
| 607 | qcom,dsb-elem-size = <0 32>, |
| 608 | <2 32>, |
| 609 | <3 32>, |
| 610 | <5 32>, |
| 611 | <6 32>, |
| 612 | <10 32>, |
| 613 | <11 32>, |
| 614 | <13 32>; |
| 615 | qcom,cmb-elem-size = <3 64>, |
| 616 | <7 64>, |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 617 | <9 64>, |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 618 | <13 64>; |
| 619 | |
| 620 | clocks = <&clock_aop QDSS_CLK>; |
| 621 | clock-names = "apb_pclk"; |
| 622 | |
| 623 | ports { |
| 624 | #address-cells = <1>; |
| 625 | #size-cells = <0>; |
| 626 | port@0 { |
| 627 | reg = <0>; |
| 628 | tpda_out_funnel_qatb: endpoint { |
| 629 | remote-endpoint = |
| 630 | <&funnel_qatb_in_tpda>; |
| 631 | }; |
| 632 | |
| 633 | }; |
| 634 | |
| 635 | port@1 { |
| 636 | reg = <0>; |
| 637 | tpda_in_tpdm_center: endpoint { |
| 638 | slave-mode; |
| 639 | remote-endpoint = |
| 640 | <&tpdm_center_out_tpda>; |
| 641 | }; |
| 642 | }; |
| 643 | |
| 644 | port@2 { |
| 645 | reg = <2>; |
| 646 | tpda_in_funnel_dl_mm: endpoint { |
| 647 | slave-mode; |
| 648 | remote-endpoint = |
| 649 | <&funnel_dl_mm_out_tpda>; |
| 650 | }; |
| 651 | }; |
| 652 | |
| 653 | port@3 { |
| 654 | reg = <3>; |
| 655 | tpda_in_funnel_ddr_0: endpoint { |
| 656 | slave-mode; |
| 657 | remote-endpoint = |
| 658 | <&funnel_ddr_0_out_tpda>; |
| 659 | }; |
| 660 | }; |
| 661 | |
| 662 | port@4 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 663 | reg = <6>; |
| 664 | tpda_in_funnel_turing: endpoint { |
| 665 | slave-mode; |
| 666 | remote-endpoint = |
| 667 | <&funnel_turing_out_tpda>; |
| 668 | }; |
| 669 | }; |
| 670 | |
Saranya Chidura | 28a0630 | 2017-09-15 23:15:27 +0530 | [diff] [blame] | 671 | port@5 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 672 | reg = <7>; |
| 673 | tpda_in_tpdm_vsense: endpoint { |
| 674 | slave-mode; |
| 675 | remote-endpoint = |
| 676 | <&tpdm_vsense_out_tpda>; |
| 677 | }; |
| 678 | }; |
| 679 | |
Saranya Chidura | 28a0630 | 2017-09-15 23:15:27 +0530 | [diff] [blame] | 680 | port@6 { |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 681 | reg = <9>; |
| 682 | tpda_in_tpdm_prng: endpoint { |
| 683 | slave-mode; |
| 684 | remote-endpoint = |
| 685 | <&tpdm_prng_out_tpda>; |
| 686 | }; |
| 687 | }; |
| 688 | |
| 689 | port@7 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 690 | reg = <11>; |
| 691 | tpda_in_tpdm_north: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 692 | slave-mode; |
| 693 | remote-endpoint = |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 694 | <&tpdm_north_out_tpda>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 695 | }; |
| 696 | }; |
| 697 | |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 698 | port@8 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 699 | reg = <12>; |
| 700 | tpda_in_tpdm_qm: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 701 | slave-mode; |
| 702 | remote-endpoint = |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 703 | <&tpdm_qm_out_tpda>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 704 | }; |
| 705 | }; |
| 706 | |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 707 | port@9 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 708 | reg = <13>; |
| 709 | tpda_in_tpdm_pimem: endpoint { |
| 710 | slave-mode; |
| 711 | remote-endpoint = |
| 712 | <&tpdm_pimem_out_tpda>; |
| 713 | }; |
| 714 | }; |
| 715 | }; |
| 716 | }; |
| 717 | |
| 718 | funnel_modem: funnel@6832000 { |
| 719 | compatible = "arm,primecell"; |
| 720 | arm,primecell-periphid = <0x0003b908>; |
| 721 | |
| 722 | reg = <0x6832000 0x1000>; |
| 723 | reg-names = "funnel-base"; |
| 724 | |
| 725 | coresight-name = "coresight-funnel-modem"; |
| 726 | |
| 727 | clocks = <&clock_aop QDSS_CLK>; |
| 728 | clock-names = "apb_pclk"; |
| 729 | |
| 730 | ports { |
| 731 | #address-cells = <1>; |
| 732 | #size-cells = <0>; |
| 733 | |
| 734 | port@0 { |
| 735 | reg = <0>; |
| 736 | funnel_modem_out_funnel_in1: endpoint { |
| 737 | remote-endpoint = |
| 738 | <&funnel_in1_in_funnel_modem>; |
| 739 | }; |
| 740 | }; |
| 741 | |
| 742 | port@1 { |
| 743 | reg = <0>; |
| 744 | funnel_modem_in_tpda_modem: endpoint { |
| 745 | slave-mode; |
| 746 | remote-endpoint = |
| 747 | <&tpda_modem_out_funnel_modem>; |
| 748 | }; |
| 749 | }; |
| 750 | }; |
| 751 | }; |
| 752 | |
| 753 | tpda_modem: tpda@6831000 { |
| 754 | compatible = "arm,primecell"; |
| 755 | arm,primecell-periphid = <0x0003b969>; |
| 756 | reg = <0x6831000 0x1000>; |
| 757 | reg-names = "tpda-base"; |
| 758 | |
| 759 | coresight-name = "coresight-tpda-modem"; |
| 760 | |
| 761 | qcom,tpda-atid = <67>; |
| 762 | qcom,dsb-elem-size = <0 32>; |
| 763 | qcom,cmb-elem-size = <0 64>; |
| 764 | |
| 765 | clocks = <&clock_aop QDSS_CLK>; |
| 766 | clock-names = "apb_pclk"; |
| 767 | |
| 768 | ports { |
| 769 | #address-cells = <1>; |
| 770 | #size-cells = <0>; |
| 771 | port@0 { |
| 772 | reg = <0>; |
| 773 | tpda_modem_out_funnel_modem: endpoint { |
| 774 | remote-endpoint = |
| 775 | <&funnel_modem_in_tpda_modem>; |
| 776 | }; |
| 777 | }; |
| 778 | |
| 779 | port@1 { |
| 780 | reg = <0>; |
| 781 | tpda_modem_in_tpdm_modem: endpoint { |
| 782 | slave-mode; |
| 783 | remote-endpoint = |
| 784 | <&tpdm_modem_out_tpda_modem>; |
| 785 | }; |
| 786 | }; |
| 787 | }; |
| 788 | }; |
| 789 | |
| 790 | tpdm_modem: tpdm@6830000 { |
| 791 | compatible = "arm,primecell"; |
| 792 | arm,primecell-periphid = <0x0003b968>; |
| 793 | reg = <0x6830000 0x1000>; |
| 794 | reg-names = "tpdm-base"; |
| 795 | |
| 796 | coresight-name = "coresight-tpdm-modem"; |
| 797 | |
| 798 | clocks = <&clock_aop QDSS_CLK>; |
| 799 | clock-names = "apb_pclk"; |
| 800 | |
| 801 | port { |
| 802 | tpdm_modem_out_tpda_modem: endpoint { |
| 803 | remote-endpoint = <&tpda_modem_in_tpdm_modem>; |
| 804 | }; |
| 805 | }; |
| 806 | }; |
| 807 | |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 808 | tpdm_prng: tpdm@684c000 { |
| 809 | compatible = "arm,primecell"; |
| 810 | arm,primecell-periphid = <0x0003b968>; |
| 811 | reg = <0x684c000 0x1000>; |
| 812 | reg-names = "tpdm-base"; |
| 813 | |
| 814 | coresight-name = "coresight-tpdm-prng"; |
| 815 | |
| 816 | clocks = <&clock_aop QDSS_CLK>; |
| 817 | clock-names = "apb_pclk"; |
| 818 | |
| 819 | port { |
| 820 | tpdm_prng_out_tpda: endpoint { |
| 821 | remote-endpoint = <&tpda_in_tpdm_prng>; |
| 822 | }; |
| 823 | }; |
| 824 | }; |
| 825 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 826 | tpdm_center: tpdm@6c28000 { |
| 827 | compatible = "arm,primecell"; |
| 828 | arm,primecell-periphid = <0x0003b968>; |
| 829 | reg = <0x6c28000 0x1000>; |
| 830 | reg-names = "tpdm-base"; |
| 831 | |
| 832 | coresight-name = "coresight-tpdm-center"; |
| 833 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 834 | qcom,msr-fix-req; |
| 835 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 836 | clocks = <&clock_aop QDSS_CLK>; |
| 837 | clock-names = "apb_pclk"; |
| 838 | |
| 839 | port { |
| 840 | tpdm_center_out_tpda: endpoint { |
| 841 | remote-endpoint = <&tpda_in_tpdm_center>; |
| 842 | }; |
| 843 | }; |
| 844 | }; |
| 845 | |
| 846 | tpdm_north: tpdm@6a24000 { |
| 847 | compatible = "arm,primecell"; |
| 848 | arm,primecell-periphid = <0x0003b968>; |
| 849 | reg = <0x6a24000 0x1000>; |
| 850 | reg-names = "tpdm-base"; |
| 851 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 852 | qcom,msr-fix-req; |
| 853 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 854 | coresight-name = "coresight-tpdm-north"; |
| 855 | |
| 856 | clocks = <&clock_aop QDSS_CLK>; |
| 857 | clock-names = "apb_pclk"; |
| 858 | |
| 859 | port { |
| 860 | tpdm_north_out_tpda: endpoint { |
| 861 | remote-endpoint = <&tpda_in_tpdm_north>; |
| 862 | }; |
| 863 | }; |
| 864 | }; |
| 865 | |
| 866 | tpdm_qm: tpdm@69d0000 { |
| 867 | compatible = "arm,primecell"; |
| 868 | arm,primecell-periphid = <0x0003b968>; |
| 869 | reg = <0x69d0000 0x1000>; |
| 870 | reg-names = "tpdm-base"; |
| 871 | |
| 872 | coresight-name = "coresight-tpdm-qm"; |
| 873 | |
| 874 | clocks = <&clock_aop QDSS_CLK>; |
| 875 | clock-names = "apb_pclk"; |
| 876 | |
| 877 | port { |
| 878 | tpdm_qm_out_tpda: endpoint { |
| 879 | remote-endpoint = <&tpda_in_tpdm_qm>; |
| 880 | }; |
| 881 | }; |
| 882 | }; |
| 883 | |
| 884 | tpda_apss: tpda@7862000 { |
| 885 | compatible = "arm,primecell"; |
| 886 | arm,primecell-periphid = <0x0003b969>; |
| 887 | reg = <0x7862000 0x1000>; |
| 888 | reg-names = "tpda-base"; |
| 889 | |
| 890 | coresight-name = "coresight-tpda-apss"; |
| 891 | |
| 892 | qcom,tpda-atid = <66>; |
| 893 | qcom,dsb-elem-size = <0 32>; |
| 894 | |
| 895 | clocks = <&clock_aop QDSS_CLK>; |
| 896 | clock-names = "apb_pclk"; |
| 897 | |
| 898 | ports { |
| 899 | #address-cells = <1>; |
| 900 | #size-cells = <0>; |
| 901 | port@0 { |
| 902 | reg = <0>; |
| 903 | tpda_apss_out_funnel_apss_merg: endpoint { |
| 904 | remote-endpoint = |
| 905 | <&funnel_apss_merg_in_tpda_apss>; |
| 906 | }; |
| 907 | }; |
| 908 | |
| 909 | port@1 { |
| 910 | reg = <0>; |
| 911 | tpda_apss_in_tpdm_apss: endpoint { |
| 912 | slave-mode; |
| 913 | remote-endpoint = |
| 914 | <&tpdm_apss_out_tpda_apss>; |
| 915 | }; |
| 916 | }; |
| 917 | }; |
| 918 | }; |
| 919 | |
| 920 | tpdm_apss: tpdm@7860000 { |
| 921 | compatible = "arm,primecell"; |
| 922 | arm,primecell-periphid = <0x0003b968>; |
| 923 | reg = <0x7860000 0x1000>; |
| 924 | reg-names = "tpdm-base"; |
| 925 | |
| 926 | coresight-name = "coresight-tpdm-apss"; |
| 927 | |
| 928 | clocks = <&clock_aop QDSS_CLK>; |
| 929 | clock-names = "apb_pclk"; |
| 930 | |
| 931 | port { |
| 932 | tpdm_apss_out_tpda_apss: endpoint { |
| 933 | remote-endpoint = <&tpda_apss_in_tpdm_apss>; |
| 934 | }; |
| 935 | }; |
| 936 | }; |
| 937 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 938 | tpda_llm_silver: tpda@78c0000 { |
| 939 | compatible = "arm,primecell"; |
| 940 | arm,primecell-periphid = <0x0003b969>; |
| 941 | reg = <0x78c0000 0x1000>; |
| 942 | reg-names = "tpda-base"; |
| 943 | |
| 944 | coresight-name = "coresight-tpda-llm-silver"; |
| 945 | |
| 946 | qcom,tpda-atid = <72>; |
| 947 | qcom,cmb-elem-size = <0 32>; |
| 948 | |
| 949 | clocks = <&clock_aop QDSS_CLK>; |
| 950 | clock-names = "apb_pclk"; |
| 951 | |
| 952 | ports { |
| 953 | #address-cells = <1>; |
| 954 | #size-cells = <0>; |
| 955 | port@0 { |
| 956 | reg = <0>; |
| 957 | tpda_llm_silver_out_funnel_apss_merg: endpoint { |
| 958 | remote-endpoint = |
| 959 | <&funnel_apss_merg_in_tpda_llm_silver>; |
| 960 | }; |
| 961 | }; |
| 962 | |
| 963 | port@1 { |
| 964 | reg = <0>; |
| 965 | tpda_llm_silver_in_tpdm_llm_silver: endpoint { |
| 966 | slave-mode; |
| 967 | remote-endpoint = |
| 968 | <&tpdm_llm_silver_out_tpda_llm_silver>; |
| 969 | }; |
| 970 | }; |
| 971 | }; |
| 972 | }; |
| 973 | |
| 974 | tpdm_llm_silver: tpdm@78a0000 { |
| 975 | compatible = "arm,primecell"; |
| 976 | arm,primecell-periphid = <0x0003b968>; |
| 977 | reg = <0x78a0000 0x1000>; |
| 978 | reg-names = "tpdm-base"; |
| 979 | |
| 980 | coresight-name = "coresight-tpdm-llm-silver"; |
| 981 | |
| 982 | clocks = <&clock_aop QDSS_CLK>; |
| 983 | clock-names = "apb_pclk"; |
| 984 | |
| 985 | port { |
| 986 | tpdm_llm_silver_out_tpda_llm_silver: endpoint { |
| 987 | remote-endpoint = |
| 988 | <&tpda_llm_silver_in_tpdm_llm_silver>; |
| 989 | }; |
| 990 | }; |
| 991 | }; |
| 992 | |
| 993 | tpda_llm_gold: tpda@78d0000 { |
| 994 | compatible = "arm,primecell"; |
| 995 | arm,primecell-periphid = <0x0003b969>; |
| 996 | reg = <0x78d0000 0x1000>; |
| 997 | reg-names = "tpda-base"; |
| 998 | |
| 999 | coresight-name = "coresight-tpda-llm-gold"; |
| 1000 | |
| 1001 | qcom,tpda-atid = <73>; |
| 1002 | qcom,cmb-elem-size = <0 32>; |
| 1003 | |
| 1004 | clocks = <&clock_aop QDSS_CLK>; |
| 1005 | clock-names = "apb_pclk"; |
| 1006 | |
| 1007 | ports { |
| 1008 | #address-cells = <1>; |
| 1009 | #size-cells = <0>; |
| 1010 | port@0 { |
| 1011 | reg = <0>; |
| 1012 | tpda_llm_gold_out_funnel_apss_merg: endpoint { |
| 1013 | remote-endpoint = |
| 1014 | <&funnel_apss_merg_in_tpda_llm_gold>; |
| 1015 | }; |
| 1016 | }; |
| 1017 | |
| 1018 | port@1 { |
| 1019 | reg = <0>; |
| 1020 | tpda_llm_gold_in_tpdm_llm_gold: endpoint { |
| 1021 | slave-mode; |
| 1022 | remote-endpoint = |
| 1023 | <&tpdm_llm_gold_out_tpda_llm_gold>; |
| 1024 | }; |
| 1025 | }; |
| 1026 | }; |
| 1027 | }; |
| 1028 | |
| 1029 | tpdm_llm_gold: tpdm@78b0000 { |
| 1030 | compatible = "arm,primecell"; |
| 1031 | arm,primecell-periphid = <0x0003b968>; |
| 1032 | reg = <0x78b0000 0x1000>; |
| 1033 | reg-names = "tpdm-base"; |
| 1034 | |
| 1035 | coresight-name = "coresight-tpdm-llm-gold"; |
| 1036 | |
| 1037 | clocks = <&clock_aop QDSS_CLK>; |
| 1038 | clock-names = "apb_pclk"; |
| 1039 | |
| 1040 | port { |
| 1041 | tpdm_llm_gold_out_tpda_llm_gold: endpoint { |
| 1042 | remote-endpoint = |
| 1043 | <&tpda_llm_gold_in_tpdm_llm_gold>; |
| 1044 | }; |
| 1045 | }; |
| 1046 | }; |
| 1047 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1048 | funnel_dl_mm: funnel@6c0b000 { |
| 1049 | compatible = "arm,primecell"; |
| 1050 | arm,primecell-periphid = <0x0003b908>; |
| 1051 | |
| 1052 | reg = <0x6c0b000 0x1000>; |
| 1053 | reg-names = "funnel-base"; |
| 1054 | |
| 1055 | coresight-name = "coresight-funnel-dl-mm"; |
| 1056 | |
| 1057 | clocks = <&clock_aop QDSS_CLK>; |
| 1058 | clock-names = "apb_pclk"; |
| 1059 | |
| 1060 | ports { |
| 1061 | #address-cells = <1>; |
| 1062 | #size-cells = <0>; |
| 1063 | |
| 1064 | port@0 { |
| 1065 | reg = <0>; |
| 1066 | funnel_dl_mm_out_tpda: endpoint { |
| 1067 | remote-endpoint = |
| 1068 | <&tpda_in_funnel_dl_mm>; |
| 1069 | }; |
| 1070 | }; |
| 1071 | |
| 1072 | port@1 { |
| 1073 | reg = <1>; |
| 1074 | funnel_dl_mm_in_tpdm_mm: endpoint { |
| 1075 | slave-mode; |
| 1076 | remote-endpoint = |
| 1077 | <&tpdm_mm_out_funnel_dl_mm>; |
| 1078 | }; |
| 1079 | }; |
| 1080 | }; |
| 1081 | }; |
| 1082 | |
| 1083 | tpdm_mm: tpdm@6c08000 { |
| 1084 | compatible = "arm,primecell"; |
| 1085 | arm,primecell-periphid = <0x0003b968>; |
| 1086 | reg = <0x6c08000 0x1000>; |
| 1087 | reg-names = "tpdm-base"; |
| 1088 | |
| 1089 | coresight-name = "coresight-tpdm-mm"; |
| 1090 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 1091 | qcom,msr-fix-req; |
| 1092 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1093 | clocks = <&clock_aop QDSS_CLK>; |
| 1094 | clock-names = "apb_pclk"; |
| 1095 | |
| 1096 | port { |
| 1097 | tpdm_mm_out_funnel_dl_mm: endpoint { |
| 1098 | remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>; |
| 1099 | }; |
| 1100 | }; |
| 1101 | }; |
| 1102 | |
| 1103 | funnel_turing: funnel@6861000 { |
| 1104 | compatible = "arm,primecell"; |
| 1105 | arm,primecell-periphid = <0x0003b908>; |
| 1106 | |
| 1107 | reg = <0x6861000 0x1000>; |
| 1108 | reg-names = "funnel-base"; |
| 1109 | |
| 1110 | coresight-name = "coresight-funnel-turing"; |
| 1111 | |
| 1112 | clocks = <&clock_aop QDSS_CLK>; |
| 1113 | clock-names = "apb_pclk"; |
| 1114 | |
| 1115 | ports { |
| 1116 | #address-cells = <1>; |
| 1117 | #size-cells = <0>; |
| 1118 | |
| 1119 | port@0 { |
| 1120 | reg = <0>; |
| 1121 | funnel_turing_out_tpda: endpoint { |
| 1122 | remote-endpoint = |
| 1123 | <&tpda_in_funnel_turing>; |
| 1124 | }; |
| 1125 | }; |
| 1126 | |
| 1127 | port@1 { |
| 1128 | reg = <0>; |
| 1129 | funnel_turing_in_tpdm_turing: endpoint { |
| 1130 | slave-mode; |
| 1131 | remote-endpoint = |
| 1132 | <&tpdm_turing_out_funnel_turing>; |
| 1133 | }; |
| 1134 | }; |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1135 | }; |
| 1136 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1137 | |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1138 | funnel_turing_1: funnel_1@6861000 { |
| 1139 | compatible = "arm,primecell"; |
| 1140 | arm,primecell-periphid = <0x0003b908>; |
| 1141 | |
| 1142 | reg = <0x6867000 0x10>, |
| 1143 | <0x6861000 0x1000>; |
| 1144 | reg-names = "funnel-base-dummy", "funnel-base-real"; |
| 1145 | |
| 1146 | coresight-name = "coresight-funnel-turing-1"; |
| 1147 | |
| 1148 | clocks = <&clock_aop QDSS_CLK>; |
| 1149 | clock-names = "apb_pclk"; |
| 1150 | |
| 1151 | qcom,duplicate-funnel; |
| 1152 | |
| 1153 | ports { |
| 1154 | #address-cells = <1>; |
| 1155 | #size-cells = <0>; |
| 1156 | |
| 1157 | port@0 { |
| 1158 | reg = <0>; |
| 1159 | funnel_turing_1_out_funnel_qatb: endpoint { |
| 1160 | remote-endpoint = |
| 1161 | <&funnel_qatb_in_funnel_turing_1>; |
| 1162 | }; |
| 1163 | }; |
| 1164 | |
| 1165 | port@1 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1166 | reg = <1>; |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1167 | funnel_turing_1_in_turing_etm0: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1168 | slave-mode; |
| 1169 | remote-endpoint = |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1170 | <&turing_etm0_out_funnel_turing_1>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1171 | }; |
| 1172 | }; |
| 1173 | }; |
| 1174 | }; |
| 1175 | |
| 1176 | tpdm_turing: tpdm@6860000 { |
| 1177 | compatible = "arm,primecell"; |
| 1178 | arm,primecell-periphid = <0x0003b968>; |
| 1179 | reg = <0x6860000 0x1000>; |
| 1180 | reg-names = "tpdm-base"; |
| 1181 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 1182 | qcom,msr-fix-req; |
| 1183 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1184 | coresight-name = "coresight-tpdm-turing"; |
| 1185 | |
| 1186 | clocks = <&clock_aop QDSS_CLK>; |
| 1187 | clock-names = "apb_pclk"; |
| 1188 | |
| 1189 | port { |
| 1190 | tpdm_turing_out_funnel_turing: endpoint { |
| 1191 | remote-endpoint = |
| 1192 | <&funnel_turing_in_tpdm_turing>; |
| 1193 | }; |
| 1194 | }; |
| 1195 | }; |
| 1196 | |
| 1197 | funnel_ddr_0: funnel@69e2000 { |
| 1198 | compatible = "arm,primecell"; |
| 1199 | arm,primecell-periphid = <0x0003b908>; |
| 1200 | |
| 1201 | reg = <0x69e2000 0x1000>; |
| 1202 | reg-names = "funnel-base"; |
| 1203 | |
| 1204 | coresight-name = "coresight-funnel-ddr-0"; |
| 1205 | |
| 1206 | clocks = <&clock_aop QDSS_CLK>; |
| 1207 | clock-names = "apb_pclk"; |
| 1208 | |
| 1209 | ports { |
| 1210 | #address-cells = <1>; |
| 1211 | #size-cells = <0>; |
| 1212 | |
| 1213 | port@0 { |
| 1214 | reg = <0>; |
| 1215 | funnel_ddr_0_out_tpda: endpoint { |
| 1216 | remote-endpoint = |
| 1217 | <&tpda_in_funnel_ddr_0>; |
| 1218 | }; |
| 1219 | }; |
| 1220 | |
| 1221 | port@1 { |
| 1222 | reg = <0>; |
| 1223 | funnel_ddr_0_in_tpdm_ddr: endpoint { |
| 1224 | slave-mode; |
| 1225 | remote-endpoint = |
| 1226 | <&tpdm_ddr_out_funnel_ddr_0>; |
| 1227 | }; |
| 1228 | }; |
| 1229 | }; |
| 1230 | }; |
| 1231 | |
| 1232 | tpdm_ddr: tpdm@69e0000 { |
| 1233 | compatible = "arm,primecell"; |
| 1234 | arm,primecell-periphid = <0x0003b968>; |
| 1235 | reg = <0x69e0000 0x1000>; |
| 1236 | reg-names = "tpdm-base"; |
| 1237 | |
| 1238 | coresight-name = "coresight-tpdm-ddr"; |
| 1239 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 1240 | qcom,msr-fix-req; |
| 1241 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1242 | clocks = <&clock_aop QDSS_CLK>; |
| 1243 | clock-names = "apb_pclk"; |
| 1244 | |
| 1245 | port { |
| 1246 | tpdm_ddr_out_funnel_ddr_0: endpoint { |
| 1247 | remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>; |
| 1248 | }; |
| 1249 | }; |
| 1250 | }; |
| 1251 | |
| 1252 | tpdm_pimem: tpdm@6850000 { |
| 1253 | compatible = "arm,primecell"; |
| 1254 | arm,primecell-periphid = <0x0003b968>; |
| 1255 | reg = <0x6850000 0x1000>; |
| 1256 | reg-names = "tpdm-base"; |
| 1257 | |
| 1258 | coresight-name = "coresight-tpdm-pimem"; |
| 1259 | |
| 1260 | clocks = <&clock_aop QDSS_CLK>; |
| 1261 | clock-names = "apb_pclk"; |
| 1262 | |
| 1263 | port { |
| 1264 | tpdm_pimem_out_tpda: endpoint { |
| 1265 | remote-endpoint = <&tpda_in_tpdm_pimem>; |
| 1266 | }; |
| 1267 | }; |
| 1268 | }; |
| 1269 | |
| 1270 | tpdm_vsense: tpdm@6840000 { |
| 1271 | compatible = "arm,primecell"; |
| 1272 | arm,primecell-periphid = <0x0003b968>; |
| 1273 | reg = <0x6840000 0x1000>; |
| 1274 | reg-names = "tpdm-base"; |
| 1275 | |
| 1276 | coresight-name = "coresight-tpdm-vsense"; |
| 1277 | |
| 1278 | clocks = <&clock_aop QDSS_CLK>; |
| 1279 | clock-names = "apb_pclk"; |
| 1280 | |
| 1281 | port{ |
| 1282 | tpdm_vsense_out_tpda: endpoint { |
| 1283 | remote-endpoint = <&tpda_in_tpdm_vsense>; |
| 1284 | }; |
| 1285 | }; |
| 1286 | }; |
| 1287 | |
| 1288 | tpda_olc: tpda@7832000 { |
| 1289 | compatible = "arm,primecell"; |
| 1290 | arm,primecell-periphid = <0x0003b969>; |
| 1291 | reg = <0x7832000 0x1000>; |
| 1292 | reg-names = "tpda-base"; |
| 1293 | |
| 1294 | coresight-name = "coresight-tpda-olc"; |
| 1295 | |
| 1296 | qcom,tpda-atid = <69>; |
| 1297 | qcom,cmb-elem-size = <0 64>; |
| 1298 | |
| 1299 | clocks = <&clock_aop QDSS_CLK>; |
| 1300 | clock-names = "apb_pclk"; |
| 1301 | |
| 1302 | ports { |
| 1303 | #address-cells = <1>; |
| 1304 | #size-cells = <0>; |
| 1305 | port@0 { |
| 1306 | reg = <0>; |
| 1307 | tpda_olc_out_funnel_apss_merg: endpoint { |
| 1308 | remote-endpoint = |
| 1309 | <&funnel_apss_merg_in_tpda_olc>; |
| 1310 | }; |
| 1311 | }; |
| 1312 | port@1 { |
| 1313 | reg = <0>; |
| 1314 | tpda_olc_in_tpdm_olc: endpoint { |
| 1315 | slave-mode; |
| 1316 | remote-endpoint = |
| 1317 | <&tpdm_olc_out_tpda_olc>; |
| 1318 | }; |
| 1319 | }; |
| 1320 | }; |
| 1321 | }; |
| 1322 | |
| 1323 | tpdm_olc: tpdm@7830000 { |
| 1324 | compatible = "arm,primecell"; |
| 1325 | arm,primecell-periphid = <0x0003b968>; |
| 1326 | reg = <0x7830000 0x1000>; |
| 1327 | reg-names = "tpdm-base"; |
| 1328 | |
| 1329 | coresight-name = "coresight-tpdm-olc"; |
| 1330 | |
| 1331 | clocks = <&clock_aop QDSS_CLK>; |
| 1332 | clock-names = "apb_pclk"; |
| 1333 | |
| 1334 | port{ |
| 1335 | tpdm_olc_out_tpda_olc: endpoint { |
| 1336 | remote-endpoint = <&tpda_olc_in_tpdm_olc>; |
| 1337 | }; |
| 1338 | }; |
| 1339 | }; |
| 1340 | |
| 1341 | funnel_qatb: funnel@6005000 { |
| 1342 | compatible = "arm,primecell"; |
| 1343 | arm,primecell-periphid = <0x0003b908>; |
| 1344 | |
| 1345 | reg = <0x6005000 0x1000>; |
| 1346 | reg-names = "funnel-base"; |
| 1347 | |
| 1348 | coresight-name = "coresight-funnel-qatb"; |
| 1349 | |
| 1350 | clocks = <&clock_aop QDSS_CLK>; |
| 1351 | clock-names = "apb_pclk"; |
| 1352 | |
| 1353 | ports { |
| 1354 | #address-cells = <1>; |
| 1355 | #size-cells = <0>; |
| 1356 | |
| 1357 | port@0 { |
| 1358 | reg = <0>; |
| 1359 | funnel_qatb_out_funnel_in0: endpoint { |
| 1360 | remote-endpoint = |
| 1361 | <&funnel_in0_in_funnel_qatb>; |
| 1362 | }; |
| 1363 | }; |
| 1364 | |
| 1365 | port@1 { |
| 1366 | reg = <0>; |
| 1367 | funnel_qatb_in_tpda: endpoint { |
| 1368 | slave-mode; |
| 1369 | remote-endpoint = |
| 1370 | <&tpda_out_funnel_qatb>; |
| 1371 | }; |
| 1372 | }; |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1373 | |
| 1374 | port@2 { |
| 1375 | reg = <7>; |
| 1376 | funnel_qatb_in_funnel_turing_1: endpoint { |
| 1377 | slave-mode; |
| 1378 | remote-endpoint = |
| 1379 | <&funnel_turing_1_out_funnel_qatb>; |
| 1380 | }; |
| 1381 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1382 | }; |
| 1383 | }; |
| 1384 | |
| 1385 | cti0_ddr0: cti@69e1000 { |
| 1386 | compatible = "arm,primecell"; |
| 1387 | arm,primecell-periphid = <0x0003b966>; |
| 1388 | reg = <0x69e1000 0x1000>; |
| 1389 | reg-names = "cti-base"; |
| 1390 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1391 | coresight-name = "coresight-cti-ddr_dl_0_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1392 | |
| 1393 | clocks = <&clock_aop QDSS_CLK>; |
| 1394 | clock-names = "apb_pclk"; |
| 1395 | }; |
| 1396 | |
| 1397 | cti0_ddr1: cti@69e4000 { |
| 1398 | compatible = "arm,primecell"; |
| 1399 | arm,primecell-periphid = <0x0003b966>; |
| 1400 | reg = <0x69e4000 0x1000>; |
| 1401 | reg-names = "cti-base"; |
| 1402 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1403 | coresight-name = "coresight-cti-ddr_dl_1_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1404 | |
| 1405 | clocks = <&clock_aop QDSS_CLK>; |
| 1406 | clock-names = "apb_pclk"; |
| 1407 | }; |
| 1408 | |
| 1409 | cti1_ddr1: cti@69e5000 { |
| 1410 | compatible = "arm,primecell"; |
| 1411 | arm,primecell-periphid = <0x0003b966>; |
| 1412 | reg = <0x69e5000 0x1000>; |
| 1413 | reg-names = "cti-base"; |
| 1414 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1415 | coresight-name = "coresight-cti-ddr_dl_1_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1416 | |
| 1417 | clocks = <&clock_aop QDSS_CLK>; |
| 1418 | clock-names = "apb_pclk"; |
| 1419 | }; |
| 1420 | |
| 1421 | cti0_dlmm: cti@6c09000 { |
| 1422 | compatible = "arm,primecell"; |
| 1423 | arm,primecell-periphid = <0x0003b966>; |
| 1424 | reg = <0x6c09000 0x1000>; |
| 1425 | reg-names = "cti-base"; |
| 1426 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1427 | coresight-name = "coresight-cti-dlmm_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1428 | |
| 1429 | clocks = <&clock_aop QDSS_CLK>; |
| 1430 | clock-names = "apb_pclk"; |
| 1431 | }; |
| 1432 | |
| 1433 | cti1_dlmm: cti@6c0a000 { |
| 1434 | compatible = "arm,primecell"; |
| 1435 | arm,primecell-periphid = <0x0003b966>; |
| 1436 | reg = <0x6c0a000 0x1000>; |
| 1437 | reg-names = "cti-base"; |
| 1438 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1439 | coresight-name = "coresight-cti-dlmm_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1440 | |
| 1441 | clocks = <&clock_aop QDSS_CLK>; |
| 1442 | clock-names = "apb_pclk"; |
| 1443 | }; |
| 1444 | |
| 1445 | cti0_dlct: cti@6c29000 { |
| 1446 | compatible = "arm,primecell"; |
| 1447 | arm,primecell-periphid = <0x0003b966>; |
| 1448 | reg = <0x6c29000 0x1000>; |
| 1449 | reg-names = "cti-base"; |
| 1450 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1451 | coresight-name = "coresight-cti-dlct_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1452 | |
| 1453 | clocks = <&clock_aop QDSS_CLK>; |
| 1454 | clock-names = "apb_pclk"; |
| 1455 | }; |
| 1456 | |
| 1457 | cti1_dlct: cti@6c2a000 { |
| 1458 | compatible = "arm,primecell"; |
| 1459 | arm,primecell-periphid = <0x0003b966>; |
| 1460 | reg = <0x6c2a000 0x1000>; |
| 1461 | reg-names = "cti-base"; |
| 1462 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1463 | coresight-name = "coresight-cti-dlct_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1464 | |
| 1465 | clocks = <&clock_aop QDSS_CLK>; |
| 1466 | clock-names = "apb_pclk"; |
| 1467 | }; |
| 1468 | |
| 1469 | cti0_wcss: cti@69a4000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1470 | compatible = "arm,primecell"; |
| 1471 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1472 | reg = <0x69a4000 0x1000>; |
| 1473 | reg-names = "cti-base"; |
| 1474 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1475 | coresight-name = "coresight-cti-wcss_cti0"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1476 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1477 | |
| 1478 | clocks = <&clock_aop QDSS_CLK>; |
| 1479 | clock-names = "apb_pclk"; |
| 1480 | }; |
| 1481 | |
| 1482 | cti1_wcss: cti@69a5000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1483 | compatible = "arm,primecell"; |
| 1484 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1485 | reg = <0x69a5000 0x1000>; |
| 1486 | reg-names = "cti-base"; |
| 1487 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1488 | coresight-name = "coresight-cti-wcss_cti1"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1489 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1490 | |
| 1491 | clocks = <&clock_aop QDSS_CLK>; |
| 1492 | clock-names = "apb_pclk"; |
| 1493 | }; |
| 1494 | |
| 1495 | cti2_wcss: cti@69a6000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1496 | compatible = "arm,primecell"; |
| 1497 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1498 | reg = <0x69a6000 0x1000>; |
| 1499 | reg-names = "cti-base"; |
| 1500 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1501 | coresight-name = "coresight-cti-wcss_cti2"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1502 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1503 | |
| 1504 | clocks = <&clock_aop QDSS_CLK>; |
| 1505 | clock-names = "apb_pclk"; |
| 1506 | }; |
| 1507 | |
| 1508 | cti_mss_q6: cti@683b000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1509 | compatible = "arm,primecell"; |
| 1510 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1511 | reg = <0x683b000 0x1000>; |
| 1512 | reg-names = "cti-base"; |
| 1513 | |
| 1514 | coresight-name = "coresight-cti-mss-q6"; |
| 1515 | |
| 1516 | clocks = <&clock_aop QDSS_CLK>; |
| 1517 | clock-names = "apb_pclk"; |
| 1518 | }; |
| 1519 | |
| 1520 | cti_turing: cti@6867000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1521 | compatible = "arm,primecell"; |
| 1522 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1523 | reg = <0x6867000 0x1000>; |
| 1524 | reg-names = "cti-base"; |
| 1525 | |
| 1526 | coresight-name = "coresight-cti-turing"; |
| 1527 | |
| 1528 | clocks = <&clock_aop QDSS_CLK>; |
| 1529 | clock-names = "apb_pclk"; |
| 1530 | }; |
| 1531 | |
| 1532 | cti2_ssc_sdc: cti@6b10000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1533 | compatible = "arm,primecell"; |
| 1534 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1535 | reg = <0x6b10000 0x1000>; |
| 1536 | reg-names = "cti-base"; |
| 1537 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1538 | coresight-name = "coresight-cti-ssc_sdc_cti2"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1539 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1540 | |
| 1541 | clocks = <&clock_aop QDSS_CLK>; |
| 1542 | clock-names = "apb_pclk"; |
| 1543 | }; |
| 1544 | |
| 1545 | cti1_ssc: cti@6b11000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1546 | compatible = "arm,primecell"; |
| 1547 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1548 | reg = <0x6b11000 0x1000>; |
| 1549 | reg-names = "cti-base"; |
| 1550 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1551 | coresight-name = "coresight-cti-ssc_cti1"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1552 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1553 | |
| 1554 | clocks = <&clock_aop QDSS_CLK>; |
| 1555 | clock-names = "apb_pclk"; |
| 1556 | }; |
| 1557 | |
| 1558 | cti0_ssc_q6: cti@6b1b000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1559 | compatible = "arm,primecell"; |
| 1560 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1561 | reg = <0x6b1b000 0x1000>; |
| 1562 | reg-names = "cti-base"; |
| 1563 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1564 | coresight-name = "coresight-cti-ssc_q6_cti0"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1565 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1566 | |
| 1567 | clocks = <&clock_aop QDSS_CLK>; |
| 1568 | clock-names = "apb_pclk"; |
| 1569 | }; |
| 1570 | |
| 1571 | cti_ssc_noc: cti@6b1e000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1572 | compatible = "arm,primecell"; |
| 1573 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1574 | reg = <0x6b1e000 0x1000>; |
| 1575 | reg-names = "cti-base"; |
| 1576 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1577 | coresight-name = "coresight-cti-ssc_noc"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1578 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1579 | |
| 1580 | clocks = <&clock_aop QDSS_CLK>; |
| 1581 | clock-names = "apb_pclk"; |
| 1582 | }; |
| 1583 | |
| 1584 | cti6_ssc_noc: cti@6b1f000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1585 | compatible = "arm,primecell"; |
| 1586 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1587 | reg = <0x6b1f000 0x1000>; |
| 1588 | reg-names = "cti-base"; |
| 1589 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1590 | coresight-name = "coresight-cti-ssc_noc_cti6"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1591 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1592 | |
| 1593 | clocks = <&clock_aop QDSS_CLK>; |
| 1594 | clock-names = "apb_pclk"; |
| 1595 | }; |
| 1596 | |
| 1597 | cti0_swao: cti@6b04000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1598 | compatible = "arm,primecell"; |
| 1599 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1600 | reg = <0x6b04000 0x1000>; |
| 1601 | reg-names = "cti-base"; |
| 1602 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1603 | coresight-name = "coresight-cti-swao_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1604 | |
| 1605 | clocks = <&clock_aop QDSS_CLK>; |
| 1606 | clock-names = "apb_pclk"; |
| 1607 | }; |
| 1608 | |
| 1609 | cti1_swao: cti@6b05000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1610 | compatible = "arm,primecell"; |
| 1611 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1612 | reg = <0x6b05000 0x1000>; |
| 1613 | reg-names = "cti-base"; |
| 1614 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1615 | coresight-name = "coresight-cti-swao_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1616 | |
| 1617 | clocks = <&clock_aop QDSS_CLK>; |
| 1618 | clock-names = "apb_pclk"; |
| 1619 | }; |
| 1620 | |
| 1621 | cti2_swao: cti@6b06000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1622 | compatible = "arm,primecell"; |
| 1623 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1624 | reg = <0x6b06000 0x1000>; |
| 1625 | reg-names = "cti-base"; |
| 1626 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1627 | coresight-name = "coresight-cti-swao_cti2"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1628 | |
| 1629 | clocks = <&clock_aop QDSS_CLK>; |
| 1630 | clock-names = "apb_pclk"; |
| 1631 | }; |
| 1632 | |
| 1633 | cti3_swao: cti@6b07000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1634 | compatible = "arm,primecell"; |
| 1635 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1636 | reg = <0x6b07000 0x1000>; |
| 1637 | reg-names = "cti-base"; |
| 1638 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1639 | coresight-name = "coresight-cti-swao_cti3"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1640 | |
| 1641 | clocks = <&clock_aop QDSS_CLK>; |
| 1642 | clock-names = "apb_pclk"; |
| 1643 | }; |
| 1644 | |
| 1645 | cti_aop_m3: cti@6b21000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1646 | compatible = "arm,primecell"; |
| 1647 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1648 | reg = <0x6b21000 0x1000>; |
| 1649 | reg-names = "cti-base"; |
| 1650 | |
| 1651 | coresight-name = "coresight-cti-aop-m3"; |
| 1652 | |
| 1653 | clocks = <&clock_aop QDSS_CLK>; |
| 1654 | clock-names = "apb_pclk"; |
| 1655 | }; |
| 1656 | |
| 1657 | cti_titan: cti@6c13000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1658 | compatible = "arm,primecell"; |
| 1659 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1660 | reg = <0x6c13000 0x1000>; |
| 1661 | reg-names = "cti-base"; |
| 1662 | |
| 1663 | coresight-name = "coresight-cti-titan"; |
| 1664 | |
| 1665 | clocks = <&clock_aop QDSS_CLK>; |
| 1666 | clock-names = "apb_pclk"; |
| 1667 | }; |
| 1668 | |
| 1669 | cti_venus_arm9: cti@6c20000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1670 | compatible = "arm,primecell"; |
| 1671 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1672 | reg = <0x6c20000 0x1000>; |
| 1673 | reg-names = "cti-base"; |
| 1674 | |
| 1675 | coresight-name = "coresight-cti-venus-arm9"; |
| 1676 | |
| 1677 | clocks = <&clock_aop QDSS_CLK>; |
| 1678 | clock-names = "apb_pclk"; |
| 1679 | }; |
| 1680 | |
| 1681 | cti0_apss: cti@78e0000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1682 | compatible = "arm,primecell"; |
| 1683 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1684 | reg = <0x78e0000 0x1000>; |
| 1685 | reg-names = "cti-base"; |
| 1686 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1687 | coresight-name = "coresight-cti-apss_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1688 | |
| 1689 | clocks = <&clock_aop QDSS_CLK>; |
| 1690 | clock-names = "apb_pclk"; |
| 1691 | }; |
| 1692 | |
| 1693 | cti1_apss: cti@78f0000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1694 | compatible = "arm,primecell"; |
| 1695 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1696 | reg = <0x78f0000 0x1000>; |
| 1697 | reg-names = "cti-base"; |
| 1698 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1699 | coresight-name = "coresight-cti-apss_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1700 | |
| 1701 | clocks = <&clock_aop QDSS_CLK>; |
| 1702 | clock-names = "apb_pclk"; |
| 1703 | }; |
| 1704 | |
| 1705 | cti2_apss: cti@7900000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1706 | compatible = "arm,primecell"; |
| 1707 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1708 | reg = <0x7900000 0x1000>; |
| 1709 | reg-names = "cti-base"; |
| 1710 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1711 | coresight-name = "coresight-cti-apss_cti2"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1712 | |
| 1713 | clocks = <&clock_aop QDSS_CLK>; |
| 1714 | clock-names = "apb_pclk"; |
| 1715 | }; |
| 1716 | |
| 1717 | cti0: cti@6010000 { |
| 1718 | compatible = "arm,primecell"; |
| 1719 | arm,primecell-periphid = <0x0003b966>; |
| 1720 | reg = <0x6010000 0x1000>; |
| 1721 | reg-names = "cti-base"; |
| 1722 | |
| 1723 | coresight-name = "coresight-cti0"; |
| 1724 | |
| 1725 | clocks = <&clock_aop QDSS_CLK>; |
| 1726 | clock-names = "apb_pclk"; |
| 1727 | |
| 1728 | }; |
| 1729 | |
| 1730 | cti1: cti@6011000 { |
| 1731 | compatible = "arm,primecell"; |
| 1732 | arm,primecell-periphid = <0x0003b966>; |
| 1733 | reg = <0x6011000 0x1000>; |
| 1734 | reg-names = "cti-base"; |
| 1735 | |
| 1736 | coresight-name = "coresight-cti1"; |
| 1737 | |
| 1738 | clocks = <&clock_aop QDSS_CLK>; |
| 1739 | clock-names = "apb_pclk"; |
| 1740 | |
| 1741 | }; |
| 1742 | |
| 1743 | cti2: cti@6012000 { |
| 1744 | compatible = "arm,primecell"; |
| 1745 | arm,primecell-periphid = <0x0003b966>; |
| 1746 | reg = <0x6012000 0x1000>; |
| 1747 | reg-names = "cti-base"; |
| 1748 | |
| 1749 | coresight-name = "coresight-cti2"; |
| 1750 | |
| 1751 | clocks = <&clock_aop QDSS_CLK>; |
| 1752 | clock-names = "apb_pclk"; |
| 1753 | |
| 1754 | }; |
| 1755 | |
| 1756 | cti3: cti@6013000 { |
| 1757 | compatible = "arm,primecell"; |
| 1758 | arm,primecell-periphid = <0x0003b966>; |
| 1759 | reg = <0x6013000 0x1000>; |
| 1760 | reg-names = "cti-base"; |
| 1761 | |
| 1762 | coresight-name = "coresight-cti3"; |
| 1763 | |
| 1764 | clocks = <&clock_aop QDSS_CLK>; |
| 1765 | clock-names = "apb_pclk"; |
| 1766 | |
| 1767 | }; |
| 1768 | |
| 1769 | cti4: cti@6014000 { |
| 1770 | compatible = "arm,primecell"; |
| 1771 | arm,primecell-periphid = <0x0003b966>; |
| 1772 | reg = <0x6014000 0x1000>; |
| 1773 | reg-names = "cti-base"; |
| 1774 | |
| 1775 | coresight-name = "coresight-cti4"; |
| 1776 | |
| 1777 | clocks = <&clock_aop QDSS_CLK>; |
| 1778 | clock-names = "apb_pclk"; |
| 1779 | |
| 1780 | }; |
| 1781 | |
| 1782 | cti5: cti@6015000 { |
| 1783 | compatible = "arm,primecell"; |
| 1784 | arm,primecell-periphid = <0x0003b966>; |
| 1785 | reg = <0x6015000 0x1000>; |
| 1786 | reg-names = "cti-base"; |
| 1787 | |
| 1788 | coresight-name = "coresight-cti5"; |
| 1789 | |
| 1790 | clocks = <&clock_aop QDSS_CLK>; |
| 1791 | clock-names = "apb_pclk"; |
| 1792 | |
| 1793 | }; |
| 1794 | |
| 1795 | cti6: cti@6016000 { |
| 1796 | compatible = "arm,primecell"; |
| 1797 | arm,primecell-periphid = <0x0003b966>; |
| 1798 | reg = <0x6016000 0x1000>; |
| 1799 | reg-names = "cti-base"; |
| 1800 | |
| 1801 | coresight-name = "coresight-cti6"; |
| 1802 | |
| 1803 | clocks = <&clock_aop QDSS_CLK>; |
| 1804 | clock-names = "apb_pclk"; |
| 1805 | |
| 1806 | }; |
| 1807 | |
| 1808 | cti7: cti@6017000 { |
| 1809 | compatible = "arm,primecell"; |
| 1810 | arm,primecell-periphid = <0x0003b966>; |
| 1811 | reg = <0x6017000 0x1000>; |
| 1812 | reg-names = "cti-base"; |
| 1813 | |
| 1814 | coresight-name = "coresight-cti7"; |
| 1815 | |
| 1816 | clocks = <&clock_aop QDSS_CLK>; |
| 1817 | clock-names = "apb_pclk"; |
| 1818 | |
| 1819 | }; |
| 1820 | |
| 1821 | cti8: cti@6018000 { |
| 1822 | compatible = "arm,primecell"; |
| 1823 | arm,primecell-periphid = <0x0003b966>; |
| 1824 | reg = <0x6018000 0x1000>; |
| 1825 | reg-names = "cti-base"; |
| 1826 | |
| 1827 | coresight-name = "coresight-cti8"; |
| 1828 | |
| 1829 | clocks = <&clock_aop QDSS_CLK>; |
| 1830 | clock-names = "apb_pclk"; |
| 1831 | |
| 1832 | }; |
| 1833 | |
| 1834 | cti9: cti@6019000 { |
| 1835 | compatible = "arm,primecell"; |
| 1836 | arm,primecell-periphid = <0x0003b966>; |
| 1837 | reg = <0x6019000 0x1000>; |
| 1838 | reg-names = "cti-base"; |
| 1839 | |
| 1840 | coresight-name = "coresight-cti9"; |
| 1841 | |
| 1842 | clocks = <&clock_aop QDSS_CLK>; |
| 1843 | clock-names = "apb_pclk"; |
| 1844 | |
| 1845 | }; |
| 1846 | |
| 1847 | cti10: cti@601a000 { |
| 1848 | compatible = "arm,primecell"; |
| 1849 | arm,primecell-periphid = <0x0003b966>; |
| 1850 | reg = <0x601a000 0x1000>; |
| 1851 | reg-names = "cti-base"; |
| 1852 | |
| 1853 | coresight-name = "coresight-cti10"; |
| 1854 | |
| 1855 | clocks = <&clock_aop QDSS_CLK>; |
| 1856 | clock-names = "apb_pclk"; |
| 1857 | |
| 1858 | }; |
| 1859 | |
| 1860 | cti11: cti@601b000 { |
| 1861 | compatible = "arm,primecell"; |
| 1862 | arm,primecell-periphid = <0x0003b966>; |
| 1863 | reg = <0x601b000 0x1000>; |
| 1864 | reg-names = "cti-base"; |
| 1865 | |
| 1866 | coresight-name = "coresight-cti11"; |
| 1867 | |
| 1868 | clocks = <&clock_aop QDSS_CLK>; |
| 1869 | clock-names = "apb_pclk"; |
| 1870 | |
| 1871 | }; |
| 1872 | |
| 1873 | cti12: cti@601c000 { |
| 1874 | compatible = "arm,primecell"; |
| 1875 | arm,primecell-periphid = <0x0003b966>; |
| 1876 | reg = <0x601c000 0x1000>; |
| 1877 | reg-names = "cti-base"; |
| 1878 | |
| 1879 | coresight-name = "coresight-cti12"; |
| 1880 | |
| 1881 | clocks = <&clock_aop QDSS_CLK>; |
| 1882 | clock-names = "apb_pclk"; |
| 1883 | |
| 1884 | }; |
| 1885 | |
| 1886 | cti13: cti@601d000 { |
| 1887 | compatible = "arm,primecell"; |
| 1888 | arm,primecell-periphid = <0x0003b966>; |
| 1889 | reg = <0x601d000 0x1000>; |
| 1890 | reg-names = "cti-base"; |
| 1891 | |
| 1892 | coresight-name = "coresight-cti13"; |
| 1893 | |
| 1894 | clocks = <&clock_aop QDSS_CLK>; |
| 1895 | clock-names = "apb_pclk"; |
| 1896 | |
| 1897 | }; |
| 1898 | |
| 1899 | cti14: cti@601e000 { |
| 1900 | compatible = "arm,primecell"; |
| 1901 | arm,primecell-periphid = <0x0003b966>; |
| 1902 | reg = <0x601e000 0x1000>; |
| 1903 | reg-names = "cti-base"; |
| 1904 | |
| 1905 | coresight-name = "coresight-cti14"; |
| 1906 | |
| 1907 | clocks = <&clock_aop QDSS_CLK>; |
| 1908 | clock-names = "apb_pclk"; |
| 1909 | |
| 1910 | }; |
| 1911 | |
| 1912 | cti15: cti@601f000 { |
| 1913 | compatible = "arm,primecell"; |
| 1914 | arm,primecell-periphid = <0x0003b966>; |
| 1915 | reg = <0x601f000 0x1000>; |
| 1916 | reg-names = "cti-base"; |
| 1917 | |
| 1918 | coresight-name = "coresight-cti15"; |
| 1919 | |
| 1920 | clocks = <&clock_aop QDSS_CLK>; |
| 1921 | clock-names = "apb_pclk"; |
| 1922 | |
| 1923 | }; |
| 1924 | |
| 1925 | cti_cpu0: cti@7020000 { |
| 1926 | compatible = "arm,primecell"; |
| 1927 | arm,primecell-periphid = <0x0003b966>; |
| 1928 | reg = <0x7020000 0x1000>; |
| 1929 | reg-names = "cti-base"; |
| 1930 | |
| 1931 | coresight-name = "coresight-cti-cpu0"; |
| 1932 | cpu = <&CPU0>; |
| 1933 | |
| 1934 | clocks = <&clock_aop QDSS_CLK>; |
| 1935 | clock-names = "apb_pclk"; |
| 1936 | |
| 1937 | }; |
| 1938 | |
| 1939 | cti_cpu1: cti@7120000 { |
| 1940 | compatible = "arm,primecell"; |
| 1941 | arm,primecell-periphid = <0x0003b966>; |
| 1942 | reg = <0x7120000 0x1000>; |
| 1943 | reg-names = "cti-base"; |
| 1944 | |
| 1945 | coresight-name = "coresight-cti-cpu1"; |
| 1946 | cpu = <&CPU1>; |
| 1947 | |
| 1948 | clocks = <&clock_aop QDSS_CLK>; |
| 1949 | clock-names = "apb_pclk"; |
| 1950 | }; |
| 1951 | |
| 1952 | cti_cpu2: cti@7220000 { |
| 1953 | compatible = "arm,primecell"; |
| 1954 | arm,primecell-periphid = <0x0003b966>; |
| 1955 | reg = <0x7220000 0x1000>; |
| 1956 | reg-names = "cti-base"; |
| 1957 | |
| 1958 | coresight-name = "coresight-cti-cpu2"; |
| 1959 | cpu = <&CPU2>; |
| 1960 | |
| 1961 | clocks = <&clock_aop QDSS_CLK>; |
| 1962 | clock-names = "apb_pclk"; |
| 1963 | }; |
| 1964 | |
| 1965 | cti_cpu3: cti@7320000 { |
| 1966 | compatible = "arm,primecell"; |
| 1967 | arm,primecell-periphid = <0x0003b966>; |
| 1968 | reg = <0x7320000 0x1000>; |
| 1969 | reg-names = "cti-base"; |
| 1970 | |
| 1971 | coresight-name = "coresight-cti-cpu3"; |
| 1972 | cpu = <&CPU3>; |
| 1973 | |
| 1974 | clocks = <&clock_aop QDSS_CLK>; |
| 1975 | clock-names = "apb_pclk"; |
| 1976 | }; |
| 1977 | |
| 1978 | cti_cpu4: cti@7420000 { |
| 1979 | compatible = "arm,primecell"; |
| 1980 | arm,primecell-periphid = <0x0003b966>; |
| 1981 | reg = <0x7420000 0x1000>; |
| 1982 | reg-names = "cti-base"; |
| 1983 | |
| 1984 | coresight-name = "coresight-cti-cpu4"; |
| 1985 | cpu = <&CPU4>; |
| 1986 | |
| 1987 | clocks = <&clock_aop QDSS_CLK>; |
| 1988 | clock-names = "apb_pclk"; |
| 1989 | }; |
| 1990 | |
| 1991 | cti_cpu5: cti@7520000 { |
| 1992 | compatible = "arm,primecell"; |
| 1993 | arm,primecell-periphid = <0x0003b966>; |
| 1994 | reg = <0x7520000 0x1000>; |
| 1995 | reg-names = "cti-base"; |
| 1996 | |
| 1997 | coresight-name = "coresight-cti-cpu5"; |
| 1998 | cpu = <&CPU5>; |
| 1999 | |
| 2000 | clocks = <&clock_aop QDSS_CLK>; |
| 2001 | clock-names = "apb_pclk"; |
| 2002 | }; |
| 2003 | |
| 2004 | cti_cpu6: cti@7620000 { |
| 2005 | compatible = "arm,primecell"; |
| 2006 | arm,primecell-periphid = <0x0003b966>; |
| 2007 | reg = <0x7620000 0x1000>; |
| 2008 | reg-names = "cti-base"; |
| 2009 | |
| 2010 | coresight-name = "coresight-cti-cpu6"; |
| 2011 | cpu = <&CPU6>; |
| 2012 | |
| 2013 | clocks = <&clock_aop QDSS_CLK>; |
| 2014 | clock-names = "apb_pclk"; |
| 2015 | }; |
| 2016 | |
| 2017 | cti_cpu7: cti@7720000 { |
| 2018 | compatible = "arm,primecell"; |
| 2019 | arm,primecell-periphid = <0x0003b966>; |
| 2020 | reg = <0x7720000 0x1000>; |
| 2021 | reg-names = "cti-base"; |
| 2022 | |
| 2023 | coresight-name = "coresight-cti-cpu7"; |
| 2024 | cpu = <&CPU7>; |
| 2025 | |
| 2026 | clocks = <&clock_aop QDSS_CLK>; |
| 2027 | clock-names = "apb_pclk"; |
| 2028 | }; |
| 2029 | |
| 2030 | turing_etm0 { |
| 2031 | compatible = "qcom,coresight-remote-etm"; |
| 2032 | |
| 2033 | coresight-name = "coresight-turing-etm0"; |
| 2034 | qcom,inst-id = <13>; |
| 2035 | |
| 2036 | port{ |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 2037 | turing_etm0_out_funnel_turing_1: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2038 | remote-endpoint = |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 2039 | <&funnel_turing_1_in_turing_etm0>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2040 | }; |
| 2041 | }; |
| 2042 | }; |
| 2043 | |
| 2044 | modem_etm0 { |
| 2045 | compatible = "qcom,coresight-remote-etm"; |
| 2046 | |
| 2047 | coresight-name = "coresight-modem-etm0"; |
| 2048 | qcom,inst-id = <2>; |
| 2049 | |
| 2050 | port { |
| 2051 | modem_etm0_out_funnel_in2: endpoint { |
| 2052 | remote-endpoint = |
| 2053 | <&funnel_in2_in_modem_etm0>; |
| 2054 | }; |
| 2055 | }; |
| 2056 | }; |
| 2057 | |
Saranya Chidura | f2d195e | 2017-10-18 11:06:15 +0530 | [diff] [blame] | 2058 | audio_etm0 { |
| 2059 | compatible = "qcom,coresight-remote-etm"; |
| 2060 | |
| 2061 | coresight-name = "coresight-audio-etm0"; |
Saranya Chidura | 47b9b82 | 2017-11-06 16:11:06 +0530 | [diff] [blame] | 2062 | qcom,inst-id = <5>; |
Saranya Chidura | f2d195e | 2017-10-18 11:06:15 +0530 | [diff] [blame] | 2063 | |
| 2064 | port { |
| 2065 | audio_etm0_out_funnel_in1: endpoint { |
| 2066 | remote-endpoint = |
| 2067 | <&funnel_in1_in_audio_etm0>; |
| 2068 | }; |
| 2069 | }; |
| 2070 | }; |
| 2071 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2072 | funnel_apss_merg: funnel@7810000 { |
| 2073 | compatible = "arm,primecell"; |
| 2074 | arm,primecell-periphid = <0x0003b908>; |
| 2075 | |
| 2076 | reg = <0x7810000 0x1000>; |
| 2077 | reg-names = "funnel-base"; |
| 2078 | |
| 2079 | coresight-name = "coresight-funnel-apss-merg"; |
| 2080 | |
| 2081 | clocks = <&clock_aop QDSS_CLK>; |
| 2082 | clock-names = "apb_pclk"; |
| 2083 | |
| 2084 | ports { |
| 2085 | #address-cells = <1>; |
| 2086 | #size-cells = <0>; |
| 2087 | |
| 2088 | port@0 { |
| 2089 | reg = <0>; |
| 2090 | funnel_apss_merg_out_funnel_in2: endpoint { |
| 2091 | remote-endpoint = |
| 2092 | <&funnel_in2_in_funnel_apss_merg>; |
| 2093 | }; |
| 2094 | }; |
| 2095 | |
| 2096 | port@1 { |
| 2097 | reg = <0>; |
| 2098 | funnel_apss_merg_in_funnel_apss: endpoint { |
| 2099 | slave-mode; |
| 2100 | remote-endpoint = |
| 2101 | <&funnel_apss_out_funnel_apss_merg>; |
| 2102 | }; |
| 2103 | }; |
| 2104 | |
| 2105 | port@2 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 2106 | reg = <2>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2107 | funnel_apss_merg_in_tpda_olc: endpoint { |
| 2108 | slave-mode; |
| 2109 | remote-endpoint = |
| 2110 | <&tpda_olc_out_funnel_apss_merg>; |
| 2111 | }; |
| 2112 | }; |
| 2113 | |
| 2114 | port@3 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 2115 | reg = <4>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2116 | funnel_apss_merg_in_tpda_apss: endpoint { |
| 2117 | slave-mode; |
| 2118 | remote-endpoint = |
| 2119 | <&tpda_apss_out_funnel_apss_merg>; |
| 2120 | }; |
| 2121 | }; |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 2122 | port@4 { |
| 2123 | reg = <5>; |
| 2124 | funnel_apss_merg_in_tpda_llm_silver: endpoint { |
| 2125 | slave-mode; |
| 2126 | remote-endpoint = |
| 2127 | <&tpda_llm_silver_out_funnel_apss_merg>; |
| 2128 | }; |
| 2129 | }; |
| 2130 | port@5 { |
| 2131 | reg = <6>; |
| 2132 | funnel_apss_merg_in_tpda_llm_gold: endpoint { |
| 2133 | slave-mode; |
| 2134 | remote-endpoint = |
| 2135 | <&tpda_llm_gold_out_funnel_apss_merg>; |
| 2136 | }; |
| 2137 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2138 | }; |
| 2139 | }; |
| 2140 | |
| 2141 | etm0: etm@7040000 { |
| 2142 | compatible = "arm,primecell"; |
| 2143 | arm,primecell-periphid = <0x000bb95d>; |
| 2144 | |
| 2145 | reg = <0x7040000 0x1000>; |
| 2146 | cpu = <&CPU0>; |
| 2147 | |
| 2148 | coresight-name = "coresight-etm0"; |
| 2149 | |
| 2150 | clocks = <&clock_aop QDSS_CLK>; |
| 2151 | clock-names = "apb_pclk"; |
| 2152 | |
| 2153 | port { |
| 2154 | etm0_out_funnel_apss: endpoint { |
| 2155 | remote-endpoint = <&funnel_apss_in_etm0>; |
| 2156 | }; |
| 2157 | }; |
| 2158 | }; |
| 2159 | |
| 2160 | etm1: etm@7140000 { |
| 2161 | compatible = "arm,primecell"; |
| 2162 | arm,primecell-periphid = <0x000bb95d>; |
| 2163 | |
| 2164 | reg = <0x7140000 0x1000>; |
| 2165 | cpu = <&CPU1>; |
| 2166 | |
| 2167 | coresight-name = "coresight-etm1"; |
| 2168 | |
| 2169 | clocks = <&clock_aop QDSS_CLK>; |
| 2170 | clock-names = "apb_pclk"; |
| 2171 | |
| 2172 | port { |
| 2173 | etm1_out_funnel_apss: endpoint { |
| 2174 | remote-endpoint = <&funnel_apss_in_etm1>; |
| 2175 | }; |
| 2176 | }; |
| 2177 | }; |
| 2178 | |
| 2179 | etm2: etm@7240000 { |
| 2180 | compatible = "arm,primecell"; |
| 2181 | arm,primecell-periphid = <0x000bb95d>; |
| 2182 | |
| 2183 | reg = <0x7240000 0x1000>; |
| 2184 | cpu = <&CPU2>; |
| 2185 | |
| 2186 | coresight-name = "coresight-etm2"; |
| 2187 | |
| 2188 | clocks = <&clock_aop QDSS_CLK>; |
| 2189 | clock-names = "apb_pclk"; |
| 2190 | |
| 2191 | port { |
| 2192 | etm2_out_funnel_apss: endpoint { |
| 2193 | remote-endpoint = <&funnel_apss_in_etm2>; |
| 2194 | }; |
| 2195 | }; |
| 2196 | }; |
| 2197 | |
| 2198 | etm3: etm@7340000 { |
| 2199 | compatible = "arm,primecell"; |
| 2200 | arm,primecell-periphid = <0x000bb95d>; |
| 2201 | |
| 2202 | reg = <0x7340000 0x1000>; |
| 2203 | cpu = <&CPU3>; |
| 2204 | |
| 2205 | coresight-name = "coresight-etm3"; |
| 2206 | |
| 2207 | clocks = <&clock_aop QDSS_CLK>; |
| 2208 | clock-names = "apb_pclk"; |
| 2209 | |
| 2210 | port { |
| 2211 | etm3_out_funnel_apss: endpoint { |
| 2212 | remote-endpoint = <&funnel_apss_in_etm3>; |
| 2213 | }; |
| 2214 | }; |
| 2215 | }; |
| 2216 | |
| 2217 | etm4: etm@7440000 { |
| 2218 | compatible = "arm,primecell"; |
| 2219 | arm,primecell-periphid = <0x000bb95d>; |
| 2220 | |
| 2221 | reg = <0x7440000 0x1000>; |
| 2222 | cpu = <&CPU4>; |
| 2223 | |
| 2224 | coresight-name = "coresight-etm4"; |
| 2225 | |
| 2226 | clocks = <&clock_aop QDSS_CLK>; |
| 2227 | clock-names = "apb_pclk"; |
| 2228 | |
| 2229 | port { |
| 2230 | etm4_out_funnel_apss: endpoint { |
| 2231 | remote-endpoint = <&funnel_apss_in_etm4>; |
| 2232 | }; |
| 2233 | }; |
| 2234 | }; |
| 2235 | |
| 2236 | etm5: etm@7540000 { |
| 2237 | compatible = "arm,primecell"; |
| 2238 | arm,primecell-periphid = <0x000bb95d>; |
| 2239 | |
| 2240 | reg = <0x7540000 0x1000>; |
| 2241 | cpu = <&CPU5>; |
| 2242 | |
| 2243 | coresight-name = "coresight-etm5"; |
| 2244 | |
| 2245 | clocks = <&clock_aop QDSS_CLK>; |
| 2246 | clock-names = "apb_pclk"; |
| 2247 | |
| 2248 | port { |
| 2249 | etm5_out_funnel_apss: endpoint { |
| 2250 | remote-endpoint = <&funnel_apss_in_etm5>; |
| 2251 | }; |
| 2252 | }; |
| 2253 | }; |
| 2254 | |
| 2255 | etm6: etm@7640000 { |
| 2256 | compatible = "arm,primecell"; |
| 2257 | arm,primecell-periphid = <0x000bb95d>; |
| 2258 | |
| 2259 | reg = <0x7640000 0x1000>; |
| 2260 | cpu = <&CPU6>; |
| 2261 | |
| 2262 | coresight-name = "coresight-etm6"; |
| 2263 | |
| 2264 | clocks = <&clock_aop QDSS_CLK>; |
| 2265 | clock-names = "apb_pclk"; |
| 2266 | |
| 2267 | port { |
| 2268 | etm6_out_funnel_apss: endpoint { |
| 2269 | remote-endpoint = <&funnel_apss_in_etm6>; |
| 2270 | }; |
| 2271 | }; |
| 2272 | }; |
| 2273 | |
| 2274 | etm7: etm@7740000 { |
| 2275 | compatible = "arm,primecell"; |
| 2276 | arm,primecell-periphid = <0x000bb95d>; |
| 2277 | |
| 2278 | reg = <0x7740000 0x1000>; |
| 2279 | cpu = <&CPU7>; |
| 2280 | |
| 2281 | coresight-name = "coresight-etm7"; |
| 2282 | |
| 2283 | clocks = <&clock_aop QDSS_CLK>; |
| 2284 | clock-names = "apb_pclk"; |
| 2285 | |
| 2286 | port { |
| 2287 | etm7_out_funnel_apss: endpoint { |
| 2288 | remote-endpoint = <&funnel_apss_in_etm7>; |
| 2289 | }; |
| 2290 | }; |
| 2291 | }; |
| 2292 | |
Saranya Chidura | 32681b4 | 2017-11-07 12:25:20 +0530 | [diff] [blame] | 2293 | ipcb_tgu: tgu@6b0c000 { |
| 2294 | compatible = "arm,primecell"; |
| 2295 | arm,primecell-periphid = <0x0003b999>; |
| 2296 | reg = <0x6b0c000 0x1000>; |
| 2297 | reg-names = "tgu-base"; |
| 2298 | tgu-steps = <3>; |
| 2299 | tgu-conditions = <4>; |
| 2300 | tgu-regs = <4>; |
| 2301 | tgu-timer-counters = <8>; |
| 2302 | |
| 2303 | coresight-name = "coresight-tgu-ipcb"; |
| 2304 | |
| 2305 | clocks = <&clock_aop QDSS_CLK>; |
| 2306 | clock-names = "apb_pclk"; |
| 2307 | }; |
| 2308 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2309 | funnel_apss: funnel@7800000 { |
| 2310 | compatible = "arm,primecell"; |
| 2311 | arm,primecell-periphid = <0x0003b908>; |
| 2312 | |
| 2313 | reg = <0x7800000 0x1000>; |
| 2314 | reg-names = "funnel-base"; |
| 2315 | |
| 2316 | coresight-name = "coresight-funnel-apss"; |
| 2317 | |
| 2318 | clocks = <&clock_aop QDSS_CLK>; |
| 2319 | clock-names = "apb_pclk"; |
| 2320 | |
| 2321 | ports { |
| 2322 | #address-cells = <1>; |
| 2323 | #size-cells = <0>; |
| 2324 | |
| 2325 | port@0 { |
| 2326 | reg = <0>; |
| 2327 | funnel_apss_out_funnel_apss_merg: endpoint { |
| 2328 | remote-endpoint = |
| 2329 | <&funnel_apss_merg_in_funnel_apss>; |
| 2330 | }; |
| 2331 | }; |
| 2332 | port@1 { |
| 2333 | reg = <0>; |
| 2334 | funnel_apss_in_etm0: endpoint { |
| 2335 | slave-mode; |
| 2336 | remote-endpoint = |
| 2337 | <&etm0_out_funnel_apss>; |
| 2338 | }; |
| 2339 | }; |
| 2340 | |
| 2341 | port@2 { |
| 2342 | reg = <1>; |
| 2343 | funnel_apss_in_etm1: endpoint { |
| 2344 | slave-mode; |
| 2345 | remote-endpoint = |
| 2346 | <&etm1_out_funnel_apss>; |
| 2347 | }; |
| 2348 | }; |
| 2349 | |
| 2350 | port@3 { |
| 2351 | reg = <2>; |
| 2352 | funnel_apss_in_etm2: endpoint { |
| 2353 | slave-mode; |
| 2354 | remote-endpoint = |
| 2355 | <&etm2_out_funnel_apss>; |
| 2356 | }; |
| 2357 | }; |
| 2358 | |
| 2359 | port@4 { |
| 2360 | reg = <3>; |
| 2361 | funnel_apss_in_etm3: endpoint { |
| 2362 | slave-mode; |
| 2363 | remote-endpoint = |
| 2364 | <&etm3_out_funnel_apss>; |
| 2365 | }; |
| 2366 | }; |
| 2367 | |
| 2368 | port@5 { |
| 2369 | reg = <4>; |
| 2370 | funnel_apss_in_etm4: endpoint { |
| 2371 | slave-mode; |
| 2372 | remote-endpoint = |
| 2373 | <&etm4_out_funnel_apss>; |
| 2374 | }; |
| 2375 | }; |
| 2376 | |
| 2377 | port@6 { |
| 2378 | reg = <5>; |
| 2379 | funnel_apss_in_etm5: endpoint { |
| 2380 | slave-mode; |
| 2381 | remote-endpoint = |
| 2382 | <&etm5_out_funnel_apss>; |
| 2383 | }; |
| 2384 | }; |
| 2385 | |
| 2386 | port@7 { |
| 2387 | reg = <6>; |
| 2388 | funnel_apss_in_etm6: endpoint { |
| 2389 | slave-mode; |
| 2390 | remote-endpoint = |
| 2391 | <&etm6_out_funnel_apss>; |
| 2392 | }; |
| 2393 | }; |
| 2394 | |
| 2395 | port@8 { |
| 2396 | reg = <7>; |
| 2397 | funnel_apss_in_etm7: endpoint { |
| 2398 | slave-mode; |
| 2399 | remote-endpoint = |
| 2400 | <&etm7_out_funnel_apss>; |
| 2401 | }; |
| 2402 | }; |
| 2403 | }; |
| 2404 | }; |
| 2405 | }; |