blob: 5fbb01335a0f6d7576e1b56caae212068f50316e [file] [log] [blame]
Tomasz Figa15dfdfa2013-07-24 13:41:45 +09001/*
2 * Samsung's Exynos4412 based Trats 2 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's Trats 2 board which is based on
8 * Samsung's Exynos4412 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16#include "exynos4412.dtsi"
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +090017#include <dt-bindings/gpio/gpio.h>
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090018
19/ {
20 model = "Samsung Trats 2 based on Exynos4412";
Sachin Kamat8bdb31b2014-03-21 02:17:22 +090021 compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4";
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090022
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +090023 aliases {
Tomasz Stanislawski6af2ba92014-05-09 05:58:59 +090024 i2c9 = &i2c_ak8975;
Beomho Seo85cb4e02014-05-22 07:56:53 +090025 i2c10 = &i2c_cm36651;
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +090026 i2c11 = &i2c_max77693;
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +090027 };
28
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090029 memory {
30 reg = <0x40000000 0x40000000>;
31 };
32
33 chosen {
34 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
Tomasz Figa62d38092015-01-23 14:47:42 +010035 stdout-path = &serial_2;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090036 };
37
38 firmware@0204F000 {
39 compatible = "samsung,secure-firmware";
40 reg = <0x0204F000 0x1000>;
41 };
42
43 fixed-rate-clocks {
44 xxti {
45 compatible = "samsung,clock-xxti", "fixed-clock";
46 clock-frequency = <0>;
47 };
48
49 xusbxti {
50 compatible = "samsung,clock-xusbxti", "fixed-clock";
51 clock-frequency = <24000000>;
52 };
53 };
54
55 regulators {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 vemmc_reg: regulator-0 {
61 compatible = "regulator-fixed";
62 regulator-name = "VMEM_VDD_2.8V";
63 regulator-min-microvolt = <2800000>;
64 regulator-max-microvolt = <2800000>;
65 gpio = <&gpk0 2 0>;
66 enable-active-high;
67 };
68
Sylwester Nawrockib4fec642013-08-06 02:49:44 +090069 cam_io_reg: voltage-regulator-1 {
70 compatible = "regulator-fixed";
71 regulator-name = "CAM_SENSOR_A";
72 regulator-min-microvolt = <2800000>;
73 regulator-max-microvolt = <2800000>;
74 gpio = <&gpm0 2 0>;
75 enable-active-high;
76 };
77
Andrzej Hajda420ae842014-03-28 12:52:45 +010078 lcd_vdd3_reg: voltage-regulator-2 {
79 compatible = "regulator-fixed";
80 regulator-name = "LCD_VDD_2.2V";
81 regulator-min-microvolt = <2200000>;
82 regulator-max-microvolt = <2200000>;
83 gpio = <&gpc0 1 0>;
84 enable-active-high;
85 };
86
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +090087 cam_af_reg: voltage-regulator-3 {
88 compatible = "regulator-fixed";
89 regulator-name = "CAM_AF";
90 regulator-min-microvolt = <2800000>;
91 regulator-max-microvolt = <2800000>;
92 gpio = <&gpm0 4 0>;
93 enable-active-high;
94 };
95
96 cam_isp_core_reg: voltage-regulator-4 {
97 compatible = "regulator-fixed";
98 regulator-name = "CAM_ISP_CORE_1.2V_EN";
99 regulator-min-microvolt = <1200000>;
100 regulator-max-microvolt = <1200000>;
101 gpio = <&gpm0 3 0>;
102 enable-active-high;
103 regulator-always-on;
104 };
Beomho Seo85cb4e02014-05-22 07:56:53 +0900105
106 ps_als_reg: voltage-regulator-5 {
107 compatible = "regulator-fixed";
108 regulator-name = "LED_A_3.0V";
109 regulator-min-microvolt = <3000000>;
110 regulator-max-microvolt = <3000000>;
111 gpio = <&gpj0 5 0>;
112 enable-active-high;
113 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900114 };
115
116 gpio-keys {
117 compatible = "gpio-keys";
118
119 key-down {
Beomho Seo172ff6c2014-05-22 07:57:39 +0900120 gpios = <&gpx3 3 1>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900121 linux,code = <114>;
122 label = "volume down";
123 debounce-interval = <10>;
124 };
125
126 key-up {
Beomho Seo172ff6c2014-05-22 07:57:39 +0900127 gpios = <&gpx2 2 1>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900128 linux,code = <115>;
129 label = "volume up";
130 debounce-interval = <10>;
131 };
132
133 key-power {
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900134 gpios = <&gpx2 7 1>;
135 linux,code = <116>;
136 label = "power";
137 debounce-interval = <10>;
138 gpio-key,wakeup;
139 };
Beomho Seo172ff6c2014-05-22 07:57:39 +0900140
141 key-ok {
142 gpios = <&gpx0 1 1>;
143 linux,code = <139>;
144 label = "ok";
145 debounce-inteval = <10>;
146 gpio-key,wakeup;
147 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900148 };
149
Chanwoo Choi4f423782014-03-18 06:25:59 +0900150 adc: adc@126C0000 {
151 vdd-supply = <&ldo3_reg>;
152 status = "okay";
153 };
154
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900155 i2c@13890000 {
156 samsung,i2c-sda-delay = <100>;
157 samsung,i2c-slave-addr = <0x10>;
158 samsung,i2c-max-bus-freq = <400000>;
159 pinctrl-0 = <&i2c3_bus>;
160 pinctrl-names = "default";
161 status = "okay";
162
163 mms114-touchscreen@48 {
164 compatible = "melfas,mms114";
165 reg = <0x48>;
166 interrupt-parent = <&gpm2>;
167 interrupts = <3 2>;
168 x-size = <720>;
169 y-size = <1280>;
170 avdd-supply = <&ldo23_reg>;
171 vdd-supply = <&ldo24_reg>;
172 };
173 };
174
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900175 i2c_0: i2c@13860000 {
176 samsung,i2c-sda-delay = <100>;
177 samsung,i2c-slave-addr = <0x10>;
178 samsung,i2c-max-bus-freq = <400000>;
179 pinctrl-0 = <&i2c0_bus>;
180 pinctrl-names = "default";
181 status = "okay";
182
183 s5c73m3@3c {
184 compatible = "samsung,s5c73m3";
185 reg = <0x3c>;
186 standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */
187 xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */
188 vdd-int-supply = <&buck9_reg>;
189 vddio-cis-supply = <&ldo9_reg>;
190 vdda-supply = <&ldo17_reg>;
191 vddio-host-supply = <&ldo18_reg>;
192 vdd-af-supply = <&cam_af_reg>;
193 vdd-reg-supply = <&cam_io_reg>;
194 clock-frequency = <24000000>;
195 /* CAM_A_CLKOUT */
196 clocks = <&camera 0>;
197 clock-names = "cis_extclk";
198 port {
199 s5c73m3_ep: endpoint {
200 remote-endpoint = <&csis0_ep>;
201 data-lanes = <1 2 3 4>;
202 };
203 };
204 };
205 };
206
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900207 i2c@138D0000 {
208 samsung,i2c-sda-delay = <100>;
209 samsung,i2c-slave-addr = <0x10>;
210 samsung,i2c-max-bus-freq = <100000>;
211 pinctrl-0 = <&i2c7_bus>;
212 pinctrl-names = "default";
213 status = "okay";
214
215 max77686_pmic@09 {
216 compatible = "maxim,max77686";
217 interrupt-parent = <&gpx0>;
218 interrupts = <7 0>;
219 reg = <0x09>;
Tomasz Figaada12c42013-12-12 17:07:21 +0100220 #clock-cells = <1>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900221
222 voltage-regulators {
223 ldo1_reg: ldo1 {
224 regulator-compatible = "LDO1";
225 regulator-name = "VALIVE_1.0V_AP";
226 regulator-min-microvolt = <1000000>;
227 regulator-max-microvolt = <1000000>;
228 regulator-always-on;
229 regulator-mem-on;
230 };
231
232 ldo2_reg: ldo2 {
233 regulator-compatible = "LDO2";
234 regulator-name = "VM1M2_1.2V_AP";
235 regulator-min-microvolt = <1200000>;
236 regulator-max-microvolt = <1200000>;
237 regulator-always-on;
238 regulator-mem-on;
239 };
240
241 ldo3_reg: ldo3 {
242 regulator-compatible = "LDO3";
243 regulator-name = "VCC_1.8V_AP";
244 regulator-min-microvolt = <1800000>;
245 regulator-max-microvolt = <1800000>;
246 regulator-always-on;
247 regulator-mem-on;
248 };
249
250 ldo4_reg: ldo4 {
251 regulator-compatible = "LDO4";
252 regulator-name = "VCC_2.8V_AP";
253 regulator-min-microvolt = <2800000>;
254 regulator-max-microvolt = <2800000>;
255 regulator-always-on;
256 regulator-mem-on;
257 };
258
259 ldo5_reg: ldo5 {
260 regulator-compatible = "LDO5";
261 regulator-name = "VCC_1.8V_IO";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 regulator-always-on;
265 regulator-mem-on;
266 };
267
268 ldo6_reg: ldo6 {
269 regulator-compatible = "LDO6";
270 regulator-name = "VMPLL_1.0V_AP";
271 regulator-min-microvolt = <1000000>;
272 regulator-max-microvolt = <1000000>;
273 regulator-always-on;
274 regulator-mem-on;
275 };
276
277 ldo7_reg: ldo7 {
278 regulator-compatible = "LDO7";
279 regulator-name = "VPLL_1.0V_AP";
280 regulator-min-microvolt = <1000000>;
281 regulator-max-microvolt = <1000000>;
282 regulator-always-on;
283 regulator-mem-on;
284 };
285
286 ldo8_reg: ldo8 {
287 regulator-compatible = "LDO8";
288 regulator-name = "VMIPI_1.0V";
289 regulator-min-microvolt = <1000000>;
290 regulator-max-microvolt = <1000000>;
291 regulator-mem-off;
292 };
293
294 ldo9_reg: ldo9 {
295 regulator-compatible = "LDO9";
296 regulator-name = "CAM_ISP_MIPI_1.2V";
297 regulator-min-microvolt = <1200000>;
298 regulator-max-microvolt = <1200000>;
299 regulator-mem-idle;
300 };
301
302 ldo10_reg: ldo10 {
303 regulator-compatible = "LDO10";
304 regulator-name = "VMIPI_1.8V";
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-mem-off;
308 };
309
310 ldo11_reg: ldo11 {
311 regulator-compatible = "LDO11";
312 regulator-name = "VABB1_1.95V";
313 regulator-min-microvolt = <1950000>;
314 regulator-max-microvolt = <1950000>;
315 regulator-always-on;
316 regulator-mem-off;
317 };
318
319 ldo12_reg: ldo12 {
320 regulator-compatible = "LDO12";
321 regulator-name = "VUOTG_3.0V";
322 regulator-min-microvolt = <3000000>;
323 regulator-max-microvolt = <3000000>;
324 regulator-mem-off;
325 };
326
327 ldo13_reg: ldo13 {
328 regulator-compatible = "LDO13";
329 regulator-name = "NFC_AVDD_1.8V";
330 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <1800000>;
332 regulator-mem-idle;
333 };
334
335 ldo14_reg: ldo14 {
336 regulator-compatible = "LDO14";
337 regulator-name = "VABB2_1.95V";
338 regulator-min-microvolt = <1950000>;
339 regulator-max-microvolt = <1950000>;
340 regulator-always-on;
341 regulator-mem-off;
342 };
343
344 ldo15_reg: ldo15 {
345 regulator-compatible = "LDO15";
346 regulator-name = "VHSIC_1.0V";
347 regulator-min-microvolt = <1000000>;
348 regulator-max-microvolt = <1000000>;
349 regulator-mem-off;
350 };
351
352 ldo16_reg: ldo16 {
353 regulator-compatible = "LDO16";
354 regulator-name = "VHSIC_1.8V";
355 regulator-min-microvolt = <1800000>;
356 regulator-max-microvolt = <1800000>;
357 regulator-mem-off;
358 };
359
360 ldo17_reg: ldo17 {
361 regulator-compatible = "LDO17";
362 regulator-name = "CAM_SENSOR_CORE_1.2V";
363 regulator-min-microvolt = <1200000>;
364 regulator-max-microvolt = <1200000>;
365 regulator-mem-idle;
366 };
367
368 ldo18_reg: ldo18 {
369 regulator-compatible = "LDO18";
370 regulator-name = "CAM_ISP_SEN_IO_1.8V";
371 regulator-min-microvolt = <1800000>;
372 regulator-max-microvolt = <1800000>;
373 regulator-mem-idle;
374 };
375
376 ldo19_reg: ldo19 {
377 regulator-compatible = "LDO19";
378 regulator-name = "VT_CAM_1.8V";
379 regulator-min-microvolt = <1800000>;
380 regulator-max-microvolt = <1800000>;
381 regulator-mem-idle;
382 };
383
384 ldo20_reg: ldo20 {
385 regulator-compatible = "LDO20";
386 regulator-name = "VDDQ_PRE_1.8V";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
389 regulator-mem-idle;
390 };
391
392 ldo21_reg: ldo21 {
393 regulator-compatible = "LDO21";
394 regulator-name = "VTF_2.8V";
395 regulator-min-microvolt = <2800000>;
396 regulator-max-microvolt = <2800000>;
397 regulator-mem-idle;
398 };
399
400 ldo22_reg: ldo22 {
401 regulator-compatible = "LDO22";
402 regulator-name = "VMEM_VDD_2.8V";
403 regulator-min-microvolt = <2800000>;
404 regulator-max-microvolt = <2800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900405 };
406
407 ldo23_reg: ldo23 {
408 regulator-compatible = "LDO23";
409 regulator-name = "TSP_AVDD_3.3V";
410 regulator-min-microvolt = <3300000>;
411 regulator-max-microvolt = <3300000>;
412 regulator-mem-idle;
413 };
414
415 ldo24_reg: ldo24 {
416 regulator-compatible = "LDO24";
417 regulator-name = "TSP_VDD_1.8V";
418 regulator-min-microvolt = <1800000>;
419 regulator-max-microvolt = <1800000>;
420 regulator-mem-idle;
421 };
422
423 ldo25_reg: ldo25 {
424 regulator-compatible = "LDO25";
425 regulator-name = "LCD_VCC_3.3V";
426 regulator-min-microvolt = <2800000>;
427 regulator-max-microvolt = <2800000>;
428 regulator-mem-idle;
429 };
430
431 ldo26_reg: ldo26 {
432 regulator-compatible = "LDO26";
433 regulator-name = "MOTOR_VCC_3.0V";
434 regulator-min-microvolt = <3000000>;
435 regulator-max-microvolt = <3000000>;
436 regulator-mem-idle;
437 };
438
439 buck1_reg: buck1 {
440 regulator-compatible = "BUCK1";
441 regulator-name = "vdd_mif";
442 regulator-min-microvolt = <850000>;
443 regulator-max-microvolt = <1100000>;
444 regulator-always-on;
445 regulator-boot-on;
446 regulator-mem-off;
447 };
448
449 buck2_reg: buck2 {
450 regulator-compatible = "BUCK2";
451 regulator-name = "vdd_arm";
452 regulator-min-microvolt = <850000>;
453 regulator-max-microvolt = <1500000>;
454 regulator-always-on;
455 regulator-boot-on;
456 regulator-mem-off;
457 };
458
459 buck3_reg: buck3 {
460 regulator-compatible = "BUCK3";
461 regulator-name = "vdd_int";
462 regulator-min-microvolt = <850000>;
463 regulator-max-microvolt = <1150000>;
464 regulator-always-on;
465 regulator-boot-on;
466 regulator-mem-off;
467 };
468
469 buck4_reg: buck4 {
470 regulator-compatible = "BUCK4";
471 regulator-name = "vdd_g3d";
472 regulator-min-microvolt = <850000>;
473 regulator-max-microvolt = <1150000>;
474 regulator-boot-on;
475 regulator-mem-off;
476 };
477
478 buck5_reg: buck5 {
479 regulator-compatible = "BUCK5";
480 regulator-name = "VMEM_1.2V_AP";
481 regulator-min-microvolt = <1200000>;
482 regulator-max-microvolt = <1200000>;
483 regulator-always-on;
484 };
485
486 buck6_reg: buck6 {
487 regulator-compatible = "BUCK6";
488 regulator-name = "VCC_SUB_1.35V";
489 regulator-min-microvolt = <1350000>;
490 regulator-max-microvolt = <1350000>;
491 regulator-always-on;
492 };
493
494 buck7_reg: buck7 {
495 regulator-compatible = "BUCK7";
496 regulator-name = "VCC_SUB_2.0V";
497 regulator-min-microvolt = <2000000>;
498 regulator-max-microvolt = <2000000>;
499 regulator-always-on;
500 };
501
502 buck8_reg: buck8 {
503 regulator-compatible = "BUCK8";
504 regulator-name = "VMEM_VDDF_3.0V";
505 regulator-min-microvolt = <2850000>;
506 regulator-max-microvolt = <2850000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900507 };
508
509 buck9_reg: buck9 {
510 regulator-compatible = "BUCK9";
511 regulator-name = "CAM_ISP_CORE_1.2V";
512 regulator-min-microvolt = <1000000>;
513 regulator-max-microvolt = <1200000>;
514 regulator-mem-off;
515 };
516 };
517 };
518 };
519
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +0900520 i2c_max77693: i2c-gpio-1 {
521 compatible = "i2c-gpio";
522 gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
523 i2c-gpio,delay-us = <2>;
524 #address-cells = <1>;
525 #size-cells = <0>;
526 status = "okay";
527
528 max77693@66 {
529 compatible = "maxim,max77693";
530 interrupt-parent = <&gpx1>;
531 interrupts = <5 2>;
532 reg = <0x66>;
533
534 regulators {
535 esafeout1_reg: ESAFEOUT1@1 {
536 regulator-name = "ESAFEOUT1";
537 };
538 esafeout2_reg: ESAFEOUT2@2 {
539 regulator-name = "ESAFEOUT2";
540 };
541 charger_reg: CHARGER@0 {
542 regulator-name = "CHARGER";
543 regulator-min-microamp = <60000>;
544 regulator-max-microamp = <2580000>;
545 };
546 };
Jaewon Kimd9c68082014-11-22 23:19:22 +0900547
548 max77693_haptic {
549 compatible = "maxim,max77693-haptic";
550 haptic-supply = <&ldo26_reg>;
551 pwms = <&pwm 0 38022 0>;
552 };
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +0900553 };
554 };
555
Tomasz Figaca7c11f2013-12-21 07:38:19 +0900556 mmc@12550000 {
557 num-slots = <1>;
Tomasz Figaca7c11f2013-12-21 07:38:19 +0900558 broken-cd;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900559 non-removable;
Tomasz Figaca7c11f2013-12-21 07:38:19 +0900560 card-detect-delay = <200>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900561 vmmc-supply = <&vemmc_reg>;
Tomasz Figaca7c11f2013-12-21 07:38:19 +0900562 clock-frequency = <400000000>;
563 samsung,dw-mshc-ciu-div = <0>;
564 samsung,dw-mshc-sdr-timing = <2 3>;
565 samsung,dw-mshc-ddr-timing = <1 2>;
566 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
567 pinctrl-names = "default";
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900568 status = "okay";
Jaehoon Chungaaa25a52014-08-18 11:55:32 -0500569 bus-width = <8>;
570 cap-mmc-highspeed;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900571 };
572
Krzysztof Kozlowskia427d152014-11-07 08:22:49 +0900573 sdhci@12530000 {
574 bus-width = <4>;
575 cd-gpios = <&gpx3 4 0>;
576 cd-inverted;
577 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
578 pinctrl-names = "default";
579 vmmc-supply = <&ldo21_reg>;
580 status = "okay";
581 };
582
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900583 serial@13800000 {
584 status = "okay";
585 };
586
587 serial@13810000 {
588 status = "okay";
589 };
590
591 serial@13820000 {
592 status = "okay";
593 };
594
595 serial@13830000 {
596 status = "okay";
597 };
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900598
Lukasz Majewski432047f2014-11-22 22:58:09 +0900599 tmu@100C0000 {
600 vtmu-supply = <&ldo10_reg>;
601 status = "okay";
602 };
603
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900604 i2c_ak8975: i2c-gpio-0 {
605 compatible = "i2c-gpio";
606 gpios = <&gpy2 4 0>, <&gpy2 5 0>;
607 i2c-gpio,delay-us = <2>;
608 #address-cells = <1>;
609 #size-cells = <0>;
610 status = "okay";
611
612 ak8975@0c {
Beomho Seo30cc7982014-05-20 01:12:50 +0900613 compatible = "asahi-kasei,ak8975";
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900614 reg = <0x0c>;
615 gpios = <&gpj0 7 0>;
616 };
617 };
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900618
Beomho Seo85cb4e02014-05-22 07:56:53 +0900619 i2c_cm36651: i2c-gpio-2 {
620 compatible = "i2c-gpio";
621 gpios = <&gpf0 0 1>, <&gpf0 1 1>;
622 i2c-gpio,delay-us = <2>;
623 #address-cells = <1>;
624 #size-cells = <0>;
625
626 cm36651@18 {
627 compatible = "capella,cm36651";
628 reg = <0x18>;
629 interrupt-parent = <&gpx0>;
630 interrupts = <2 2>;
631 vled-supply = <&ps_als_reg>;
632 };
633 };
634
Andrzej Hajda201f1262013-08-06 02:49:45 +0900635 spi_1: spi@13930000 {
636 pinctrl-names = "default";
637 pinctrl-0 = <&spi1_bus>;
Naveen Krishna Chatradhie138d432014-07-16 17:19:10 +0200638 cs-gpios = <&gpb 5 0>;
Andrzej Hajda201f1262013-08-06 02:49:45 +0900639 status = "okay";
640
641 s5c73m3_spi: s5c73m3 {
642 compatible = "samsung,s5c73m3";
643 spi-max-frequency = <50000000>;
644 reg = <0>;
645 controller-data {
Andrzej Hajda201f1262013-08-06 02:49:45 +0900646 samsung,spi-feedback-delay = <2>;
647 };
648 };
649 };
650
Jaewon Kim249358c2014-11-22 23:19:18 +0900651 pwm: pwm@139D0000 {
652 pinctrl-0 = <&pwm0_out>;
653 pinctrl-names = "default";
654 samsung,pwm-outputs = <0>;
655 status = "okay";
656 };
657
Andrzej Hajda420ae842014-03-28 12:52:45 +0100658 dsi_0: dsi@11C80000 {
659 vddcore-supply = <&ldo8_reg>;
660 vddio-supply = <&ldo10_reg>;
661 samsung,pll-clock-frequency = <24000000>;
662 status = "okay";
663
664 ports {
665 #address-cells = <1>;
666 #size-cells = <0>;
667
668 port@1 {
669 reg = <1>;
670
671 dsi_out: endpoint {
672 remote-endpoint = <&dsi_in>;
673 samsung,burst-clock-frequency = <500000000>;
674 samsung,esc-clock-frequency = <20000000>;
675 };
676 };
677 };
678
679 panel@0 {
680 compatible = "samsung,s6e8aa0";
681 reg = <0>;
682 vdd3-supply = <&lcd_vdd3_reg>;
683 vci-supply = <&ldo25_reg>;
684 reset-gpios = <&gpy4 5 0>;
685 power-on-delay= <50>;
686 reset-delay = <100>;
687 init-delay = <100>;
688 flip-horizontal;
689 flip-vertical;
690 panel-width-mm = <58>;
691 panel-height-mm = <103>;
692
693 display-timings {
694 timing-0 {
695 clock-frequency = <0>;
696 hactive = <720>;
697 vactive = <1280>;
698 hfront-porch = <5>;
699 hback-porch = <5>;
700 hsync-len = <5>;
701 vfront-porch = <13>;
702 vback-porch = <1>;
703 vsync-len = <2>;
704 };
705 };
706
707 port {
708 dsi_in: endpoint {
709 remote-endpoint = <&dsi_out>;
710 };
711 };
712 };
713 };
714
Andrzej Hajdabbab1e3f2014-03-28 12:52:47 +0100715 fimd@11c00000 {
716 status = "okay";
717 };
718
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900719 camera: camera {
720 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900721 pinctrl-names = "default";
722 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900723 assigned-clocks = <&clock CLK_MOUT_CAM0>,
724 <&clock CLK_MOUT_CAM1>;
725 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>,
726 <&clock CLK_MOUT_MPLL_USER_T>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900727
728 fimc_0: fimc@11800000 {
729 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900730 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
731 <&clock CLK_SCLK_FIMC0>;
732 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
733 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900734 };
735
736 fimc_1: fimc@11810000 {
737 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900738 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
739 <&clock CLK_SCLK_FIMC1>;
740 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
741 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900742 };
743
744 fimc_2: fimc@11820000 {
745 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900746 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
747 <&clock CLK_SCLK_FIMC2>;
748 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
749 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900750 };
751
752 fimc_3: fimc@11830000 {
753 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900754 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
755 <&clock CLK_SCLK_FIMC3>;
756 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
757 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900758 };
759
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900760 csis_0: csis@11880000 {
761 status = "okay";
762 vddcore-supply = <&ldo8_reg>;
763 vddio-supply = <&ldo10_reg>;
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900764 assigned-clocks = <&clock CLK_MOUT_CSIS0>,
765 <&clock CLK_SCLK_CSIS0>;
766 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
767 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900768
769 /* Camera C (3) MIPI CSI-2 (CSIS0) */
770 port@3 {
771 reg = <3>;
772 csis0_ep: endpoint {
773 remote-endpoint = <&s5c73m3_ep>;
774 data-lanes = <1 2 3 4>;
775 samsung,csis-hs-settle = <12>;
776 };
777 };
778 };
779
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900780 csis_1: csis@11890000 {
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900781 status = "okay";
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900782 vddcore-supply = <&ldo8_reg>;
783 vddio-supply = <&ldo10_reg>;
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900784 assigned-clocks = <&clock CLK_MOUT_CSIS1>,
785 <&clock CLK_SCLK_CSIS1>;
786 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
787 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900788
789 /* Camera D (4) MIPI CSI-2 (CSIS1) */
790 port@4 {
791 reg = <4>;
792 csis1_ep: endpoint {
793 remote-endpoint = <&is_s5k6a3_ep>;
794 data-lanes = <1>;
795 samsung,csis-hs-settle = <18>;
796 samsung,csis-wclk;
797 };
798 };
799 };
800
801 fimc_lite_0: fimc-lite@12390000 {
802 status = "okay";
803 };
804
805 fimc_lite_1: fimc-lite@123A0000 {
806 status = "okay";
807 };
808
809 fimc-is@12000000 {
810 pinctrl-0 = <&fimc_is_uart>;
811 pinctrl-names = "default";
812 status = "okay";
813
814 i2c1_isp: i2c-isp@12140000 {
815 pinctrl-0 = <&fimc_is_i2c1>;
816 pinctrl-names = "default";
817
818 s5k6a3@10 {
819 compatible = "samsung,s5k6a3";
820 reg = <0x10>;
821 svdda-supply = <&cam_io_reg>;
822 svddio-supply = <&ldo19_reg>;
Sylwester Nawrockiee5eda62014-05-09 06:00:35 +0900823 afvdd-supply = <&ldo19_reg>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900824 clock-frequency = <24000000>;
825 /* CAM_B_CLKOUT */
Sylwester Nawrockiee5eda62014-05-09 06:00:35 +0900826 clocks = <&camera 1>;
827 clock-names = "extclk";
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900828 samsung,camclk-out = <1>;
829 gpios = <&gpm1 6 0>;
830
831 port {
832 is_s5k6a3_ep: endpoint {
833 remote-endpoint = <&csis1_ep>;
834 data-lanes = <1>;
835 };
836 };
837 };
838 };
839 };
840 };
Chanwoo Choi4f423782014-03-18 06:25:59 +0900841
Chanho Park3c8977f2014-05-23 03:30:21 +0900842 exynos-usbphy@125B0000 {
843 status = "okay";
844 };
845
846 hsotg@12480000 {
847 vusb_d-supply = <&ldo15_reg>;
848 vusb_a-supply = <&ldo12_reg>;
849 status = "okay";
850 };
851
Chanwoo Choi4f423782014-03-18 06:25:59 +0900852 thermistor-ap@0 {
853 compatible = "ntc,ncp15wb473";
854 pullup-uv = <1800000>; /* VCC_1.8V_AP */
855 pullup-ohm = <100000>; /* 100K */
856 pulldown-ohm = <100000>; /* 100K */
857 io-channels = <&adc 1>; /* AP temperature */
858 };
859
860 thermistor-battery@1 {
861 compatible = "ntc,ncp15wb473";
862 pullup-uv = <1800000>; /* VCC_1.8V_AP */
863 pullup-ohm = <100000>; /* 100K */
864 pulldown-ohm = <100000>; /* 100K */
865 io-channels = <&adc 2>; /* Battery temperature */
866 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900867};
Tomasz Figa09918a92014-09-24 01:20:03 +0900868
869&pinctrl_0 {
870 pinctrl-names = "default";
871 pinctrl-0 = <&sleep0>;
872
873 sleep0: sleep-states {
874 PIN_SLP(gpa0-0, INPUT, NONE);
875 PIN_SLP(gpa0-1, OUT0, NONE);
876 PIN_SLP(gpa0-2, INPUT, NONE);
877 PIN_SLP(gpa0-3, INPUT, UP);
878 PIN_SLP(gpa0-4, INPUT, NONE);
879 PIN_SLP(gpa0-5, INPUT, DOWN);
880 PIN_SLP(gpa0-6, INPUT, DOWN);
881 PIN_SLP(gpa0-7, INPUT, UP);
882
883 PIN_SLP(gpa1-0, INPUT, DOWN);
884 PIN_SLP(gpa1-1, INPUT, DOWN);
885 PIN_SLP(gpa1-2, INPUT, DOWN);
886 PIN_SLP(gpa1-3, INPUT, DOWN);
887 PIN_SLP(gpa1-4, INPUT, DOWN);
888 PIN_SLP(gpa1-5, INPUT, DOWN);
889
890 PIN_SLP(gpb-0, INPUT, NONE);
891 PIN_SLP(gpb-1, INPUT, NONE);
892 PIN_SLP(gpb-2, INPUT, NONE);
893 PIN_SLP(gpb-3, INPUT, NONE);
894 PIN_SLP(gpb-4, INPUT, DOWN);
895 PIN_SLP(gpb-5, INPUT, UP);
896 PIN_SLP(gpb-6, INPUT, DOWN);
897 PIN_SLP(gpb-7, INPUT, DOWN);
898
899 PIN_SLP(gpc0-0, INPUT, DOWN);
900 PIN_SLP(gpc0-1, INPUT, DOWN);
901 PIN_SLP(gpc0-2, INPUT, DOWN);
902 PIN_SLP(gpc0-3, INPUT, DOWN);
903 PIN_SLP(gpc0-4, INPUT, DOWN);
904
905 PIN_SLP(gpc1-0, INPUT, NONE);
906 PIN_SLP(gpc1-1, PREV, NONE);
907 PIN_SLP(gpc1-2, INPUT, NONE);
908 PIN_SLP(gpc1-3, INPUT, NONE);
909 PIN_SLP(gpc1-4, INPUT, NONE);
910
911 PIN_SLP(gpd0-0, INPUT, DOWN);
912 PIN_SLP(gpd0-1, INPUT, DOWN);
913 PIN_SLP(gpd0-2, INPUT, NONE);
914 PIN_SLP(gpd0-3, INPUT, NONE);
915
916 PIN_SLP(gpd1-0, INPUT, DOWN);
917 PIN_SLP(gpd1-1, INPUT, DOWN);
918 PIN_SLP(gpd1-2, INPUT, NONE);
919 PIN_SLP(gpd1-3, INPUT, NONE);
920
921 PIN_SLP(gpf0-0, INPUT, NONE);
922 PIN_SLP(gpf0-1, INPUT, NONE);
923 PIN_SLP(gpf0-2, INPUT, DOWN);
924 PIN_SLP(gpf0-3, INPUT, DOWN);
925 PIN_SLP(gpf0-4, INPUT, NONE);
926 PIN_SLP(gpf0-5, INPUT, DOWN);
927 PIN_SLP(gpf0-6, INPUT, NONE);
928 PIN_SLP(gpf0-7, INPUT, DOWN);
929
930 PIN_SLP(gpf1-0, INPUT, DOWN);
931 PIN_SLP(gpf1-1, INPUT, DOWN);
932 PIN_SLP(gpf1-2, INPUT, DOWN);
933 PIN_SLP(gpf1-3, INPUT, DOWN);
934 PIN_SLP(gpf1-4, INPUT, NONE);
935 PIN_SLP(gpf1-5, INPUT, NONE);
936 PIN_SLP(gpf1-6, INPUT, DOWN);
937 PIN_SLP(gpf1-7, PREV, NONE);
938
939 PIN_SLP(gpf2-0, PREV, NONE);
940 PIN_SLP(gpf2-1, INPUT, DOWN);
941 PIN_SLP(gpf2-2, INPUT, DOWN);
942 PIN_SLP(gpf2-3, INPUT, DOWN);
943 PIN_SLP(gpf2-4, INPUT, DOWN);
944 PIN_SLP(gpf2-5, INPUT, DOWN);
945 PIN_SLP(gpf2-6, INPUT, NONE);
946 PIN_SLP(gpf2-7, INPUT, NONE);
947
948 PIN_SLP(gpf3-0, INPUT, NONE);
949 PIN_SLP(gpf3-1, PREV, NONE);
950 PIN_SLP(gpf3-2, PREV, NONE);
951 PIN_SLP(gpf3-3, PREV, NONE);
952 PIN_SLP(gpf3-4, OUT1, NONE);
953 PIN_SLP(gpf3-5, INPUT, DOWN);
954
955 PIN_SLP(gpj0-0, PREV, NONE);
956 PIN_SLP(gpj0-1, PREV, NONE);
957 PIN_SLP(gpj0-2, PREV, NONE);
958 PIN_SLP(gpj0-3, INPUT, DOWN);
959 PIN_SLP(gpj0-4, PREV, NONE);
960 PIN_SLP(gpj0-5, PREV, NONE);
961 PIN_SLP(gpj0-6, INPUT, DOWN);
962 PIN_SLP(gpj0-7, INPUT, DOWN);
963
964 PIN_SLP(gpj1-0, INPUT, DOWN);
965 PIN_SLP(gpj1-1, PREV, NONE);
966 PIN_SLP(gpj1-2, PREV, NONE);
967 PIN_SLP(gpj1-3, INPUT, DOWN);
968 PIN_SLP(gpj1-4, INPUT, DOWN);
969 };
970};
971
972&pinctrl_1 {
973 pinctrl-names = "default";
974 pinctrl-0 = <&sleep1>;
975
976 sleep1: sleep-states {
977 PIN_SLP(gpk0-0, PREV, NONE);
978 PIN_SLP(gpk0-1, PREV, NONE);
979 PIN_SLP(gpk0-2, OUT0, NONE);
980 PIN_SLP(gpk0-3, PREV, NONE);
981 PIN_SLP(gpk0-4, PREV, NONE);
982 PIN_SLP(gpk0-5, PREV, NONE);
983 PIN_SLP(gpk0-6, PREV, NONE);
984
985 PIN_SLP(gpk1-0, INPUT, DOWN);
986 PIN_SLP(gpk1-1, INPUT, DOWN);
987 PIN_SLP(gpk1-2, INPUT, DOWN);
988 PIN_SLP(gpk1-3, PREV, NONE);
989 PIN_SLP(gpk1-4, PREV, NONE);
990 PIN_SLP(gpk1-5, PREV, NONE);
991 PIN_SLP(gpk1-6, PREV, NONE);
992
993 PIN_SLP(gpk2-0, INPUT, DOWN);
994 PIN_SLP(gpk2-1, INPUT, DOWN);
995 PIN_SLP(gpk2-2, INPUT, DOWN);
996 PIN_SLP(gpk2-3, INPUT, DOWN);
997 PIN_SLP(gpk2-4, INPUT, DOWN);
998 PIN_SLP(gpk2-5, INPUT, DOWN);
999 PIN_SLP(gpk2-6, INPUT, DOWN);
1000
1001 PIN_SLP(gpk3-0, OUT0, NONE);
1002 PIN_SLP(gpk3-1, INPUT, NONE);
1003 PIN_SLP(gpk3-2, INPUT, DOWN);
1004 PIN_SLP(gpk3-3, INPUT, NONE);
1005 PIN_SLP(gpk3-4, INPUT, NONE);
1006 PIN_SLP(gpk3-5, INPUT, NONE);
1007 PIN_SLP(gpk3-6, INPUT, NONE);
1008
1009 PIN_SLP(gpl0-0, INPUT, DOWN);
1010 PIN_SLP(gpl0-1, INPUT, DOWN);
1011 PIN_SLP(gpl0-2, INPUT, DOWN);
1012 PIN_SLP(gpl0-3, INPUT, DOWN);
1013 PIN_SLP(gpl0-4, PREV, NONE);
1014 PIN_SLP(gpl0-6, PREV, NONE);
1015
1016 PIN_SLP(gpl1-0, INPUT, DOWN);
1017 PIN_SLP(gpl1-1, INPUT, DOWN);
1018 PIN_SLP(gpl2-0, INPUT, DOWN);
1019 PIN_SLP(gpl2-1, INPUT, DOWN);
1020 PIN_SLP(gpl2-2, INPUT, DOWN);
1021 PIN_SLP(gpl2-3, INPUT, DOWN);
1022 PIN_SLP(gpl2-4, INPUT, DOWN);
1023 PIN_SLP(gpl2-5, INPUT, DOWN);
1024 PIN_SLP(gpl2-6, PREV, NONE);
1025 PIN_SLP(gpl2-7, INPUT, DOWN);
1026
1027 PIN_SLP(gpm0-0, INPUT, DOWN);
1028 PIN_SLP(gpm0-1, INPUT, DOWN);
1029 PIN_SLP(gpm0-2, INPUT, DOWN);
1030 PIN_SLP(gpm0-3, INPUT, DOWN);
1031 PIN_SLP(gpm0-4, INPUT, DOWN);
1032 PIN_SLP(gpm0-5, INPUT, DOWN);
1033 PIN_SLP(gpm0-6, INPUT, DOWN);
1034 PIN_SLP(gpm0-7, INPUT, DOWN);
1035
1036 PIN_SLP(gpm1-0, INPUT, DOWN);
1037 PIN_SLP(gpm1-1, INPUT, DOWN);
1038 PIN_SLP(gpm1-2, INPUT, NONE);
1039 PIN_SLP(gpm1-3, INPUT, NONE);
1040 PIN_SLP(gpm1-4, INPUT, NONE);
1041 PIN_SLP(gpm1-5, INPUT, NONE);
1042 PIN_SLP(gpm1-6, INPUT, DOWN);
1043
1044 PIN_SLP(gpm2-0, INPUT, NONE);
1045 PIN_SLP(gpm2-1, INPUT, NONE);
1046 PIN_SLP(gpm2-2, INPUT, DOWN);
1047 PIN_SLP(gpm2-3, INPUT, DOWN);
1048 PIN_SLP(gpm2-4, INPUT, DOWN);
1049
1050 PIN_SLP(gpm3-0, PREV, NONE);
1051 PIN_SLP(gpm3-1, PREV, NONE);
1052 PIN_SLP(gpm3-2, PREV, NONE);
1053 PIN_SLP(gpm3-3, OUT1, NONE);
1054 PIN_SLP(gpm3-4, INPUT, DOWN);
1055 PIN_SLP(gpm3-5, INPUT, DOWN);
1056 PIN_SLP(gpm3-6, INPUT, DOWN);
1057 PIN_SLP(gpm3-7, INPUT, DOWN);
1058
1059 PIN_SLP(gpm4-0, INPUT, DOWN);
1060 PIN_SLP(gpm4-1, INPUT, DOWN);
1061 PIN_SLP(gpm4-2, INPUT, DOWN);
1062 PIN_SLP(gpm4-3, INPUT, DOWN);
1063 PIN_SLP(gpm4-4, INPUT, DOWN);
1064 PIN_SLP(gpm4-5, INPUT, DOWN);
1065 PIN_SLP(gpm4-6, INPUT, DOWN);
1066 PIN_SLP(gpm4-7, INPUT, DOWN);
1067
1068 PIN_SLP(gpy0-0, INPUT, DOWN);
1069 PIN_SLP(gpy0-1, INPUT, DOWN);
1070 PIN_SLP(gpy0-2, INPUT, DOWN);
1071 PIN_SLP(gpy0-3, INPUT, DOWN);
1072 PIN_SLP(gpy0-4, INPUT, DOWN);
1073 PIN_SLP(gpy0-5, INPUT, DOWN);
1074
1075 PIN_SLP(gpy1-0, INPUT, DOWN);
1076 PIN_SLP(gpy1-1, INPUT, DOWN);
1077 PIN_SLP(gpy1-2, INPUT, DOWN);
1078 PIN_SLP(gpy1-3, INPUT, DOWN);
1079
1080 PIN_SLP(gpy2-0, PREV, NONE);
1081 PIN_SLP(gpy2-1, INPUT, DOWN);
1082 PIN_SLP(gpy2-2, INPUT, NONE);
1083 PIN_SLP(gpy2-3, INPUT, NONE);
1084 PIN_SLP(gpy2-4, INPUT, NONE);
1085 PIN_SLP(gpy2-5, INPUT, NONE);
1086
1087 PIN_SLP(gpy3-0, INPUT, DOWN);
1088 PIN_SLP(gpy3-1, INPUT, DOWN);
1089 PIN_SLP(gpy3-2, INPUT, DOWN);
1090 PIN_SLP(gpy3-3, INPUT, DOWN);
1091 PIN_SLP(gpy3-4, INPUT, DOWN);
1092 PIN_SLP(gpy3-5, INPUT, DOWN);
1093 PIN_SLP(gpy3-6, INPUT, DOWN);
1094 PIN_SLP(gpy3-7, INPUT, DOWN);
1095
1096 PIN_SLP(gpy4-0, INPUT, DOWN);
1097 PIN_SLP(gpy4-1, INPUT, DOWN);
1098 PIN_SLP(gpy4-2, INPUT, DOWN);
1099 PIN_SLP(gpy4-3, INPUT, DOWN);
1100 PIN_SLP(gpy4-4, INPUT, DOWN);
1101 PIN_SLP(gpy4-5, INPUT, DOWN);
1102 PIN_SLP(gpy4-6, INPUT, DOWN);
1103 PIN_SLP(gpy4-7, INPUT, DOWN);
1104
1105 PIN_SLP(gpy5-0, INPUT, DOWN);
1106 PIN_SLP(gpy5-1, INPUT, DOWN);
1107 PIN_SLP(gpy5-2, INPUT, DOWN);
1108 PIN_SLP(gpy5-3, INPUT, DOWN);
1109 PIN_SLP(gpy5-4, INPUT, DOWN);
1110 PIN_SLP(gpy5-5, INPUT, DOWN);
1111 PIN_SLP(gpy5-6, INPUT, DOWN);
1112 PIN_SLP(gpy5-7, INPUT, DOWN);
1113
1114 PIN_SLP(gpy6-0, INPUT, DOWN);
1115 PIN_SLP(gpy6-1, INPUT, DOWN);
1116 PIN_SLP(gpy6-2, INPUT, DOWN);
1117 PIN_SLP(gpy6-3, INPUT, DOWN);
1118 PIN_SLP(gpy6-4, INPUT, DOWN);
1119 PIN_SLP(gpy6-5, INPUT, DOWN);
1120 PIN_SLP(gpy6-6, INPUT, DOWN);
1121 PIN_SLP(gpy6-7, INPUT, DOWN);
1122 };
1123};
1124
1125&pinctrl_2 {
1126 pinctrl-names = "default";
1127 pinctrl-0 = <&sleep2>;
1128
1129 sleep2: sleep-states {
1130 PIN_SLP(gpz-0, INPUT, DOWN);
1131 PIN_SLP(gpz-1, INPUT, DOWN);
1132 PIN_SLP(gpz-2, INPUT, DOWN);
1133 PIN_SLP(gpz-3, INPUT, DOWN);
1134 PIN_SLP(gpz-4, INPUT, DOWN);
1135 PIN_SLP(gpz-5, INPUT, DOWN);
1136 PIN_SLP(gpz-6, INPUT, DOWN);
1137 };
1138};
1139
1140&pinctrl_3 {
1141 pinctrl-names = "default";
1142 pinctrl-0 = <&sleep3>;
1143
1144 sleep3: sleep-states {
1145 PIN_SLP(gpv0-0, INPUT, DOWN);
1146 PIN_SLP(gpv0-1, INPUT, DOWN);
1147 PIN_SLP(gpv0-2, INPUT, DOWN);
1148 PIN_SLP(gpv0-3, INPUT, DOWN);
1149 PIN_SLP(gpv0-4, INPUT, DOWN);
1150 PIN_SLP(gpv0-5, INPUT, DOWN);
1151 PIN_SLP(gpv0-6, INPUT, DOWN);
1152 PIN_SLP(gpv0-7, INPUT, DOWN);
1153
1154 PIN_SLP(gpv1-0, INPUT, DOWN);
1155 PIN_SLP(gpv1-1, INPUT, DOWN);
1156 PIN_SLP(gpv1-2, INPUT, DOWN);
1157 PIN_SLP(gpv1-3, INPUT, DOWN);
1158 PIN_SLP(gpv1-4, INPUT, DOWN);
1159 PIN_SLP(gpv1-5, INPUT, DOWN);
1160 PIN_SLP(gpv1-6, INPUT, DOWN);
1161 PIN_SLP(gpv1-7, INPUT, DOWN);
1162
1163 PIN_SLP(gpv2-0, INPUT, DOWN);
1164 PIN_SLP(gpv2-1, INPUT, DOWN);
1165 PIN_SLP(gpv2-2, INPUT, DOWN);
1166 PIN_SLP(gpv2-3, INPUT, DOWN);
1167 PIN_SLP(gpv2-4, INPUT, DOWN);
1168 PIN_SLP(gpv2-5, INPUT, DOWN);
1169 PIN_SLP(gpv2-6, INPUT, DOWN);
1170 PIN_SLP(gpv2-7, INPUT, DOWN);
1171
1172 PIN_SLP(gpv3-0, INPUT, DOWN);
1173 PIN_SLP(gpv3-1, INPUT, DOWN);
1174 PIN_SLP(gpv3-2, INPUT, DOWN);
1175 PIN_SLP(gpv3-3, INPUT, DOWN);
1176 PIN_SLP(gpv3-4, INPUT, DOWN);
1177 PIN_SLP(gpv3-5, INPUT, DOWN);
1178 PIN_SLP(gpv3-6, INPUT, DOWN);
1179 PIN_SLP(gpv3-7, INPUT, DOWN);
1180
1181 PIN_SLP(gpv4-0, INPUT, DOWN);
1182 };
1183};