blob: a632d45f334debb204d47207845b84c4be17ae00 [file] [log] [blame]
Jouni Malinenff1d2762005-05-12 22:54:16 -04001#ifndef HOSTAP_WLAN_H
2#define HOSTAP_WLAN_H
3
4#include "hostap_config.h"
Jouni Malinenff1d2762005-05-12 22:54:16 -04005#include "hostap_common.h"
6
7#define MAX_PARM_DEVICES 8
8#define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES)
9#define DEF_INTS -1, -1, -1, -1, -1, -1, -1
10#define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
11
12
13/* Specific skb->protocol value that indicates that the packet already contains
14 * txdesc header.
15 * FIX: This might need own value that would be allocated especially for Prism2
16 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames".
17 * However, these skb's should have only minimal path in the kernel side since
18 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */
19#define ETH_P_HOSTAP ETH_P_CONTROL
20
21#ifndef ARPHRD_IEEE80211
22#define ARPHRD_IEEE80211 801
23#endif
24#ifndef ARPHRD_IEEE80211_PRISM
25#define ARPHRD_IEEE80211_PRISM 802
26#endif
27
28/* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header
29 * (from linux-wlan-ng) */
30struct linux_wlan_ng_val {
31 u32 did;
32 u16 status, len;
33 u32 data;
34} __attribute__ ((packed));
35
36struct linux_wlan_ng_prism_hdr {
37 u32 msgcode, msglen;
38 char devname[16];
39 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal,
40 noise, rate, istx, frmlen;
41} __attribute__ ((packed));
42
43struct linux_wlan_ng_cap_hdr {
44 u32 version;
45 u32 length;
46 u64 mactime;
47 u64 hosttime;
48 u32 phytype;
49 u32 channel;
50 u32 datarate;
51 u32 antenna;
52 u32 priority;
53 u32 ssi_type;
54 s32 ssi_signal;
55 s32 ssi_noise;
56 u32 preamble;
57 u32 encoding;
58} __attribute__ ((packed));
59
60#define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */
61#define LWNG_CAPHDR_VERSION 0x80211001
62
63struct hfa384x_rx_frame {
64 /* HFA384X RX frame descriptor */
65 u16 status; /* HFA384X_RX_STATUS_ flags */
66 u32 time; /* timestamp, 1 microsecond resolution */
67 u8 silence; /* 27 .. 154; seems to be 0 */
68 u8 signal; /* 27 .. 154 */
69 u8 rate; /* 10, 20, 55, or 110 */
70 u8 rxflow;
71 u32 reserved;
72
73 /* 802.11 */
74 u16 frame_control;
75 u16 duration_id;
76 u8 addr1[6];
77 u8 addr2[6];
78 u8 addr3[6];
79 u16 seq_ctrl;
80 u8 addr4[6];
81 u16 data_len;
82
83 /* 802.3 */
84 u8 dst_addr[6];
85 u8 src_addr[6];
86 u16 len;
87
88 /* followed by frame data; max 2304 bytes */
89} __attribute__ ((packed));
90
91
92struct hfa384x_tx_frame {
93 /* HFA384X TX frame descriptor */
94 u16 status; /* HFA384X_TX_STATUS_ flags */
95 u16 reserved1;
96 u16 reserved2;
97 u32 sw_support;
98 u8 retry_count; /* not yet implemented */
99 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
100 u16 tx_control; /* HFA384X_TX_CTRL_ flags */
101
102 /* 802.11 */
103 u16 frame_control; /* parts not used */
104 u16 duration_id;
105 u8 addr1[6];
106 u8 addr2[6]; /* filled by firmware */
107 u8 addr3[6];
108 u16 seq_ctrl; /* filled by firmware */
109 u8 addr4[6];
110 u16 data_len;
111
112 /* 802.3 */
113 u8 dst_addr[6];
114 u8 src_addr[6];
115 u16 len;
116
117 /* followed by frame data; max 2304 bytes */
118} __attribute__ ((packed));
119
120
121struct hfa384x_rid_hdr
122{
123 u16 len;
124 u16 rid;
125} __attribute__ ((packed));
126
127
128/* Macro for converting signal levels (range 27 .. 154) to wireless ext
129 * dBm value with some accuracy */
130#define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
131
132#define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100
133
134struct hfa384x_scan_request {
135 u16 channel_list;
136 u16 txrate; /* HFA384X_RATES_* */
137} __attribute__ ((packed));
138
139struct hfa384x_hostscan_request {
140 u16 channel_list;
141 u16 txrate;
142 u16 target_ssid_len;
143 u8 target_ssid[32];
144} __attribute__ ((packed));
145
146struct hfa384x_join_request {
147 u8 bssid[6];
148 u16 channel;
149} __attribute__ ((packed));
150
151struct hfa384x_info_frame {
152 u16 len;
153 u16 type;
154} __attribute__ ((packed));
155
156struct hfa384x_comm_tallies {
157 u16 tx_unicast_frames;
158 u16 tx_multicast_frames;
159 u16 tx_fragments;
160 u16 tx_unicast_octets;
161 u16 tx_multicast_octets;
162 u16 tx_deferred_transmissions;
163 u16 tx_single_retry_frames;
164 u16 tx_multiple_retry_frames;
165 u16 tx_retry_limit_exceeded;
166 u16 tx_discards;
167 u16 rx_unicast_frames;
168 u16 rx_multicast_frames;
169 u16 rx_fragments;
170 u16 rx_unicast_octets;
171 u16 rx_multicast_octets;
172 u16 rx_fcs_errors;
173 u16 rx_discards_no_buffer;
174 u16 tx_discards_wrong_sa;
175 u16 rx_discards_wep_undecryptable;
176 u16 rx_message_in_msg_fragments;
177 u16 rx_message_in_bad_msg_fragments;
178} __attribute__ ((packed));
179
180struct hfa384x_comm_tallies32 {
181 u32 tx_unicast_frames;
182 u32 tx_multicast_frames;
183 u32 tx_fragments;
184 u32 tx_unicast_octets;
185 u32 tx_multicast_octets;
186 u32 tx_deferred_transmissions;
187 u32 tx_single_retry_frames;
188 u32 tx_multiple_retry_frames;
189 u32 tx_retry_limit_exceeded;
190 u32 tx_discards;
191 u32 rx_unicast_frames;
192 u32 rx_multicast_frames;
193 u32 rx_fragments;
194 u32 rx_unicast_octets;
195 u32 rx_multicast_octets;
196 u32 rx_fcs_errors;
197 u32 rx_discards_no_buffer;
198 u32 tx_discards_wrong_sa;
199 u32 rx_discards_wep_undecryptable;
200 u32 rx_message_in_msg_fragments;
201 u32 rx_message_in_bad_msg_fragments;
202} __attribute__ ((packed));
203
204struct hfa384x_scan_result_hdr {
205 u16 reserved;
206 u16 scan_reason;
207#define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
208#define HFA384X_SCAN_HOST_INITIATED 1
209#define HFA384X_SCAN_FIRMWARE_INITIATED 2
210#define HFA384X_SCAN_INQUIRY_FROM_HOST 3
211} __attribute__ ((packed));
212
213#define HFA384X_SCAN_MAX_RESULTS 32
214
215struct hfa384x_scan_result {
216 u16 chid;
217 u16 anl;
218 u16 sl;
219 u8 bssid[6];
220 u16 beacon_interval;
221 u16 capability;
222 u16 ssid_len;
223 u8 ssid[32];
224 u8 sup_rates[10];
225 u16 rate;
226} __attribute__ ((packed));
227
228struct hfa384x_hostscan_result {
229 u16 chid;
230 u16 anl;
231 u16 sl;
232 u8 bssid[6];
233 u16 beacon_interval;
234 u16 capability;
235 u16 ssid_len;
236 u8 ssid[32];
237 u8 sup_rates[10];
238 u16 rate;
239 u16 atim;
240} __attribute__ ((packed));
241
242struct comm_tallies_sums {
243 unsigned int tx_unicast_frames;
244 unsigned int tx_multicast_frames;
245 unsigned int tx_fragments;
246 unsigned int tx_unicast_octets;
247 unsigned int tx_multicast_octets;
248 unsigned int tx_deferred_transmissions;
249 unsigned int tx_single_retry_frames;
250 unsigned int tx_multiple_retry_frames;
251 unsigned int tx_retry_limit_exceeded;
252 unsigned int tx_discards;
253 unsigned int rx_unicast_frames;
254 unsigned int rx_multicast_frames;
255 unsigned int rx_fragments;
256 unsigned int rx_unicast_octets;
257 unsigned int rx_multicast_octets;
258 unsigned int rx_fcs_errors;
259 unsigned int rx_discards_no_buffer;
260 unsigned int tx_discards_wrong_sa;
261 unsigned int rx_discards_wep_undecryptable;
262 unsigned int rx_message_in_msg_fragments;
263 unsigned int rx_message_in_bad_msg_fragments;
264};
265
266
267struct hfa384x_regs {
268 u16 cmd;
269 u16 evstat;
270 u16 offset0;
271 u16 offset1;
272 u16 swsupport0;
273};
274
275
276#if defined(PRISM2_PCCARD) || defined(PRISM2_PLX)
277/* I/O ports for HFA384X Controller access */
278#define HFA384X_CMD_OFF 0x00
279#define HFA384X_PARAM0_OFF 0x02
280#define HFA384X_PARAM1_OFF 0x04
281#define HFA384X_PARAM2_OFF 0x06
282#define HFA384X_STATUS_OFF 0x08
283#define HFA384X_RESP0_OFF 0x0A
284#define HFA384X_RESP1_OFF 0x0C
285#define HFA384X_RESP2_OFF 0x0E
286#define HFA384X_INFOFID_OFF 0x10
287#define HFA384X_CONTROL_OFF 0x14
288#define HFA384X_SELECT0_OFF 0x18
289#define HFA384X_SELECT1_OFF 0x1A
290#define HFA384X_OFFSET0_OFF 0x1C
291#define HFA384X_OFFSET1_OFF 0x1E
292#define HFA384X_RXFID_OFF 0x20
293#define HFA384X_ALLOCFID_OFF 0x22
294#define HFA384X_TXCOMPLFID_OFF 0x24
295#define HFA384X_SWSUPPORT0_OFF 0x28
296#define HFA384X_SWSUPPORT1_OFF 0x2A
297#define HFA384X_SWSUPPORT2_OFF 0x2C
298#define HFA384X_EVSTAT_OFF 0x30
299#define HFA384X_INTEN_OFF 0x32
300#define HFA384X_EVACK_OFF 0x34
301#define HFA384X_DATA0_OFF 0x36
302#define HFA384X_DATA1_OFF 0x38
303#define HFA384X_AUXPAGE_OFF 0x3A
304#define HFA384X_AUXOFFSET_OFF 0x3C
305#define HFA384X_AUXDATA_OFF 0x3E
306#endif /* PRISM2_PCCARD || PRISM2_PLX */
307
308#ifdef PRISM2_PCI
309/* Memory addresses for ISL3874 controller access */
310#define HFA384X_CMD_OFF 0x00
311#define HFA384X_PARAM0_OFF 0x04
312#define HFA384X_PARAM1_OFF 0x08
313#define HFA384X_PARAM2_OFF 0x0C
314#define HFA384X_STATUS_OFF 0x10
315#define HFA384X_RESP0_OFF 0x14
316#define HFA384X_RESP1_OFF 0x18
317#define HFA384X_RESP2_OFF 0x1C
318#define HFA384X_INFOFID_OFF 0x20
319#define HFA384X_CONTROL_OFF 0x28
320#define HFA384X_SELECT0_OFF 0x30
321#define HFA384X_SELECT1_OFF 0x34
322#define HFA384X_OFFSET0_OFF 0x38
323#define HFA384X_OFFSET1_OFF 0x3C
324#define HFA384X_RXFID_OFF 0x40
325#define HFA384X_ALLOCFID_OFF 0x44
326#define HFA384X_TXCOMPLFID_OFF 0x48
327#define HFA384X_PCICOR_OFF 0x4C
328#define HFA384X_SWSUPPORT0_OFF 0x50
329#define HFA384X_SWSUPPORT1_OFF 0x54
330#define HFA384X_SWSUPPORT2_OFF 0x58
331#define HFA384X_PCIHCR_OFF 0x5C
332#define HFA384X_EVSTAT_OFF 0x60
333#define HFA384X_INTEN_OFF 0x64
334#define HFA384X_EVACK_OFF 0x68
335#define HFA384X_DATA0_OFF 0x6C
336#define HFA384X_DATA1_OFF 0x70
337#define HFA384X_AUXPAGE_OFF 0x74
338#define HFA384X_AUXOFFSET_OFF 0x78
339#define HFA384X_AUXDATA_OFF 0x7C
340#define HFA384X_PCI_M0_ADDRH_OFF 0x80
341#define HFA384X_PCI_M0_ADDRL_OFF 0x84
342#define HFA384X_PCI_M0_LEN_OFF 0x88
343#define HFA384X_PCI_M0_CTL_OFF 0x8C
344#define HFA384X_PCI_STATUS_OFF 0x98
345#define HFA384X_PCI_M1_ADDRH_OFF 0xA0
346#define HFA384X_PCI_M1_ADDRL_OFF 0xA4
347#define HFA384X_PCI_M1_LEN_OFF 0xA8
348#define HFA384X_PCI_M1_CTL_OFF 0xAC
349
350/* PCI bus master control bits (these are undocumented; based on guessing and
351 * experimenting..) */
352#define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
353#define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
354
355#endif /* PRISM2_PCI */
356
357
358/* Command codes for CMD reg. */
359#define HFA384X_CMDCODE_INIT 0x00
360#define HFA384X_CMDCODE_ENABLE 0x01
361#define HFA384X_CMDCODE_DISABLE 0x02
362#define HFA384X_CMDCODE_ALLOC 0x0A
363#define HFA384X_CMDCODE_TRANSMIT 0x0B
364#define HFA384X_CMDCODE_INQUIRE 0x11
365#define HFA384X_CMDCODE_ACCESS 0x21
366#define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
367#define HFA384X_CMDCODE_DOWNLOAD 0x22
368#define HFA384X_CMDCODE_READMIF 0x30
369#define HFA384X_CMDCODE_WRITEMIF 0x31
370#define HFA384X_CMDCODE_TEST 0x38
371
372#define HFA384X_CMDCODE_MASK 0x3F
373
374/* Test mode operations */
375#define HFA384X_TEST_CHANGE_CHANNEL 0x08
376#define HFA384X_TEST_MONITOR 0x0B
377#define HFA384X_TEST_STOP 0x0F
378#define HFA384X_TEST_CFG_BITS 0x15
379#define HFA384X_TEST_CFG_BIT_ALC BIT(3)
380
381#define HFA384X_CMD_BUSY BIT(15)
382
383#define HFA384X_CMD_TX_RECLAIM BIT(8)
384
385#define HFA384X_OFFSET_ERR BIT(14)
386#define HFA384X_OFFSET_BUSY BIT(15)
387
388
389/* ProgMode for download command */
390#define HFA384X_PROGMODE_DISABLE 0
391#define HFA384X_PROGMODE_ENABLE_VOLATILE 1
392#define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2
393#define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3
394
395#define HFA384X_AUX_MAGIC0 0xfe01
396#define HFA384X_AUX_MAGIC1 0xdc23
397#define HFA384X_AUX_MAGIC2 0xba45
398
399#define HFA384X_AUX_PORT_DISABLED 0
400#define HFA384X_AUX_PORT_DISABLE BIT(14)
401#define HFA384X_AUX_PORT_ENABLE BIT(15)
402#define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15))
403#define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15))
404
405#define PRISM2_PDA_SIZE 1024
406
407
408/* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */
409#define HFA384X_EV_TICK BIT(15)
410#define HFA384X_EV_WTERR BIT(14)
411#define HFA384X_EV_INFDROP BIT(13)
412#ifdef PRISM2_PCI
413#define HFA384X_EV_PCI_M1 BIT(9)
414#define HFA384X_EV_PCI_M0 BIT(8)
415#endif /* PRISM2_PCI */
416#define HFA384X_EV_INFO BIT(7)
417#define HFA384X_EV_DTIM BIT(5)
418#define HFA384X_EV_CMD BIT(4)
419#define HFA384X_EV_ALLOC BIT(3)
420#define HFA384X_EV_TXEXC BIT(2)
421#define HFA384X_EV_TX BIT(1)
422#define HFA384X_EV_RX BIT(0)
423
424
425/* HFA384X Information frames */
426#define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
427#define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
428#define HFA384X_INFO_COMMTALLIES 0xF100
429#define HFA384X_INFO_SCANRESULTS 0xF101
430#define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
431#define HFA384X_INFO_HOSTSCANRESULTS 0xF103
432#define HFA384X_INFO_LINKSTATUS 0xF200
433#define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
434#define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
435#define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
436#define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
437
438enum { HFA384X_LINKSTATUS_CONNECTED = 1,
439 HFA384X_LINKSTATUS_DISCONNECTED = 2,
440 HFA384X_LINKSTATUS_AP_CHANGE = 3,
441 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4,
442 HFA384X_LINKSTATUS_AP_IN_RANGE = 5,
443 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 };
444
445enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2,
446 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
447 HFA384X_PORTTYPE_HOSTAP = 6 };
448
449#define HFA384X_RATES_1MBPS BIT(0)
450#define HFA384X_RATES_2MBPS BIT(1)
451#define HFA384X_RATES_5MBPS BIT(2)
452#define HFA384X_RATES_11MBPS BIT(3)
453
454#define HFA384X_ROAMING_FIRMWARE 1
455#define HFA384X_ROAMING_HOST 2
456#define HFA384X_ROAMING_DISABLED 3
457
458#define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
459#define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1)
460#define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4)
461#define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7)
462
463#define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13))
464#define HFA384X_RX_STATUS_PCF BIT(12)
465#define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8))
466#define HFA384X_RX_STATUS_UNDECR BIT(1)
467#define HFA384X_RX_STATUS_FCSERR BIT(0)
468
469#define HFA384X_RX_STATUS_GET_MSGTYPE(s) \
470(((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13)
471#define HFA384X_RX_STATUS_GET_MACPORT(s) \
472(((s) & HFA384X_RX_STATUS_MACPORT) >> 8)
473
474enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1,
475 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 };
476
477
478#define HFA384X_TX_CTRL_ALT_RTRY BIT(5)
479#define HFA384X_TX_CTRL_802_11 BIT(3)
480#define HFA384X_TX_CTRL_802_3 0
481#define HFA384X_TX_CTRL_TX_EX BIT(2)
482#define HFA384X_TX_CTRL_TX_OK BIT(1)
483
484#define HFA384X_TX_STATUS_RETRYERR BIT(0)
485#define HFA384X_TX_STATUS_AGEDERR BIT(1)
486#define HFA384X_TX_STATUS_DISCON BIT(2)
487#define HFA384X_TX_STATUS_FORMERR BIT(3)
488
489/* HFA3861/3863 (BBP) Control Registers */
490#define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
491#define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
492#define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
493#define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
494#define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
495
496
497#ifdef __KERNEL__
498
499#define PRISM2_TXFID_COUNT 8
500#define PRISM2_DATA_MAXLEN 2304
501#define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame))
502#define PRISM2_TXFID_EMPTY 0xffff
503#define PRISM2_TXFID_RESERVED 0xfffe
504#define PRISM2_DUMMY_FID 0xffff
505#define MAX_SSID_LEN 32
506#define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */
507
508#define PRISM2_DUMP_RX_HDR BIT(0)
509#define PRISM2_DUMP_TX_HDR BIT(1)
510#define PRISM2_DUMP_TXEXC_HDR BIT(2)
511
512struct hostap_tx_callback_info {
513 u16 idx;
514 void (*func)(struct sk_buff *, int ok, void *);
515 void *data;
516 struct hostap_tx_callback_info *next;
517};
518
519
520/* IEEE 802.11 requires that STA supports concurrent reception of at least
521 * three fragmented frames. This define can be increased to support more
522 * concurrent frames, but it should be noted that each entry can consume about
523 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
524#define PRISM2_FRAG_CACHE_LEN 4
525
526struct prism2_frag_entry {
527 unsigned long first_frag_time;
528 unsigned int seq;
529 unsigned int last_frag;
530 struct sk_buff *skb;
531 u8 src_addr[ETH_ALEN];
532 u8 dst_addr[ETH_ALEN];
533};
534
535
Jouni Malinenff1d2762005-05-12 22:54:16 -0400536struct hostap_cmd_queue {
537 struct list_head list;
538 wait_queue_head_t compl;
539 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type;
Pavel Roskinb15eff22005-07-30 12:50:05 -0700540 void (*callback)(struct net_device *dev, long context, u16 resp0,
Jouni Malinenff1d2762005-05-12 22:54:16 -0400541 u16 res);
Pavel Roskinb15eff22005-07-30 12:50:05 -0700542 long context;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400543 u16 cmd, param0, param1;
544 u16 resp0, res;
545 volatile int issued, issuing;
546
547 atomic_t usecnt;
548 int del_req;
549};
550
551/* options for hw_shutdown */
552#define HOSTAP_HW_NO_DISABLE BIT(0)
553#define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1)
554
555typedef struct local_info local_info_t;
556
557struct prism2_helper_functions {
558 /* these functions are defined in hardware model specific files
559 * (hostap_{cs,plx,pci}.c */
560 int (*card_present)(local_info_t *local);
561 void (*cor_sreset)(local_info_t *local);
562 int (*dev_open)(local_info_t *local);
563 int (*dev_close)(local_info_t *local);
564 void (*genesis_reset)(local_info_t *local, int hcr);
565
566 /* the following functions are from hostap_hw.c, but they may have some
567 * hardware model specific code */
568
569 /* FIX: low-level commands like cmd might disappear at some point to
570 * make it easier to change them if needed (e.g., cmd would be replaced
571 * with write_mif/read_mif/testcmd/inquire); at least get_rid and
572 * set_rid might move to hostap_{cs,plx,pci}.c */
573 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1,
574 u16 *resp0);
575 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs);
576 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len,
577 int exact_len);
578 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len);
579 int (*hw_enable)(struct net_device *dev, int initial);
580 int (*hw_config)(struct net_device *dev, int initial);
581 void (*hw_reset)(struct net_device *dev);
582 void (*hw_shutdown)(struct net_device *dev, int no_disable);
583 int (*reset_port)(struct net_device *dev);
584 void (*schedule_reset)(local_info_t *local);
585 int (*download)(local_info_t *local,
586 struct prism2_download_param *param);
587 int (*tx)(struct sk_buff *skb, struct net_device *dev);
588 int (*set_tim)(struct net_device *dev, int aid, int set);
589 int (*read_aux)(struct net_device *dev, unsigned addr, int len,
590 u8 *buf);
591
592 int need_tx_headroom; /* number of bytes of headroom needed before
593 * IEEE 802.11 header */
594 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type;
595};
596
597
598struct prism2_download_data {
599 u32 dl_cmd;
600 u32 start_addr;
601 u32 num_areas;
602 struct prism2_download_data_area {
603 u32 addr; /* wlan card address */
604 u32 len;
605 u8 *data; /* allocated data */
606 } data[0];
607};
608
609
610#define HOSTAP_MAX_BSS_COUNT 64
611#define MAX_WPA_IE_LEN 64
612
613struct hostap_bss_info {
614 struct list_head list;
615 unsigned long last_update;
616 unsigned int count;
617 u8 bssid[ETH_ALEN];
618 u16 capab_info;
619 u8 ssid[32];
620 size_t ssid_len;
621 u8 wpa_ie[MAX_WPA_IE_LEN];
622 size_t wpa_ie_len;
623 u8 rsn_ie[MAX_WPA_IE_LEN];
624 size_t rsn_ie_len;
625 int chan;
626 int included;
627};
628
629
630/* Per radio private Host AP data - shared by all net devices interfaces used
631 * by each radio (wlan#, wlan#ap, wlan#sta, WDS).
632 * ((struct hostap_interface *) netdev_priv(dev))->local points to this
633 * structure. */
634struct local_info {
635 struct module *hw_module;
636 int card_idx;
637 int dev_enabled;
638 int master_dev_auto_open; /* was master device opened automatically */
639 int num_dev_open; /* number of open devices */
640 struct net_device *dev; /* master radio device */
641 struct net_device *ddev; /* main data device */
642 struct list_head hostap_interfaces; /* Host AP interface list (contains
643 * struct hostap_interface entries)
644 */
645 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock
646 * when removing entries from the list.
647 * TX and RX paths can use read lock. */
648 spinlock_t cmdlock, baplock, lock;
649 struct semaphore rid_bap_sem;
650 u16 infofid; /* MAC buffer id for info frame */
651 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by
652 * txfidlock */
653 spinlock_t txfidlock;
654 int txfid_len; /* length of allocated TX buffers */
655 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */
656 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if
657 * corresponding txfid is free for next TX frame */
658 u16 intransmitfid[PRISM2_TXFID_COUNT];
659 int next_txfid; /* index to the next txfid to be checked for
660 * availability */
661 int next_alloc; /* index to the next intransmitfid to be checked for
662 * allocation events */
663
664 /* bitfield for atomic bitops */
665#define HOSTAP_BITS_TRANSMIT 0
666#define HOSTAP_BITS_BAP_TASKLET 1
667#define HOSTAP_BITS_BAP_TASKLET2 2
668 long bits;
669
670 struct ap_data *ap;
671
672 char essid[MAX_SSID_LEN + 1];
673 char name[MAX_NAME_LEN + 1];
674 int name_set;
Jouni Malinen72ca9c62005-07-30 12:50:01 -0700675 u16 channel_mask; /* mask of allowed channels */
676 u16 scan_channel_mask; /* mask of channels to be scanned */
Jouni Malinenff1d2762005-05-12 22:54:16 -0400677 struct comm_tallies_sums comm_tallies;
678 struct net_device_stats stats;
679 struct proc_dir_entry *proc;
680 int iw_mode; /* operating mode (IW_MODE_*) */
681 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
682 * 1: IW_MODE_ADHOC is "pseudo IBSS" */
683 char bssid[ETH_ALEN];
684 int channel;
685 int beacon_int;
686 int dtim_period;
687 int mtu;
688 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */
689 int fw_tx_rate_control;
690 u16 tx_rate_control;
691 u16 basic_rates;
692 int hw_resetting;
693 int hw_ready;
694 int hw_reset_tries; /* how many times reset has been tried */
695 int hw_downloading;
696 int shutdown;
697 int pri_only;
698 int no_pri; /* no PRI f/w present */
699 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */
700
701 enum {
702 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF,
703 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN
704 } txpower_type;
705 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */
706
707 /* command queue for hfa384x_cmd(); protected with cmdlock */
708 struct list_head cmd_queue;
709 /* max_len for cmd_queue; in addition, cmd_callback can use two
710 * additional entries to prevent sleeping commands from stopping
711 * transmits */
712#define HOSTAP_CMD_QUEUE_MAX_LEN 16
713 int cmd_queue_len; /* number of entries in cmd_queue */
714
715 /* if card timeout is detected in interrupt context, reset_queue is
716 * used to schedule card reseting to be done in user context */
717 struct work_struct reset_queue;
718
719 /* For scheduling a change of the promiscuous mode RID */
720 int is_promisc;
721 struct work_struct set_multicast_list_queue;
722
723 struct work_struct set_tim_queue;
724 struct list_head set_tim_list;
725 spinlock_t set_tim_lock;
726
727 int wds_max_connections;
728 int wds_connections;
729#define HOSTAP_WDS_BROADCAST_RA BIT(0)
730#define HOSTAP_WDS_AP_CLIENT BIT(1)
731#define HOSTAP_WDS_STANDARD_FRAME BIT(2)
732 u32 wds_type;
733 u16 tx_control; /* flags to be used in TX description */
734 int manual_retry_count; /* -1 = use f/w default; otherwise retry count
735 * to be used with all frames */
736
737 struct iw_statistics wstats;
738 unsigned long scan_timestamp; /* Time started to scan */
739 enum {
740 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1,
741 PRISM2_MONITOR_CAPHDR = 2
742 } monitor_type;
743 int (*saved_eth_header_parse)(struct sk_buff *skb,
744 unsigned char *haddr);
745 int monitor_allow_fcserr;
746
747 int hostapd; /* whether user space daemon, hostapd, is used for AP
748 * management */
749 int hostapd_sta; /* whether hostapd is used with an extra STA interface
750 */
751 struct net_device *apdev;
752 struct net_device_stats apdevstats;
753
754 char assoc_ap_addr[ETH_ALEN];
755 struct net_device *stadev;
756 struct net_device_stats stadevstats;
757
758#define WEP_KEYS 4
759#define WEP_KEY_LEN 13
Jouni Malinen62fe7e32005-07-30 20:43:20 -0700760 struct ieee80211_crypt_data *crypt[WEP_KEYS];
Jouni Malinenff1d2762005-05-12 22:54:16 -0400761 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
762 struct timer_list crypt_deinit_timer;
763 struct list_head crypt_deinit_list;
764
765 int open_wep; /* allow unencrypted frames */
766 int host_encrypt;
767 int host_decrypt;
768 int privacy_invoked; /* force privacy invoked flag even if no keys are
769 * configured */
770 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working
771 * in Host AP mode (STA f/w 1.4.9 or newer) */
772 int bcrx_sta_key; /* use individual keys to override default keys even
773 * with RX of broad/multicast frames */
774
775 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN];
776 unsigned int frag_next_idx;
777
778 int ieee_802_1x; /* is IEEE 802.1X used */
779
780 int antsel_tx, antsel_rx;
781 int rts_threshold; /* dot11RTSThreshold */
782 int fragm_threshold; /* dot11FragmentationThreshold */
783 int auth_algs; /* PRISM2_AUTH_ flags */
784
785 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */
786 int tallies32; /* 32-bit tallies in use */
787
788 struct prism2_helper_functions *func;
789
790 int bus_master_threshold_tx;
791 int bus_master_threshold_rx;
792 u8 *bus_m1_buf;
793
794 u8 *pda;
795 int fw_ap;
796#define PRISM2_FW_VER(major, minor, variant) \
797(((major) << 16) | ((minor) << 8) | variant)
798 u32 sta_fw_ver;
799
800 /* Tasklets for handling hardware IRQ related operations outside hw IRQ
801 * handler */
802 struct tasklet_struct bap_tasklet;
803
804 struct tasklet_struct info_tasklet;
805 struct sk_buff_head info_list; /* info frames as skb's for
806 * info_tasklet */
807
808 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks
809 */
810
811 struct tasklet_struct rx_tasklet;
812 struct sk_buff_head rx_list;
813
814 struct tasklet_struct sta_tx_exc_tasklet;
815 struct sk_buff_head sta_tx_exc_list;
816
817 int host_roaming;
818 unsigned long last_join_time; /* time of last JoinRequest */
Jouni Malinen2e4fd062005-07-30 12:50:02 -0700819 struct hfa384x_hostscan_result *last_scan_results;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400820 int last_scan_results_count;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400821 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type;
822 struct work_struct info_queue;
823 long pending_info; /* bit field of pending info_queue items */
824#define PRISM2_INFO_PENDING_LINKSTATUS 0
825#define PRISM2_INFO_PENDING_SCANRESULTS 1
826 int prev_link_status; /* previous received LinkStatus info */
827 int prev_linkstatus_connected;
828 u8 preferred_ap[6]; /* use this AP if possible */
829
830#ifdef PRISM2_CALLBACK
831 void *callback_data; /* Can be used in callbacks; e.g., allocate
832 * on enable event and free on disable event.
833 * Host AP driver code does not touch this. */
834#endif /* PRISM2_CALLBACK */
835
836 wait_queue_head_t hostscan_wq;
837
838 /* Passive scan in Host AP mode */
839 struct timer_list passive_scan_timer;
840 int passive_scan_interval; /* in seconds, 0 = disabled */
841 int passive_scan_channel;
842 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state;
843
844 struct timer_list tick_timer;
845 unsigned long last_tick_timer;
846 unsigned int sw_tick_stuck;
847
848 /* commsQuality / dBmCommsQuality data from periodic polling; only
849 * valid for Managed and Ad-hoc modes */
850 unsigned long last_comms_qual_update;
851 int comms_qual; /* in some odd unit.. */
852 int avg_signal; /* in dB (note: negative) */
853 int avg_noise; /* in dB (note: negative) */
854 struct work_struct comms_qual_update;
855
856 /* RSSI to dBm adjustment (for RX descriptor fields) */
857 int rssi_to_dBm; /* substract from RSSI to get approximate dBm value */
858
859 /* BSS list / protected by local->lock */
860 struct list_head bss_list;
861 int num_bss_info;
862 int wpa; /* WPA support enabled */
863 int tkip_countermeasures;
864 int drop_unencrypted;
865 /* Generic IEEE 802.11 info element to be added to
866 * ProbeResp/Beacon/(Re)AssocReq */
867 u8 *generic_elem;
868 size_t generic_elem_len;
869
870#ifdef PRISM2_DOWNLOAD_SUPPORT
871 /* Persistent volatile download data */
872 struct prism2_download_data *dl_pri;
873 struct prism2_download_data *dl_sec;
874#endif /* PRISM2_DOWNLOAD_SUPPORT */
875
876#ifdef PRISM2_IO_DEBUG
877#define PRISM2_IO_DEBUG_SIZE 10000
878 u32 io_debug[PRISM2_IO_DEBUG_SIZE];
879 int io_debug_head;
880 int io_debug_enabled;
881#endif /* PRISM2_IO_DEBUG */
882
883 /* struct local_info is used also in hostap.o that does not define
884 * any PRISM2_{PCCARD,PLX,PCI}. Make sure that the hardware version
885 * specific fields are in the end of the struct (these could also be
886 * moved to void *priv or something like that). */
887#ifdef PRISM2_PCCARD
888 dev_node_t node;
889 dev_link_t *link;
890 int sandisk_connectplus;
891#endif /* PRISM2_PCCARD */
892
893#ifdef PRISM2_PLX
894 void __iomem *attr_mem;
895 unsigned int cor_offset;
896#endif /* PRISM2_PLX */
897
898#ifdef PRISM2_PCI
899 void __iomem *mem_start;
900#ifdef PRISM2_BUS_MASTER
901 /* bus master for BAP0 (TX) */
902 int bus_m0_tx_idx;
903 u8 *bus_m0_buf;
904
905 /* bus master for BAP1 (RX) */
906 struct sk_buff *rx_skb;
907#endif /* PRISM2_BUS_MASTER */
908#endif /* PRISM2_PCI */
909
910 /* NOTE! Do not add common entries here after hardware version
911 * specific blocks. */
912};
913
914
915/* Per interface private Host AP data
916 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta,
917 * WDS) and netdev_priv(dev) points to this structure. */
918struct hostap_interface {
919 struct list_head list; /* list entry in Host AP interface list */
920 struct net_device *dev; /* pointer to this device */
921 struct local_info *local; /* pointer to shared private data */
922 struct net_device_stats stats;
923 struct iw_spy_data spy_data; /* iwspy support */
924 struct iw_public_data wireless_data;
925
926 enum {
927 HOSTAP_INTERFACE_MASTER,
928 HOSTAP_INTERFACE_MAIN,
929 HOSTAP_INTERFACE_AP,
930 HOSTAP_INTERFACE_STA,
931 HOSTAP_INTERFACE_WDS,
932 } type;
933
934 union {
935 struct hostap_interface_wds {
936 u8 remote_addr[ETH_ALEN];
937 } wds;
938 } u;
939};
940
941
942#define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
943
944/* TX meta data - stored in skb->cb buffer, so this must be not increase over
945 * 48-byte limit */
946struct hostap_skb_tx_data {
947 unsigned int magic; /* HOSTAP_SKB_TX_DATA_MAGIC */
948 int rate; /* transmit rate */
949 struct hostap_interface *iface;
950 unsigned long jiffies; /* queueing timestamp */
951 int wds;
952 unsigned short ethertype;
953 int tx_cb_idx;
954};
955
956
957#ifndef PRISM2_NO_DEBUG
958
959#define DEBUG_FID BIT(0)
960#define DEBUG_PS BIT(1)
961#define DEBUG_FLOW BIT(2)
962#define DEBUG_AP BIT(3)
963#define DEBUG_HW BIT(4)
964#define DEBUG_EXTRA BIT(5)
965#define DEBUG_EXTRA2 BIT(6)
966#define DEBUG_PS2 BIT(7)
967#define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA)
968#define PDEBUG(n, args...) \
969do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
970#define PDEBUG2(n, args...) \
971do { if ((n) & DEBUG_MASK) printk(args); } while (0)
972
973#else /* PRISM2_NO_DEBUG */
974
975#define PDEBUG(n, args...)
976#define PDEBUG2(n, args...)
977
978#endif /* PRISM2_NO_DEBUG */
979
980enum { BAP0 = 0, BAP1 = 1 };
981
982#define PRISM2_IO_DEBUG_CMD_INB 0
983#define PRISM2_IO_DEBUG_CMD_INW 1
984#define PRISM2_IO_DEBUG_CMD_INSW 2
985#define PRISM2_IO_DEBUG_CMD_OUTB 3
986#define PRISM2_IO_DEBUG_CMD_OUTW 4
987#define PRISM2_IO_DEBUG_CMD_OUTSW 5
988#define PRISM2_IO_DEBUG_CMD_ERROR 6
989#define PRISM2_IO_DEBUG_CMD_INTERRUPT 7
990
991#ifdef PRISM2_IO_DEBUG
992
993#define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \
994(((cmd) << 24) | ((reg) << 16) | value)
995
996static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
997 int reg, int value)
998{
999 struct hostap_interface *iface = netdev_priv(dev);
1000 local_info_t *local = iface->local;
1001
1002 if (!local->io_debug_enabled)
1003 return;
1004
1005 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff;
1006 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
1007 local->io_debug_head = 0;
1008 local->io_debug[local->io_debug_head] =
1009 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value);
1010 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
1011 local->io_debug_head = 0;
1012}
1013
1014
1015static inline void prism2_io_debug_error(struct net_device *dev, int err)
1016{
1017 struct hostap_interface *iface = netdev_priv(dev);
1018 local_info_t *local = iface->local;
1019 unsigned long flags;
1020
1021 if (!local->io_debug_enabled)
1022 return;
1023
1024 spin_lock_irqsave(&local->lock, flags);
1025 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err);
1026 if (local->io_debug_enabled == 1) {
1027 local->io_debug_enabled = 0;
1028 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name);
1029 }
1030 spin_unlock_irqrestore(&local->lock, flags);
1031}
1032
1033#else /* PRISM2_IO_DEBUG */
1034
1035static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
1036 int reg, int value)
1037{
1038}
1039
1040static inline void prism2_io_debug_error(struct net_device *dev, int err)
1041{
1042}
1043
1044#endif /* PRISM2_IO_DEBUG */
1045
1046
1047#ifdef PRISM2_CALLBACK
1048enum {
1049 /* Called when card is enabled */
1050 PRISM2_CALLBACK_ENABLE,
1051
1052 /* Called when card is disabled */
1053 PRISM2_CALLBACK_DISABLE,
1054
1055 /* Called when RX/TX starts/ends */
1056 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END,
1057 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END
1058};
1059void prism2_callback(local_info_t *local, int event);
1060#else /* PRISM2_CALLBACK */
1061#define prism2_callback(d, e) do { } while (0)
1062#endif /* PRISM2_CALLBACK */
1063
1064#endif /* __KERNEL__ */
1065
1066#endif /* HOSTAP_WLAN_H */