blob: e4193e3adc7f9dbbbe57c63eac0ee60b32aaa3e5 [file] [log] [blame]
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +00001/*
2 * Based on arch/arm/mm/flush.c
3 *
4 * Copyright (C) 1995-2002 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/export.h>
21#include <linux/mm.h>
22#include <linux/pagemap.h>
23
24#include <asm/cacheflush.h>
25#include <asm/cachetype.h>
26#include <asm/tlbflush.h>
27
28#include "mm.h"
29
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000030void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
31 unsigned long end)
32{
33 if (vma->vm_flags & VM_EXEC)
34 __flush_icache_all();
35}
36
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000037static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
38 unsigned long uaddr, void *kaddr,
39 unsigned long len)
40{
41 if (vma->vm_flags & VM_EXEC) {
42 unsigned long addr = (unsigned long)kaddr;
43 if (icache_is_aliasing()) {
44 __flush_dcache_area(kaddr, len);
45 __flush_icache_all();
46 } else {
47 flush_icache_range(addr, addr + len);
48 }
49 }
50}
51
52/*
53 * Copy user data from/to a page which is mapped into a different processes
54 * address space. Really, we want to allow our "user space" model to handle
55 * this.
56 *
57 * Note that this code needs to run on the current CPU.
58 */
59void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
60 unsigned long uaddr, void *dst, const void *src,
61 unsigned long len)
62{
63#ifdef CONFIG_SMP
64 preempt_disable();
65#endif
66 memcpy(dst, src, len);
67 flush_ptrace_access(vma, page, uaddr, dst, len);
68#ifdef CONFIG_SMP
69 preempt_enable();
70#endif
71}
72
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000073void __sync_icache_dcache(pte_t pte, unsigned long addr)
74{
Catalin Marinas7249b792013-05-01 16:34:22 +010075 struct page *page = pte_page(pte);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000076
Catalin Marinas7249b792013-05-01 16:34:22 +010077 /* no flushing needed for anonymous pages */
78 if (!page_mapping(page))
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000079 return;
80
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000081 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
Catalin Marinasebd88362013-05-01 16:38:23 +010082 __flush_dcache_area(page_address(page), PAGE_SIZE);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000083 __flush_icache_all();
84 } else if (icache_is_aivivt()) {
85 __flush_icache_all();
86 }
87}
88
89/*
Catalin Marinasb5b6c9e2013-05-01 12:23:05 +010090 * This function is called when a page has been modified by the kernel. Mark
91 * it as dirty for later flushing when mapped in user space (if executable,
92 * see __sync_icache_dcache).
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000093 */
94void flush_dcache_page(struct page *page)
95{
Catalin Marinasb5b6c9e2013-05-01 12:23:05 +010096 if (test_bit(PG_dcache_clean, &page->flags))
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000097 clear_bit(PG_dcache_clean, &page->flags);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000098}
99EXPORT_SYMBOL(flush_dcache_page);
100
101/*
102 * Additional functions defined in assembly.
103 */
104EXPORT_SYMBOL(flush_cache_all);
105EXPORT_SYMBOL(flush_icache_range);