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Matthias Bruggerb4756f42014-09-09 17:31:42 +02001/*
2 * Mediatek 8250 driver.
3 *
4 * Copyright (c) 2014 MundoReader S.L.
5 * Author: Matthias Brugger <matthias.bgg@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17#include <linux/clk.h>
18#include <linux/io.h>
Arnd Bergmann88725e92016-02-17 16:02:31 +010019#include <linux/module.h>
Matthias Bruggerb4756f42014-09-09 17:31:42 +020020#include <linux/of_irq.h>
21#include <linux/of_platform.h>
22#include <linux/platform_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/serial_8250.h>
25#include <linux/serial_reg.h>
26
27#include "8250.h"
28
29#define UART_MTK_HIGHS 0x09 /* Highspeed register */
30#define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
31#define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
32#define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
33
34struct mtk8250_data {
35 int line;
36 struct clk *uart_clk;
Sascha Hauerc1c325d2015-04-27 08:49:57 +020037 struct clk *bus_clk;
Matthias Bruggerb4756f42014-09-09 17:31:42 +020038};
39
40static void
41mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
42 struct ktermios *old)
43{
Andy Shevchenko013e3582016-02-18 21:22:59 +020044 struct uart_8250_port *up = up_to_u8250p(port);
Matthias Bruggerb4756f42014-09-09 17:31:42 +020045 unsigned long flags;
46 unsigned int baud, quot;
47
Matthias Bruggerb4756f42014-09-09 17:31:42 +020048 serial8250_do_set_termios(port, termios, old);
49
50 /*
51 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
52 *
53 * We need to recalcualte the quot register, as the claculation depends
54 * on the vaule in the highspeed register.
55 *
56 * Some baudrates are not supported by the chip, so we use the next
57 * lower rate supported and update termios c_flag.
58 *
59 * If highspeed register is set to 3, we need to specify sample count
60 * and sample point to increase accuracy. If not, we reset the
61 * registers to their default values.
62 */
63 baud = uart_get_baud_rate(port, termios, old,
64 port->uartclk / 16 / 0xffff,
Eddie Huang81bb5492016-08-12 10:41:11 +080065 port->uartclk);
Matthias Bruggerb4756f42014-09-09 17:31:42 +020066
67 if (baud <= 115200) {
68 serial_port_out(port, UART_MTK_HIGHS, 0x0);
69 quot = uart_get_divisor(port, baud);
70 } else if (baud <= 576000) {
71 serial_port_out(port, UART_MTK_HIGHS, 0x2);
72
73 /* Set to next lower baudrate supported */
74 if ((baud == 500000) || (baud == 576000))
75 baud = 460800;
Eddie Huang2a768262014-10-22 21:12:07 +080076 quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
Matthias Bruggerb4756f42014-09-09 17:31:42 +020077 } else {
78 serial_port_out(port, UART_MTK_HIGHS, 0x3);
Eddie Huang2a768262014-10-22 21:12:07 +080079 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
Matthias Bruggerb4756f42014-09-09 17:31:42 +020080 }
81
82 /*
83 * Ok, we're now changing the port state. Do it with
84 * interrupts disabled.
85 */
86 spin_lock_irqsave(&port->lock, flags);
87
88 /* set DLAB we have cval saved in up->lcr from the call to the core */
89 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
90 serial_dl_write(up, quot);
91
92 /* reset DLAB */
93 serial_port_out(port, UART_LCR, up->lcr);
94
95 if (baud > 460800) {
96 unsigned int tmp;
97
98 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
99 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
100 serial_port_out(port, UART_MTK_SAMPLE_POINT,
101 (tmp - 2) >> 1);
102 } else {
103 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
104 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
105 }
106
107 spin_unlock_irqrestore(&port->lock, flags);
108 /* Don't rewrite B0 */
109 if (tty_termios_baud_rate(termios))
110 tty_termios_encode_baud_rate(termios, baud, baud);
111}
112
Arnd Bergmann9db669f2016-02-08 14:36:13 +0100113static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
Sascha Hauer68e5fc42015-04-27 08:49:56 +0200114{
115 struct mtk8250_data *data = dev_get_drvdata(dev);
116
117 clk_disable_unprepare(data->uart_clk);
Sascha Hauerc1c325d2015-04-27 08:49:57 +0200118 clk_disable_unprepare(data->bus_clk);
Sascha Hauer68e5fc42015-04-27 08:49:56 +0200119
120 return 0;
121}
122
Arnd Bergmann9db669f2016-02-08 14:36:13 +0100123static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
Sascha Hauer68e5fc42015-04-27 08:49:56 +0200124{
125 struct mtk8250_data *data = dev_get_drvdata(dev);
126 int err;
127
128 err = clk_prepare_enable(data->uart_clk);
129 if (err) {
130 dev_warn(dev, "Can't enable clock\n");
131 return err;
132 }
133
Sascha Hauerc1c325d2015-04-27 08:49:57 +0200134 err = clk_prepare_enable(data->bus_clk);
135 if (err) {
136 dev_warn(dev, "Can't enable bus clock\n");
137 return err;
138 }
139
Sascha Hauer68e5fc42015-04-27 08:49:56 +0200140 return 0;
141}
142
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200143static void
144mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
145{
146 if (!state)
147 pm_runtime_get_sync(port->dev);
148
149 serial8250_do_pm(port, state, old);
150
151 if (state)
152 pm_runtime_put_sync_suspend(port->dev);
153}
154
155static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
156 struct mtk8250_data *data)
157{
Sascha Hauerc1c325d2015-04-27 08:49:57 +0200158 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200159 if (IS_ERR(data->uart_clk)) {
Sascha Hauerc1c325d2015-04-27 08:49:57 +0200160 /*
161 * For compatibility with older device trees try unnamed
162 * clk when no baud clk can be found.
163 */
164 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
165 if (IS_ERR(data->uart_clk)) {
166 dev_warn(&pdev->dev, "Can't get uart clock\n");
167 return PTR_ERR(data->uart_clk);
168 }
169
170 return 0;
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200171 }
172
Sascha Hauerc1c325d2015-04-27 08:49:57 +0200173 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
174 if (IS_ERR(data->bus_clk))
175 return PTR_ERR(data->bus_clk);
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200176
177 return 0;
178}
179
180static int mtk8250_probe(struct platform_device *pdev)
181{
182 struct uart_8250_port uart = {};
183 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
185 struct mtk8250_data *data;
186 int err;
187
188 if (!regs || !irq) {
189 dev_err(&pdev->dev, "no registers/irq defined\n");
190 return -EINVAL;
191 }
192
193 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
194 resource_size(regs));
195 if (!uart.port.membase)
196 return -ENOMEM;
197
198 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
199 if (!data)
200 return -ENOMEM;
201
202 if (pdev->dev.of_node) {
203 err = mtk8250_probe_of(pdev, &uart.port, data);
204 if (err)
205 return err;
206 } else
207 return -ENODEV;
208
209 spin_lock_init(&uart.port.lock);
210 uart.port.mapbase = regs->start;
211 uart.port.irq = irq->start;
212 uart.port.pm = mtk8250_do_pm;
213 uart.port.type = PORT_16550;
214 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
215 uart.port.dev = &pdev->dev;
216 uart.port.iotype = UPIO_MEM32;
217 uart.port.regshift = 2;
218 uart.port.private_data = data;
219 uart.port.set_termios = mtk8250_set_termios;
Sascha Hauerc1c325d2015-04-27 08:49:57 +0200220 uart.port.uartclk = clk_get_rate(data->uart_clk);
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200221
222 /* Disable Rate Fix function */
223 writel(0x0, uart.port.membase +
224 (MTK_UART_RATE_FIX << uart.port.regshift));
225
Sascha Hauer68e5fc42015-04-27 08:49:56 +0200226 platform_set_drvdata(pdev, data);
227
Peter Shih32445bd2018-11-27 12:49:50 +0800228 err = mtk8250_runtime_resume(&pdev->dev);
229 if (err)
230 return err;
Sascha Hauer68e5fc42015-04-27 08:49:56 +0200231
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200232 data->line = serial8250_register_8250_port(&uart);
233 if (data->line < 0)
234 return data->line;
235
Peter Shih32445bd2018-11-27 12:49:50 +0800236 pm_runtime_set_active(&pdev->dev);
237 pm_runtime_enable(&pdev->dev);
238
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200239 return 0;
240}
241
Arnd Bergmann88725e92016-02-17 16:02:31 +0100242static int mtk8250_remove(struct platform_device *pdev)
243{
244 struct mtk8250_data *data = platform_get_drvdata(pdev);
245
246 pm_runtime_get_sync(&pdev->dev);
247
248 serial8250_unregister_port(data->line);
Peter Shih32445bd2018-11-27 12:49:50 +0800249 mtk8250_runtime_suspend(&pdev->dev);
Arnd Bergmann88725e92016-02-17 16:02:31 +0100250
251 pm_runtime_disable(&pdev->dev);
252 pm_runtime_put_noidle(&pdev->dev);
253
Arnd Bergmann88725e92016-02-17 16:02:31 +0100254 return 0;
255}
256
Arnd Bergmann9db669f2016-02-08 14:36:13 +0100257static int __maybe_unused mtk8250_suspend(struct device *dev)
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200258{
259 struct mtk8250_data *data = dev_get_drvdata(dev);
260
261 serial8250_suspend_port(data->line);
262
263 return 0;
264}
265
Arnd Bergmann9db669f2016-02-08 14:36:13 +0100266static int __maybe_unused mtk8250_resume(struct device *dev)
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200267{
268 struct mtk8250_data *data = dev_get_drvdata(dev);
269
270 serial8250_resume_port(data->line);
271
272 return 0;
273}
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200274
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200275static const struct dev_pm_ops mtk8250_pm_ops = {
276 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
277 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
278 NULL)
279};
280
281static const struct of_device_id mtk8250_of_match[] = {
282 { .compatible = "mediatek,mt6577-uart" },
283 { /* Sentinel */ }
284};
Arnd Bergmann88725e92016-02-17 16:02:31 +0100285MODULE_DEVICE_TABLE(of, mtk8250_of_match);
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200286
287static struct platform_driver mtk8250_platform_driver = {
288 .driver = {
Arnd Bergmann88725e92016-02-17 16:02:31 +0100289 .name = "mt6577-uart",
290 .pm = &mtk8250_pm_ops,
291 .of_match_table = mtk8250_of_match,
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200292 },
293 .probe = mtk8250_probe,
Arnd Bergmann88725e92016-02-17 16:02:31 +0100294 .remove = mtk8250_remove,
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200295};
Arnd Bergmann88725e92016-02-17 16:02:31 +0100296module_platform_driver(mtk8250_platform_driver);
Matthias Bruggerb4756f42014-09-09 17:31:42 +0200297
Masahiro Yamadaae739752016-06-06 18:41:02 +0900298#ifdef CONFIG_SERIAL_8250_CONSOLE
Eddie Huang2c40b572015-04-28 21:40:33 +0800299static int __init early_mtk8250_setup(struct earlycon_device *device,
300 const char *options)
301{
302 if (!device->port.membase)
303 return -ENODEV;
304
305 device->port.iotype = UPIO_MEM32;
306
307 return early_serial8250_setup(device, NULL);
308}
309
310OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
Arnd Bergmann7798ede2015-05-19 22:11:09 +0200311#endif
Arnd Bergmann88725e92016-02-17 16:02:31 +0100312
313MODULE_AUTHOR("Matthias Brugger");
314MODULE_LICENSE("GPL");
315MODULE_DESCRIPTION("Mediatek 8250 serial port driver");