Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | #include <engine/ce.h> |
| 25 | #include <engine/falcon.h> |
| 26 | #include "fuc/gf100.fuc3.h" |
| 27 | |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 28 | /******************************************************************************* |
| 29 | * Copy object classes |
| 30 | ******************************************************************************/ |
| 31 | |
| 32 | static struct nvkm_oclass |
| 33 | gf100_ce0_sclass[] = { |
| 34 | { 0x90b5, &nvkm_object_ofuncs }, |
| 35 | {}, |
| 36 | }; |
| 37 | |
| 38 | static struct nvkm_oclass |
| 39 | gf100_ce1_sclass[] = { |
| 40 | { 0x90b8, &nvkm_object_ofuncs }, |
| 41 | {}, |
| 42 | }; |
| 43 | |
| 44 | /******************************************************************************* |
| 45 | * PCE context |
| 46 | ******************************************************************************/ |
| 47 | |
| 48 | static struct nvkm_ofuncs |
| 49 | gf100_ce_context_ofuncs = { |
| 50 | .ctor = _nvkm_falcon_context_ctor, |
| 51 | .dtor = _nvkm_falcon_context_dtor, |
| 52 | .init = _nvkm_falcon_context_init, |
| 53 | .fini = _nvkm_falcon_context_fini, |
| 54 | .rd32 = _nvkm_falcon_context_rd32, |
| 55 | .wr32 = _nvkm_falcon_context_wr32, |
| 56 | }; |
| 57 | |
| 58 | static struct nvkm_oclass |
| 59 | gf100_ce0_cclass = { |
| 60 | .handle = NV_ENGCTX(CE0, 0xc0), |
| 61 | .ofuncs = &gf100_ce_context_ofuncs, |
| 62 | }; |
| 63 | |
| 64 | static struct nvkm_oclass |
| 65 | gf100_ce1_cclass = { |
| 66 | .handle = NV_ENGCTX(CE1, 0xc0), |
| 67 | .ofuncs = &gf100_ce_context_ofuncs, |
| 68 | }; |
| 69 | |
| 70 | /******************************************************************************* |
| 71 | * PCE engine/subdev functions |
| 72 | ******************************************************************************/ |
| 73 | |
| 74 | static int |
| 75 | gf100_ce_init(struct nvkm_object *object) |
| 76 | { |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 77 | struct nvkm_falcon *ce = (void *)object; |
Ben Skeggs | 6390218 | 2015-08-20 14:54:13 +1000 | [diff] [blame^] | 78 | struct nvkm_device *device = ce->engine.subdev.device; |
| 79 | const int idx = nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0; |
| 80 | u32 base = idx * 0x1000; |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 81 | int ret; |
| 82 | |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 83 | ret = nvkm_falcon_init(ce); |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 84 | if (ret) |
| 85 | return ret; |
| 86 | |
Ben Skeggs | 6390218 | 2015-08-20 14:54:13 +1000 | [diff] [blame^] | 87 | nvkm_wr32(device, 0x104084 + base, idx); |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 88 | return 0; |
| 89 | } |
| 90 | |
| 91 | static int |
| 92 | gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
| 93 | struct nvkm_oclass *oclass, void *data, u32 size, |
| 94 | struct nvkm_object **pobject) |
| 95 | { |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 96 | struct nvkm_falcon *ce; |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 97 | int ret; |
| 98 | |
| 99 | ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, true, |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 100 | "PCE0", "ce0", &ce); |
| 101 | *pobject = nv_object(ce); |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 102 | if (ret) |
| 103 | return ret; |
| 104 | |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 105 | nv_subdev(ce)->unit = 0x00000040; |
| 106 | nv_subdev(ce)->intr = gt215_ce_intr; |
| 107 | nv_engine(ce)->cclass = &gf100_ce0_cclass; |
| 108 | nv_engine(ce)->sclass = gf100_ce0_sclass; |
| 109 | nv_falcon(ce)->code.data = gf100_ce_code; |
| 110 | nv_falcon(ce)->code.size = sizeof(gf100_ce_code); |
| 111 | nv_falcon(ce)->data.data = gf100_ce_data; |
| 112 | nv_falcon(ce)->data.size = sizeof(gf100_ce_data); |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | static int |
| 117 | gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, |
| 118 | struct nvkm_oclass *oclass, void *data, u32 size, |
| 119 | struct nvkm_object **pobject) |
| 120 | { |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 121 | struct nvkm_falcon *ce; |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 122 | int ret; |
| 123 | |
| 124 | ret = nvkm_falcon_create(parent, engine, oclass, 0x105000, true, |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 125 | "PCE1", "ce1", &ce); |
| 126 | *pobject = nv_object(ce); |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 127 | if (ret) |
| 128 | return ret; |
| 129 | |
Ben Skeggs | d9261a6 | 2015-08-20 14:54:07 +1000 | [diff] [blame] | 130 | nv_subdev(ce)->unit = 0x00000080; |
| 131 | nv_subdev(ce)->intr = gt215_ce_intr; |
| 132 | nv_engine(ce)->cclass = &gf100_ce1_cclass; |
| 133 | nv_engine(ce)->sclass = gf100_ce1_sclass; |
| 134 | nv_falcon(ce)->code.data = gf100_ce_code; |
| 135 | nv_falcon(ce)->code.size = sizeof(gf100_ce_code); |
| 136 | nv_falcon(ce)->data.data = gf100_ce_data; |
| 137 | nv_falcon(ce)->data.size = sizeof(gf100_ce_data); |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 138 | return 0; |
| 139 | } |
| 140 | |
| 141 | struct nvkm_oclass |
| 142 | gf100_ce0_oclass = { |
| 143 | .handle = NV_ENGINE(CE0, 0xc0), |
| 144 | .ofuncs = &(struct nvkm_ofuncs) { |
| 145 | .ctor = gf100_ce0_ctor, |
| 146 | .dtor = _nvkm_falcon_dtor, |
| 147 | .init = gf100_ce_init, |
| 148 | .fini = _nvkm_falcon_fini, |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 149 | }, |
| 150 | }; |
| 151 | |
| 152 | struct nvkm_oclass |
| 153 | gf100_ce1_oclass = { |
| 154 | .handle = NV_ENGINE(CE1, 0xc0), |
| 155 | .ofuncs = &(struct nvkm_ofuncs) { |
| 156 | .ctor = gf100_ce1_ctor, |
| 157 | .dtor = _nvkm_falcon_dtor, |
| 158 | .init = gf100_ce_init, |
| 159 | .fini = _nvkm_falcon_fini, |
Ben Skeggs | bd6c5ca | 2015-01-14 15:22:32 +1000 | [diff] [blame] | 160 | }, |
| 161 | }; |