Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1 | /* |
| 2 | * wm8990.c -- WM8990 ALSA Soc Audio driver |
| 3 | * |
| 4 | * Copyright 2008 Wolfson Microelectronics PLC. |
| 5 | * Author: Liam Girdwood |
| 6 | * lg@opensource.wolfsonmicro.com or linux@wolfsonmicro.com |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/moduleparam.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/pm.h> |
| 20 | #include <linux/i2c.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <sound/core.h> |
| 23 | #include <sound/pcm.h> |
| 24 | #include <sound/pcm_params.h> |
| 25 | #include <sound/soc.h> |
| 26 | #include <sound/soc-dapm.h> |
| 27 | #include <sound/initval.h> |
| 28 | #include <sound/tlv.h> |
| 29 | #include <asm/div64.h> |
| 30 | |
| 31 | #include "wm8990.h" |
| 32 | |
| 33 | #define AUDIO_NAME "wm8990" |
| 34 | #define WM8990_VERSION "0.2" |
| 35 | |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 36 | /* codec private data */ |
| 37 | struct wm8990_priv { |
| 38 | unsigned int sysclk; |
| 39 | unsigned int pcmclk; |
| 40 | }; |
| 41 | |
| 42 | /* |
| 43 | * wm8990 register cache. Note that register 0 is not included in the |
| 44 | * cache. |
| 45 | */ |
| 46 | static const u16 wm8990_reg[] = { |
| 47 | 0x8990, /* R0 - Reset */ |
| 48 | 0x0000, /* R1 - Power Management (1) */ |
| 49 | 0x6000, /* R2 - Power Management (2) */ |
| 50 | 0x0000, /* R3 - Power Management (3) */ |
| 51 | 0x4050, /* R4 - Audio Interface (1) */ |
| 52 | 0x4000, /* R5 - Audio Interface (2) */ |
| 53 | 0x01C8, /* R6 - Clocking (1) */ |
| 54 | 0x0000, /* R7 - Clocking (2) */ |
| 55 | 0x0040, /* R8 - Audio Interface (3) */ |
| 56 | 0x0040, /* R9 - Audio Interface (4) */ |
| 57 | 0x0004, /* R10 - DAC CTRL */ |
| 58 | 0x00C0, /* R11 - Left DAC Digital Volume */ |
| 59 | 0x00C0, /* R12 - Right DAC Digital Volume */ |
| 60 | 0x0000, /* R13 - Digital Side Tone */ |
| 61 | 0x0100, /* R14 - ADC CTRL */ |
| 62 | 0x00C0, /* R15 - Left ADC Digital Volume */ |
| 63 | 0x00C0, /* R16 - Right ADC Digital Volume */ |
| 64 | 0x0000, /* R17 */ |
| 65 | 0x0000, /* R18 - GPIO CTRL 1 */ |
| 66 | 0x1000, /* R19 - GPIO1 & GPIO2 */ |
| 67 | 0x1010, /* R20 - GPIO3 & GPIO4 */ |
| 68 | 0x1010, /* R21 - GPIO5 & GPIO6 */ |
| 69 | 0x8000, /* R22 - GPIOCTRL 2 */ |
| 70 | 0x0800, /* R23 - GPIO_POL */ |
| 71 | 0x008B, /* R24 - Left Line Input 1&2 Volume */ |
| 72 | 0x008B, /* R25 - Left Line Input 3&4 Volume */ |
| 73 | 0x008B, /* R26 - Right Line Input 1&2 Volume */ |
| 74 | 0x008B, /* R27 - Right Line Input 3&4 Volume */ |
| 75 | 0x0000, /* R28 - Left Output Volume */ |
| 76 | 0x0000, /* R29 - Right Output Volume */ |
| 77 | 0x0066, /* R30 - Line Outputs Volume */ |
| 78 | 0x0022, /* R31 - Out3/4 Volume */ |
| 79 | 0x0079, /* R32 - Left OPGA Volume */ |
| 80 | 0x0079, /* R33 - Right OPGA Volume */ |
| 81 | 0x0003, /* R34 - Speaker Volume */ |
| 82 | 0x0003, /* R35 - ClassD1 */ |
| 83 | 0x0000, /* R36 */ |
| 84 | 0x0100, /* R37 - ClassD3 */ |
| 85 | 0x0000, /* R38 */ |
| 86 | 0x0000, /* R39 - Input Mixer1 */ |
| 87 | 0x0000, /* R40 - Input Mixer2 */ |
| 88 | 0x0000, /* R41 - Input Mixer3 */ |
| 89 | 0x0000, /* R42 - Input Mixer4 */ |
| 90 | 0x0000, /* R43 - Input Mixer5 */ |
| 91 | 0x0000, /* R44 - Input Mixer6 */ |
| 92 | 0x0000, /* R45 - Output Mixer1 */ |
| 93 | 0x0000, /* R46 - Output Mixer2 */ |
| 94 | 0x0000, /* R47 - Output Mixer3 */ |
| 95 | 0x0000, /* R48 - Output Mixer4 */ |
| 96 | 0x0000, /* R49 - Output Mixer5 */ |
| 97 | 0x0000, /* R50 - Output Mixer6 */ |
| 98 | 0x0180, /* R51 - Out3/4 Mixer */ |
| 99 | 0x0000, /* R52 - Line Mixer1 */ |
| 100 | 0x0000, /* R53 - Line Mixer2 */ |
| 101 | 0x0000, /* R54 - Speaker Mixer */ |
| 102 | 0x0000, /* R55 - Additional Control */ |
| 103 | 0x0000, /* R56 - AntiPOP1 */ |
| 104 | 0x0000, /* R57 - AntiPOP2 */ |
| 105 | 0x0000, /* R58 - MICBIAS */ |
| 106 | 0x0000, /* R59 */ |
| 107 | 0x0008, /* R60 - PLL1 */ |
| 108 | 0x0031, /* R61 - PLL2 */ |
| 109 | 0x0026, /* R62 - PLL3 */ |
| 110 | }; |
| 111 | |
| 112 | /* |
| 113 | * read wm8990 register cache |
| 114 | */ |
| 115 | static inline unsigned int wm8990_read_reg_cache(struct snd_soc_codec *codec, |
| 116 | unsigned int reg) |
| 117 | { |
| 118 | u16 *cache = codec->reg_cache; |
| 119 | BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1); |
| 120 | return cache[reg]; |
| 121 | } |
| 122 | |
| 123 | /* |
| 124 | * write wm8990 register cache |
| 125 | */ |
| 126 | static inline void wm8990_write_reg_cache(struct snd_soc_codec *codec, |
| 127 | unsigned int reg, unsigned int value) |
| 128 | { |
| 129 | u16 *cache = codec->reg_cache; |
| 130 | BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1); |
| 131 | |
| 132 | /* Reset register is uncached */ |
| 133 | if (reg == 0) |
| 134 | return; |
| 135 | |
| 136 | cache[reg] = value; |
| 137 | } |
| 138 | |
| 139 | /* |
| 140 | * write to the wm8990 register space |
| 141 | */ |
| 142 | static int wm8990_write(struct snd_soc_codec *codec, unsigned int reg, |
| 143 | unsigned int value) |
| 144 | { |
| 145 | u8 data[3]; |
| 146 | |
| 147 | data[0] = reg & 0xFF; |
| 148 | data[1] = (value >> 8) & 0xFF; |
| 149 | data[2] = value & 0xFF; |
| 150 | |
| 151 | wm8990_write_reg_cache(codec, reg, value); |
| 152 | |
| 153 | if (codec->hw_write(codec->control_data, data, 3) == 2) |
| 154 | return 0; |
| 155 | else |
| 156 | return -EIO; |
| 157 | } |
| 158 | |
| 159 | #define wm8990_reset(c) wm8990_write(c, WM8990_RESET, 0) |
| 160 | |
| 161 | static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600); |
| 162 | |
| 163 | static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000); |
| 164 | |
| 165 | static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, 0, -2100); |
| 166 | |
| 167 | static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600); |
| 168 | |
| 169 | static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0); |
| 170 | |
| 171 | static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0); |
| 172 | |
| 173 | static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763); |
| 174 | |
| 175 | static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0); |
| 176 | |
| 177 | static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, |
| 178 | struct snd_ctl_elem_value *ucontrol) |
| 179 | { |
| 180 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
| 181 | int reg = kcontrol->private_value & 0xff; |
| 182 | int ret; |
| 183 | u16 val; |
| 184 | |
| 185 | ret = snd_soc_put_volsw(kcontrol, ucontrol); |
| 186 | if (ret < 0) |
| 187 | return ret; |
| 188 | |
| 189 | /* now hit the volume update bits (always bit 8) */ |
| 190 | val = wm8990_read_reg_cache(codec, reg); |
| 191 | return wm8990_write(codec, reg, val | 0x0100); |
| 192 | } |
| 193 | |
| 194 | #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ |
| 195 | tlv_array) {\ |
| 196 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
| 197 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ |
| 198 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ |
| 199 | .tlv.p = (tlv_array), \ |
| 200 | .info = snd_soc_info_volsw, \ |
| 201 | .get = snd_soc_get_volsw, .put = wm899x_outpga_put_volsw_vu, \ |
| 202 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } |
| 203 | |
| 204 | |
| 205 | static const char *wm8990_digital_sidetone[] = |
| 206 | {"None", "Left ADC", "Right ADC", "Reserved"}; |
| 207 | |
| 208 | static const struct soc_enum wm8990_left_digital_sidetone_enum = |
| 209 | SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, |
| 210 | WM8990_ADC_TO_DACL_SHIFT, |
| 211 | WM8990_ADC_TO_DACL_MASK, |
| 212 | wm8990_digital_sidetone); |
| 213 | |
| 214 | static const struct soc_enum wm8990_right_digital_sidetone_enum = |
| 215 | SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE, |
| 216 | WM8990_ADC_TO_DACR_SHIFT, |
| 217 | WM8990_ADC_TO_DACR_MASK, |
| 218 | wm8990_digital_sidetone); |
| 219 | |
| 220 | static const char *wm8990_adcmode[] = |
| 221 | {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; |
| 222 | |
| 223 | static const struct soc_enum wm8990_right_adcmode_enum = |
| 224 | SOC_ENUM_SINGLE(WM8990_ADC_CTRL, |
| 225 | WM8990_ADC_HPF_CUT_SHIFT, |
| 226 | WM8990_ADC_HPF_CUT_MASK, |
| 227 | wm8990_adcmode); |
| 228 | |
| 229 | static const struct snd_kcontrol_new wm8990_snd_controls[] = { |
| 230 | /* INMIXL */ |
| 231 | SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0), |
| 232 | SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0), |
| 233 | /* INMIXR */ |
| 234 | SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0), |
| 235 | SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0), |
| 236 | |
| 237 | /* LOMIX */ |
| 238 | SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, |
| 239 | WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv), |
| 240 | SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, |
| 241 | WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv), |
| 242 | SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, |
| 243 | WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv), |
| 244 | SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, |
| 245 | WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv), |
| 246 | SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, |
| 247 | WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), |
| 248 | SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, |
| 249 | WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv), |
| 250 | |
| 251 | /* ROMIX */ |
| 252 | SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, |
| 253 | WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv), |
| 254 | SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, |
| 255 | WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv), |
| 256 | SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, |
| 257 | WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv), |
| 258 | SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, |
| 259 | WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv), |
| 260 | SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6, |
| 261 | WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv), |
| 262 | SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6, |
| 263 | WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv), |
| 264 | |
| 265 | /* LOUT */ |
| 266 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME, |
| 267 | WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv), |
| 268 | SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0), |
| 269 | |
| 270 | /* ROUT */ |
| 271 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME, |
| 272 | WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv), |
| 273 | SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0), |
| 274 | |
| 275 | /* LOPGA */ |
| 276 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME, |
| 277 | WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv), |
| 278 | SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME, |
| 279 | WM8990_LOPGAZC_BIT, 1, 0), |
| 280 | |
| 281 | /* ROPGA */ |
| 282 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME, |
| 283 | WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv), |
| 284 | SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME, |
| 285 | WM8990_ROPGAZC_BIT, 1, 0), |
| 286 | |
| 287 | SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, |
| 288 | WM8990_LONMUTE_BIT, 1, 0), |
| 289 | SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, |
| 290 | WM8990_LOPMUTE_BIT, 1, 0), |
| 291 | SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, |
| 292 | WM8990_LOATTN_BIT, 1, 0), |
| 293 | SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, |
| 294 | WM8990_RONMUTE_BIT, 1, 0), |
| 295 | SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME, |
| 296 | WM8990_ROPMUTE_BIT, 1, 0), |
| 297 | SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME, |
| 298 | WM8990_ROATTN_BIT, 1, 0), |
| 299 | |
| 300 | SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME, |
| 301 | WM8990_OUT3MUTE_BIT, 1, 0), |
| 302 | SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME, |
| 303 | WM8990_OUT3ATTN_BIT, 1, 0), |
| 304 | |
| 305 | SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME, |
| 306 | WM8990_OUT4MUTE_BIT, 1, 0), |
| 307 | SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME, |
| 308 | WM8990_OUT4ATTN_BIT, 1, 0), |
| 309 | |
| 310 | SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1, |
| 311 | WM8990_CDMODE_BIT, 1, 0), |
| 312 | |
| 313 | SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME, |
| 314 | WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0), |
| 315 | SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3, |
| 316 | WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0), |
| 317 | SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3, |
| 318 | WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0), |
| 319 | |
| 320 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", |
| 321 | WM8990_LEFT_DAC_DIGITAL_VOLUME, |
| 322 | WM8990_DACL_VOL_SHIFT, |
| 323 | WM8990_DACL_VOL_MASK, |
| 324 | 0, |
| 325 | out_dac_tlv), |
| 326 | |
| 327 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", |
| 328 | WM8990_RIGHT_DAC_DIGITAL_VOLUME, |
| 329 | WM8990_DACR_VOL_SHIFT, |
| 330 | WM8990_DACR_VOL_MASK, |
| 331 | 0, |
| 332 | out_dac_tlv), |
| 333 | |
| 334 | SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum), |
| 335 | SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum), |
| 336 | |
| 337 | SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, |
| 338 | WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0, |
| 339 | out_sidetone_tlv), |
| 340 | SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE, |
| 341 | WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0, |
| 342 | out_sidetone_tlv), |
| 343 | |
| 344 | SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL, |
| 345 | WM8990_ADC_HPF_ENA_BIT, 1, 0), |
| 346 | |
| 347 | SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum), |
| 348 | |
| 349 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", |
| 350 | WM8990_LEFT_ADC_DIGITAL_VOLUME, |
| 351 | WM8990_ADCL_VOL_SHIFT, |
| 352 | WM8990_ADCL_VOL_MASK, |
| 353 | 0, |
| 354 | in_adc_tlv), |
| 355 | |
| 356 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", |
| 357 | WM8990_RIGHT_ADC_DIGITAL_VOLUME, |
| 358 | WM8990_ADCR_VOL_SHIFT, |
| 359 | WM8990_ADCR_VOL_MASK, |
| 360 | 0, |
| 361 | in_adc_tlv), |
| 362 | |
| 363 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", |
| 364 | WM8990_LEFT_LINE_INPUT_1_2_VOLUME, |
| 365 | WM8990_LIN12VOL_SHIFT, |
| 366 | WM8990_LIN12VOL_MASK, |
| 367 | 0, |
| 368 | in_pga_tlv), |
| 369 | |
| 370 | SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, |
| 371 | WM8990_LI12ZC_BIT, 1, 0), |
| 372 | |
| 373 | SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME, |
| 374 | WM8990_LI12MUTE_BIT, 1, 0), |
| 375 | |
| 376 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", |
| 377 | WM8990_LEFT_LINE_INPUT_3_4_VOLUME, |
| 378 | WM8990_LIN34VOL_SHIFT, |
| 379 | WM8990_LIN34VOL_MASK, |
| 380 | 0, |
| 381 | in_pga_tlv), |
| 382 | |
| 383 | SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, |
| 384 | WM8990_LI34ZC_BIT, 1, 0), |
| 385 | |
| 386 | SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME, |
| 387 | WM8990_LI34MUTE_BIT, 1, 0), |
| 388 | |
| 389 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", |
| 390 | WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, |
| 391 | WM8990_RIN12VOL_SHIFT, |
| 392 | WM8990_RIN12VOL_MASK, |
| 393 | 0, |
| 394 | in_pga_tlv), |
| 395 | |
| 396 | SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, |
| 397 | WM8990_RI12ZC_BIT, 1, 0), |
| 398 | |
| 399 | SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME, |
| 400 | WM8990_RI12MUTE_BIT, 1, 0), |
| 401 | |
| 402 | SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", |
| 403 | WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, |
| 404 | WM8990_RIN34VOL_SHIFT, |
| 405 | WM8990_RIN34VOL_MASK, |
| 406 | 0, |
| 407 | in_pga_tlv), |
| 408 | |
| 409 | SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, |
| 410 | WM8990_RI34ZC_BIT, 1, 0), |
| 411 | |
| 412 | SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, |
| 413 | WM8990_RI34MUTE_BIT, 1, 0), |
| 414 | |
| 415 | }; |
| 416 | |
| 417 | /* add non dapm controls */ |
| 418 | static int wm8990_add_controls(struct snd_soc_codec *codec) |
| 419 | { |
| 420 | int err, i; |
| 421 | |
| 422 | for (i = 0; i < ARRAY_SIZE(wm8990_snd_controls); i++) { |
| 423 | err = snd_ctl_add(codec->card, |
| 424 | snd_soc_cnew(&wm8990_snd_controls[i], codec, |
| 425 | NULL)); |
| 426 | if (err < 0) |
| 427 | return err; |
| 428 | } |
| 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | /* |
| 433 | * _DAPM_ Controls |
| 434 | */ |
| 435 | |
| 436 | static int inmixer_event(struct snd_soc_dapm_widget *w, |
| 437 | struct snd_kcontrol *kcontrol, int event) |
| 438 | { |
| 439 | u16 reg, fakepower; |
| 440 | |
| 441 | reg = wm8990_read_reg_cache(w->codec, WM8990_POWER_MANAGEMENT_2); |
| 442 | fakepower = wm8990_read_reg_cache(w->codec, WM8990_INTDRIVBITS); |
| 443 | |
| 444 | if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | |
| 445 | (1 << WM8990_AINLMUX_PWR_BIT))) { |
| 446 | reg |= WM8990_AINL_ENA; |
| 447 | } else { |
| 448 | reg &= ~WM8990_AINL_ENA; |
| 449 | } |
| 450 | |
| 451 | if (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | |
| 452 | (1 << WM8990_AINRMUX_PWR_BIT))) { |
| 453 | reg |= WM8990_AINR_ENA; |
| 454 | } else { |
| 455 | reg &= ~WM8990_AINL_ENA; |
| 456 | } |
| 457 | wm8990_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); |
| 458 | |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | static int outmixer_event(struct snd_soc_dapm_widget *w, |
| 463 | struct snd_kcontrol *kcontrol, int event) |
| 464 | { |
| 465 | u32 reg_shift = kcontrol->private_value & 0xfff; |
| 466 | int ret = 0; |
| 467 | u16 reg; |
| 468 | |
| 469 | switch (reg_shift) { |
| 470 | case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : |
| 471 | reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER1); |
| 472 | if (reg & WM8990_LDLO) { |
| 473 | printk(KERN_WARNING |
| 474 | "Cannot set as Output Mixer 1 LDLO Set\n"); |
| 475 | ret = -1; |
| 476 | } |
| 477 | break; |
| 478 | case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): |
| 479 | reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER2); |
| 480 | if (reg & WM8990_RDRO) { |
| 481 | printk(KERN_WARNING |
| 482 | "Cannot set as Output Mixer 2 RDRO Set\n"); |
| 483 | ret = -1; |
| 484 | } |
| 485 | break; |
| 486 | case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): |
| 487 | reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); |
| 488 | if (reg & WM8990_LDSPK) { |
| 489 | printk(KERN_WARNING |
| 490 | "Cannot set as Speaker Mixer LDSPK Set\n"); |
| 491 | ret = -1; |
| 492 | } |
| 493 | break; |
| 494 | case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): |
| 495 | reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); |
| 496 | if (reg & WM8990_RDSPK) { |
| 497 | printk(KERN_WARNING |
| 498 | "Cannot set as Speaker Mixer RDSPK Set\n"); |
| 499 | ret = -1; |
| 500 | } |
| 501 | break; |
| 502 | } |
| 503 | |
| 504 | return ret; |
| 505 | } |
| 506 | |
| 507 | /* INMIX dB values */ |
| 508 | static const unsigned int in_mix_tlv[] = { |
| 509 | TLV_DB_RANGE_HEAD(1), |
| 510 | 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600), |
| 511 | }; |
| 512 | |
| 513 | /* Left In PGA Connections */ |
| 514 | static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = { |
| 515 | SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0), |
| 516 | SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0), |
| 517 | }; |
| 518 | |
| 519 | static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = { |
| 520 | SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0), |
| 521 | SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0), |
| 522 | }; |
| 523 | |
| 524 | /* Right In PGA Connections */ |
| 525 | static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = { |
| 526 | SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0), |
| 527 | SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0), |
| 528 | }; |
| 529 | |
| 530 | static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = { |
| 531 | SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0), |
| 532 | SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0), |
| 533 | }; |
| 534 | |
| 535 | /* INMIXL */ |
| 536 | static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = { |
| 537 | SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3, |
| 538 | WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv), |
| 539 | SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT, |
| 540 | 7, 0, in_mix_tlv), |
| 541 | SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, |
| 542 | 1, 0), |
| 543 | SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, |
| 544 | 1, 0), |
| 545 | }; |
| 546 | |
| 547 | /* INMIXR */ |
| 548 | static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = { |
| 549 | SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4, |
| 550 | WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv), |
| 551 | SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT, |
| 552 | 7, 0, in_mix_tlv), |
| 553 | SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT, |
| 554 | 1, 0), |
| 555 | SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT, |
| 556 | 1, 0), |
| 557 | }; |
| 558 | |
| 559 | /* AINLMUX */ |
| 560 | static const char *wm8990_ainlmux[] = |
| 561 | {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; |
| 562 | |
| 563 | static const struct soc_enum wm8990_ainlmux_enum = |
| 564 | SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT, |
| 565 | ARRAY_SIZE(wm8990_ainlmux), wm8990_ainlmux); |
| 566 | |
| 567 | static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls = |
| 568 | SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum); |
| 569 | |
| 570 | /* DIFFINL */ |
| 571 | |
| 572 | /* AINRMUX */ |
| 573 | static const char *wm8990_ainrmux[] = |
| 574 | {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; |
| 575 | |
| 576 | static const struct soc_enum wm8990_ainrmux_enum = |
| 577 | SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT, |
| 578 | ARRAY_SIZE(wm8990_ainrmux), wm8990_ainrmux); |
| 579 | |
| 580 | static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = |
| 581 | SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); |
| 582 | |
| 583 | /* RXVOICE */ |
| 584 | static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { |
| 585 | SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, |
| 586 | WM8990_LR4BVOL_MASK, 0, in_mix_tlv), |
| 587 | SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, |
| 588 | WM8990_RL4BVOL_MASK, 0, in_mix_tlv), |
| 589 | }; |
| 590 | |
| 591 | /* LOMIX */ |
| 592 | static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { |
| 593 | SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, |
| 594 | WM8990_LRBLO_BIT, 1, 0), |
| 595 | SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1, |
| 596 | WM8990_LLBLO_BIT, 1, 0), |
| 597 | SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, |
| 598 | WM8990_LRI3LO_BIT, 1, 0), |
| 599 | SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1, |
| 600 | WM8990_LLI3LO_BIT, 1, 0), |
| 601 | SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, |
| 602 | WM8990_LR12LO_BIT, 1, 0), |
| 603 | SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1, |
| 604 | WM8990_LL12LO_BIT, 1, 0), |
| 605 | SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1, |
| 606 | WM8990_LDLO_BIT, 1, 0), |
| 607 | }; |
| 608 | |
| 609 | /* ROMIX */ |
| 610 | static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = { |
| 611 | SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2, |
| 612 | WM8990_RLBRO_BIT, 1, 0), |
| 613 | SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2, |
| 614 | WM8990_RRBRO_BIT, 1, 0), |
| 615 | SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, |
| 616 | WM8990_RLI3RO_BIT, 1, 0), |
| 617 | SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2, |
| 618 | WM8990_RRI3RO_BIT, 1, 0), |
| 619 | SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, |
| 620 | WM8990_RL12RO_BIT, 1, 0), |
| 621 | SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2, |
| 622 | WM8990_RR12RO_BIT, 1, 0), |
| 623 | SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2, |
| 624 | WM8990_RDRO_BIT, 1, 0), |
| 625 | }; |
| 626 | |
| 627 | /* LONMIX */ |
| 628 | static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = { |
| 629 | SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, |
| 630 | WM8990_LLOPGALON_BIT, 1, 0), |
| 631 | SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1, |
| 632 | WM8990_LROPGALON_BIT, 1, 0), |
| 633 | SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1, |
| 634 | WM8990_LOPLON_BIT, 1, 0), |
| 635 | }; |
| 636 | |
| 637 | /* LOPMIX */ |
| 638 | static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = { |
| 639 | SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1, |
| 640 | WM8990_LR12LOP_BIT, 1, 0), |
| 641 | SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1, |
| 642 | WM8990_LL12LOP_BIT, 1, 0), |
| 643 | SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1, |
| 644 | WM8990_LLOPGALOP_BIT, 1, 0), |
| 645 | }; |
| 646 | |
| 647 | /* RONMIX */ |
| 648 | static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = { |
| 649 | SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, |
| 650 | WM8990_RROPGARON_BIT, 1, 0), |
| 651 | SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2, |
| 652 | WM8990_RLOPGARON_BIT, 1, 0), |
| 653 | SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2, |
| 654 | WM8990_ROPRON_BIT, 1, 0), |
| 655 | }; |
| 656 | |
| 657 | /* ROPMIX */ |
| 658 | static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = { |
| 659 | SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2, |
| 660 | WM8990_RL12ROP_BIT, 1, 0), |
| 661 | SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2, |
| 662 | WM8990_RR12ROP_BIT, 1, 0), |
| 663 | SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2, |
| 664 | WM8990_RROPGAROP_BIT, 1, 0), |
| 665 | }; |
| 666 | |
| 667 | /* OUT3MIX */ |
| 668 | static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = { |
| 669 | SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, |
| 670 | WM8990_LI4O3_BIT, 1, 0), |
| 671 | SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER, |
| 672 | WM8990_LPGAO3_BIT, 1, 0), |
| 673 | }; |
| 674 | |
| 675 | /* OUT4MIX */ |
| 676 | static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = { |
| 677 | SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER, |
| 678 | WM8990_RPGAO4_BIT, 1, 0), |
| 679 | SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER, |
| 680 | WM8990_RI4O4_BIT, 1, 0), |
| 681 | }; |
| 682 | |
| 683 | /* SPKMIX */ |
| 684 | static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = { |
| 685 | SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER, |
| 686 | WM8990_LI2SPK_BIT, 1, 0), |
| 687 | SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER, |
| 688 | WM8990_LB2SPK_BIT, 1, 0), |
| 689 | SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER, |
| 690 | WM8990_LOPGASPK_BIT, 1, 0), |
| 691 | SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER, |
| 692 | WM8990_LDSPK_BIT, 1, 0), |
| 693 | SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER, |
| 694 | WM8990_RDSPK_BIT, 1, 0), |
| 695 | SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER, |
| 696 | WM8990_ROPGASPK_BIT, 1, 0), |
| 697 | SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER, |
| 698 | WM8990_RL12ROP_BIT, 1, 0), |
| 699 | SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER, |
| 700 | WM8990_RI2SPK_BIT, 1, 0), |
| 701 | }; |
| 702 | |
| 703 | static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = { |
| 704 | /* Input Side */ |
| 705 | /* Input Lines */ |
| 706 | SND_SOC_DAPM_INPUT("LIN1"), |
| 707 | SND_SOC_DAPM_INPUT("LIN2"), |
| 708 | SND_SOC_DAPM_INPUT("LIN3"), |
| 709 | SND_SOC_DAPM_INPUT("LIN4/RXN"), |
| 710 | SND_SOC_DAPM_INPUT("RIN3"), |
| 711 | SND_SOC_DAPM_INPUT("RIN4/RXP"), |
| 712 | SND_SOC_DAPM_INPUT("RIN1"), |
| 713 | SND_SOC_DAPM_INPUT("RIN2"), |
| 714 | SND_SOC_DAPM_INPUT("Internal ADC Source"), |
| 715 | |
| 716 | /* DACs */ |
| 717 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, |
| 718 | WM8990_ADCL_ENA_BIT, 0), |
| 719 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2, |
| 720 | WM8990_ADCR_ENA_BIT, 0), |
| 721 | |
| 722 | /* Input PGAs */ |
| 723 | SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT, |
| 724 | 0, &wm8990_dapm_lin12_pga_controls[0], |
| 725 | ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)), |
| 726 | SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT, |
| 727 | 0, &wm8990_dapm_lin34_pga_controls[0], |
| 728 | ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)), |
| 729 | SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT, |
| 730 | 0, &wm8990_dapm_rin12_pga_controls[0], |
| 731 | ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)), |
| 732 | SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, |
| 733 | 0, &wm8990_dapm_rin34_pga_controls[0], |
| 734 | ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), |
| 735 | |
| 736 | /* INMIXL */ |
| 737 | SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS, WM8990_INMIXL_PWR_BIT, 0, |
| 738 | &wm8990_dapm_inmixl_controls[0], |
| 739 | ARRAY_SIZE(wm8990_dapm_inmixl_controls), |
| 740 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), |
| 741 | |
| 742 | /* AINLMUX */ |
| 743 | SND_SOC_DAPM_MUX_E("AILNMUX", WM8990_INTDRIVBITS, WM8990_AINLMUX_PWR_BIT, 0, |
| 744 | &wm8990_dapm_ainlmux_controls, inmixer_event, |
| 745 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), |
| 746 | |
| 747 | /* INMIXR */ |
| 748 | SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS, WM8990_INMIXR_PWR_BIT, 0, |
| 749 | &wm8990_dapm_inmixr_controls[0], |
| 750 | ARRAY_SIZE(wm8990_dapm_inmixr_controls), |
| 751 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), |
| 752 | |
| 753 | /* AINRMUX */ |
| 754 | SND_SOC_DAPM_MUX_E("AIRNMUX", WM8990_INTDRIVBITS, WM8990_AINRMUX_PWR_BIT, 0, |
| 755 | &wm8990_dapm_ainrmux_controls, inmixer_event, |
| 756 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), |
| 757 | |
| 758 | /* Output Side */ |
| 759 | /* DACs */ |
| 760 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3, |
| 761 | WM8990_DACL_ENA_BIT, 0), |
| 762 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3, |
| 763 | WM8990_DACR_ENA_BIT, 0), |
| 764 | |
| 765 | /* LOMIX */ |
| 766 | SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT, |
| 767 | 0, &wm8990_dapm_lomix_controls[0], |
| 768 | ARRAY_SIZE(wm8990_dapm_lomix_controls), |
| 769 | outmixer_event, SND_SOC_DAPM_PRE_REG), |
| 770 | |
| 771 | /* LONMIX */ |
| 772 | SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0, |
| 773 | &wm8990_dapm_lonmix_controls[0], |
| 774 | ARRAY_SIZE(wm8990_dapm_lonmix_controls)), |
| 775 | |
| 776 | /* LOPMIX */ |
| 777 | SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0, |
| 778 | &wm8990_dapm_lopmix_controls[0], |
| 779 | ARRAY_SIZE(wm8990_dapm_lopmix_controls)), |
| 780 | |
| 781 | /* OUT3MIX */ |
| 782 | SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0, |
| 783 | &wm8990_dapm_out3mix_controls[0], |
| 784 | ARRAY_SIZE(wm8990_dapm_out3mix_controls)), |
| 785 | |
| 786 | /* SPKMIX */ |
| 787 | SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0, |
| 788 | &wm8990_dapm_spkmix_controls[0], |
| 789 | ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event, |
| 790 | SND_SOC_DAPM_PRE_REG), |
| 791 | |
| 792 | /* OUT4MIX */ |
| 793 | SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0, |
| 794 | &wm8990_dapm_out4mix_controls[0], |
| 795 | ARRAY_SIZE(wm8990_dapm_out4mix_controls)), |
| 796 | |
| 797 | /* ROPMIX */ |
| 798 | SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0, |
| 799 | &wm8990_dapm_ropmix_controls[0], |
| 800 | ARRAY_SIZE(wm8990_dapm_ropmix_controls)), |
| 801 | |
| 802 | /* RONMIX */ |
| 803 | SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0, |
| 804 | &wm8990_dapm_ronmix_controls[0], |
| 805 | ARRAY_SIZE(wm8990_dapm_ronmix_controls)), |
| 806 | |
| 807 | /* ROMIX */ |
| 808 | SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT, |
| 809 | 0, &wm8990_dapm_romix_controls[0], |
| 810 | ARRAY_SIZE(wm8990_dapm_romix_controls), |
| 811 | outmixer_event, SND_SOC_DAPM_PRE_REG), |
| 812 | |
| 813 | /* LOUT PGA */ |
| 814 | SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0, |
| 815 | NULL, 0), |
| 816 | |
| 817 | /* ROUT PGA */ |
| 818 | SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0, |
| 819 | NULL, 0), |
| 820 | |
| 821 | /* LOPGA */ |
| 822 | SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0, |
| 823 | NULL, 0), |
| 824 | |
| 825 | /* ROPGA */ |
| 826 | SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0, |
| 827 | NULL, 0), |
| 828 | |
| 829 | /* MICBIAS */ |
| 830 | SND_SOC_DAPM_MICBIAS("MICBIAS", WM8990_POWER_MANAGEMENT_1, |
| 831 | WM8990_MICBIAS_ENA_BIT, 0), |
| 832 | |
| 833 | SND_SOC_DAPM_OUTPUT("LON"), |
| 834 | SND_SOC_DAPM_OUTPUT("LOP"), |
| 835 | SND_SOC_DAPM_OUTPUT("OUT3"), |
| 836 | SND_SOC_DAPM_OUTPUT("LOUT"), |
| 837 | SND_SOC_DAPM_OUTPUT("SPKN"), |
| 838 | SND_SOC_DAPM_OUTPUT("SPKP"), |
| 839 | SND_SOC_DAPM_OUTPUT("ROUT"), |
| 840 | SND_SOC_DAPM_OUTPUT("OUT4"), |
| 841 | SND_SOC_DAPM_OUTPUT("ROP"), |
| 842 | SND_SOC_DAPM_OUTPUT("RON"), |
| 843 | |
| 844 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), |
| 845 | }; |
| 846 | |
| 847 | static const struct snd_soc_dapm_route audio_map[] = { |
| 848 | /* Make DACs turn on when playing even if not mixed into any outputs */ |
| 849 | {"Internal DAC Sink", NULL, "Left DAC"}, |
| 850 | {"Internal DAC Sink", NULL, "Right DAC"}, |
| 851 | |
| 852 | /* Make ADCs turn on when recording even if not mixed from any inputs */ |
| 853 | {"Left ADC", NULL, "Internal ADC Source"}, |
| 854 | {"Right ADC", NULL, "Internal ADC Source"}, |
| 855 | |
| 856 | /* Input Side */ |
| 857 | /* LIN12 PGA */ |
| 858 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, |
| 859 | {"LIN12 PGA", "LIN2 Switch", "LIN2"}, |
| 860 | /* LIN34 PGA */ |
| 861 | {"LIN34 PGA", "LIN3 Switch", "LIN3"}, |
| 862 | {"LIN34 PGA", "LIN4 Switch", "LIN4"}, |
| 863 | /* INMIXL */ |
| 864 | {"INMIXL", "Record Left Volume", "LOMIX"}, |
| 865 | {"INMIXL", "LIN2 Volume", "LIN2"}, |
| 866 | {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, |
| 867 | {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, |
| 868 | /* AILNMUX */ |
| 869 | {"AILNMUX", "INMIXL Mix", "INMIXL"}, |
| 870 | {"AILNMUX", "DIFFINL Mix", "LIN12PGA"}, |
| 871 | {"AILNMUX", "DIFFINL Mix", "LIN34PGA"}, |
| 872 | {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"}, |
| 873 | {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"}, |
| 874 | /* ADC */ |
| 875 | {"Left ADC", NULL, "AILNMUX"}, |
| 876 | |
| 877 | /* RIN12 PGA */ |
| 878 | {"RIN12 PGA", "RIN1 Switch", "RIN1"}, |
| 879 | {"RIN12 PGA", "RIN2 Switch", "RIN2"}, |
| 880 | /* RIN34 PGA */ |
| 881 | {"RIN34 PGA", "RIN3 Switch", "RIN3"}, |
| 882 | {"RIN34 PGA", "RIN4 Switch", "RIN4"}, |
| 883 | /* INMIXL */ |
| 884 | {"INMIXR", "Record Right Volume", "ROMIX"}, |
| 885 | {"INMIXR", "RIN2 Volume", "RIN2"}, |
| 886 | {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, |
| 887 | {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, |
| 888 | /* AIRNMUX */ |
| 889 | {"AIRNMUX", "INMIXR Mix", "INMIXR"}, |
| 890 | {"AIRNMUX", "DIFFINR Mix", "RIN12PGA"}, |
| 891 | {"AIRNMUX", "DIFFINR Mix", "RIN34PGA"}, |
| 892 | {"AIRNMUX", "RXVOICE Mix", "RIN4/RXN"}, |
| 893 | {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"}, |
| 894 | /* ADC */ |
| 895 | {"Right ADC", NULL, "AIRNMUX"}, |
| 896 | |
| 897 | /* LOMIX */ |
| 898 | {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, |
| 899 | {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, |
| 900 | {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, |
| 901 | {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, |
| 902 | {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, |
| 903 | {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, |
| 904 | {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, |
| 905 | |
| 906 | /* ROMIX */ |
| 907 | {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, |
| 908 | {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, |
| 909 | {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, |
| 910 | {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, |
| 911 | {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, |
| 912 | {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, |
| 913 | {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, |
| 914 | |
| 915 | /* SPKMIX */ |
| 916 | {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, |
| 917 | {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, |
| 918 | {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, |
| 919 | {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, |
| 920 | {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, |
| 921 | {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, |
| 922 | {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, |
| 923 | {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"}, |
| 924 | |
| 925 | /* LONMIX */ |
| 926 | {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, |
| 927 | {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, |
| 928 | {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, |
| 929 | |
| 930 | /* LOPMIX */ |
| 931 | {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, |
| 932 | {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, |
| 933 | {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, |
| 934 | |
| 935 | /* OUT3MIX */ |
| 936 | {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXP"}, |
| 937 | {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, |
| 938 | |
| 939 | /* OUT4MIX */ |
| 940 | {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, |
| 941 | {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, |
| 942 | |
| 943 | /* RONMIX */ |
| 944 | {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, |
| 945 | {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, |
| 946 | {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, |
| 947 | |
| 948 | /* ROPMIX */ |
| 949 | {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, |
| 950 | {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, |
| 951 | {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, |
| 952 | |
| 953 | /* Out Mixer PGAs */ |
| 954 | {"LOPGA", NULL, "LOMIX"}, |
| 955 | {"ROPGA", NULL, "ROMIX"}, |
| 956 | |
| 957 | {"LOUT PGA", NULL, "LOMIX"}, |
| 958 | {"ROUT PGA", NULL, "ROMIX"}, |
| 959 | |
| 960 | /* Output Pins */ |
| 961 | {"LON", NULL, "LONMIX"}, |
| 962 | {"LOP", NULL, "LOPMIX"}, |
| 963 | {"OUT", NULL, "OUT3MIX"}, |
| 964 | {"LOUT", NULL, "LOUT PGA"}, |
| 965 | {"SPKN", NULL, "SPKMIX"}, |
| 966 | {"ROUT", NULL, "ROUT PGA"}, |
| 967 | {"OUT4", NULL, "OUT4MIX"}, |
| 968 | {"ROP", NULL, "ROPMIX"}, |
| 969 | {"RON", NULL, "RONMIX"}, |
| 970 | }; |
| 971 | |
| 972 | static int wm8990_add_widgets(struct snd_soc_codec *codec) |
| 973 | { |
| 974 | snd_soc_dapm_new_controls(codec, wm8990_dapm_widgets, |
| 975 | ARRAY_SIZE(wm8990_dapm_widgets)); |
| 976 | |
| 977 | /* set up the WM8990 audio map */ |
| 978 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); |
| 979 | |
| 980 | snd_soc_dapm_new_widgets(codec); |
| 981 | return 0; |
| 982 | } |
| 983 | |
| 984 | /* PLL divisors */ |
| 985 | struct _pll_div { |
| 986 | u32 div2; |
| 987 | u32 n; |
| 988 | u32 k; |
| 989 | }; |
| 990 | |
| 991 | /* The size in bits of the pll divide multiplied by 10 |
| 992 | * to allow rounding later */ |
| 993 | #define FIXED_PLL_SIZE ((1 << 16) * 10) |
| 994 | |
| 995 | static void pll_factors(struct _pll_div *pll_div, unsigned int target, |
| 996 | unsigned int source) |
| 997 | { |
| 998 | u64 Kpart; |
| 999 | unsigned int K, Ndiv, Nmod; |
| 1000 | |
| 1001 | |
| 1002 | Ndiv = target / source; |
| 1003 | if (Ndiv < 6) { |
| 1004 | source >>= 1; |
| 1005 | pll_div->div2 = 1; |
| 1006 | Ndiv = target / source; |
| 1007 | } else |
| 1008 | pll_div->div2 = 0; |
| 1009 | |
| 1010 | if ((Ndiv < 6) || (Ndiv > 12)) |
| 1011 | printk(KERN_WARNING |
| 1012 | "WM8990 N value outwith recommended range! N = %d\n", Ndiv); |
| 1013 | |
| 1014 | pll_div->n = Ndiv; |
| 1015 | Nmod = target % source; |
| 1016 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; |
| 1017 | |
| 1018 | do_div(Kpart, source); |
| 1019 | |
| 1020 | K = Kpart & 0xFFFFFFFF; |
| 1021 | |
| 1022 | /* Check if we need to round */ |
| 1023 | if ((K % 10) >= 5) |
| 1024 | K += 5; |
| 1025 | |
| 1026 | /* Move down to proper range now rounding is done */ |
| 1027 | K /= 10; |
| 1028 | |
| 1029 | pll_div->k = K; |
| 1030 | } |
| 1031 | |
Liam Girdwood | e550e17 | 2008-07-07 16:07:52 +0100 | [diff] [blame] | 1032 | static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1033 | int pll_id, unsigned int freq_in, unsigned int freq_out) |
| 1034 | { |
| 1035 | u16 reg; |
| 1036 | struct snd_soc_codec *codec = codec_dai->codec; |
| 1037 | struct _pll_div pll_div; |
| 1038 | |
| 1039 | if (freq_in && freq_out) { |
| 1040 | pll_factors(&pll_div, freq_out * 4, freq_in); |
| 1041 | |
| 1042 | /* Turn on PLL */ |
| 1043 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); |
| 1044 | reg |= WM8990_PLL_ENA; |
| 1045 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); |
| 1046 | |
| 1047 | /* sysclk comes from PLL */ |
| 1048 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2); |
| 1049 | wm8990_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC); |
| 1050 | |
| 1051 | /* set up N , fractional mode and pre-divisor if neccessary */ |
| 1052 | wm8990_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | |
| 1053 | (pll_div.div2?WM8990_PRESCALE:0)); |
| 1054 | wm8990_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); |
| 1055 | wm8990_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); |
| 1056 | } else { |
| 1057 | /* Turn on PLL */ |
| 1058 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); |
| 1059 | reg &= ~WM8990_PLL_ENA; |
| 1060 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); |
| 1061 | } |
| 1062 | return 0; |
| 1063 | } |
| 1064 | |
| 1065 | /* |
| 1066 | * Clock after PLL and dividers |
| 1067 | */ |
Liam Girdwood | e550e17 | 2008-07-07 16:07:52 +0100 | [diff] [blame] | 1068 | static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1069 | int clk_id, unsigned int freq, int dir) |
| 1070 | { |
| 1071 | struct snd_soc_codec *codec = codec_dai->codec; |
| 1072 | struct wm8990_priv *wm8990 = codec->private_data; |
| 1073 | |
| 1074 | wm8990->sysclk = freq; |
| 1075 | return 0; |
| 1076 | } |
| 1077 | |
| 1078 | /* |
| 1079 | * Set's ADC and Voice DAC format. |
| 1080 | */ |
Liam Girdwood | e550e17 | 2008-07-07 16:07:52 +0100 | [diff] [blame] | 1081 | static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1082 | unsigned int fmt) |
| 1083 | { |
| 1084 | struct snd_soc_codec *codec = codec_dai->codec; |
| 1085 | u16 audio1, audio3; |
| 1086 | |
| 1087 | audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); |
| 1088 | audio3 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_3); |
| 1089 | |
| 1090 | /* set master/slave audio interface */ |
| 1091 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 1092 | case SND_SOC_DAIFMT_CBS_CFS: |
| 1093 | audio3 &= ~WM8990_AIF_MSTR1; |
| 1094 | break; |
| 1095 | case SND_SOC_DAIFMT_CBM_CFM: |
| 1096 | audio3 |= WM8990_AIF_MSTR1; |
| 1097 | break; |
| 1098 | default: |
| 1099 | return -EINVAL; |
| 1100 | } |
| 1101 | |
| 1102 | audio1 &= ~WM8990_AIF_FMT_MASK; |
| 1103 | |
| 1104 | /* interface format */ |
| 1105 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 1106 | case SND_SOC_DAIFMT_I2S: |
| 1107 | audio1 |= WM8990_AIF_TMF_I2S; |
| 1108 | audio1 &= ~WM8990_AIF_LRCLK_INV; |
| 1109 | break; |
| 1110 | case SND_SOC_DAIFMT_RIGHT_J: |
| 1111 | audio1 |= WM8990_AIF_TMF_RIGHTJ; |
| 1112 | audio1 &= ~WM8990_AIF_LRCLK_INV; |
| 1113 | break; |
| 1114 | case SND_SOC_DAIFMT_LEFT_J: |
| 1115 | audio1 |= WM8990_AIF_TMF_LEFTJ; |
| 1116 | audio1 &= ~WM8990_AIF_LRCLK_INV; |
| 1117 | break; |
| 1118 | case SND_SOC_DAIFMT_DSP_A: |
| 1119 | audio1 |= WM8990_AIF_TMF_DSP; |
| 1120 | audio1 &= ~WM8990_AIF_LRCLK_INV; |
| 1121 | break; |
| 1122 | case SND_SOC_DAIFMT_DSP_B: |
| 1123 | audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV; |
| 1124 | break; |
| 1125 | default: |
| 1126 | return -EINVAL; |
| 1127 | } |
| 1128 | |
| 1129 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); |
| 1130 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); |
| 1131 | return 0; |
| 1132 | } |
| 1133 | |
Liam Girdwood | e550e17 | 2008-07-07 16:07:52 +0100 | [diff] [blame] | 1134 | static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1135 | int div_id, int div) |
| 1136 | { |
| 1137 | struct snd_soc_codec *codec = codec_dai->codec; |
| 1138 | u16 reg; |
| 1139 | |
| 1140 | switch (div_id) { |
| 1141 | case WM8990_MCLK_DIV: |
| 1142 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & |
| 1143 | ~WM8990_MCLK_DIV_MASK; |
| 1144 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); |
| 1145 | break; |
| 1146 | case WM8990_DACCLK_DIV: |
| 1147 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & |
| 1148 | ~WM8990_DAC_CLKDIV_MASK; |
| 1149 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); |
| 1150 | break; |
| 1151 | case WM8990_ADCCLK_DIV: |
| 1152 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & |
| 1153 | ~WM8990_ADC_CLKDIV_MASK; |
| 1154 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); |
| 1155 | break; |
| 1156 | case WM8990_BCLK_DIV: |
| 1157 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_1) & |
| 1158 | ~WM8990_BCLK_DIV_MASK; |
| 1159 | wm8990_write(codec, WM8990_CLOCKING_1, reg | div); |
| 1160 | break; |
| 1161 | default: |
| 1162 | return -EINVAL; |
| 1163 | } |
| 1164 | |
| 1165 | return 0; |
| 1166 | } |
| 1167 | |
| 1168 | /* |
| 1169 | * Set PCM DAI bit size and sample rate. |
| 1170 | */ |
| 1171 | static int wm8990_hw_params(struct snd_pcm_substream *substream, |
| 1172 | struct snd_pcm_hw_params *params) |
| 1173 | { |
| 1174 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 1175 | struct snd_soc_device *socdev = rtd->socdev; |
| 1176 | struct snd_soc_codec *codec = socdev->codec; |
| 1177 | u16 audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); |
| 1178 | |
| 1179 | audio1 &= ~WM8990_AIF_WL_MASK; |
| 1180 | /* bit size */ |
| 1181 | switch (params_format(params)) { |
| 1182 | case SNDRV_PCM_FORMAT_S16_LE: |
| 1183 | break; |
| 1184 | case SNDRV_PCM_FORMAT_S20_3LE: |
| 1185 | audio1 |= WM8990_AIF_WL_20BITS; |
| 1186 | break; |
| 1187 | case SNDRV_PCM_FORMAT_S24_LE: |
| 1188 | audio1 |= WM8990_AIF_WL_24BITS; |
| 1189 | break; |
| 1190 | case SNDRV_PCM_FORMAT_S32_LE: |
| 1191 | audio1 |= WM8990_AIF_WL_32BITS; |
| 1192 | break; |
| 1193 | } |
| 1194 | |
| 1195 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); |
| 1196 | return 0; |
| 1197 | } |
| 1198 | |
Liam Girdwood | e550e17 | 2008-07-07 16:07:52 +0100 | [diff] [blame] | 1199 | static int wm8990_mute(struct snd_soc_dai *dai, int mute) |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1200 | { |
| 1201 | struct snd_soc_codec *codec = dai->codec; |
| 1202 | u16 val; |
| 1203 | |
| 1204 | val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; |
| 1205 | |
| 1206 | if (mute) |
| 1207 | wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); |
| 1208 | else |
| 1209 | wm8990_write(codec, WM8990_DAC_CTRL, val); |
| 1210 | |
| 1211 | return 0; |
| 1212 | } |
| 1213 | |
| 1214 | static int wm8990_set_bias_level(struct snd_soc_codec *codec, |
| 1215 | enum snd_soc_bias_level level) |
| 1216 | { |
| 1217 | u16 val; |
| 1218 | |
| 1219 | switch (level) { |
| 1220 | case SND_SOC_BIAS_ON: |
| 1221 | break; |
| 1222 | case SND_SOC_BIAS_PREPARE: |
| 1223 | break; |
| 1224 | case SND_SOC_BIAS_STANDBY: |
| 1225 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
| 1226 | /* Enable all output discharge bits */ |
| 1227 | wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | |
| 1228 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | |
| 1229 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | |
| 1230 | WM8990_DIS_ROUT); |
| 1231 | |
| 1232 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ |
| 1233 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
| 1234 | WM8990_BUFDCOPEN | WM8990_POBCTRL | |
| 1235 | WM8990_VMIDTOG); |
| 1236 | |
| 1237 | /* Delay to allow output caps to discharge */ |
| 1238 | msleep(msecs_to_jiffies(300)); |
| 1239 | |
| 1240 | /* Disable VMIDTOG */ |
| 1241 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
| 1242 | WM8990_BUFDCOPEN | WM8990_POBCTRL); |
| 1243 | |
| 1244 | /* disable all output discharge bits */ |
| 1245 | wm8990_write(codec, WM8990_ANTIPOP1, 0); |
| 1246 | |
| 1247 | /* Enable outputs */ |
| 1248 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); |
| 1249 | |
| 1250 | msleep(msecs_to_jiffies(50)); |
| 1251 | |
| 1252 | /* Enable VMID at 2x50k */ |
| 1253 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); |
| 1254 | |
| 1255 | msleep(msecs_to_jiffies(100)); |
| 1256 | |
| 1257 | /* Enable VREF */ |
| 1258 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); |
| 1259 | |
| 1260 | msleep(msecs_to_jiffies(600)); |
| 1261 | |
| 1262 | /* Enable BUFIOEN */ |
| 1263 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
| 1264 | WM8990_BUFDCOPEN | WM8990_POBCTRL | |
| 1265 | WM8990_BUFIOEN); |
| 1266 | |
| 1267 | /* Disable outputs */ |
| 1268 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); |
| 1269 | |
| 1270 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
| 1271 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); |
| 1272 | } else { |
| 1273 | /* ON -> standby */ |
| 1274 | |
| 1275 | } |
| 1276 | break; |
| 1277 | |
| 1278 | case SND_SOC_BIAS_OFF: |
| 1279 | /* Enable POBCTRL and SOFT_ST */ |
| 1280 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
| 1281 | WM8990_POBCTRL | WM8990_BUFIOEN); |
| 1282 | |
| 1283 | /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ |
| 1284 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
| 1285 | WM8990_BUFDCOPEN | WM8990_POBCTRL | |
| 1286 | WM8990_BUFIOEN); |
| 1287 | |
| 1288 | /* mute DAC */ |
| 1289 | val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL); |
| 1290 | wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); |
| 1291 | |
| 1292 | /* Enable any disabled outputs */ |
| 1293 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); |
| 1294 | |
| 1295 | /* Disable VMID */ |
| 1296 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); |
| 1297 | |
| 1298 | msleep(msecs_to_jiffies(300)); |
| 1299 | |
| 1300 | /* Enable all output discharge bits */ |
| 1301 | wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | |
| 1302 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | |
| 1303 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | |
| 1304 | WM8990_DIS_ROUT); |
| 1305 | |
| 1306 | /* Disable VREF */ |
| 1307 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); |
| 1308 | |
| 1309 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
| 1310 | wm8990_write(codec, WM8990_ANTIPOP2, 0x0); |
| 1311 | break; |
| 1312 | } |
| 1313 | |
| 1314 | codec->bias_level = level; |
| 1315 | return 0; |
| 1316 | } |
| 1317 | |
| 1318 | #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ |
| 1319 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ |
| 1320 | SNDRV_PCM_RATE_48000) |
| 1321 | |
| 1322 | #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
| 1323 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
| 1324 | |
| 1325 | /* |
| 1326 | * The WM8990 supports 2 different and mutually exclusive DAI |
| 1327 | * configurations. |
| 1328 | * |
| 1329 | * 1. ADC/DAC on Primary Interface |
| 1330 | * 2. ADC on Primary Interface/DAC on secondary |
| 1331 | */ |
Liam Girdwood | e550e17 | 2008-07-07 16:07:52 +0100 | [diff] [blame] | 1332 | struct snd_soc_dai wm8990_dai = { |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1333 | /* ADC/DAC on primary */ |
| 1334 | .name = "WM8990 ADC/DAC Primary", |
| 1335 | .id = 1, |
| 1336 | .playback = { |
| 1337 | .stream_name = "Playback", |
| 1338 | .channels_min = 1, |
| 1339 | .channels_max = 2, |
| 1340 | .rates = WM8990_RATES, |
| 1341 | .formats = WM8990_FORMATS,}, |
| 1342 | .capture = { |
| 1343 | .stream_name = "Capture", |
| 1344 | .channels_min = 1, |
| 1345 | .channels_max = 2, |
| 1346 | .rates = WM8990_RATES, |
| 1347 | .formats = WM8990_FORMATS,}, |
| 1348 | .ops = { |
| 1349 | .hw_params = wm8990_hw_params,}, |
| 1350 | .dai_ops = { |
| 1351 | .digital_mute = wm8990_mute, |
| 1352 | .set_fmt = wm8990_set_dai_fmt, |
| 1353 | .set_clkdiv = wm8990_set_dai_clkdiv, |
| 1354 | .set_pll = wm8990_set_dai_pll, |
| 1355 | .set_sysclk = wm8990_set_dai_sysclk, |
| 1356 | }, |
| 1357 | }; |
| 1358 | EXPORT_SYMBOL_GPL(wm8990_dai); |
| 1359 | |
| 1360 | static int wm8990_suspend(struct platform_device *pdev, pm_message_t state) |
| 1361 | { |
| 1362 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1363 | struct snd_soc_codec *codec = socdev->codec; |
| 1364 | |
| 1365 | /* we only need to suspend if we are a valid card */ |
| 1366 | if (!codec->card) |
| 1367 | return 0; |
| 1368 | |
| 1369 | wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1370 | return 0; |
| 1371 | } |
| 1372 | |
| 1373 | static int wm8990_resume(struct platform_device *pdev) |
| 1374 | { |
| 1375 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1376 | struct snd_soc_codec *codec = socdev->codec; |
| 1377 | int i; |
| 1378 | u8 data[2]; |
| 1379 | u16 *cache = codec->reg_cache; |
| 1380 | |
| 1381 | /* we only need to resume if we are a valid card */ |
| 1382 | if (!codec->card) |
| 1383 | return 0; |
| 1384 | |
| 1385 | /* Sync reg_cache with the hardware */ |
| 1386 | for (i = 0; i < ARRAY_SIZE(wm8990_reg); i++) { |
| 1387 | if (i + 1 == WM8990_RESET) |
| 1388 | continue; |
| 1389 | data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); |
| 1390 | data[1] = cache[i] & 0x00ff; |
| 1391 | codec->hw_write(codec->control_data, data, 2); |
| 1392 | } |
| 1393 | |
| 1394 | wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1395 | return 0; |
| 1396 | } |
| 1397 | |
| 1398 | /* |
| 1399 | * initialise the WM8990 driver |
| 1400 | * register the mixer and dsp interfaces with the kernel |
| 1401 | */ |
| 1402 | static int wm8990_init(struct snd_soc_device *socdev) |
| 1403 | { |
| 1404 | struct snd_soc_codec *codec = socdev->codec; |
| 1405 | u16 reg; |
| 1406 | int ret = 0; |
| 1407 | |
| 1408 | codec->name = "WM8990"; |
| 1409 | codec->owner = THIS_MODULE; |
| 1410 | codec->read = wm8990_read_reg_cache; |
| 1411 | codec->write = wm8990_write; |
| 1412 | codec->set_bias_level = wm8990_set_bias_level; |
| 1413 | codec->dai = &wm8990_dai; |
| 1414 | codec->num_dai = 2; |
| 1415 | codec->reg_cache_size = ARRAY_SIZE(wm8990_reg); |
| 1416 | codec->reg_cache = kmemdup(wm8990_reg, sizeof(wm8990_reg), GFP_KERNEL); |
| 1417 | |
| 1418 | if (codec->reg_cache == NULL) |
| 1419 | return -ENOMEM; |
| 1420 | |
| 1421 | wm8990_reset(codec); |
| 1422 | |
| 1423 | /* register pcms */ |
| 1424 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); |
| 1425 | if (ret < 0) { |
| 1426 | printk(KERN_ERR "wm8990: failed to create pcms\n"); |
| 1427 | goto pcm_err; |
| 1428 | } |
| 1429 | |
| 1430 | /* charge output caps */ |
| 1431 | codec->bias_level = SND_SOC_BIAS_OFF; |
| 1432 | wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1433 | |
| 1434 | reg = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_4); |
| 1435 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_4, reg | WM8990_ALRCGPIO1); |
| 1436 | |
| 1437 | reg = wm8990_read_reg_cache(codec, WM8990_GPIO1_GPIO2) & |
| 1438 | ~WM8990_GPIO1_SEL_MASK; |
| 1439 | wm8990_write(codec, WM8990_GPIO1_GPIO2, reg | 1); |
| 1440 | |
| 1441 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); |
| 1442 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg | WM8990_OPCLK_ENA); |
| 1443 | |
| 1444 | wm8990_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); |
| 1445 | wm8990_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); |
| 1446 | |
| 1447 | wm8990_add_controls(codec); |
| 1448 | wm8990_add_widgets(codec); |
| 1449 | ret = snd_soc_register_card(socdev); |
| 1450 | if (ret < 0) { |
| 1451 | printk(KERN_ERR "wm8990: failed to register card\n"); |
| 1452 | goto card_err; |
| 1453 | } |
| 1454 | return ret; |
| 1455 | |
| 1456 | card_err: |
| 1457 | snd_soc_free_pcms(socdev); |
| 1458 | snd_soc_dapm_free(socdev); |
| 1459 | pcm_err: |
| 1460 | kfree(codec->reg_cache); |
| 1461 | return ret; |
| 1462 | } |
| 1463 | |
| 1464 | /* If the i2c layer weren't so broken, we could pass this kind of data |
| 1465 | around */ |
| 1466 | static struct snd_soc_device *wm8990_socdev; |
| 1467 | |
| 1468 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
| 1469 | |
| 1470 | /* |
| 1471 | * WM891 2 wire address is determined by GPIO5 |
| 1472 | * state during powerup. |
| 1473 | * low = 0x34 |
| 1474 | * high = 0x36 |
| 1475 | */ |
| 1476 | static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; |
| 1477 | |
| 1478 | /* Magic definition of all other variables and things */ |
| 1479 | I2C_CLIENT_INSMOD; |
| 1480 | |
| 1481 | static struct i2c_driver wm8990_i2c_driver; |
| 1482 | static struct i2c_client client_template; |
| 1483 | |
| 1484 | static int wm8990_codec_probe(struct i2c_adapter *adap, int addr, int kind) |
| 1485 | { |
| 1486 | struct snd_soc_device *socdev = wm8990_socdev; |
| 1487 | struct wm8990_setup_data *setup = socdev->codec_data; |
| 1488 | struct snd_soc_codec *codec = socdev->codec; |
| 1489 | struct i2c_client *i2c; |
| 1490 | int ret; |
| 1491 | |
| 1492 | if (addr != setup->i2c_address) |
| 1493 | return -ENODEV; |
| 1494 | |
| 1495 | client_template.adapter = adap; |
| 1496 | client_template.addr = addr; |
| 1497 | |
| 1498 | i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL); |
| 1499 | if (i2c == NULL) { |
| 1500 | kfree(codec); |
| 1501 | return -ENOMEM; |
| 1502 | } |
| 1503 | i2c_set_clientdata(i2c, codec); |
| 1504 | codec->control_data = i2c; |
| 1505 | |
| 1506 | ret = i2c_attach_client(i2c); |
| 1507 | if (ret < 0) { |
Mark Brown | a5c95e9 | 2008-06-23 14:51:29 +0100 | [diff] [blame] | 1508 | pr_err("failed to attach codec at addr %x\n", addr); |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1509 | goto err; |
| 1510 | } |
| 1511 | |
| 1512 | ret = wm8990_init(socdev); |
| 1513 | if (ret < 0) { |
Mark Brown | a5c95e9 | 2008-06-23 14:51:29 +0100 | [diff] [blame] | 1514 | pr_err("failed to initialise WM8990\n"); |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1515 | goto err; |
| 1516 | } |
| 1517 | return ret; |
| 1518 | |
| 1519 | err: |
| 1520 | kfree(codec); |
| 1521 | kfree(i2c); |
| 1522 | return ret; |
| 1523 | } |
| 1524 | |
| 1525 | static int wm8990_i2c_detach(struct i2c_client *client) |
| 1526 | { |
| 1527 | struct snd_soc_codec *codec = i2c_get_clientdata(client); |
| 1528 | i2c_detach_client(client); |
| 1529 | kfree(codec->reg_cache); |
| 1530 | kfree(client); |
| 1531 | return 0; |
| 1532 | } |
| 1533 | |
| 1534 | static int wm8990_i2c_attach(struct i2c_adapter *adap) |
| 1535 | { |
| 1536 | return i2c_probe(adap, &addr_data, wm8990_codec_probe); |
| 1537 | } |
| 1538 | |
| 1539 | static struct i2c_driver wm8990_i2c_driver = { |
| 1540 | .driver = { |
| 1541 | .name = "WM8990 I2C Codec", |
| 1542 | .owner = THIS_MODULE, |
| 1543 | }, |
| 1544 | .attach_adapter = wm8990_i2c_attach, |
| 1545 | .detach_client = wm8990_i2c_detach, |
| 1546 | .command = NULL, |
| 1547 | }; |
| 1548 | |
| 1549 | static struct i2c_client client_template = { |
| 1550 | .name = "WM8990", |
| 1551 | .driver = &wm8990_i2c_driver, |
| 1552 | }; |
| 1553 | #endif |
| 1554 | |
| 1555 | static int wm8990_probe(struct platform_device *pdev) |
| 1556 | { |
| 1557 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1558 | struct wm8990_setup_data *setup; |
| 1559 | struct snd_soc_codec *codec; |
| 1560 | struct wm8990_priv *wm8990; |
| 1561 | int ret = 0; |
| 1562 | |
Mark Brown | a5c95e9 | 2008-06-23 14:51:29 +0100 | [diff] [blame] | 1563 | pr_info("WM8990 Audio Codec %s\n", WM8990_VERSION); |
Mark Brown | f10485e | 2008-06-05 13:49:33 +0100 | [diff] [blame] | 1564 | |
| 1565 | setup = socdev->codec_data; |
| 1566 | codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); |
| 1567 | if (codec == NULL) |
| 1568 | return -ENOMEM; |
| 1569 | |
| 1570 | wm8990 = kzalloc(sizeof(struct wm8990_priv), GFP_KERNEL); |
| 1571 | if (wm8990 == NULL) { |
| 1572 | kfree(codec); |
| 1573 | return -ENOMEM; |
| 1574 | } |
| 1575 | |
| 1576 | codec->private_data = wm8990; |
| 1577 | socdev->codec = codec; |
| 1578 | mutex_init(&codec->mutex); |
| 1579 | INIT_LIST_HEAD(&codec->dapm_widgets); |
| 1580 | INIT_LIST_HEAD(&codec->dapm_paths); |
| 1581 | wm8990_socdev = socdev; |
| 1582 | |
| 1583 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
| 1584 | if (setup->i2c_address) { |
| 1585 | normal_i2c[0] = setup->i2c_address; |
| 1586 | codec->hw_write = (hw_write_t)i2c_master_send; |
| 1587 | ret = i2c_add_driver(&wm8990_i2c_driver); |
| 1588 | if (ret != 0) |
| 1589 | printk(KERN_ERR "can't add i2c driver"); |
| 1590 | } |
| 1591 | #else |
| 1592 | /* Add other interfaces here */ |
| 1593 | #endif |
| 1594 | return ret; |
| 1595 | } |
| 1596 | |
| 1597 | /* power down chip */ |
| 1598 | static int wm8990_remove(struct platform_device *pdev) |
| 1599 | { |
| 1600 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1601 | struct snd_soc_codec *codec = socdev->codec; |
| 1602 | |
| 1603 | if (codec->control_data) |
| 1604 | wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1605 | snd_soc_free_pcms(socdev); |
| 1606 | snd_soc_dapm_free(socdev); |
| 1607 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
| 1608 | i2c_del_driver(&wm8990_i2c_driver); |
| 1609 | #endif |
| 1610 | kfree(codec->private_data); |
| 1611 | kfree(codec); |
| 1612 | |
| 1613 | return 0; |
| 1614 | } |
| 1615 | |
| 1616 | struct snd_soc_codec_device soc_codec_dev_wm8990 = { |
| 1617 | .probe = wm8990_probe, |
| 1618 | .remove = wm8990_remove, |
| 1619 | .suspend = wm8990_suspend, |
| 1620 | .resume = wm8990_resume, |
| 1621 | }; |
| 1622 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8990); |
| 1623 | |
| 1624 | MODULE_DESCRIPTION("ASoC WM8990 driver"); |
| 1625 | MODULE_AUTHOR("Liam Girdwood"); |
| 1626 | MODULE_LICENSE("GPL"); |