Vineet Gupta | 1162b07 | 2013-01-18 15:12:20 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | #ifndef _ASM_ARC_IO_H |
| 10 | #define _ASM_ARC_IO_H |
| 11 | |
| 12 | #include <linux/types.h> |
| 13 | #include <asm/byteorder.h> |
| 14 | #include <asm/page.h> |
| 15 | |
Vineet Gupta | 1162b07 | 2013-01-18 15:12:20 +0530 | [diff] [blame] | 16 | extern void __iomem *ioremap(unsigned long physaddr, unsigned long size); |
Gilad Ben-Yossef | 4368902 | 2013-01-22 16:48:45 +0530 | [diff] [blame] | 17 | extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size, |
| 18 | unsigned long flags); |
Joao Pinto | c1678ff | 2016-03-10 14:44:13 -0600 | [diff] [blame] | 19 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) |
| 20 | { |
| 21 | return (void __iomem *)port; |
| 22 | } |
| 23 | |
| 24 | static inline void ioport_unmap(void __iomem *addr) |
| 25 | { |
| 26 | } |
| 27 | |
Vineet Gupta | 1162b07 | 2013-01-18 15:12:20 +0530 | [diff] [blame] | 28 | extern void iounmap(const void __iomem *addr); |
| 29 | |
| 30 | #define ioremap_nocache(phy, sz) ioremap(phy, sz) |
| 31 | #define ioremap_wc(phy, sz) ioremap(phy, sz) |
Toshi Kani | 556269c | 2015-06-04 18:55:16 +0200 | [diff] [blame] | 32 | #define ioremap_wt(phy, sz) ioremap(phy, sz) |
Vineet Gupta | 1162b07 | 2013-01-18 15:12:20 +0530 | [diff] [blame] | 33 | |
| 34 | /* Change struct page to physical address */ |
| 35 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) |
| 36 | |
| 37 | #define __raw_readb __raw_readb |
| 38 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
| 39 | { |
| 40 | u8 b; |
| 41 | |
| 42 | __asm__ __volatile__( |
| 43 | " ldb%U1 %0, %1 \n" |
| 44 | : "=r" (b) |
| 45 | : "m" (*(volatile u8 __force *)addr) |
| 46 | : "memory"); |
| 47 | |
| 48 | return b; |
| 49 | } |
| 50 | |
| 51 | #define __raw_readw __raw_readw |
| 52 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
| 53 | { |
| 54 | u16 s; |
| 55 | |
| 56 | __asm__ __volatile__( |
| 57 | " ldw%U1 %0, %1 \n" |
| 58 | : "=r" (s) |
| 59 | : "m" (*(volatile u16 __force *)addr) |
| 60 | : "memory"); |
| 61 | |
| 62 | return s; |
| 63 | } |
| 64 | |
| 65 | #define __raw_readl __raw_readl |
| 66 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
| 67 | { |
| 68 | u32 w; |
| 69 | |
| 70 | __asm__ __volatile__( |
| 71 | " ld%U1 %0, %1 \n" |
| 72 | : "=r" (w) |
| 73 | : "m" (*(volatile u32 __force *)addr) |
| 74 | : "memory"); |
| 75 | |
| 76 | return w; |
| 77 | } |
| 78 | |
| 79 | #define __raw_writeb __raw_writeb |
| 80 | static inline void __raw_writeb(u8 b, volatile void __iomem *addr) |
| 81 | { |
| 82 | __asm__ __volatile__( |
| 83 | " stb%U1 %0, %1 \n" |
| 84 | : |
| 85 | : "r" (b), "m" (*(volatile u8 __force *)addr) |
| 86 | : "memory"); |
| 87 | } |
| 88 | |
| 89 | #define __raw_writew __raw_writew |
| 90 | static inline void __raw_writew(u16 s, volatile void __iomem *addr) |
| 91 | { |
| 92 | __asm__ __volatile__( |
| 93 | " stw%U1 %0, %1 \n" |
| 94 | : |
| 95 | : "r" (s), "m" (*(volatile u16 __force *)addr) |
| 96 | : "memory"); |
| 97 | |
| 98 | } |
| 99 | |
| 100 | #define __raw_writel __raw_writel |
| 101 | static inline void __raw_writel(u32 w, volatile void __iomem *addr) |
| 102 | { |
| 103 | __asm__ __volatile__( |
| 104 | " st%U1 %0, %1 \n" |
| 105 | : |
| 106 | : "r" (w), "m" (*(volatile u32 __force *)addr) |
| 107 | : "memory"); |
| 108 | |
| 109 | } |
| 110 | |
Vineet Gupta | b8a0330 | 2015-03-11 21:42:37 +0530 | [diff] [blame] | 111 | #ifdef CONFIG_ISA_ARCV2 |
| 112 | #include <asm/barrier.h> |
| 113 | #define __iormb() rmb() |
| 114 | #define __iowmb() wmb() |
| 115 | #else |
| 116 | #define __iormb() do { } while (0) |
| 117 | #define __iowmb() do { } while (0) |
| 118 | #endif |
| 119 | |
| 120 | /* |
| 121 | * MMIO can also get buffered/optimized in micro-arch, so barriers needed |
| 122 | * Based on ARM model for the typical use case |
| 123 | * |
| 124 | * <ST [DMA buffer]> |
| 125 | * <writel MMIO "go" reg> |
| 126 | * or: |
| 127 | * <readl MMIO "status" reg> |
| 128 | * <LD [DMA buffer]> |
| 129 | * |
| 130 | * http://lkml.kernel.org/r/20150622133656.GG1583@arm.com |
| 131 | */ |
| 132 | #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) |
| 133 | #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) |
| 134 | #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) |
| 135 | |
| 136 | #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) |
| 137 | #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) |
| 138 | #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) |
| 139 | |
| 140 | /* |
| 141 | * Relaxed API for drivers which can handle any ordering themselves |
| 142 | */ |
| 143 | #define readb_relaxed(c) __raw_readb(c) |
| 144 | #define readw_relaxed(c) __raw_readw(c) |
| 145 | #define readl_relaxed(c) __raw_readl(c) |
| 146 | |
| 147 | #define writeb_relaxed(v,c) __raw_writeb(v,c) |
| 148 | #define writew_relaxed(v,c) __raw_writew(v,c) |
| 149 | #define writel_relaxed(v,c) __raw_writel(v,c) |
Mischa Jonker | 6532b02 | 2013-08-28 20:32:50 +0200 | [diff] [blame] | 150 | |
Vineet Gupta | 1162b07 | 2013-01-18 15:12:20 +0530 | [diff] [blame] | 151 | #include <asm-generic/io.h> |
| 152 | |
| 153 | #endif /* _ASM_ARC_IO_H */ |