David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/phy/micrel.c |
| 3 | * |
| 4 | * Driver for Micrel PHYs |
| 5 | * |
| 6 | * Author: David J. Choi |
| 7 | * |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 8 | * Copyright (c) 2010-2013 Micrel, Inc. |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | * |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 15 | * Support : Micrel Phys: |
| 16 | * Giga phys: ksz9021, ksz9031 |
| 17 | * 100/10 Phys : ksz8001, ksz8721, ksz8737, ksz8041 |
| 18 | * ksz8021, ksz8031, ksz8051, |
| 19 | * ksz8081, ksz8091, |
| 20 | * ksz8061, |
| 21 | * Switch : ksz8873, ksz886x |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 22 | */ |
| 23 | |
| 24 | #include <linux/kernel.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/phy.h> |
Baruch Siach | d606ef3 | 2011-02-14 02:05:33 +0000 | [diff] [blame] | 27 | #include <linux/micrel_phy.h> |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 28 | #include <linux/of.h> |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 29 | #include <linux/clk.h> |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 30 | |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 31 | /* Operation Mode Strap Override */ |
| 32 | #define MII_KSZPHY_OMSO 0x16 |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 33 | #define KSZPHY_OMSO_B_CAST_OFF BIT(9) |
| 34 | #define KSZPHY_OMSO_RMII_OVERRIDE BIT(1) |
| 35 | #define KSZPHY_OMSO_MII_OVERRIDE BIT(0) |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 36 | |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 37 | /* general Interrupt control/status reg in vendor specific block. */ |
| 38 | #define MII_KSZPHY_INTCS 0x1B |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 39 | #define KSZPHY_INTCS_JABBER BIT(15) |
| 40 | #define KSZPHY_INTCS_RECEIVE_ERR BIT(14) |
| 41 | #define KSZPHY_INTCS_PAGE_RECEIVE BIT(13) |
| 42 | #define KSZPHY_INTCS_PARELLEL BIT(12) |
| 43 | #define KSZPHY_INTCS_LINK_PARTNER_ACK BIT(11) |
| 44 | #define KSZPHY_INTCS_LINK_DOWN BIT(10) |
| 45 | #define KSZPHY_INTCS_REMOTE_FAULT BIT(9) |
| 46 | #define KSZPHY_INTCS_LINK_UP BIT(8) |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 47 | #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ |
| 48 | KSZPHY_INTCS_LINK_DOWN) |
| 49 | |
Johan Hovold | 5a16778 | 2014-11-11 20:00:14 +0100 | [diff] [blame] | 50 | /* PHY Control 1 */ |
| 51 | #define MII_KSZPHY_CTRL_1 0x1e |
| 52 | |
| 53 | /* PHY Control 2 / PHY Control (if no PHY Control 1) */ |
| 54 | #define MII_KSZPHY_CTRL_2 0x1f |
| 55 | #define MII_KSZPHY_CTRL MII_KSZPHY_CTRL_2 |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 56 | /* bitmap of PHY register to set interrupt mode */ |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 57 | #define KSZPHY_CTRL_INT_ACTIVE_HIGH BIT(9) |
| 58 | #define KSZ9021_CTRL_INT_ACTIVE_HIGH BIT(14) |
| 59 | #define KS8737_CTRL_INT_ACTIVE_HIGH BIT(14) |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 60 | #define KSZPHY_RMII_REF_CLK_SEL BIT(7) |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 61 | |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 62 | /* Write/read to/from extended registers */ |
| 63 | #define MII_KSZPHY_EXTREG 0x0b |
| 64 | #define KSZPHY_EXTREG_WRITE 0x8000 |
| 65 | |
| 66 | #define MII_KSZPHY_EXTREG_WRITE 0x0c |
| 67 | #define MII_KSZPHY_EXTREG_READ 0x0d |
| 68 | |
| 69 | /* Extended registers */ |
| 70 | #define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104 |
| 71 | #define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105 |
| 72 | #define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106 |
| 73 | |
| 74 | #define PS_TO_REG 200 |
| 75 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 76 | struct kszphy_type { |
| 77 | u32 led_mode_reg; |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 78 | bool has_broadcast_disable; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 79 | bool has_rmii_ref_clk_sel; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 80 | }; |
| 81 | |
| 82 | struct kszphy_priv { |
| 83 | const struct kszphy_type *type; |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 84 | int led_mode; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 85 | bool rmii_ref_clk_sel; |
| 86 | bool rmii_ref_clk_sel_val; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 87 | }; |
| 88 | |
| 89 | static const struct kszphy_type ksz8021_type = { |
| 90 | .led_mode_reg = MII_KSZPHY_CTRL_2, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 91 | .has_rmii_ref_clk_sel = true, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 92 | }; |
| 93 | |
| 94 | static const struct kszphy_type ksz8041_type = { |
| 95 | .led_mode_reg = MII_KSZPHY_CTRL_1, |
| 96 | }; |
| 97 | |
| 98 | static const struct kszphy_type ksz8051_type = { |
| 99 | .led_mode_reg = MII_KSZPHY_CTRL_2, |
| 100 | }; |
| 101 | |
| 102 | static const struct kszphy_type ksz8081_type = { |
| 103 | .led_mode_reg = MII_KSZPHY_CTRL_2, |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 104 | .has_broadcast_disable = true, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 105 | }; |
| 106 | |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 107 | static int kszphy_extended_write(struct phy_device *phydev, |
Florian Fainelli | 756b508 | 2013-12-17 21:38:11 -0800 | [diff] [blame] | 108 | u32 regnum, u16 val) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 109 | { |
| 110 | phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum); |
| 111 | return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val); |
| 112 | } |
| 113 | |
| 114 | static int kszphy_extended_read(struct phy_device *phydev, |
Florian Fainelli | 756b508 | 2013-12-17 21:38:11 -0800 | [diff] [blame] | 115 | u32 regnum) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 116 | { |
| 117 | phy_write(phydev, MII_KSZPHY_EXTREG, regnum); |
| 118 | return phy_read(phydev, MII_KSZPHY_EXTREG_READ); |
| 119 | } |
| 120 | |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 121 | static int kszphy_ack_interrupt(struct phy_device *phydev) |
| 122 | { |
| 123 | /* bit[7..0] int status, which is a read and clear register. */ |
| 124 | int rc; |
| 125 | |
| 126 | rc = phy_read(phydev, MII_KSZPHY_INTCS); |
| 127 | |
| 128 | return (rc < 0) ? rc : 0; |
| 129 | } |
| 130 | |
| 131 | static int kszphy_set_interrupt(struct phy_device *phydev) |
| 132 | { |
| 133 | int temp; |
| 134 | temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ? |
| 135 | KSZPHY_INTCS_ALL : 0; |
| 136 | return phy_write(phydev, MII_KSZPHY_INTCS, temp); |
| 137 | } |
| 138 | |
| 139 | static int kszphy_config_intr(struct phy_device *phydev) |
| 140 | { |
| 141 | int temp, rc; |
| 142 | |
| 143 | /* set the interrupt pin active low */ |
| 144 | temp = phy_read(phydev, MII_KSZPHY_CTRL); |
Johan Hovold | 5bb8fc0 | 2014-11-11 20:00:08 +0100 | [diff] [blame] | 145 | if (temp < 0) |
| 146 | return temp; |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 147 | temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; |
| 148 | phy_write(phydev, MII_KSZPHY_CTRL, temp); |
| 149 | rc = kszphy_set_interrupt(phydev); |
| 150 | return rc < 0 ? rc : 0; |
| 151 | } |
| 152 | |
| 153 | static int ksz9021_config_intr(struct phy_device *phydev) |
| 154 | { |
| 155 | int temp, rc; |
| 156 | |
| 157 | /* set the interrupt pin active low */ |
| 158 | temp = phy_read(phydev, MII_KSZPHY_CTRL); |
Johan Hovold | 5bb8fc0 | 2014-11-11 20:00:08 +0100 | [diff] [blame] | 159 | if (temp < 0) |
| 160 | return temp; |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 161 | temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; |
| 162 | phy_write(phydev, MII_KSZPHY_CTRL, temp); |
| 163 | rc = kszphy_set_interrupt(phydev); |
| 164 | return rc < 0 ? rc : 0; |
| 165 | } |
| 166 | |
| 167 | static int ks8737_config_intr(struct phy_device *phydev) |
| 168 | { |
| 169 | int temp, rc; |
| 170 | |
| 171 | /* set the interrupt pin active low */ |
| 172 | temp = phy_read(phydev, MII_KSZPHY_CTRL); |
Johan Hovold | 5bb8fc0 | 2014-11-11 20:00:08 +0100 | [diff] [blame] | 173 | if (temp < 0) |
| 174 | return temp; |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 175 | temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH; |
| 176 | phy_write(phydev, MII_KSZPHY_CTRL, temp); |
| 177 | rc = kszphy_set_interrupt(phydev); |
| 178 | return rc < 0 ? rc : 0; |
| 179 | } |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 180 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 181 | static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val) |
| 182 | { |
| 183 | int ctrl; |
| 184 | |
| 185 | ctrl = phy_read(phydev, MII_KSZPHY_CTRL); |
| 186 | if (ctrl < 0) |
| 187 | return ctrl; |
| 188 | |
| 189 | if (val) |
| 190 | ctrl |= KSZPHY_RMII_REF_CLK_SEL; |
| 191 | else |
| 192 | ctrl &= ~KSZPHY_RMII_REF_CLK_SEL; |
| 193 | |
| 194 | return phy_write(phydev, MII_KSZPHY_CTRL, ctrl); |
| 195 | } |
| 196 | |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 197 | static int kszphy_setup_led(struct phy_device *phydev, u32 reg, int val) |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 198 | { |
Johan Hovold | 5a16778 | 2014-11-11 20:00:14 +0100 | [diff] [blame] | 199 | int rc, temp, shift; |
Johan Hovold | 8620546 | 2014-11-11 20:00:12 +0100 | [diff] [blame] | 200 | |
Johan Hovold | 5a16778 | 2014-11-11 20:00:14 +0100 | [diff] [blame] | 201 | switch (reg) { |
| 202 | case MII_KSZPHY_CTRL_1: |
| 203 | shift = 14; |
| 204 | break; |
| 205 | case MII_KSZPHY_CTRL_2: |
| 206 | shift = 4; |
| 207 | break; |
| 208 | default: |
| 209 | return -EINVAL; |
| 210 | } |
| 211 | |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 212 | temp = phy_read(phydev, reg); |
Johan Hovold | b703586 | 2014-11-11 20:00:13 +0100 | [diff] [blame] | 213 | if (temp < 0) { |
| 214 | rc = temp; |
| 215 | goto out; |
| 216 | } |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 217 | |
Sergei Shtylyov | 28bdc49 | 2014-03-19 02:58:16 +0300 | [diff] [blame] | 218 | temp &= ~(3 << shift); |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 219 | temp |= val << shift; |
| 220 | rc = phy_write(phydev, reg, temp); |
Johan Hovold | b703586 | 2014-11-11 20:00:13 +0100 | [diff] [blame] | 221 | out: |
| 222 | if (rc < 0) |
| 223 | dev_err(&phydev->dev, "failed to set led mode\n"); |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 224 | |
Johan Hovold | b703586 | 2014-11-11 20:00:13 +0100 | [diff] [blame] | 225 | return rc; |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 226 | } |
| 227 | |
Johan Hovold | bde1512 | 2014-11-11 20:00:10 +0100 | [diff] [blame] | 228 | /* Disable PHY address 0 as the broadcast address, so that it can be used as a |
| 229 | * unique (non-broadcast) address on a shared bus. |
| 230 | */ |
| 231 | static int kszphy_broadcast_disable(struct phy_device *phydev) |
| 232 | { |
| 233 | int ret; |
| 234 | |
| 235 | ret = phy_read(phydev, MII_KSZPHY_OMSO); |
| 236 | if (ret < 0) |
| 237 | goto out; |
| 238 | |
| 239 | ret = phy_write(phydev, MII_KSZPHY_OMSO, ret | KSZPHY_OMSO_B_CAST_OFF); |
| 240 | out: |
| 241 | if (ret) |
| 242 | dev_err(&phydev->dev, "failed to disable broadcast address\n"); |
| 243 | |
| 244 | return ret; |
| 245 | } |
| 246 | |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 247 | static int kszphy_config_init(struct phy_device *phydev) |
| 248 | { |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 249 | struct kszphy_priv *priv = phydev->priv; |
| 250 | const struct kszphy_type *type; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 251 | int ret; |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 252 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 253 | if (!priv) |
| 254 | return 0; |
| 255 | |
| 256 | type = priv->type; |
| 257 | |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 258 | if (type->has_broadcast_disable) |
| 259 | kszphy_broadcast_disable(phydev); |
| 260 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 261 | if (priv->rmii_ref_clk_sel) { |
| 262 | ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val); |
| 263 | if (ret) { |
| 264 | dev_err(&phydev->dev, "failed to set rmii reference clock\n"); |
| 265 | return ret; |
| 266 | } |
| 267 | } |
| 268 | |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 269 | if (priv->led_mode >= 0) |
| 270 | kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode); |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 271 | |
| 272 | return 0; |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 273 | } |
| 274 | |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 275 | static int ksz8021_config_init(struct phy_device *phydev) |
| 276 | { |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 277 | int rc; |
| 278 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 279 | rc = kszphy_config_init(phydev); |
| 280 | if (rc) |
Bruno Thomsen | b838b4a | 2014-10-09 16:48:14 +0200 | [diff] [blame] | 281 | return rc; |
Johan Hovold | bde1512 | 2014-11-11 20:00:10 +0100 | [diff] [blame] | 282 | |
| 283 | rc = kszphy_broadcast_disable(phydev); |
| 284 | |
Hector Palacios | b6bb4df | 2013-03-10 22:50:03 +0000 | [diff] [blame] | 285 | return rc < 0 ? rc : 0; |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 286 | } |
| 287 | |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 288 | static int ksz9021_load_values_from_of(struct phy_device *phydev, |
| 289 | struct device_node *of_node, u16 reg, |
| 290 | char *field1, char *field2, |
| 291 | char *field3, char *field4) |
| 292 | { |
| 293 | int val1 = -1; |
| 294 | int val2 = -2; |
| 295 | int val3 = -3; |
| 296 | int val4 = -4; |
| 297 | int newval; |
| 298 | int matches = 0; |
| 299 | |
| 300 | if (!of_property_read_u32(of_node, field1, &val1)) |
| 301 | matches++; |
| 302 | |
| 303 | if (!of_property_read_u32(of_node, field2, &val2)) |
| 304 | matches++; |
| 305 | |
| 306 | if (!of_property_read_u32(of_node, field3, &val3)) |
| 307 | matches++; |
| 308 | |
| 309 | if (!of_property_read_u32(of_node, field4, &val4)) |
| 310 | matches++; |
| 311 | |
| 312 | if (!matches) |
| 313 | return 0; |
| 314 | |
| 315 | if (matches < 4) |
| 316 | newval = kszphy_extended_read(phydev, reg); |
| 317 | else |
| 318 | newval = 0; |
| 319 | |
| 320 | if (val1 != -1) |
| 321 | newval = ((newval & 0xfff0) | ((val1 / PS_TO_REG) & 0xf) << 0); |
| 322 | |
Hubert Chaumette | 6a11974 | 2014-04-22 15:01:04 +0200 | [diff] [blame] | 323 | if (val2 != -2) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 324 | newval = ((newval & 0xff0f) | ((val2 / PS_TO_REG) & 0xf) << 4); |
| 325 | |
Hubert Chaumette | 6a11974 | 2014-04-22 15:01:04 +0200 | [diff] [blame] | 326 | if (val3 != -3) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 327 | newval = ((newval & 0xf0ff) | ((val3 / PS_TO_REG) & 0xf) << 8); |
| 328 | |
Hubert Chaumette | 6a11974 | 2014-04-22 15:01:04 +0200 | [diff] [blame] | 329 | if (val4 != -4) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 330 | newval = ((newval & 0x0fff) | ((val4 / PS_TO_REG) & 0xf) << 12); |
| 331 | |
| 332 | return kszphy_extended_write(phydev, reg, newval); |
| 333 | } |
| 334 | |
| 335 | static int ksz9021_config_init(struct phy_device *phydev) |
| 336 | { |
| 337 | struct device *dev = &phydev->dev; |
| 338 | struct device_node *of_node = dev->of_node; |
| 339 | |
| 340 | if (!of_node && dev->parent->of_node) |
| 341 | of_node = dev->parent->of_node; |
| 342 | |
| 343 | if (of_node) { |
| 344 | ksz9021_load_values_from_of(phydev, of_node, |
| 345 | MII_KSZPHY_CLK_CONTROL_PAD_SKEW, |
| 346 | "txen-skew-ps", "txc-skew-ps", |
| 347 | "rxdv-skew-ps", "rxc-skew-ps"); |
| 348 | ksz9021_load_values_from_of(phydev, of_node, |
| 349 | MII_KSZPHY_RX_DATA_PAD_SKEW, |
| 350 | "rxd0-skew-ps", "rxd1-skew-ps", |
| 351 | "rxd2-skew-ps", "rxd3-skew-ps"); |
| 352 | ksz9021_load_values_from_of(phydev, of_node, |
| 353 | MII_KSZPHY_TX_DATA_PAD_SKEW, |
| 354 | "txd0-skew-ps", "txd1-skew-ps", |
| 355 | "txd2-skew-ps", "txd3-skew-ps"); |
| 356 | } |
| 357 | return 0; |
| 358 | } |
| 359 | |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 360 | #define MII_KSZ9031RN_MMD_CTRL_REG 0x0d |
| 361 | #define MII_KSZ9031RN_MMD_REGDATA_REG 0x0e |
| 362 | #define OP_DATA 1 |
| 363 | #define KSZ9031_PS_TO_REG 60 |
| 364 | |
| 365 | /* Extended registers */ |
| 366 | #define MII_KSZ9031RN_CONTROL_PAD_SKEW 4 |
| 367 | #define MII_KSZ9031RN_RX_DATA_PAD_SKEW 5 |
| 368 | #define MII_KSZ9031RN_TX_DATA_PAD_SKEW 6 |
| 369 | #define MII_KSZ9031RN_CLK_PAD_SKEW 8 |
| 370 | |
| 371 | static int ksz9031_extended_write(struct phy_device *phydev, |
| 372 | u8 mode, u32 dev_addr, u32 regnum, u16 val) |
| 373 | { |
| 374 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr); |
| 375 | phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum); |
| 376 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr); |
| 377 | return phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, val); |
| 378 | } |
| 379 | |
| 380 | static int ksz9031_extended_read(struct phy_device *phydev, |
| 381 | u8 mode, u32 dev_addr, u32 regnum) |
| 382 | { |
| 383 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr); |
| 384 | phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum); |
| 385 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr); |
| 386 | return phy_read(phydev, MII_KSZ9031RN_MMD_REGDATA_REG); |
| 387 | } |
| 388 | |
| 389 | static int ksz9031_of_load_skew_values(struct phy_device *phydev, |
| 390 | struct device_node *of_node, |
| 391 | u16 reg, size_t field_sz, |
| 392 | char *field[], u8 numfields) |
| 393 | { |
| 394 | int val[4] = {-1, -2, -3, -4}; |
| 395 | int matches = 0; |
| 396 | u16 mask; |
| 397 | u16 maxval; |
| 398 | u16 newval; |
| 399 | int i; |
| 400 | |
| 401 | for (i = 0; i < numfields; i++) |
| 402 | if (!of_property_read_u32(of_node, field[i], val + i)) |
| 403 | matches++; |
| 404 | |
| 405 | if (!matches) |
| 406 | return 0; |
| 407 | |
| 408 | if (matches < numfields) |
| 409 | newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg); |
| 410 | else |
| 411 | newval = 0; |
| 412 | |
| 413 | maxval = (field_sz == 4) ? 0xf : 0x1f; |
| 414 | for (i = 0; i < numfields; i++) |
| 415 | if (val[i] != -(i + 1)) { |
| 416 | mask = 0xffff; |
| 417 | mask ^= maxval << (field_sz * i); |
| 418 | newval = (newval & mask) | |
| 419 | (((val[i] / KSZ9031_PS_TO_REG) & maxval) |
| 420 | << (field_sz * i)); |
| 421 | } |
| 422 | |
| 423 | return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval); |
| 424 | } |
| 425 | |
| 426 | static int ksz9031_config_init(struct phy_device *phydev) |
| 427 | { |
| 428 | struct device *dev = &phydev->dev; |
| 429 | struct device_node *of_node = dev->of_node; |
| 430 | char *clk_skews[2] = {"rxc-skew-ps", "txc-skew-ps"}; |
| 431 | char *rx_data_skews[4] = { |
| 432 | "rxd0-skew-ps", "rxd1-skew-ps", |
| 433 | "rxd2-skew-ps", "rxd3-skew-ps" |
| 434 | }; |
| 435 | char *tx_data_skews[4] = { |
| 436 | "txd0-skew-ps", "txd1-skew-ps", |
| 437 | "txd2-skew-ps", "txd3-skew-ps" |
| 438 | }; |
| 439 | char *control_skews[2] = {"txen-skew-ps", "rxdv-skew-ps"}; |
| 440 | |
| 441 | if (!of_node && dev->parent->of_node) |
| 442 | of_node = dev->parent->of_node; |
| 443 | |
| 444 | if (of_node) { |
| 445 | ksz9031_of_load_skew_values(phydev, of_node, |
| 446 | MII_KSZ9031RN_CLK_PAD_SKEW, 5, |
| 447 | clk_skews, 2); |
| 448 | |
| 449 | ksz9031_of_load_skew_values(phydev, of_node, |
| 450 | MII_KSZ9031RN_CONTROL_PAD_SKEW, 4, |
| 451 | control_skews, 2); |
| 452 | |
| 453 | ksz9031_of_load_skew_values(phydev, of_node, |
| 454 | MII_KSZ9031RN_RX_DATA_PAD_SKEW, 4, |
| 455 | rx_data_skews, 4); |
| 456 | |
| 457 | ksz9031_of_load_skew_values(phydev, of_node, |
| 458 | MII_KSZ9031RN_TX_DATA_PAD_SKEW, 4, |
| 459 | tx_data_skews, 4); |
| 460 | } |
| 461 | return 0; |
| 462 | } |
| 463 | |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 464 | #define KSZ8873MLL_GLOBAL_CONTROL_4 0x06 |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 465 | #define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX BIT(6) |
| 466 | #define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED BIT(4) |
Jingoo Han | 32d73b1 | 2013-08-06 17:29:35 +0900 | [diff] [blame] | 467 | static int ksz8873mll_read_status(struct phy_device *phydev) |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 468 | { |
| 469 | int regval; |
| 470 | |
| 471 | /* dummy read */ |
| 472 | regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); |
| 473 | |
| 474 | regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); |
| 475 | |
| 476 | if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX) |
| 477 | phydev->duplex = DUPLEX_HALF; |
| 478 | else |
| 479 | phydev->duplex = DUPLEX_FULL; |
| 480 | |
| 481 | if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_SPEED) |
| 482 | phydev->speed = SPEED_10; |
| 483 | else |
| 484 | phydev->speed = SPEED_100; |
| 485 | |
| 486 | phydev->link = 1; |
| 487 | phydev->pause = phydev->asym_pause = 0; |
| 488 | |
| 489 | return 0; |
| 490 | } |
| 491 | |
| 492 | static int ksz8873mll_config_aneg(struct phy_device *phydev) |
| 493 | { |
| 494 | return 0; |
| 495 | } |
| 496 | |
Vince Bridgers | 1993694 | 2014-07-29 15:19:58 -0500 | [diff] [blame] | 497 | /* This routine returns -1 as an indication to the caller that the |
| 498 | * Micrel ksz9021 10/100/1000 PHY does not support standard IEEE |
| 499 | * MMD extended PHY registers. |
| 500 | */ |
| 501 | static int |
| 502 | ksz9021_rd_mmd_phyreg(struct phy_device *phydev, int ptrad, int devnum, |
| 503 | int regnum) |
| 504 | { |
| 505 | return -1; |
| 506 | } |
| 507 | |
| 508 | /* This routine does nothing since the Micrel ksz9021 does not support |
| 509 | * standard IEEE MMD extended PHY registers. |
| 510 | */ |
| 511 | static void |
| 512 | ksz9021_wr_mmd_phyreg(struct phy_device *phydev, int ptrad, int devnum, |
| 513 | int regnum, u32 val) |
| 514 | { |
| 515 | } |
| 516 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 517 | static int kszphy_probe(struct phy_device *phydev) |
| 518 | { |
| 519 | const struct kszphy_type *type = phydev->drv->driver_data; |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 520 | struct device_node *np = phydev->dev.of_node; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 521 | struct kszphy_priv *priv; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 522 | struct clk *clk; |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 523 | int ret; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 524 | |
| 525 | priv = devm_kzalloc(&phydev->dev, sizeof(*priv), GFP_KERNEL); |
| 526 | if (!priv) |
| 527 | return -ENOMEM; |
| 528 | |
| 529 | phydev->priv = priv; |
| 530 | |
| 531 | priv->type = type; |
| 532 | |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 533 | if (type->led_mode_reg) { |
| 534 | ret = of_property_read_u32(np, "micrel,led-mode", |
| 535 | &priv->led_mode); |
| 536 | if (ret) |
| 537 | priv->led_mode = -1; |
| 538 | |
| 539 | if (priv->led_mode > 3) { |
| 540 | dev_err(&phydev->dev, "invalid led mode: 0x%02x\n", |
| 541 | priv->led_mode); |
| 542 | priv->led_mode = -1; |
| 543 | } |
| 544 | } else { |
| 545 | priv->led_mode = -1; |
| 546 | } |
| 547 | |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 548 | clk = devm_clk_get(&phydev->dev, "rmii-ref"); |
| 549 | if (!IS_ERR(clk)) { |
| 550 | unsigned long rate = clk_get_rate(clk); |
| 551 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 552 | priv->rmii_ref_clk_sel = type->has_rmii_ref_clk_sel; |
| 553 | |
| 554 | /* FIXME: add support for PHY revisions that have this bit |
| 555 | * inverted (e.g. through new property or based on PHY ID). |
| 556 | */ |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 557 | if (rate > 24500000 && rate < 25500000) { |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 558 | priv->rmii_ref_clk_sel_val = false; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 559 | } else if (rate > 49500000 && rate < 50500000) { |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 560 | priv->rmii_ref_clk_sel_val = true; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 561 | } else { |
| 562 | dev_err(&phydev->dev, "Clock rate out of range: %ld\n", rate); |
| 563 | return -EINVAL; |
| 564 | } |
| 565 | } |
| 566 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 567 | /* Support legacy board-file configuration */ |
| 568 | if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { |
| 569 | priv->rmii_ref_clk_sel = true; |
| 570 | priv->rmii_ref_clk_sel_val = true; |
| 571 | } |
| 572 | |
| 573 | return 0; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 574 | } |
| 575 | |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 576 | static struct phy_driver ksphy_driver[] = { |
| 577 | { |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 578 | .phy_id = PHY_ID_KS8737, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 579 | .phy_id_mask = 0x00fffff0, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 580 | .name = "Micrel KS8737", |
| 581 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 582 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 583 | .config_init = kszphy_config_init, |
| 584 | .config_aneg = genphy_config_aneg, |
| 585 | .read_status = genphy_read_status, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 586 | .ack_interrupt = kszphy_ack_interrupt, |
| 587 | .config_intr = ks8737_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 588 | .suspend = genphy_suspend, |
| 589 | .resume = genphy_resume, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 590 | .driver = { .owner = THIS_MODULE,}, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 591 | }, { |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 592 | .phy_id = PHY_ID_KSZ8021, |
| 593 | .phy_id_mask = 0x00ffffff, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 594 | .name = "Micrel KSZ8021 or KSZ8031", |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 595 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | |
| 596 | SUPPORTED_Asym_Pause), |
| 597 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 598 | .driver_data = &ksz8021_type, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 599 | .probe = kszphy_probe, |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 600 | .config_init = ksz8021_config_init, |
| 601 | .config_aneg = genphy_config_aneg, |
| 602 | .read_status = genphy_read_status, |
| 603 | .ack_interrupt = kszphy_ack_interrupt, |
| 604 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 605 | .suspend = genphy_suspend, |
| 606 | .resume = genphy_resume, |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 607 | .driver = { .owner = THIS_MODULE,}, |
| 608 | }, { |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 609 | .phy_id = PHY_ID_KSZ8031, |
| 610 | .phy_id_mask = 0x00ffffff, |
| 611 | .name = "Micrel KSZ8031", |
| 612 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | |
| 613 | SUPPORTED_Asym_Pause), |
| 614 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 615 | .driver_data = &ksz8021_type, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 616 | .probe = kszphy_probe, |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 617 | .config_init = ksz8021_config_init, |
| 618 | .config_aneg = genphy_config_aneg, |
| 619 | .read_status = genphy_read_status, |
| 620 | .ack_interrupt = kszphy_ack_interrupt, |
| 621 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 622 | .suspend = genphy_suspend, |
| 623 | .resume = genphy_resume, |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 624 | .driver = { .owner = THIS_MODULE,}, |
| 625 | }, { |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 626 | .phy_id = PHY_ID_KSZ8041, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 627 | .phy_id_mask = 0x00fffff0, |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 628 | .name = "Micrel KSZ8041", |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 629 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
| 630 | | SUPPORTED_Asym_Pause), |
| 631 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 632 | .driver_data = &ksz8041_type, |
| 633 | .probe = kszphy_probe, |
| 634 | .config_init = kszphy_config_init, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 635 | .config_aneg = genphy_config_aneg, |
| 636 | .read_status = genphy_read_status, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 637 | .ack_interrupt = kszphy_ack_interrupt, |
| 638 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 639 | .suspend = genphy_suspend, |
| 640 | .resume = genphy_resume, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 641 | .driver = { .owner = THIS_MODULE,}, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 642 | }, { |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 643 | .phy_id = PHY_ID_KSZ8041RNLI, |
| 644 | .phy_id_mask = 0x00fffff0, |
| 645 | .name = "Micrel KSZ8041RNLI", |
| 646 | .features = PHY_BASIC_FEATURES | |
| 647 | SUPPORTED_Pause | SUPPORTED_Asym_Pause, |
| 648 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 649 | .driver_data = &ksz8041_type, |
| 650 | .probe = kszphy_probe, |
| 651 | .config_init = kszphy_config_init, |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 652 | .config_aneg = genphy_config_aneg, |
| 653 | .read_status = genphy_read_status, |
| 654 | .ack_interrupt = kszphy_ack_interrupt, |
| 655 | .config_intr = kszphy_config_intr, |
| 656 | .suspend = genphy_suspend, |
| 657 | .resume = genphy_resume, |
| 658 | .driver = { .owner = THIS_MODULE,}, |
| 659 | }, { |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 660 | .phy_id = PHY_ID_KSZ8051, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 661 | .phy_id_mask = 0x00fffff0, |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 662 | .name = "Micrel KSZ8051", |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 663 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
| 664 | | SUPPORTED_Asym_Pause), |
| 665 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 666 | .driver_data = &ksz8051_type, |
| 667 | .probe = kszphy_probe, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame^] | 668 | .config_init = kszphy_config_init, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 669 | .config_aneg = genphy_config_aneg, |
| 670 | .read_status = genphy_read_status, |
| 671 | .ack_interrupt = kszphy_ack_interrupt, |
| 672 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 673 | .suspend = genphy_suspend, |
| 674 | .resume = genphy_resume, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 675 | .driver = { .owner = THIS_MODULE,}, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 676 | }, { |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 677 | .phy_id = PHY_ID_KSZ8001, |
| 678 | .name = "Micrel KSZ8001 or KS8721", |
Jason Wang | 48d7d0a | 2012-06-17 22:52:09 +0000 | [diff] [blame] | 679 | .phy_id_mask = 0x00ffffff, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 680 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 681 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 682 | .driver_data = &ksz8041_type, |
| 683 | .probe = kszphy_probe, |
| 684 | .config_init = kszphy_config_init, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 685 | .config_aneg = genphy_config_aneg, |
| 686 | .read_status = genphy_read_status, |
| 687 | .ack_interrupt = kszphy_ack_interrupt, |
| 688 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 689 | .suspend = genphy_suspend, |
| 690 | .resume = genphy_resume, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 691 | .driver = { .owner = THIS_MODULE,}, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 692 | }, { |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 693 | .phy_id = PHY_ID_KSZ8081, |
| 694 | .name = "Micrel KSZ8081 or KSZ8091", |
| 695 | .phy_id_mask = 0x00fffff0, |
| 696 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 697 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 698 | .driver_data = &ksz8081_type, |
| 699 | .probe = kszphy_probe, |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 700 | .config_init = kszphy_config_init, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 701 | .config_aneg = genphy_config_aneg, |
| 702 | .read_status = genphy_read_status, |
| 703 | .ack_interrupt = kszphy_ack_interrupt, |
| 704 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 705 | .suspend = genphy_suspend, |
| 706 | .resume = genphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 707 | .driver = { .owner = THIS_MODULE,}, |
| 708 | }, { |
| 709 | .phy_id = PHY_ID_KSZ8061, |
| 710 | .name = "Micrel KSZ8061", |
| 711 | .phy_id_mask = 0x00fffff0, |
| 712 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 713 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
| 714 | .config_init = kszphy_config_init, |
| 715 | .config_aneg = genphy_config_aneg, |
| 716 | .read_status = genphy_read_status, |
| 717 | .ack_interrupt = kszphy_ack_interrupt, |
| 718 | .config_intr = kszphy_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 719 | .suspend = genphy_suspend, |
| 720 | .resume = genphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 721 | .driver = { .owner = THIS_MODULE,}, |
| 722 | }, { |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 723 | .phy_id = PHY_ID_KSZ9021, |
Jason Wang | 48d7d0a | 2012-06-17 22:52:09 +0000 | [diff] [blame] | 724 | .phy_id_mask = 0x000ffffe, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 725 | .name = "Micrel KSZ9021 Gigabit PHY", |
Vlastimil Kosar | 32fcafb | 2013-02-28 08:45:22 +0000 | [diff] [blame] | 726 | .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause), |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 727 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 728 | .config_init = ksz9021_config_init, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 729 | .config_aneg = genphy_config_aneg, |
| 730 | .read_status = genphy_read_status, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 731 | .ack_interrupt = kszphy_ack_interrupt, |
| 732 | .config_intr = ksz9021_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 733 | .suspend = genphy_suspend, |
| 734 | .resume = genphy_resume, |
Vince Bridgers | 1993694 | 2014-07-29 15:19:58 -0500 | [diff] [blame] | 735 | .read_mmd_indirect = ksz9021_rd_mmd_phyreg, |
| 736 | .write_mmd_indirect = ksz9021_wr_mmd_phyreg, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 737 | .driver = { .owner = THIS_MODULE, }, |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 738 | }, { |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 739 | .phy_id = PHY_ID_KSZ9031, |
| 740 | .phy_id_mask = 0x00fffff0, |
| 741 | .name = "Micrel KSZ9031 Gigabit PHY", |
Mike Looijmans | 95e8b10 | 2014-09-15 12:06:33 +0200 | [diff] [blame] | 742 | .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause), |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 743 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 744 | .config_init = ksz9031_config_init, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 745 | .config_aneg = genphy_config_aneg, |
| 746 | .read_status = genphy_read_status, |
| 747 | .ack_interrupt = kszphy_ack_interrupt, |
| 748 | .config_intr = ksz9021_config_intr, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 749 | .suspend = genphy_suspend, |
| 750 | .resume = genphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 751 | .driver = { .owner = THIS_MODULE, }, |
| 752 | }, { |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 753 | .phy_id = PHY_ID_KSZ8873MLL, |
| 754 | .phy_id_mask = 0x00fffff0, |
| 755 | .name = "Micrel KSZ8873MLL Switch", |
| 756 | .features = (SUPPORTED_Pause | SUPPORTED_Asym_Pause), |
| 757 | .flags = PHY_HAS_MAGICANEG, |
| 758 | .config_init = kszphy_config_init, |
| 759 | .config_aneg = ksz8873mll_config_aneg, |
| 760 | .read_status = ksz8873mll_read_status, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 761 | .suspend = genphy_suspend, |
| 762 | .resume = genphy_resume, |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 763 | .driver = { .owner = THIS_MODULE, }, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 764 | }, { |
| 765 | .phy_id = PHY_ID_KSZ886X, |
| 766 | .phy_id_mask = 0x00fffff0, |
| 767 | .name = "Micrel KSZ886X Switch", |
| 768 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 769 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
| 770 | .config_init = kszphy_config_init, |
| 771 | .config_aneg = genphy_config_aneg, |
| 772 | .read_status = genphy_read_status, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 773 | .suspend = genphy_suspend, |
| 774 | .resume = genphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 775 | .driver = { .owner = THIS_MODULE, }, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 776 | } }; |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 777 | |
Johan Hovold | 50fd715 | 2014-11-11 19:45:59 +0100 | [diff] [blame] | 778 | module_phy_driver(ksphy_driver); |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 779 | |
| 780 | MODULE_DESCRIPTION("Micrel PHY driver"); |
| 781 | MODULE_AUTHOR("David J. Choi"); |
| 782 | MODULE_LICENSE("GPL"); |
David S. Miller | 52a60ed | 2010-05-03 15:48:29 -0700 | [diff] [blame] | 783 | |
Uwe Kleine-König | cf93c94 | 2010-10-03 23:43:32 +0000 | [diff] [blame] | 784 | static struct mdio_device_id __maybe_unused micrel_tbl[] = { |
Jason Wang | 48d7d0a | 2012-06-17 22:52:09 +0000 | [diff] [blame] | 785 | { PHY_ID_KSZ9021, 0x000ffffe }, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 786 | { PHY_ID_KSZ9031, 0x00fffff0 }, |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 787 | { PHY_ID_KSZ8001, 0x00ffffff }, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 788 | { PHY_ID_KS8737, 0x00fffff0 }, |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 789 | { PHY_ID_KSZ8021, 0x00ffffff }, |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 790 | { PHY_ID_KSZ8031, 0x00ffffff }, |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 791 | { PHY_ID_KSZ8041, 0x00fffff0 }, |
| 792 | { PHY_ID_KSZ8051, 0x00fffff0 }, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 793 | { PHY_ID_KSZ8061, 0x00fffff0 }, |
| 794 | { PHY_ID_KSZ8081, 0x00fffff0 }, |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 795 | { PHY_ID_KSZ8873MLL, 0x00fffff0 }, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 796 | { PHY_ID_KSZ886X, 0x00fffff0 }, |
David S. Miller | 52a60ed | 2010-05-03 15:48:29 -0700 | [diff] [blame] | 797 | { } |
| 798 | }; |
| 799 | |
| 800 | MODULE_DEVICE_TABLE(mdio, micrel_tbl); |