blob: fdb0a5664dd68f7af7b6158c9db5ca94ffc1e174 [file] [log] [blame]
Shawn Guo4afbbb72010-12-18 21:39:35 +08001/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
Shawn Guo53b8ff92011-05-31 17:07:03 +080018#include <linux/leds.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080019#include <linux/clk.h>
Dong Aisheng074c54f2011-07-20 11:41:43 +080020#include <linux/i2c.h>
Wolfram Sange55e48f2011-07-15 22:11:03 +020021#include <linux/regulator/machine.h>
22#include <linux/regulator/fixed.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080023
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/time.h>
27
28#include <mach/common.h>
29#include <mach/iomux-mx28.h>
Dong Aisheng4c0174c2011-11-22 23:54:24 +080030#include <mach/digctl.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080031
32#include "devices-mx28.h"
Shawn Guo4afbbb72010-12-18 21:39:35 +080033
Shawn Guoacc9cdc2011-03-03 22:13:38 +080034#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
Shawn Guo4afbbb72010-12-18 21:39:35 +080035#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
Shawn Guo53b8ff92011-05-31 17:07:03 +080036#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
Shawn Guo0590a792011-03-08 18:51:10 +080037#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
38#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
Shawn Guo4afbbb72010-12-18 21:39:35 +080039#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
40
Shawn Guo5bb2c822011-02-22 16:50:24 +080041#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
42#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
43#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
44#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
45
Shawn Guo4afbbb72010-12-18 21:39:35 +080046static const iomux_cfg_t mx28evk_pads[] __initconst = {
47 /* duart */
Shawn Guodb63a492011-03-06 00:40:19 +080048 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
49 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080050
Shawn Guo15808182011-02-17 14:28:52 +080051 /* auart0 */
Shawn Guodb63a492011-03-06 00:40:19 +080052 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
53 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
54 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
55 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080056 /* auart3 */
Shawn Guodb63a492011-03-06 00:40:19 +080057 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
58 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
59 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
60 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080061
Shawn Guodb63a492011-03-06 00:40:19 +080062#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
Shawn Guo4afbbb72010-12-18 21:39:35 +080063 /* fec0 */
Shawn Guodb63a492011-03-06 00:40:19 +080064 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
65 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
66 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
67 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
68 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
69 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
70 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
71 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
72 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
Shawn Guo48f76ed2011-01-11 20:09:24 +080073 /* fec1 */
Shawn Guodb63a492011-03-06 00:40:19 +080074 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
75 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
76 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
77 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
78 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
79 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
Shawn Guo4afbbb72010-12-18 21:39:35 +080080 /* phy power line */
Shawn Guodb63a492011-03-06 00:40:19 +080081 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080082 /* phy reset line */
Shawn Guodb63a492011-03-06 00:40:19 +080083 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
Shawn Guoacc9cdc2011-03-03 22:13:38 +080084
85 /* flexcan0 */
86 MX28_PAD_GPMI_RDY2__CAN0_TX,
87 MX28_PAD_GPMI_RDY3__CAN0_RX,
88 /* flexcan1 */
89 MX28_PAD_GPMI_CE2N__CAN1_TX,
90 MX28_PAD_GPMI_CE3N__CAN1_RX,
91 /* transceiver power control */
92 MX28_PAD_SSP1_CMD__GPIO_2_13,
Shawn Guo0590a792011-03-08 18:51:10 +080093
94 /* mxsfb (lcdif) */
95 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
117 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
118 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
119 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
120 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
121 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
122 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
123 /* LCD panel enable */
124 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
125 /* backlight control */
126 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800127 /* mmc0 */
128 MX28_PAD_SSP0_DATA0__SSP0_D0 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA1__SSP0_D1 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA2__SSP0_D2 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA3__SSP0_D3 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA4__SSP0_D4 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA5__SSP0_D5 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_DATA6__SSP0_D6 |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DATA7__SSP0_D7 |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
144 MX28_PAD_SSP0_CMD__SSP0_CMD |
145 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
146 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
147 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
148 MX28_PAD_SSP0_SCK__SSP0_SCK |
149 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
150 /* write protect */
151 MX28_PAD_SSP1_SCK__GPIO_2_12 |
152 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
153 /* slot power enable */
154 MX28_PAD_PWM3__GPIO_3_28 |
155 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
156
157 /* mmc1 */
158 MX28_PAD_GPMI_D00__SSP1_D0 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D01__SSP1_D1 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D02__SSP1_D2 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D03__SSP1_D3 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D04__SSP1_D4 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D05__SSP1_D5 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_D06__SSP1_D6 |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_D07__SSP1_D7 |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
174 MX28_PAD_GPMI_RDY1__SSP1_CMD |
175 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
176 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
177 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
178 MX28_PAD_GPMI_WRN__SSP1_SCK |
179 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
180 /* write protect */
181 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
182 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
183 /* slot power enable */
184 MX28_PAD_PWM4__GPIO_3_29 |
185 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800186
187 /* led */
188 MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800189
Dong Aisheng074c54f2011-07-20 11:41:43 +0800190 /* I2C */
191 MX28_PAD_I2C0_SCL__I2C0_SCL |
192 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
193 MX28_PAD_I2C0_SDA__I2C0_SDA |
194 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
195
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800196 /* saif0 & saif1 */
197 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
198 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
199 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
200 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
201 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
202 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
203 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
204 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
205 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
206 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800207};
208
209/* led */
210static const struct gpio_led mx28evk_leds[] __initconst = {
211 {
212 .name = "GPIO-LED",
213 .default_trigger = "heartbeat",
214 .gpio = MX28EVK_GPIO_LED,
215 },
216};
217
218static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
219 .leds = mx28evk_leds,
220 .num_leds = ARRAY_SIZE(mx28evk_leds),
Shawn Guo4afbbb72010-12-18 21:39:35 +0800221};
222
223/* fec */
224static void __init mx28evk_fec_reset(void)
225{
226 int ret;
227 struct clk *clk;
228
229 /* Enable fec phy clock */
230 clk = clk_get_sys("pll2", NULL);
231 if (!IS_ERR(clk))
Shawn Guoae68f7a2011-12-20 13:50:11 +0800232 clk_prepare_enable(clk);
Shawn Guo4afbbb72010-12-18 21:39:35 +0800233
234 /* Power up fec phy */
235 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
236 if (ret) {
237 pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
238 return;
239 }
240
241 ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
242 if (ret) {
243 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
244 return;
245 }
246
247 /* Reset fec phy */
248 ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
249 if (ret) {
250 pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
251 return;
252 }
253
254 gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
255 if (ret) {
256 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
257 return;
258 }
259
260 mdelay(1);
261 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
262}
263
Shawn Guoa320b272011-01-14 15:25:52 +0800264static struct fec_platform_data mx28_fec_pdata[] __initdata = {
Shawn Guo48f76ed2011-01-11 20:09:24 +0800265 {
266 /* fec0 */
267 .phy = PHY_INTERFACE_MODE_RMII,
268 }, {
269 /* fec1 */
270 .phy = PHY_INTERFACE_MODE_RMII,
271 },
Shawn Guo4afbbb72010-12-18 21:39:35 +0800272};
273
Shawn Guoa320b272011-01-14 15:25:52 +0800274static int __init mx28evk_fec_get_mac(void)
275{
276 int i;
277 u32 val;
278 const u32 *ocotp = mxs_get_ocotp();
279
280 if (!ocotp)
281 goto error;
282
283 /*
284 * OCOTP only stores the last 4 octets for each mac address,
285 * so hard-code Freescale OUI (00:04:9f) here.
286 */
287 for (i = 0; i < 2; i++) {
288 val = ocotp[i * 4];
289 mx28_fec_pdata[i].mac[0] = 0x00;
290 mx28_fec_pdata[i].mac[1] = 0x04;
291 mx28_fec_pdata[i].mac[2] = 0x9f;
292 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
293 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
294 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
295 }
296
297 return 0;
298
299error:
300 pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
301 return -ETIMEDOUT;
302}
303
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800304/*
305 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
306 */
307static int flexcan0_en, flexcan1_en;
308
309static void mx28evk_flexcan_switch(void)
310{
311 if (flexcan0_en || flexcan1_en)
312 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
313 else
314 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
315}
316
317static void mx28evk_flexcan0_switch(int enable)
318{
319 flexcan0_en = enable;
320 mx28evk_flexcan_switch();
321}
322
323static void mx28evk_flexcan1_switch(int enable)
324{
325 flexcan1_en = enable;
326 mx28evk_flexcan_switch();
327}
328
329static const struct flexcan_platform_data
330 mx28evk_flexcan_pdata[] __initconst = {
331 {
332 .transceiver_switch = mx28evk_flexcan0_switch,
333 }, {
334 .transceiver_switch = mx28evk_flexcan1_switch,
335 }
336};
337
Shawn Guo0590a792011-03-08 18:51:10 +0800338/* mxsfb (lcdif) */
339static struct fb_videomode mx28evk_video_modes[] = {
340 {
341 .name = "Seiko-43WVF1G",
342 .refresh = 60,
343 .xres = 800,
344 .yres = 480,
345 .pixclock = 29851, /* picosecond (33.5 MHz) */
346 .left_margin = 89,
347 .right_margin = 164,
348 .upper_margin = 23,
349 .lower_margin = 10,
350 .hsync_len = 10,
351 .vsync_len = 10,
352 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
353 FB_SYNC_DOTCLK_FAILING_ACT,
354 },
355};
356
357static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
358 .mode_list = mx28evk_video_modes,
359 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
360 .default_bpp = 32,
361 .ld_intf_width = STMLCDIF_24BIT,
362};
363
Shawn Guo5bb2c822011-02-22 16:50:24 +0800364static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
365 {
366 /* mmc0 */
367 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
368 .flags = SLOTF_8_BIT_CAPABLE,
369 }, {
370 /* mmc1 */
371 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
372 .flags = SLOTF_8_BIT_CAPABLE,
373 },
374};
375
Dong Aisheng074c54f2011-07-20 11:41:43 +0800376static struct i2c_board_info mxs_i2c0_board_info[] __initdata = {
377 {
378 I2C_BOARD_INFO("sgtl5000", 0x0a),
379 },
380};
381
Wolfram Sange55e48f2011-07-15 22:11:03 +0200382#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
383static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = {
384 REGULATOR_SUPPLY("VDDA", "0-000a"),
385 REGULATOR_SUPPLY("VDDIO", "0-000a"),
386};
387
388static struct regulator_init_data mx28evk_vdd_reg_init_data = {
389 .constraints = {
390 .name = "3V3",
391 .always_on = 1,
392 },
393 .consumer_supplies = mx28evk_audio_consumer_supplies,
394 .num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies),
395};
396
397static struct fixed_voltage_config mx28evk_vdd_pdata = {
398 .supply_name = "board-3V3",
399 .microvolts = 3300000,
400 .gpio = -EINVAL,
401 .enabled_at_boot = 1,
402 .init_data = &mx28evk_vdd_reg_init_data,
403};
404static struct platform_device mx28evk_voltage_regulator = {
405 .name = "reg-fixed-voltage",
406 .id = -1,
407 .num_resources = 0,
408 .dev = {
409 .platform_data = &mx28evk_vdd_pdata,
410 },
411};
412static void __init mx28evk_add_regulators(void)
413{
414 platform_device_register(&mx28evk_voltage_regulator);
415}
416#else
417static void __init mx28evk_add_regulators(void) {}
418#endif
419
Fabio Estevama35b9142011-09-14 10:20:25 -0300420static struct gpio mx28evk_lcd_gpios[] = {
421 { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" },
422 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
423};
424
Dong Aisheng4c0174c2011-11-22 23:54:24 +0800425static const struct mxs_saif_platform_data
426 mx28evk_mxs_saif_pdata[] __initconst = {
427 /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
428 {
429 .master_mode = 1,
430 .master_id = 0,
431 }, {
432 .master_mode = 0,
433 .master_id = 0,
434 },
435};
436
Shawn Guo4afbbb72010-12-18 21:39:35 +0800437static void __init mx28evk_init(void)
438{
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800439 int ret;
440
Shawn Guo4afbbb72010-12-18 21:39:35 +0800441 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
442
443 mx28_add_duart();
Shawn Guo15808182011-02-17 14:28:52 +0800444 mx28_add_auart0();
445 mx28_add_auart3();
Shawn Guo4afbbb72010-12-18 21:39:35 +0800446
Shawn Guoa320b272011-01-14 15:25:52 +0800447 if (mx28evk_fec_get_mac())
448 pr_warn("%s: failed on fec mac setup\n", __func__);
449
Shawn Guo4afbbb72010-12-18 21:39:35 +0800450 mx28evk_fec_reset();
Shawn Guo48f76ed2011-01-11 20:09:24 +0800451 mx28_add_fec(0, &mx28_fec_pdata[0]);
452 mx28_add_fec(1, &mx28_fec_pdata[1]);
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800453
454 ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
455 "flexcan-switch");
456 if (ret) {
457 pr_err("failed to request gpio flexcan-switch: %d\n", ret);
458 } else {
459 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
460 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
461 }
Shawn Guo0590a792011-03-08 18:51:10 +0800462
Fabio Estevama35b9142011-09-14 10:20:25 -0300463 ret = gpio_request_array(mx28evk_lcd_gpios,
464 ARRAY_SIZE(mx28evk_lcd_gpios));
Shawn Guo0590a792011-03-08 18:51:10 +0800465 if (ret)
Fabio Estevama35b9142011-09-14 10:20:25 -0300466 pr_warn("failed to request gpio pins for lcd: %d\n", ret);
Shawn Guo0590a792011-03-08 18:51:10 +0800467 else
Fabio Estevama35b9142011-09-14 10:20:25 -0300468 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
Shawn Guo5bb2c822011-02-22 16:50:24 +0800469
Dong Aisheng4c0174c2011-11-22 23:54:24 +0800470 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
471 mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]);
472 mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]);
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800473
Dong Aisheng074c54f2011-07-20 11:41:43 +0800474 mx28_add_mxs_i2c(0);
475 i2c_register_board_info(0, mxs_i2c0_board_info,
476 ARRAY_SIZE(mxs_i2c0_board_info));
477
Wolfram Sange55e48f2011-07-15 22:11:03 +0200478 mx28evk_add_regulators();
479
Dong Aishengce9b8e62011-07-20 11:41:44 +0800480 mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0,
481 NULL, 0);
482
Shawn Guo5bb2c822011-02-22 16:50:24 +0800483 /* power on mmc slot by writing 0 to the gpio */
Fabio Estevamc7dae182011-03-29 16:45:09 -0300484 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800485 "mmc0-slot-power");
486 if (ret)
487 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
Shawn Guoe94e05e2011-11-08 21:57:59 +0800488 else
489 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
Shawn Guo5bb2c822011-02-22 16:50:24 +0800490
Fabio Estevamc7dae182011-03-29 16:45:09 -0300491 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800492 "mmc1-slot-power");
493 if (ret)
494 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
Fabio Estevama35b9142011-09-14 10:20:25 -0300495 else
496 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
Shawn Guo53b8ff92011-05-31 17:07:03 +0800497
Wolfram Sang87d022c2011-05-02 16:26:48 +0200498 mx28_add_rtc_stmp3xxx();
Shawn Guo53b8ff92011-05-31 17:07:03 +0800499
500 gpio_led_register_device(0, &mx28evk_led_data);
Shawn Guo4afbbb72010-12-18 21:39:35 +0800501}
502
503static void __init mx28evk_timer_init(void)
504{
505 mx28_clocks_init();
506}
507
508static struct sys_timer mx28evk_timer = {
509 .init = mx28evk_timer_init,
510};
511
512MACHINE_START(MX28EVK, "Freescale MX28 EVK")
513 /* Maintainer: Freescale Semiconductor, Inc. */
514 .map_io = mx28_map_io,
515 .init_irq = mx28_init_irq,
Shawn Guo4afbbb72010-12-18 21:39:35 +0800516 .timer = &mx28evk_timer,
Lauri Hintsala2db3fcf2011-10-18 12:52:29 +0300517 .init_machine = mx28evk_init,
Russell King6f91c5a2011-11-05 15:43:30 +0000518 .restart = mxs_restart,
Shawn Guo4afbbb72010-12-18 21:39:35 +0800519MACHINE_END