| Laurent Pinchart | 63f57cd | 2013-09-21 20:39:49 +0200 | [diff] [blame] | 1 | * PCF857x-compatible I/O expanders |
| 2 | |
| 3 | The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be |
| 4 | driven high by a pull-up current source or driven low to ground. This combines |
| 5 | the direction and output level into a single bit per line, which can't be read |
| 6 | back. We can't actually know at initialization time whether a line is configured |
| 7 | (a) as output and driving the signal low/high, or (b) as input and reporting a |
| 8 | low/high value, without knowing the last value written since the chip came out |
| 9 | of reset (if any). The only reliable solution for setting up line direction is |
| 10 | thus to do it explicitly. |
| 11 | |
| 12 | Required Properties: |
| 13 | |
| 14 | - compatible: should be one of the following. |
| 15 | - "maxim,max7328": For the Maxim MAX7378 |
| 16 | - "maxim,max7329": For the Maxim MAX7329 |
| 17 | - "nxp,pca8574": For the NXP PCA8574 |
| 18 | - "nxp,pca8575": For the NXP PCA8575 |
| 19 | - "nxp,pca9670": For the NXP PCA9670 |
| 20 | - "nxp,pca9671": For the NXP PCA9671 |
| 21 | - "nxp,pca9672": For the NXP PCA9672 |
| 22 | - "nxp,pca9673": For the NXP PCA9673 |
| 23 | - "nxp,pca9674": For the NXP PCA9674 |
| 24 | - "nxp,pca9675": For the NXP PCA9675 |
| 25 | - "nxp,pcf8574": For the NXP PCF8574 |
| 26 | - "nxp,pcf8574a": For the NXP PCF8574A |
| 27 | - "nxp,pcf8575": For the NXP PCF8575 |
| 28 | - "ti,tca9554": For the TI TCA9554 |
| 29 | |
| 30 | - reg: I2C slave address. |
| 31 | |
| 32 | - gpio-controller: Marks the device node as a gpio controller. |
| 33 | - #gpio-cells: Should be 2. The first cell is the GPIO number and the second |
| 34 | cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the |
| 35 | GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. |
| 36 | |
| 37 | Optional Properties: |
| 38 | |
| 39 | - lines-initial-states: Bitmask that specifies the initial state of each |
| 40 | line. When a bit is set to zero, the corresponding line will be initialized to |
| 41 | the input (pulled-up) state. When the bit is set to one, the line will be |
| 42 | initialized the the low-level output state. If the property is not specified |
| 43 | all lines will be initialized to the input state. |
| 44 | |
| 45 | The I/O expander can detect input state changes, and thus optionally act as |
| 46 | an interrupt controller. When the expander interrupt line is connected all the |
| 47 | following properties must be set. For more information please see the |
| 48 | interrupt controller device tree bindings documentation available at |
| 49 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt. |
| 50 | |
| 51 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 52 | - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. |
| 53 | - interrupt-parent: phandle of the parent interrupt controller. |
| 54 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 55 | |
| 56 | |
| 57 | Please refer to gpio.txt in this directory for details of the common GPIO |
| 58 | bindings used by client devices. |
| 59 | |
| 60 | Example: PCF8575 I/O expander node |
| 61 | |
| 62 | pcf8575: gpio@20 { |
| 63 | compatible = "nxp,pcf8575"; |
| 64 | reg = <0x20>; |
| 65 | interrupt-parent = <&irqpin2>; |
| 66 | interrupts = <3 0>; |
| 67 | gpio-controller; |
| 68 | #gpio-cells = <2>; |
| 69 | interrupt-controller; |
| 70 | #interrupt-cells = <2>; |
| 71 | }; |