blob: 4a033853312e52c6ff026d8e7e7892f010826255 [file] [log] [blame]
Steve Wisecfdda9d2010-04-21 15:30:06 -07001/*
2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/debugfs.h>
Vipul Pandyae5725682012-05-21 17:31:13 +053035#include <linux/vmalloc.h>
Steve Wisecfdda9d2010-04-21 15:30:06 -070036
37#include <rdma/ib_verbs.h>
38
39#include "iw_cxgb4.h"
40
41#define DRV_VERSION "0.1"
42
43MODULE_AUTHOR("Steve Wise");
Vipul Pandyaf079af72013-03-14 05:08:58 +000044MODULE_DESCRIPTION("Chelsio T4/T5 RDMA Driver");
Steve Wisecfdda9d2010-04-21 15:30:06 -070045MODULE_LICENSE("Dual BSD/GPL");
46MODULE_VERSION(DRV_VERSION);
47
Vipul Pandya80ccdd62013-03-14 05:09:00 +000048static int allow_db_fc_on_t5;
49module_param(allow_db_fc_on_t5, int, 0644);
50MODULE_PARM_DESC(allow_db_fc_on_t5,
51 "Allow DB Flow Control on T5 (default = 0)");
52
53static int allow_db_coalescing_on_t5;
54module_param(allow_db_coalescing_on_t5, int, 0644);
55MODULE_PARM_DESC(allow_db_coalescing_on_t5,
56 "Allow DB Coalescing on T5 (default = 0)");
57
Vipul Pandya2c974782012-05-18 15:29:28 +053058struct uld_ctx {
59 struct list_head entry;
60 struct cxgb4_lld_info lldi;
61 struct c4iw_dev *dev;
62};
63
Steve Wise2f25e9a2011-05-09 22:06:23 -070064static LIST_HEAD(uld_ctx_list);
Steve Wisecfdda9d2010-04-21 15:30:06 -070065static DEFINE_MUTEX(dev_mutex);
66
67static struct dentry *c4iw_debugfs_root;
68
Steve Wise9e8d1fa32010-09-10 11:15:20 -050069struct c4iw_debugfs_data {
Steve Wisecfdda9d2010-04-21 15:30:06 -070070 struct c4iw_dev *devp;
71 char *buf;
72 int bufsize;
73 int pos;
74};
75
Steve Wise9e8d1fa32010-09-10 11:15:20 -050076static int count_idrs(int id, void *p, void *data)
Steve Wisecfdda9d2010-04-21 15:30:06 -070077{
Steve Wisecfdda9d2010-04-21 15:30:06 -070078 int *countp = data;
79
Steve Wisecfdda9d2010-04-21 15:30:06 -070080 *countp = *countp + 1;
81 return 0;
82}
83
Steve Wise9e8d1fa32010-09-10 11:15:20 -050084static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
85 loff_t *ppos)
86{
87 struct c4iw_debugfs_data *d = file->private_data;
Steve Wise9e8d1fa32010-09-10 11:15:20 -050088
Steve Wise31609772010-09-29 18:21:33 +000089 return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
Steve Wise9e8d1fa32010-09-10 11:15:20 -050090}
91
92static int dump_qp(int id, void *p, void *data)
Steve Wisecfdda9d2010-04-21 15:30:06 -070093{
94 struct c4iw_qp *qp = p;
Steve Wise9e8d1fa32010-09-10 11:15:20 -050095 struct c4iw_debugfs_data *qpd = data;
Steve Wisecfdda9d2010-04-21 15:30:06 -070096 int space;
97 int cc;
98
99 if (id != qp->wq.sq.qid)
100 return 0;
101
102 space = qpd->bufsize - qpd->pos - 1;
103 if (space == 0)
104 return 1;
105
Vipul Pandya830662f2013-07-04 16:10:47 +0530106 if (qp->ep) {
107 if (qp->ep->com.local_addr.ss_family == AF_INET) {
108 struct sockaddr_in *lsin = (struct sockaddr_in *)
109 &qp->ep->com.local_addr;
110 struct sockaddr_in *rsin = (struct sockaddr_in *)
111 &qp->ep->com.remote_addr;
112
113 cc = snprintf(qpd->buf + qpd->pos, space,
114 "rc qp sq id %u rq id %u state %u "
115 "onchip %u ep tid %u state %u "
116 "%pI4:%u->%pI4:%u\n",
117 qp->wq.sq.qid, qp->wq.rq.qid,
118 (int)qp->attr.state,
119 qp->wq.sq.flags & T4_SQ_ONCHIP,
120 qp->ep->hwtid, (int)qp->ep->com.state,
121 &lsin->sin_addr, ntohs(lsin->sin_port),
122 &rsin->sin_addr, ntohs(rsin->sin_port));
123 } else {
124 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
125 &qp->ep->com.local_addr;
126 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *)
127 &qp->ep->com.remote_addr;
128
129 cc = snprintf(qpd->buf + qpd->pos, space,
130 "rc qp sq id %u rq id %u state %u "
131 "onchip %u ep tid %u state %u "
132 "%pI6:%u->%pI6:%u\n",
133 qp->wq.sq.qid, qp->wq.rq.qid,
134 (int)qp->attr.state,
135 qp->wq.sq.flags & T4_SQ_ONCHIP,
136 qp->ep->hwtid, (int)qp->ep->com.state,
137 &lsin6->sin6_addr,
138 ntohs(lsin6->sin6_port),
139 &rsin6->sin6_addr,
140 ntohs(rsin6->sin6_port));
141 }
142 } else
Steve Wisedb5d0402011-03-11 22:29:50 +0000143 cc = snprintf(qpd->buf + qpd->pos, space,
144 "qp sq id %u rq id %u state %u onchip %u\n",
145 qp->wq.sq.qid, qp->wq.rq.qid,
146 (int)qp->attr.state,
147 qp->wq.sq.flags & T4_SQ_ONCHIP);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700148 if (cc < space)
149 qpd->pos += cc;
150 return 0;
151}
152
153static int qp_release(struct inode *inode, struct file *file)
154{
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500155 struct c4iw_debugfs_data *qpd = file->private_data;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700156 if (!qpd) {
157 printk(KERN_INFO "%s null qpd?\n", __func__);
158 return 0;
159 }
Vipul Pandyad716a2a2012-05-18 15:29:31 +0530160 vfree(qpd->buf);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700161 kfree(qpd);
162 return 0;
163}
164
165static int qp_open(struct inode *inode, struct file *file)
166{
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500167 struct c4iw_debugfs_data *qpd;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700168 int ret = 0;
169 int count = 1;
170
171 qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
172 if (!qpd) {
173 ret = -ENOMEM;
174 goto out;
175 }
176 qpd->devp = inode->i_private;
177 qpd->pos = 0;
178
179 spin_lock_irq(&qpd->devp->lock);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500180 idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700181 spin_unlock_irq(&qpd->devp->lock);
182
183 qpd->bufsize = count * 128;
Vipul Pandyad716a2a2012-05-18 15:29:31 +0530184 qpd->buf = vmalloc(qpd->bufsize);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700185 if (!qpd->buf) {
186 ret = -ENOMEM;
187 goto err1;
188 }
189
190 spin_lock_irq(&qpd->devp->lock);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500191 idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700192 spin_unlock_irq(&qpd->devp->lock);
193
194 qpd->buf[qpd->pos++] = 0;
195 file->private_data = qpd;
196 goto out;
197err1:
198 kfree(qpd);
199out:
200 return ret;
201}
202
Steve Wisecfdda9d2010-04-21 15:30:06 -0700203static const struct file_operations qp_debugfs_fops = {
204 .owner = THIS_MODULE,
205 .open = qp_open,
206 .release = qp_release,
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500207 .read = debugfs_read,
Steve Wise8bbac892010-09-29 14:11:12 +0000208 .llseek = default_llseek,
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500209};
210
211static int dump_stag(int id, void *p, void *data)
212{
213 struct c4iw_debugfs_data *stagd = data;
214 int space;
215 int cc;
216
217 space = stagd->bufsize - stagd->pos - 1;
218 if (space == 0)
219 return 1;
220
221 cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8);
222 if (cc < space)
223 stagd->pos += cc;
224 return 0;
225}
226
227static int stag_release(struct inode *inode, struct file *file)
228{
229 struct c4iw_debugfs_data *stagd = file->private_data;
230 if (!stagd) {
231 printk(KERN_INFO "%s null stagd?\n", __func__);
232 return 0;
233 }
234 kfree(stagd->buf);
235 kfree(stagd);
236 return 0;
237}
238
239static int stag_open(struct inode *inode, struct file *file)
240{
241 struct c4iw_debugfs_data *stagd;
242 int ret = 0;
243 int count = 1;
244
245 stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
246 if (!stagd) {
247 ret = -ENOMEM;
248 goto out;
249 }
250 stagd->devp = inode->i_private;
251 stagd->pos = 0;
252
253 spin_lock_irq(&stagd->devp->lock);
254 idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
255 spin_unlock_irq(&stagd->devp->lock);
256
257 stagd->bufsize = count * sizeof("0x12345678\n");
258 stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL);
259 if (!stagd->buf) {
260 ret = -ENOMEM;
261 goto err1;
262 }
263
264 spin_lock_irq(&stagd->devp->lock);
265 idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
266 spin_unlock_irq(&stagd->devp->lock);
267
268 stagd->buf[stagd->pos++] = 0;
269 file->private_data = stagd;
270 goto out;
271err1:
272 kfree(stagd);
273out:
274 return ret;
275}
276
277static const struct file_operations stag_debugfs_fops = {
278 .owner = THIS_MODULE,
279 .open = stag_open,
280 .release = stag_release,
281 .read = debugfs_read,
Steve Wise8bbac892010-09-29 14:11:12 +0000282 .llseek = default_llseek,
Steve Wisecfdda9d2010-04-21 15:30:06 -0700283};
284
Vipul Pandya422eea02012-05-18 15:29:30 +0530285static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY"};
286
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530287static int stats_show(struct seq_file *seq, void *v)
288{
289 struct c4iw_dev *dev = seq->private;
290
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530291 seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current",
292 "Max", "Fail");
293 seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530294 dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530295 dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
296 seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530297 dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530298 dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
299 seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530300 dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530301 dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
302 seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530303 dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530304 dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
305 seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530306 dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530307 dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
308 seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530309 dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530310 dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
Vipul Pandya2c974782012-05-18 15:29:28 +0530311 seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full);
312 seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
313 seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop);
Vipul Pandya422eea02012-05-18 15:29:30 +0530314 seq_printf(seq, " DB State: %s Transitions %llu\n",
315 db_state_str[dev->db_state],
316 dev->rdev.stats.db_state_transitions);
Vipul Pandya1cab7752012-12-10 09:30:55 +0000317 seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full);
Vipul Pandya793dad92012-12-10 09:30:56 +0000318 seq_printf(seq, "ACT_OFLD_CONN_FAILS: %10llu\n",
319 dev->rdev.stats.act_ofld_conn_fails);
320 seq_printf(seq, "PAS_OFLD_CONN_FAILS: %10llu\n",
321 dev->rdev.stats.pas_ofld_conn_fails);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530322 return 0;
323}
324
325static int stats_open(struct inode *inode, struct file *file)
326{
327 return single_open(file, stats_show, inode->i_private);
328}
329
330static ssize_t stats_clear(struct file *file, const char __user *buf,
331 size_t count, loff_t *pos)
332{
333 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
334
335 mutex_lock(&dev->rdev.stats.lock);
336 dev->rdev.stats.pd.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530337 dev->rdev.stats.pd.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530338 dev->rdev.stats.qid.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530339 dev->rdev.stats.qid.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530340 dev->rdev.stats.stag.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530341 dev->rdev.stats.stag.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530342 dev->rdev.stats.pbl.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530343 dev->rdev.stats.pbl.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530344 dev->rdev.stats.rqt.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530345 dev->rdev.stats.rqt.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530346 dev->rdev.stats.ocqp.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530347 dev->rdev.stats.ocqp.fail = 0;
Vipul Pandya2c974782012-05-18 15:29:28 +0530348 dev->rdev.stats.db_full = 0;
349 dev->rdev.stats.db_empty = 0;
350 dev->rdev.stats.db_drop = 0;
Vipul Pandya422eea02012-05-18 15:29:30 +0530351 dev->rdev.stats.db_state_transitions = 0;
Vipul Pandya793dad92012-12-10 09:30:56 +0000352 dev->rdev.stats.tcam_full = 0;
353 dev->rdev.stats.act_ofld_conn_fails = 0;
354 dev->rdev.stats.pas_ofld_conn_fails = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530355 mutex_unlock(&dev->rdev.stats.lock);
356 return count;
357}
358
359static const struct file_operations stats_debugfs_fops = {
360 .owner = THIS_MODULE,
361 .open = stats_open,
362 .release = single_release,
363 .read = seq_read,
364 .llseek = seq_lseek,
365 .write = stats_clear,
366};
367
Vipul Pandya793dad92012-12-10 09:30:56 +0000368static int dump_ep(int id, void *p, void *data)
369{
370 struct c4iw_ep *ep = p;
371 struct c4iw_debugfs_data *epd = data;
372 int space;
373 int cc;
374
375 space = epd->bufsize - epd->pos - 1;
376 if (space == 0)
377 return 1;
378
Vipul Pandya830662f2013-07-04 16:10:47 +0530379 if (ep->com.local_addr.ss_family == AF_INET) {
380 struct sockaddr_in *lsin = (struct sockaddr_in *)
381 &ep->com.local_addr;
382 struct sockaddr_in *rsin = (struct sockaddr_in *)
383 &ep->com.remote_addr;
384
385 cc = snprintf(epd->buf + epd->pos, space,
386 "ep %p cm_id %p qp %p state %d flags 0x%lx "
387 "history 0x%lx hwtid %d atid %d "
388 "%pI4:%d <-> %pI4:%d\n",
389 ep, ep->com.cm_id, ep->com.qp,
390 (int)ep->com.state, ep->com.flags,
391 ep->com.history, ep->hwtid, ep->atid,
392 &lsin->sin_addr, ntohs(lsin->sin_port),
393 &rsin->sin_addr, ntohs(rsin->sin_port));
394 } else {
395 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
396 &ep->com.local_addr;
397 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *)
398 &ep->com.remote_addr;
399
400 cc = snprintf(epd->buf + epd->pos, space,
401 "ep %p cm_id %p qp %p state %d flags 0x%lx "
402 "history 0x%lx hwtid %d atid %d "
403 "%pI6:%d <-> %pI6:%d\n",
404 ep, ep->com.cm_id, ep->com.qp,
405 (int)ep->com.state, ep->com.flags,
406 ep->com.history, ep->hwtid, ep->atid,
407 &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
408 &rsin6->sin6_addr, ntohs(rsin6->sin6_port));
409 }
Vipul Pandya793dad92012-12-10 09:30:56 +0000410 if (cc < space)
411 epd->pos += cc;
412 return 0;
413}
414
415static int dump_listen_ep(int id, void *p, void *data)
416{
417 struct c4iw_listen_ep *ep = p;
418 struct c4iw_debugfs_data *epd = data;
419 int space;
420 int cc;
421
422 space = epd->bufsize - epd->pos - 1;
423 if (space == 0)
424 return 1;
425
Vipul Pandya830662f2013-07-04 16:10:47 +0530426 if (ep->com.local_addr.ss_family == AF_INET) {
427 struct sockaddr_in *lsin = (struct sockaddr_in *)
428 &ep->com.local_addr;
429
430 cc = snprintf(epd->buf + epd->pos, space,
431 "ep %p cm_id %p state %d flags 0x%lx stid %d "
432 "backlog %d %pI4:%d\n",
433 ep, ep->com.cm_id, (int)ep->com.state,
434 ep->com.flags, ep->stid, ep->backlog,
435 &lsin->sin_addr, ntohs(lsin->sin_port));
436 } else {
437 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
438 &ep->com.local_addr;
439
440 cc = snprintf(epd->buf + epd->pos, space,
441 "ep %p cm_id %p state %d flags 0x%lx stid %d "
442 "backlog %d %pI6:%d\n",
443 ep, ep->com.cm_id, (int)ep->com.state,
444 ep->com.flags, ep->stid, ep->backlog,
445 &lsin6->sin6_addr, ntohs(lsin6->sin6_port));
446 }
Vipul Pandya793dad92012-12-10 09:30:56 +0000447 if (cc < space)
448 epd->pos += cc;
449 return 0;
450}
451
452static int ep_release(struct inode *inode, struct file *file)
453{
454 struct c4iw_debugfs_data *epd = file->private_data;
455 if (!epd) {
456 pr_info("%s null qpd?\n", __func__);
457 return 0;
458 }
459 vfree(epd->buf);
460 kfree(epd);
461 return 0;
462}
463
464static int ep_open(struct inode *inode, struct file *file)
465{
466 struct c4iw_debugfs_data *epd;
467 int ret = 0;
468 int count = 1;
469
470 epd = kmalloc(sizeof(*epd), GFP_KERNEL);
471 if (!epd) {
472 ret = -ENOMEM;
473 goto out;
474 }
475 epd->devp = inode->i_private;
476 epd->pos = 0;
477
478 spin_lock_irq(&epd->devp->lock);
479 idr_for_each(&epd->devp->hwtid_idr, count_idrs, &count);
480 idr_for_each(&epd->devp->atid_idr, count_idrs, &count);
481 idr_for_each(&epd->devp->stid_idr, count_idrs, &count);
482 spin_unlock_irq(&epd->devp->lock);
483
484 epd->bufsize = count * 160;
485 epd->buf = vmalloc(epd->bufsize);
486 if (!epd->buf) {
487 ret = -ENOMEM;
488 goto err1;
489 }
490
491 spin_lock_irq(&epd->devp->lock);
492 idr_for_each(&epd->devp->hwtid_idr, dump_ep, epd);
493 idr_for_each(&epd->devp->atid_idr, dump_ep, epd);
494 idr_for_each(&epd->devp->stid_idr, dump_listen_ep, epd);
495 spin_unlock_irq(&epd->devp->lock);
496
497 file->private_data = epd;
498 goto out;
499err1:
500 kfree(epd);
501out:
502 return ret;
503}
504
505static const struct file_operations ep_debugfs_fops = {
506 .owner = THIS_MODULE,
507 .open = ep_open,
508 .release = ep_release,
509 .read = debugfs_read,
510};
511
Steve Wisecfdda9d2010-04-21 15:30:06 -0700512static int setup_debugfs(struct c4iw_dev *devp)
513{
514 struct dentry *de;
515
516 if (!devp->debugfs_root)
517 return -1;
518
519 de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
520 (void *)devp, &qp_debugfs_fops);
521 if (de && de->d_inode)
522 de->d_inode->i_size = 4096;
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500523
524 de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
525 (void *)devp, &stag_debugfs_fops);
526 if (de && de->d_inode)
527 de->d_inode->i_size = 4096;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530528
529 de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root,
530 (void *)devp, &stats_debugfs_fops);
531 if (de && de->d_inode)
532 de->d_inode->i_size = 4096;
533
Vipul Pandya793dad92012-12-10 09:30:56 +0000534 de = debugfs_create_file("eps", S_IWUSR, devp->debugfs_root,
535 (void *)devp, &ep_debugfs_fops);
536 if (de && de->d_inode)
537 de->d_inode->i_size = 4096;
538
Steve Wisecfdda9d2010-04-21 15:30:06 -0700539 return 0;
540}
541
542void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
543 struct c4iw_dev_ucontext *uctx)
544{
545 struct list_head *pos, *nxt;
546 struct c4iw_qid_list *entry;
547
548 mutex_lock(&uctx->lock);
549 list_for_each_safe(pos, nxt, &uctx->qpids) {
550 entry = list_entry(pos, struct c4iw_qid_list, entry);
551 list_del_init(&entry->entry);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530552 if (!(entry->qid & rdev->qpmask)) {
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530553 c4iw_put_resource(&rdev->resource.qid_table,
554 entry->qid);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530555 mutex_lock(&rdev->stats.lock);
556 rdev->stats.qid.cur -= rdev->qpmask + 1;
557 mutex_unlock(&rdev->stats.lock);
558 }
Steve Wisecfdda9d2010-04-21 15:30:06 -0700559 kfree(entry);
560 }
561
562 list_for_each_safe(pos, nxt, &uctx->qpids) {
563 entry = list_entry(pos, struct c4iw_qid_list, entry);
564 list_del_init(&entry->entry);
565 kfree(entry);
566 }
567 mutex_unlock(&uctx->lock);
568}
569
570void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
571 struct c4iw_dev_ucontext *uctx)
572{
573 INIT_LIST_HEAD(&uctx->qpids);
574 INIT_LIST_HEAD(&uctx->cqids);
575 mutex_init(&uctx->lock);
576}
577
578/* Caller takes care of locking if needed */
579static int c4iw_rdev_open(struct c4iw_rdev *rdev)
580{
581 int err;
582
583 c4iw_init_dev_ucontext(rdev, &rdev->uctx);
584
585 /*
586 * qpshift is the number of bits to shift the qpid left in order
587 * to get the correct address of the doorbell for that qp.
588 */
589 rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
590 rdev->qpmask = rdev->lldi.udb_density - 1;
591 rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
592 rdev->cqmask = rdev->lldi.ucq_density - 1;
593 PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
Steve Wise93fb72e2010-06-23 15:46:55 +0000594 "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
595 "qp qid start %u size %u cq qid start %u size %u\n",
Steve Wisecfdda9d2010-04-21 15:30:06 -0700596 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
597 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
598 rdev->lldi.vr->pbl.start,
599 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
Steve Wise93fb72e2010-06-23 15:46:55 +0000600 rdev->lldi.vr->rq.size,
601 rdev->lldi.vr->qp.start,
602 rdev->lldi.vr->qp.size,
603 rdev->lldi.vr->cq.start,
604 rdev->lldi.vr->cq.size);
Ben Hutchings649fb5e2013-10-27 21:50:45 +0000605 PDBG("udb len 0x%x udb base %llx db_reg %p gts_reg %p qpshift %lu "
Steve Wisecfdda9d2010-04-21 15:30:06 -0700606 "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
607 (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
Ben Hutchings649fb5e2013-10-27 21:50:45 +0000608 (u64)pci_resource_start(rdev->lldi.pdev, 2),
Steve Wisecfdda9d2010-04-21 15:30:06 -0700609 rdev->lldi.db_reg,
610 rdev->lldi.gts_reg,
611 rdev->qpshift, rdev->qpmask,
612 rdev->cqshift, rdev->cqmask);
613
614 if (c4iw_num_stags(rdev) == 0) {
615 err = -EINVAL;
616 goto err1;
617 }
618
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530619 rdev->stats.pd.total = T4_MAX_NUM_PD;
620 rdev->stats.stag.total = rdev->lldi.vr->stag.size;
621 rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
622 rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
623 rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
624 rdev->stats.qid.total = rdev->lldi.vr->qp.size;
625
Steve Wisecfdda9d2010-04-21 15:30:06 -0700626 err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
627 if (err) {
628 printk(KERN_ERR MOD "error %d initializing resources\n", err);
629 goto err1;
630 }
631 err = c4iw_pblpool_create(rdev);
632 if (err) {
633 printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
634 goto err2;
635 }
636 err = c4iw_rqtpool_create(rdev);
637 if (err) {
638 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
639 goto err3;
640 }
Steve Wisec6d7b262010-09-13 11:23:57 -0500641 err = c4iw_ocqp_pool_create(rdev);
642 if (err) {
643 printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
644 goto err4;
645 }
Steve Wisecfdda9d2010-04-21 15:30:06 -0700646 return 0;
Steve Wisec6d7b262010-09-13 11:23:57 -0500647err4:
648 c4iw_rqtpool_destroy(rdev);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700649err3:
650 c4iw_pblpool_destroy(rdev);
651err2:
652 c4iw_destroy_resource(&rdev->resource);
653err1:
654 return err;
655}
656
657static void c4iw_rdev_close(struct c4iw_rdev *rdev)
658{
659 c4iw_pblpool_destroy(rdev);
660 c4iw_rqtpool_destroy(rdev);
661 c4iw_destroy_resource(&rdev->resource);
662}
663
Steve Wise9efe10a2011-10-06 09:32:44 -0700664static void c4iw_dealloc(struct uld_ctx *ctx)
Steve Wisecfdda9d2010-04-21 15:30:06 -0700665{
Steve Wise2f25e9a2011-05-09 22:06:23 -0700666 c4iw_rdev_close(&ctx->dev->rdev);
667 idr_destroy(&ctx->dev->cqidr);
668 idr_destroy(&ctx->dev->qpidr);
669 idr_destroy(&ctx->dev->mmidr);
Vipul Pandya793dad92012-12-10 09:30:56 +0000670 idr_destroy(&ctx->dev->hwtid_idr);
671 idr_destroy(&ctx->dev->stid_idr);
672 idr_destroy(&ctx->dev->atid_idr);
Steve Wise2f25e9a2011-05-09 22:06:23 -0700673 iounmap(ctx->dev->rdev.oc_mw_kva);
674 ib_dealloc_device(&ctx->dev->ibdev);
675 ctx->dev = NULL;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700676}
677
Steve Wise9efe10a2011-10-06 09:32:44 -0700678static void c4iw_remove(struct uld_ctx *ctx)
679{
680 PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
681 c4iw_unregister_device(ctx->dev);
682 c4iw_dealloc(ctx);
683}
684
685static int rdma_supported(const struct cxgb4_lld_info *infop)
686{
687 return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
688 infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
Vipul Pandyaf079af72013-03-14 05:08:58 +0000689 infop->vr->cq.size > 0;
Steve Wise9efe10a2011-10-06 09:32:44 -0700690}
691
Steve Wisecfdda9d2010-04-21 15:30:06 -0700692static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
693{
694 struct c4iw_dev *devp;
695 int ret;
696
Steve Wise9efe10a2011-10-06 09:32:44 -0700697 if (!rdma_supported(infop)) {
698 printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
699 pci_name(infop->pdev));
700 return ERR_PTR(-ENOSYS);
701 }
Vipul Pandyaf079af72013-03-14 05:08:58 +0000702 if (!ocqp_supported(infop))
703 pr_info("%s: On-Chip Queues not supported on this device.\n",
704 pci_name(infop->pdev));
Vipul Pandya80ccdd62013-03-14 05:09:00 +0000705
706 if (!is_t4(infop->adapter_type)) {
707 if (!allow_db_fc_on_t5) {
708 db_fc_threshold = 100000;
709 pr_info("DB Flow Control Disabled.\n");
710 }
711
712 if (!allow_db_coalescing_on_t5) {
713 db_coalescing_threshold = -1;
714 pr_info("DB Coalescing Disabled.\n");
715 }
716 }
717
Steve Wisecfdda9d2010-04-21 15:30:06 -0700718 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
719 if (!devp) {
720 printk(KERN_ERR MOD "Cannot allocate ib device\n");
Steve Wisebbe9a0a2011-05-09 22:06:22 -0700721 return ERR_PTR(-ENOMEM);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700722 }
723 devp->rdev.lldi = *infop;
724
Steve Wisec6d7b262010-09-13 11:23:57 -0500725 devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
726 (pci_resource_len(devp->rdev.lldi.pdev, 2) -
727 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
728 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
729 devp->rdev.lldi.vr->ocq.size);
730
Steve Wise2f25e9a2011-05-09 22:06:23 -0700731 PDBG(KERN_INFO MOD "ocq memory: "
Steve Wisec6d7b262010-09-13 11:23:57 -0500732 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
733 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
734 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
735
Steve Wisecfdda9d2010-04-21 15:30:06 -0700736 ret = c4iw_rdev_open(&devp->rdev);
737 if (ret) {
Steve Wisecfdda9d2010-04-21 15:30:06 -0700738 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
739 ib_dealloc_device(&devp->ibdev);
Steve Wisebbe9a0a2011-05-09 22:06:22 -0700740 return ERR_PTR(ret);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700741 }
742
743 idr_init(&devp->cqidr);
744 idr_init(&devp->qpidr);
745 idr_init(&devp->mmidr);
Vipul Pandya793dad92012-12-10 09:30:56 +0000746 idr_init(&devp->hwtid_idr);
747 idr_init(&devp->stid_idr);
748 idr_init(&devp->atid_idr);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700749 spin_lock_init(&devp->lock);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530750 mutex_init(&devp->rdev.stats.lock);
Vipul Pandya2c974782012-05-18 15:29:28 +0530751 mutex_init(&devp->db_mutex);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700752
Steve Wisecfdda9d2010-04-21 15:30:06 -0700753 if (c4iw_debugfs_root) {
754 devp->debugfs_root = debugfs_create_dir(
755 pci_name(devp->rdev.lldi.pdev),
756 c4iw_debugfs_root);
757 setup_debugfs(devp);
758 }
759 return devp;
760}
761
762static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
763{
Steve Wise2f25e9a2011-05-09 22:06:23 -0700764 struct uld_ctx *ctx;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700765 static int vers_printed;
766 int i;
767
768 if (!vers_printed++)
Vipul Pandyaf079af72013-03-14 05:08:58 +0000769 pr_info("Chelsio T4/T5 RDMA Driver - version %s\n",
770 DRV_VERSION);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700771
Steve Wise2f25e9a2011-05-09 22:06:23 -0700772 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
773 if (!ctx) {
774 ctx = ERR_PTR(-ENOMEM);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700775 goto out;
Steve Wise2f25e9a2011-05-09 22:06:23 -0700776 }
777 ctx->lldi = *infop;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700778
779 PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -0700780 __func__, pci_name(ctx->lldi.pdev),
781 ctx->lldi.nchan, ctx->lldi.nrxq,
782 ctx->lldi.ntxq, ctx->lldi.nports);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700783
Steve Wise2f25e9a2011-05-09 22:06:23 -0700784 mutex_lock(&dev_mutex);
785 list_add_tail(&ctx->entry, &uld_ctx_list);
786 mutex_unlock(&dev_mutex);
787
788 for (i = 0; i < ctx->lldi.nrxq; i++)
789 PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700790out:
Steve Wise2f25e9a2011-05-09 22:06:23 -0700791 return ctx;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700792}
793
Vipul Pandya1cab7752012-12-10 09:30:55 +0000794static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,
795 const __be64 *rsp,
796 u32 pktshift)
797{
798 struct sk_buff *skb;
799
800 /*
801 * Allocate space for cpl_pass_accept_req which will be synthesized by
802 * driver. Once the driver synthesizes the request the skb will go
803 * through the regular cpl_pass_accept_req processing.
804 * The math here assumes sizeof cpl_pass_accept_req >= sizeof
805 * cpl_rx_pkt.
806 */
807 skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) +
808 sizeof(struct rss_header) - pktshift, GFP_ATOMIC);
809 if (unlikely(!skb))
810 return NULL;
811
812 __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) +
813 sizeof(struct rss_header) - pktshift);
814
815 /*
816 * This skb will contain:
817 * rss_header from the rspq descriptor (1 flit)
818 * cpl_rx_pkt struct from the rspq descriptor (2 flits)
819 * space for the difference between the size of an
820 * rx_pkt and pass_accept_req cpl (1 flit)
821 * the packet data from the gl
822 */
823 skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) +
824 sizeof(struct rss_header));
825 skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) +
826 sizeof(struct cpl_pass_accept_req),
827 gl->va + pktshift,
828 gl->tot_len - pktshift);
829 return skb;
830}
831
832static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl,
833 const __be64 *rsp)
834{
835 unsigned int opcode = *(u8 *)rsp;
836 struct sk_buff *skb;
837
838 if (opcode != CPL_RX_PKT)
839 goto out;
840
841 skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift);
842 if (skb == NULL)
843 goto out;
844
845 if (c4iw_handlers[opcode] == NULL) {
846 pr_info("%s no handler opcode 0x%x...\n", __func__,
847 opcode);
848 kfree_skb(skb);
849 goto out;
850 }
851 c4iw_handlers[opcode](dev, skb);
852 return 1;
853out:
854 return 0;
855}
856
Steve Wisecfdda9d2010-04-21 15:30:06 -0700857static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
858 const struct pkt_gl *gl)
859{
Steve Wise2f25e9a2011-05-09 22:06:23 -0700860 struct uld_ctx *ctx = handle;
861 struct c4iw_dev *dev = ctx->dev;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700862 struct sk_buff *skb;
Vipul Pandya1cab7752012-12-10 09:30:55 +0000863 u8 opcode;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700864
865 if (gl == NULL) {
866 /* omit RSS and rsp_ctrl at end of descriptor */
867 unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
868
869 skb = alloc_skb(256, GFP_ATOMIC);
870 if (!skb)
871 goto nomem;
872 __skb_put(skb, len);
873 skb_copy_to_linear_data(skb, &rsp[1], len);
874 } else if (gl == CXGB4_MSG_AN) {
875 const struct rsp_ctrl *rc = (void *)rsp;
876
877 u32 qid = be32_to_cpu(rc->pldbuflen_qid);
878 c4iw_ev_handler(dev, qid);
879 return 0;
Vipul Pandya1cab7752012-12-10 09:30:55 +0000880 } else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) {
881 if (recv_rx_pkt(dev, gl, rsp))
882 return 0;
883
884 pr_info("%s: unexpected FL contents at %p, " \
885 "RSS %#llx, FL %#llx, len %u\n",
886 pci_name(ctx->lldi.pdev), gl->va,
887 (unsigned long long)be64_to_cpu(*rsp),
Vipul Pandyaef5d6352013-01-07 13:12:00 +0000888 (unsigned long long)be64_to_cpu(
889 *(__force __be64 *)gl->va),
Vipul Pandya1cab7752012-12-10 09:30:55 +0000890 gl->tot_len);
891
892 return 0;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700893 } else {
Steve Wiseda411ba2010-10-18 15:16:45 +0000894 skb = cxgb4_pktgl_to_skb(gl, 128, 128);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700895 if (unlikely(!skb))
896 goto nomem;
897 }
898
Vipul Pandya1cab7752012-12-10 09:30:55 +0000899 opcode = *(u8 *)rsp;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700900 if (c4iw_handlers[opcode])
901 c4iw_handlers[opcode](dev, skb);
902 else
Vipul Pandya1cab7752012-12-10 09:30:55 +0000903 pr_info("%s no handler opcode 0x%x...\n", __func__,
Steve Wisecfdda9d2010-04-21 15:30:06 -0700904 opcode);
905
906 return 0;
907nomem:
908 return -1;
909}
910
911static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
912{
Steve Wise2f25e9a2011-05-09 22:06:23 -0700913 struct uld_ctx *ctx = handle;
Steve Wise1c01c532010-05-20 16:57:32 -0500914
Steve Wisecfdda9d2010-04-21 15:30:06 -0700915 PDBG("%s new_state %u\n", __func__, new_state);
Steve Wise1c01c532010-05-20 16:57:32 -0500916 switch (new_state) {
917 case CXGB4_STATE_UP:
Steve Wise2f25e9a2011-05-09 22:06:23 -0700918 printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
919 if (!ctx->dev) {
Steve Wise9efe10a2011-10-06 09:32:44 -0700920 int ret;
Steve Wise2f25e9a2011-05-09 22:06:23 -0700921
922 ctx->dev = c4iw_alloc(&ctx->lldi);
Steve Wise9efe10a2011-10-06 09:32:44 -0700923 if (IS_ERR(ctx->dev)) {
924 printk(KERN_ERR MOD
925 "%s: initialization failed: %ld\n",
926 pci_name(ctx->lldi.pdev),
927 PTR_ERR(ctx->dev));
928 ctx->dev = NULL;
929 break;
930 }
931 ret = c4iw_register_device(ctx->dev);
932 if (ret) {
Steve Wise1c01c532010-05-20 16:57:32 -0500933 printk(KERN_ERR MOD
934 "%s: RDMA registration failed: %d\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -0700935 pci_name(ctx->lldi.pdev), ret);
Steve Wise9efe10a2011-10-06 09:32:44 -0700936 c4iw_dealloc(ctx);
937 }
Steve Wise1c01c532010-05-20 16:57:32 -0500938 }
939 break;
940 case CXGB4_STATE_DOWN:
941 printk(KERN_INFO MOD "%s: Down\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -0700942 pci_name(ctx->lldi.pdev));
943 if (ctx->dev)
944 c4iw_remove(ctx);
Steve Wise1c01c532010-05-20 16:57:32 -0500945 break;
946 case CXGB4_STATE_START_RECOVERY:
947 printk(KERN_INFO MOD "%s: Fatal Error\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -0700948 pci_name(ctx->lldi.pdev));
949 if (ctx->dev) {
Steve Wise767fbe82011-03-11 22:30:53 +0000950 struct ib_event event;
951
Steve Wise2f25e9a2011-05-09 22:06:23 -0700952 ctx->dev->rdev.flags |= T4_FATAL_ERROR;
Steve Wise767fbe82011-03-11 22:30:53 +0000953 memset(&event, 0, sizeof event);
954 event.event = IB_EVENT_DEVICE_FATAL;
Steve Wise2f25e9a2011-05-09 22:06:23 -0700955 event.device = &ctx->dev->ibdev;
Steve Wise767fbe82011-03-11 22:30:53 +0000956 ib_dispatch_event(&event);
Steve Wise2f25e9a2011-05-09 22:06:23 -0700957 c4iw_remove(ctx);
Steve Wise767fbe82011-03-11 22:30:53 +0000958 }
Steve Wise1c01c532010-05-20 16:57:32 -0500959 break;
960 case CXGB4_STATE_DETACH:
961 printk(KERN_INFO MOD "%s: Detach\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -0700962 pci_name(ctx->lldi.pdev));
963 if (ctx->dev)
964 c4iw_remove(ctx);
Steve Wise1c01c532010-05-20 16:57:32 -0500965 break;
966 }
Steve Wisecfdda9d2010-04-21 15:30:06 -0700967 return 0;
968}
969
Vipul Pandya2c974782012-05-18 15:29:28 +0530970static int disable_qp_db(int id, void *p, void *data)
971{
972 struct c4iw_qp *qp = p;
973
974 t4_disable_wq_db(&qp->wq);
975 return 0;
976}
977
978static void stop_queues(struct uld_ctx *ctx)
979{
980 spin_lock_irq(&ctx->dev->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +0530981 if (ctx->dev->db_state == NORMAL) {
982 ctx->dev->rdev.stats.db_state_transitions++;
983 ctx->dev->db_state = FLOW_CONTROL;
984 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
985 }
Vipul Pandya2c974782012-05-18 15:29:28 +0530986 spin_unlock_irq(&ctx->dev->lock);
987}
988
989static int enable_qp_db(int id, void *p, void *data)
990{
991 struct c4iw_qp *qp = p;
992
993 t4_enable_wq_db(&qp->wq);
994 return 0;
995}
996
997static void resume_queues(struct uld_ctx *ctx)
998{
999 spin_lock_irq(&ctx->dev->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +05301000 if (ctx->dev->qpcnt <= db_fc_threshold &&
1001 ctx->dev->db_state == FLOW_CONTROL) {
1002 ctx->dev->db_state = NORMAL;
1003 ctx->dev->rdev.stats.db_state_transitions++;
1004 idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
1005 }
Vipul Pandya2c974782012-05-18 15:29:28 +05301006 spin_unlock_irq(&ctx->dev->lock);
1007}
1008
Vipul Pandya422eea02012-05-18 15:29:30 +05301009struct qp_list {
1010 unsigned idx;
1011 struct c4iw_qp **qps;
1012};
1013
1014static int add_and_ref_qp(int id, void *p, void *data)
1015{
1016 struct qp_list *qp_listp = data;
1017 struct c4iw_qp *qp = p;
1018
1019 c4iw_qp_add_ref(&qp->ibqp);
1020 qp_listp->qps[qp_listp->idx++] = qp;
1021 return 0;
1022}
1023
1024static int count_qps(int id, void *p, void *data)
1025{
1026 unsigned *countp = data;
1027 (*countp)++;
1028 return 0;
1029}
1030
1031static void deref_qps(struct qp_list qp_list)
1032{
1033 int idx;
1034
1035 for (idx = 0; idx < qp_list.idx; idx++)
1036 c4iw_qp_rem_ref(&qp_list.qps[idx]->ibqp);
1037}
1038
1039static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
1040{
1041 int idx;
1042 int ret;
1043
1044 for (idx = 0; idx < qp_list->idx; idx++) {
1045 struct c4iw_qp *qp = qp_list->qps[idx];
1046
1047 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1048 qp->wq.sq.qid,
1049 t4_sq_host_wq_pidx(&qp->wq),
1050 t4_sq_wq_size(&qp->wq));
1051 if (ret) {
1052 printk(KERN_ERR MOD "%s: Fatal error - "
1053 "DB overflow recovery failed - "
1054 "error syncing SQ qid %u\n",
1055 pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
1056 return;
1057 }
1058
1059 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1060 qp->wq.rq.qid,
1061 t4_rq_host_wq_pidx(&qp->wq),
1062 t4_rq_wq_size(&qp->wq));
1063
1064 if (ret) {
1065 printk(KERN_ERR MOD "%s: Fatal error - "
1066 "DB overflow recovery failed - "
1067 "error syncing RQ qid %u\n",
1068 pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
1069 return;
1070 }
1071
1072 /* Wait for the dbfifo to drain */
1073 while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
1074 set_current_state(TASK_UNINTERRUPTIBLE);
1075 schedule_timeout(usecs_to_jiffies(10));
1076 }
1077 }
1078}
1079
1080static void recover_queues(struct uld_ctx *ctx)
1081{
1082 int count = 0;
1083 struct qp_list qp_list;
1084 int ret;
1085
1086 /* lock out kernel db ringers */
1087 mutex_lock(&ctx->dev->db_mutex);
1088
1089 /* put all queues in to recovery mode */
1090 spin_lock_irq(&ctx->dev->lock);
1091 ctx->dev->db_state = RECOVERY;
1092 ctx->dev->rdev.stats.db_state_transitions++;
1093 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
1094 spin_unlock_irq(&ctx->dev->lock);
1095
1096 /* slow everybody down */
1097 set_current_state(TASK_UNINTERRUPTIBLE);
1098 schedule_timeout(usecs_to_jiffies(1000));
1099
1100 /* Wait for the dbfifo to completely drain. */
1101 while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
1102 set_current_state(TASK_UNINTERRUPTIBLE);
1103 schedule_timeout(usecs_to_jiffies(10));
1104 }
1105
1106 /* flush the SGE contexts */
1107 ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
1108 if (ret) {
1109 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
1110 pci_name(ctx->lldi.pdev));
1111 goto out;
1112 }
1113
1114 /* Count active queues so we can build a list of queues to recover */
1115 spin_lock_irq(&ctx->dev->lock);
1116 idr_for_each(&ctx->dev->qpidr, count_qps, &count);
1117
1118 qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
1119 if (!qp_list.qps) {
1120 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
1121 pci_name(ctx->lldi.pdev));
1122 spin_unlock_irq(&ctx->dev->lock);
1123 goto out;
1124 }
1125 qp_list.idx = 0;
1126
1127 /* add and ref each qp so it doesn't get freed */
1128 idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
1129
1130 spin_unlock_irq(&ctx->dev->lock);
1131
1132 /* now traverse the list in a safe context to recover the db state*/
1133 recover_lost_dbs(ctx, &qp_list);
1134
1135 /* we're almost done! deref the qps and clean up */
1136 deref_qps(qp_list);
1137 kfree(qp_list.qps);
1138
1139 /* Wait for the dbfifo to completely drain again */
1140 while (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) > 0) {
1141 set_current_state(TASK_UNINTERRUPTIBLE);
1142 schedule_timeout(usecs_to_jiffies(10));
1143 }
1144
1145 /* resume the queues */
1146 spin_lock_irq(&ctx->dev->lock);
1147 if (ctx->dev->qpcnt > db_fc_threshold)
1148 ctx->dev->db_state = FLOW_CONTROL;
1149 else {
1150 ctx->dev->db_state = NORMAL;
1151 idr_for_each(&ctx->dev->qpidr, enable_qp_db, NULL);
1152 }
1153 ctx->dev->rdev.stats.db_state_transitions++;
1154 spin_unlock_irq(&ctx->dev->lock);
1155
1156out:
1157 /* start up kernel db ringers again */
1158 mutex_unlock(&ctx->dev->db_mutex);
1159}
1160
Vipul Pandya2c974782012-05-18 15:29:28 +05301161static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
1162{
1163 struct uld_ctx *ctx = handle;
1164
1165 switch (control) {
1166 case CXGB4_CONTROL_DB_FULL:
1167 stop_queues(ctx);
1168 mutex_lock(&ctx->dev->rdev.stats.lock);
1169 ctx->dev->rdev.stats.db_full++;
1170 mutex_unlock(&ctx->dev->rdev.stats.lock);
1171 break;
1172 case CXGB4_CONTROL_DB_EMPTY:
1173 resume_queues(ctx);
1174 mutex_lock(&ctx->dev->rdev.stats.lock);
1175 ctx->dev->rdev.stats.db_empty++;
1176 mutex_unlock(&ctx->dev->rdev.stats.lock);
1177 break;
1178 case CXGB4_CONTROL_DB_DROP:
Vipul Pandya422eea02012-05-18 15:29:30 +05301179 recover_queues(ctx);
Vipul Pandya2c974782012-05-18 15:29:28 +05301180 mutex_lock(&ctx->dev->rdev.stats.lock);
1181 ctx->dev->rdev.stats.db_drop++;
1182 mutex_unlock(&ctx->dev->rdev.stats.lock);
1183 break;
1184 default:
1185 printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",
1186 pci_name(ctx->lldi.pdev), control);
1187 break;
1188 }
1189 return 0;
1190}
1191
Steve Wisecfdda9d2010-04-21 15:30:06 -07001192static struct cxgb4_uld_info c4iw_uld_info = {
1193 .name = DRV_NAME,
1194 .add = c4iw_uld_add,
1195 .rx_handler = c4iw_uld_rx_handler,
1196 .state_change = c4iw_uld_state_change,
Vipul Pandya2c974782012-05-18 15:29:28 +05301197 .control = c4iw_uld_control,
Steve Wisecfdda9d2010-04-21 15:30:06 -07001198};
1199
1200static int __init c4iw_init_module(void)
1201{
1202 int err;
1203
1204 err = c4iw_cm_init();
1205 if (err)
1206 return err;
1207
1208 c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
1209 if (!c4iw_debugfs_root)
1210 printk(KERN_WARNING MOD
1211 "could not create debugfs entry, continuing\n");
1212
1213 cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
1214
1215 return 0;
1216}
1217
1218static void __exit c4iw_exit_module(void)
1219{
Steve Wise2f25e9a2011-05-09 22:06:23 -07001220 struct uld_ctx *ctx, *tmp;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001221
Steve Wisecfdda9d2010-04-21 15:30:06 -07001222 mutex_lock(&dev_mutex);
Steve Wise2f25e9a2011-05-09 22:06:23 -07001223 list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
1224 if (ctx->dev)
1225 c4iw_remove(ctx);
1226 kfree(ctx);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001227 }
1228 mutex_unlock(&dev_mutex);
Steve Wisefd388ce2010-05-20 16:57:27 -05001229 cxgb4_unregister_uld(CXGB4_ULD_RDMA);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001230 c4iw_cm_term();
1231 debugfs_remove_recursive(c4iw_debugfs_root);
1232}
1233
1234module_init(c4iw_init_module);
1235module_exit(c4iw_exit_module);