blob: d3c33fc5b1c2d252bc739717c8d5dd50dd096482 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/sh/mm/consistent.c
3 *
Paul Mundt8a7bcf02007-11-11 17:07:06 +09004 * Copyright (C) 2004 - 2007 Paul Mundt
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
Magnus Dammf93e97e2008-01-24 18:35:10 +09006 * Declared coherent memory functions based on arch/x86/kernel/pci-dma_32.c
7 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/mm.h>
13#include <linux/dma-mapping.h>
Paul Mundt26ff6c12006-09-27 15:13:36 +090014#include <asm/cacheflush.h>
15#include <asm/addrspace.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <asm/io.h>
17
Magnus Dammf93e97e2008-01-24 18:35:10 +090018struct dma_coherent_mem {
19 void *virt_base;
20 u32 device_base;
21 int size;
22 int flags;
23 unsigned long *bitmap;
24};
25
26void *dma_alloc_coherent(struct device *dev, size_t size,
27 dma_addr_t *dma_handle, gfp_t gfp)
Linus Torvalds1da177e2005-04-16 15:20:36 -070028{
Magnus Damm2a3eeba2008-01-25 12:42:48 +090029 void *ret, *ret_nocache;
Magnus Dammf93e97e2008-01-24 18:35:10 +090030 struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
31 int order = get_order(size);
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
Magnus Dammf93e97e2008-01-24 18:35:10 +090033 if (mem) {
34 int page = bitmap_find_free_region(mem->bitmap, mem->size,
35 order);
36 if (page >= 0) {
37 *dma_handle = mem->device_base + (page << PAGE_SHIFT);
38 ret = mem->virt_base + (page << PAGE_SHIFT);
39 memset(ret, 0, size);
40 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -070041 }
Magnus Dammf93e97e2008-01-24 18:35:10 +090042 if (mem->flags & DMA_MEMORY_EXCLUSIVE)
43 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 }
45
Magnus Dammf93e97e2008-01-24 18:35:10 +090046 ret = (void *)__get_free_pages(gfp, order);
Magnus Damm2a3eeba2008-01-25 12:42:48 +090047 if (!ret)
48 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -070049
Magnus Damm2a3eeba2008-01-25 12:42:48 +090050 memset(ret, 0, size);
51 /*
52 * Pages from the page allocator may have data present in
53 * cache. So flush the cache before using uncached memory.
54 */
55 dma_cache_sync(dev, ret, size, DMA_BIDIRECTIONAL);
56
57 ret_nocache = ioremap_nocache(virt_to_phys(ret), size);
58 if (!ret_nocache) {
59 free_pages((unsigned long)ret, order);
60 return NULL;
Magnus Dammf93e97e2008-01-24 18:35:10 +090061 }
Magnus Damm2a3eeba2008-01-25 12:42:48 +090062
63 *dma_handle = virt_to_phys(ret);
64 return ret_nocache;
Magnus Dammf93e97e2008-01-24 18:35:10 +090065}
66EXPORT_SYMBOL(dma_alloc_coherent);
67
68void dma_free_coherent(struct device *dev, size_t size,
69 void *vaddr, dma_addr_t dma_handle)
Linus Torvalds1da177e2005-04-16 15:20:36 -070070{
Magnus Dammf93e97e2008-01-24 18:35:10 +090071 struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
72 int order = get_order(size);
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
Magnus Dammf93e97e2008-01-24 18:35:10 +090074 if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
75 int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
Paul Mundt8a7bcf02007-11-11 17:07:06 +090076
Magnus Dammf93e97e2008-01-24 18:35:10 +090077 bitmap_release_region(mem->bitmap, page, order);
78 } else {
79 WARN_ON(irqs_disabled()); /* for portability */
80 BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE);
Magnus Damm2a3eeba2008-01-25 12:42:48 +090081 free_pages((unsigned long)phys_to_virt(dma_handle), order);
82 iounmap(vaddr);
Magnus Dammf93e97e2008-01-24 18:35:10 +090083 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070084}
Magnus Dammf93e97e2008-01-24 18:35:10 +090085EXPORT_SYMBOL(dma_free_coherent);
Linus Torvalds1da177e2005-04-16 15:20:36 -070086
Magnus Dammf93e97e2008-01-24 18:35:10 +090087int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
88 dma_addr_t device_addr, size_t size, int flags)
89{
90 void __iomem *mem_base = NULL;
91 int pages = size >> PAGE_SHIFT;
92 int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
93
94 if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0)
95 goto out;
96 if (!size)
97 goto out;
98 if (dev->dma_mem)
99 goto out;
100
101 /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */
102
103 mem_base = ioremap_nocache(bus_addr, size);
104 if (!mem_base)
105 goto out;
106
107 dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL);
108 if (!dev->dma_mem)
109 goto out;
110 dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
111 if (!dev->dma_mem->bitmap)
112 goto free1_out;
113
114 dev->dma_mem->virt_base = mem_base;
115 dev->dma_mem->device_base = device_addr;
116 dev->dma_mem->size = pages;
117 dev->dma_mem->flags = flags;
118
119 if (flags & DMA_MEMORY_MAP)
120 return DMA_MEMORY_MAP;
121
122 return DMA_MEMORY_IO;
123
124 free1_out:
125 kfree(dev->dma_mem);
126 out:
127 if (mem_base)
128 iounmap(mem_base);
129 return 0;
130}
131EXPORT_SYMBOL(dma_declare_coherent_memory);
132
133void dma_release_declared_memory(struct device *dev)
134{
135 struct dma_coherent_mem *mem = dev->dma_mem;
136
137 if (!mem)
138 return;
139 dev->dma_mem = NULL;
140 iounmap(mem->virt_base);
141 kfree(mem->bitmap);
142 kfree(mem);
143}
144EXPORT_SYMBOL(dma_release_declared_memory);
145
146void *dma_mark_declared_memory_occupied(struct device *dev,
147 dma_addr_t device_addr, size_t size)
148{
149 struct dma_coherent_mem *mem = dev->dma_mem;
150 int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1) >> PAGE_SHIFT;
151 int pos, err;
152
153 if (!mem)
154 return ERR_PTR(-EINVAL);
155
156 pos = (device_addr - mem->device_base) >> PAGE_SHIFT;
157 err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages));
158 if (err != 0)
159 return ERR_PTR(err);
160 return mem->virt_base + (pos << PAGE_SHIFT);
161}
162EXPORT_SYMBOL(dma_mark_declared_memory_occupied);
163
164void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
165 enum dma_data_direction direction)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166{
Paul Mundt8a7bcf02007-11-11 17:07:06 +0900167#ifdef CONFIG_CPU_SH5
168 void *p1addr = vaddr;
169#else
170 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
171#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172
173 switch (direction) {
174 case DMA_FROM_DEVICE: /* invalidate only */
Ralf Baechle622a9ed2007-10-16 23:29:42 -0700175 __flush_invalidate_region(p1addr, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 break;
177 case DMA_TO_DEVICE: /* writeback only */
Ralf Baechle622a9ed2007-10-16 23:29:42 -0700178 __flush_wback_region(p1addr, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 break;
180 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
Ralf Baechle622a9ed2007-10-16 23:29:42 -0700181 __flush_purge_region(p1addr, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 break;
183 default:
184 BUG();
185 }
186}
Magnus Dammf93e97e2008-01-24 18:35:10 +0900187EXPORT_SYMBOL(dma_cache_sync);