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gerrit-public.fairphone.software / kernel / msm-4.9 / 64d865f403914afc5cc661aa1412e46715a8d51b / . / arch / arm / boot / dts / orion5x.dtsi
blob: 174d89241f7002ffb9b12e4f3db1997bf13d7611 [file] [log] [blame]
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]1/*
2 * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 model = "Marvell Orion5x SoC";
13 compatible = "marvell,orion5x";
14 interrupt-parent = <&intc>;
15
Alexander Clouter835f6322013-03-26 21:44:46 +0000[diff] [blame]16 aliases {
17 gpio0 = &gpio0;
18 };
Sebastian Hesselbarthcabbd6b2013-07-02 13:03:39 +0200[diff] [blame]19
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]20 intc: interrupt-controller {
Sebastian Hesselbarthcabbd6b2013-07-02 13:03:39 +0200[diff] [blame]21 compatible = "marvell,orion-intc";
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]22 interrupt-controller;
23 #interrupt-cells = <1>;
Sebastian Hesselbarthcabbd6b2013-07-02 13:03:39 +0200[diff] [blame]24 reg = <0xf1020200 0x08>;
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]25 };
26
27 ocp@f1000000 {
28 compatible = "simple-bus";
29 ranges = <0x00000000 0xf1000000 0x4000000
30 0xf2200000 0xf2200000 0x0000800>;
31 #address-cells = <1>;
32 #size-cells = <1>;
33
34 gpio0: gpio@10100 {
35 compatible = "marvell,orion-gpio";
36 #gpio-cells = <2>;
37 gpio-controller;
38 reg = <0x10100 0x40>;
Alexander Clouter835f6322013-03-26 21:44:46 +0000[diff] [blame]39 ngpios = <32>;
40 interrupt-controller;
41 #interrupt-cells = <2>;
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]42 interrupts = <6>, <7>, <8>, <9>;
43 };
44
Jason Cooper6226cf12013-12-11 20:32:50 +0000[diff] [blame]45 spi@10600 {
46 compatible = "marvell,orion-spi";
47 #address-cells = <1>;
48 #size-cells = <0>;
49 cell-index = <0>;
50 reg = <0x10600 0x28>;
51 status = "disabled";
52 };
53
54 i2c@11000 {
55 compatible = "marvell,mv64xxx-i2c";
56 reg = <0x11000 0x20>;
57 #address-cells = <1>;
58 #size-cells = <0>;
59 interrupts = <5>;
60 clock-frequency = <100000>;
61 status = "disabled";
62 };
63
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]64 serial@12000 {
65 compatible = "ns16550a";
66 reg = <0x12000 0x100>;
67 reg-shift = <2>;
68 interrupts = <3>;
69 /* set clock-frequency in board dts */
70 status = "disabled";
71 };
72
73 serial@12100 {
74 compatible = "ns16550a";
75 reg = <0x12100 0x100>;
76 reg-shift = <2>;
77 interrupts = <4>;
78 /* set clock-frequency in board dts */
79 status = "disabled";
80 };
81
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]82 wdt@20300 {
83 compatible = "marvell,orion-wdt";
84 reg = <0x20300 0x28>;
85 status = "okay";
86 };
87
Alexander Clouter48e86992013-03-26 21:44:47 +0000[diff] [blame]88 ehci@50000 {
89 compatible = "marvell,orion-ehci";
90 reg = <0x50000 0x1000>;
91 interrupts = <17>;
92 status = "disabled";
93 };
94
Alexander Clouter45046072013-03-26 21:44:48 +0000[diff] [blame]95 xor@60900 {
96 compatible = "marvell,orion-xor";
97 reg = <0x60900 0x100
98 0x60b00 0x100>;
99 status = "okay";
100
101 xor00 {
102 interrupts = <30>;
103 dmacap,memcpy;
104 dmacap,xor;
105 };
106 xor01 {
107 interrupts = <31>;
108 dmacap,memcpy;
109 dmacap,xor;
110 dmacap,memset;
111 };
112 };
113
Sebastian Hesselbarth99d64552013-07-02 13:00:20 +0200[diff] [blame]114 eth: ethernet-controller@72000 {
115 compatible = "marvell,orion-eth";
116 #address-cells = <1>;
117 #size-cells = <0>;
118 reg = <0x72000 0x4000>;
119 marvell,tx-checksum-limit = <1600>;
120 status = "disabled";
121
122 ethernet-port@0 {
Sebastian Hesselbarth99d64552013-07-02 13:00:20 +0200[diff] [blame]123 compatible = "marvell,orion-eth-port";
124 reg = <0>;
125 /* overwrite MAC address in bootloader */
126 local-mac-address = [00 00 00 00 00 00];
127 /* set phy-handle property in board file */
128 };
129 };
Jason Cooper6226cf12013-12-11 20:32:50 +0000[diff] [blame]130
131 mdio: mdio-bus@72004 {
132 compatible = "marvell,orion-mdio";
133 #address-cells = <1>;
134 #size-cells = <0>;
135 reg = <0x72004 0x84>;
136 interrupts = <22>;
137 status = "disabled";
138
139 /* add phy nodes in board file */
140 };
141
142 sata@80000 {
143 compatible = "marvell,orion-sata";
144 reg = <0x80000 0x5000>;
145 interrupts = <29>;
146 status = "disabled";
147 };
148
149 crypto@90000 {
150 compatible = "marvell,orion-crypto";
151 reg = <0x90000 0x10000>,
152 <0xf2200000 0x800>;
153 reg-names = "regs", "sram";
154 interrupts = <28>;
155 status = "okay";
156 };
157
158 ehci@a0000 {
159 compatible = "marvell,orion-ehci";
160 reg = <0xa0000 0x1000>;
161 interrupts = <12>;
162 status = "disabled";
163 };
Thomas Petazzoni1bffb4a2012-11-16 16:39:45 +0100[diff] [blame]164 };
165};