Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _S390_TLBFLUSH_H |
| 2 | #define _S390_TLBFLUSH_H |
| 3 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | #include <linux/mm.h> |
Gerald Schaefer | 53492b1 | 2008-04-30 13:38:46 +0200 | [diff] [blame] | 5 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <asm/processor.h> |
Gerald Schaefer | c1821c2 | 2007-02-05 21:18:17 +0100 | [diff] [blame] | 7 | #include <asm/pgalloc.h> |
Heiko Carstens | 4ccccc5 | 2016-05-14 10:46:33 +0200 | [diff] [blame] | 8 | #include <asm/pgtable.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | |
| 10 | /* |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 11 | * Flush all TLB entries on the local CPU. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | */ |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 13 | static inline void __tlb_flush_local(void) |
| 14 | { |
| 15 | asm volatile("ptlb" : : : "memory"); |
| 16 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | |
| 18 | /* |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 19 | * Flush TLB entries for a specific ASCE on all CPUs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | */ |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 21 | static inline void __tlb_flush_idte(unsigned long asce) |
| 22 | { |
| 23 | /* Global TLB flush for the mm */ |
| 24 | asm volatile( |
| 25 | " .insn rrf,0xb98e0000,0,%0,%1,0" |
| 26 | : : "a" (2048), "a" (asce) : "cc"); |
| 27 | } |
| 28 | |
| 29 | /* |
| 30 | * Flush TLB entries for a specific ASCE on the local CPU |
| 31 | */ |
| 32 | static inline void __tlb_flush_idte_local(unsigned long asce) |
| 33 | { |
| 34 | /* Local TLB flush for the mm */ |
| 35 | asm volatile( |
| 36 | " .insn rrf,0xb98e0000,0,%0,%1,1" |
| 37 | : : "a" (2048), "a" (asce) : "cc"); |
| 38 | } |
| 39 | |
| 40 | #ifdef CONFIG_SMP |
Heiko Carstens | a806170 | 2008-04-17 07:46:26 +0200 | [diff] [blame] | 41 | void smp_ptlb_all(void); |
| 42 | |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 43 | /* |
| 44 | * Flush all TLB entries on all CPUs. |
| 45 | */ |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 46 | static inline void __tlb_flush_global(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | { |
Heiko Carstens | 4ccccc5 | 2016-05-14 10:46:33 +0200 | [diff] [blame] | 48 | unsigned int dummy = 0; |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 49 | |
Heiko Carstens | 4ccccc5 | 2016-05-14 10:46:33 +0200 | [diff] [blame] | 50 | csp(&dummy, 0, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | } |
| 52 | |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 53 | /* |
| 54 | * Flush TLB entries for a specific mm on all CPUs (in case gmap is used |
| 55 | * this implicates multiple ASCEs!). |
| 56 | */ |
Martin Schwidefsky | 374b8f4 | 2008-04-17 07:45:58 +0200 | [diff] [blame] | 57 | static inline void __tlb_flush_full(struct mm_struct *mm) |
| 58 | { |
Martin Schwidefsky | 374b8f4 | 2008-04-17 07:45:58 +0200 | [diff] [blame] | 59 | preempt_disable(); |
Martin Schwidefsky | 64f31d5 | 2016-05-25 09:45:26 +0200 | [diff] [blame^] | 60 | atomic_inc(&mm->context.flush_count); |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 61 | if (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) { |
| 62 | /* Local TLB flush */ |
Martin Schwidefsky | 374b8f4 | 2008-04-17 07:45:58 +0200 | [diff] [blame] | 63 | __tlb_flush_local(); |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 64 | } else { |
| 65 | /* Global TLB flush */ |
Martin Schwidefsky | 374b8f4 | 2008-04-17 07:45:58 +0200 | [diff] [blame] | 66 | __tlb_flush_global(); |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 67 | /* Reset TLB flush mask */ |
| 68 | if (MACHINE_HAS_TLB_LC) |
| 69 | cpumask_copy(mm_cpumask(mm), |
| 70 | &mm->context.cpu_attach_mask); |
| 71 | } |
Martin Schwidefsky | 64f31d5 | 2016-05-25 09:45:26 +0200 | [diff] [blame^] | 72 | atomic_dec(&mm->context.flush_count); |
Martin Schwidefsky | 374b8f4 | 2008-04-17 07:45:58 +0200 | [diff] [blame] | 73 | preempt_enable(); |
| 74 | } |
Martin Schwidefsky | 374b8f4 | 2008-04-17 07:45:58 +0200 | [diff] [blame] | 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | /* |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 77 | * Flush TLB entries for a specific ASCE on all CPUs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | */ |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 79 | static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 80 | { |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 81 | preempt_disable(); |
Martin Schwidefsky | 64f31d5 | 2016-05-25 09:45:26 +0200 | [diff] [blame^] | 82 | atomic_inc(&mm->context.flush_count); |
| 83 | if (MACHINE_HAS_TLB_LC && |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 84 | cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) { |
| 85 | __tlb_flush_idte_local(asce); |
| 86 | } else { |
| 87 | if (MACHINE_HAS_IDTE) |
| 88 | __tlb_flush_idte(asce); |
| 89 | else |
| 90 | __tlb_flush_global(); |
| 91 | /* Reset TLB flush mask */ |
| 92 | if (MACHINE_HAS_TLB_LC) |
| 93 | cpumask_copy(mm_cpumask(mm), |
| 94 | &mm->context.cpu_attach_mask); |
| 95 | } |
Martin Schwidefsky | 64f31d5 | 2016-05-25 09:45:26 +0200 | [diff] [blame^] | 96 | atomic_dec(&mm->context.flush_count); |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 97 | preempt_enable(); |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 98 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 100 | static inline void __tlb_flush_kernel(void) |
| 101 | { |
| 102 | if (MACHINE_HAS_IDTE) |
Gerald Schaefer | 723cacb | 2016-04-15 16:38:40 +0200 | [diff] [blame] | 103 | __tlb_flush_idte(init_mm.context.asce); |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 104 | else |
| 105 | __tlb_flush_global(); |
| 106 | } |
| 107 | #else |
| 108 | #define __tlb_flush_global() __tlb_flush_local() |
| 109 | #define __tlb_flush_full(mm) __tlb_flush_local() |
| 110 | |
| 111 | /* |
| 112 | * Flush TLB entries for a specific ASCE on all CPUs. |
| 113 | */ |
| 114 | static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce) |
| 115 | { |
| 116 | if (MACHINE_HAS_TLB_LC) |
| 117 | __tlb_flush_idte_local(asce); |
| 118 | else |
| 119 | __tlb_flush_local(); |
| 120 | } |
| 121 | |
| 122 | static inline void __tlb_flush_kernel(void) |
| 123 | { |
| 124 | if (MACHINE_HAS_TLB_LC) |
Gerald Schaefer | 723cacb | 2016-04-15 16:38:40 +0200 | [diff] [blame] | 125 | __tlb_flush_idte_local(init_mm.context.asce); |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 126 | else |
| 127 | __tlb_flush_local(); |
| 128 | } |
| 129 | #endif |
| 130 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 131 | static inline void __tlb_flush_mm(struct mm_struct * mm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | { |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 133 | /* |
| 134 | * If the machine has IDTE we prefer to do a per mm flush |
| 135 | * on all cpus instead of doing a local flush if the mm |
| 136 | * only ran on the local cpu. |
| 137 | */ |
Martin Schwidefsky | e5992f2 | 2011-07-24 10:48:20 +0200 | [diff] [blame] | 138 | if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list)) |
Gerald Schaefer | 723cacb | 2016-04-15 16:38:40 +0200 | [diff] [blame] | 139 | __tlb_flush_asce(mm, mm->context.asce); |
Martin Schwidefsky | 043d070 | 2011-05-23 10:24:23 +0200 | [diff] [blame] | 140 | else |
| 141 | __tlb_flush_full(mm); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | } |
| 143 | |
Martin Schwidefsky | 5c474a1 | 2013-08-16 13:31:40 +0200 | [diff] [blame] | 144 | static inline void __tlb_flush_mm_lazy(struct mm_struct * mm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | { |
Martin Schwidefsky | 050eef3 | 2010-08-24 09:26:21 +0200 | [diff] [blame] | 146 | if (mm->context.flush_mm) { |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 147 | __tlb_flush_mm(mm); |
Martin Schwidefsky | 050eef3 | 2010-08-24 09:26:21 +0200 | [diff] [blame] | 148 | mm->context.flush_mm = 0; |
| 149 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | } |
| 151 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 152 | /* |
| 153 | * TLB flushing: |
| 154 | * flush_tlb() - flushes the current mm struct TLBs |
| 155 | * flush_tlb_all() - flushes all processes TLBs |
| 156 | * flush_tlb_mm(mm) - flushes the specified mm context TLB's |
| 157 | * flush_tlb_page(vma, vmaddr) - flushes one page |
| 158 | * flush_tlb_range(vma, start, end) - flushes a range of pages |
| 159 | * flush_tlb_kernel_range(start, end) - flushes a range of kernel pages |
| 160 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 162 | /* |
| 163 | * flush_tlb_mm goes together with ptep_set_wrprotect for the |
| 164 | * copy_page_range operation and flush_tlb_range is related to |
| 165 | * ptep_get_and_clear for change_protection. ptep_set_wrprotect and |
| 166 | * ptep_get_and_clear do not flush the TLBs directly if the mm has |
| 167 | * only one user. At the end of the update the flush_tlb_mm and |
| 168 | * flush_tlb_range functions need to do the flush. |
| 169 | */ |
| 170 | #define flush_tlb() do { } while (0) |
| 171 | #define flush_tlb_all() do { } while (0) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 172 | #define flush_tlb_page(vma, addr) do { } while (0) |
Martin Schwidefsky | 8ffd74a | 2008-01-26 14:10:59 +0100 | [diff] [blame] | 173 | |
| 174 | static inline void flush_tlb_mm(struct mm_struct *mm) |
| 175 | { |
Martin Schwidefsky | 5c474a1 | 2013-08-16 13:31:40 +0200 | [diff] [blame] | 176 | __tlb_flush_mm_lazy(mm); |
Martin Schwidefsky | 8ffd74a | 2008-01-26 14:10:59 +0100 | [diff] [blame] | 177 | } |
| 178 | |
| 179 | static inline void flush_tlb_range(struct vm_area_struct *vma, |
| 180 | unsigned long start, unsigned long end) |
| 181 | { |
Martin Schwidefsky | 5c474a1 | 2013-08-16 13:31:40 +0200 | [diff] [blame] | 182 | __tlb_flush_mm_lazy(vma->vm_mm); |
Martin Schwidefsky | 8ffd74a | 2008-01-26 14:10:59 +0100 | [diff] [blame] | 183 | } |
| 184 | |
| 185 | static inline void flush_tlb_kernel_range(unsigned long start, |
| 186 | unsigned long end) |
| 187 | { |
Martin Schwidefsky | 1b948d6 | 2014-04-03 13:55:01 +0200 | [diff] [blame] | 188 | __tlb_flush_kernel(); |
Martin Schwidefsky | 8ffd74a | 2008-01-26 14:10:59 +0100 | [diff] [blame] | 189 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | #endif /* _S390_TLBFLUSH_H */ |