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Jamie Iles0f4f0672010-02-02 20:23:15 +01001/*
2 * linux/arch/arm/include/asm/pmu.h
3 *
4 * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef __ARM_PMU_H__
13#define __ARM_PMU_H__
14
Rabin Vincent0e25a5c2011-02-08 09:24:36 +053015#include <linux/interrupt.h>
16
Will Deacon28d7f4e2010-04-29 17:11:45 +010017enum arm_pmu_type {
18 ARM_PMU_DEVICE_CPU = 0,
19 ARM_NUM_PMU_DEVICES,
20};
21
Rabin Vincent0e25a5c2011-02-08 09:24:36 +053022/*
23 * struct arm_pmu_platdata - ARM PMU platform data
24 *
25 * @handle_irq: an optional handler which will be called from the interrupt and
26 * passed the address of the low level handler, and can be used to implement
27 * any platform specific handling before or after calling it.
28 */
29struct arm_pmu_platdata {
30 irqreturn_t (*handle_irq)(int irq, void *dev,
31 irq_handler_t pmu_handler);
32};
33
Jamie Iles0f4f0672010-02-02 20:23:15 +010034#ifdef CONFIG_CPU_HAS_PMU
35
Jamie Iles0f4f0672010-02-02 20:23:15 +010036/**
37 * reserve_pmu() - reserve the hardware performance counters
38 *
39 * Reserve the hardware performance counters in the system for exclusive use.
Will Deacon49c006b2010-04-29 17:13:24 +010040 * The platform_device for the system is returned on success, ERR_PTR()
Jamie Iles0f4f0672010-02-02 20:23:15 +010041 * encoded error on failure.
42 */
Will Deacon49c006b2010-04-29 17:13:24 +010043extern struct platform_device *
44reserve_pmu(enum arm_pmu_type device);
Jamie Iles0f4f0672010-02-02 20:23:15 +010045
46/**
47 * release_pmu() - Relinquish control of the performance counters
48 *
49 * Release the performance counters and allow someone else to use them.
50 * Callers must have disabled the counters and released IRQs before calling
Will Deacon49c006b2010-04-29 17:13:24 +010051 * this. The platform_device returned from reserve_pmu() must be passed as
Jamie Iles0f4f0672010-02-02 20:23:15 +010052 * a cookie.
53 */
54extern int
Will Deacon49c006b2010-04-29 17:13:24 +010055release_pmu(struct platform_device *pdev);
Jamie Iles0f4f0672010-02-02 20:23:15 +010056
57/**
58 * init_pmu() - Initialise the PMU.
59 *
60 * Initialise the system ready for PMU enabling. This should typically set the
61 * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do
62 * the actual hardware initialisation.
63 */
64extern int
Will Deacon49c006b2010-04-29 17:13:24 +010065init_pmu(enum arm_pmu_type device);
Jamie Iles0f4f0672010-02-02 20:23:15 +010066
67#else /* CONFIG_CPU_HAS_PMU */
68
Will Deacon49c006b2010-04-29 17:13:24 +010069#include <linux/err.h>
70
71static inline struct platform_device *
72reserve_pmu(enum arm_pmu_type device)
Jamie Iles0f4f0672010-02-02 20:23:15 +010073{
74 return ERR_PTR(-ENODEV);
75}
76
77static inline int
Will Deacon49c006b2010-04-29 17:13:24 +010078release_pmu(struct platform_device *pdev)
Jamie Iles0f4f0672010-02-02 20:23:15 +010079{
80 return -ENODEV;
81}
82
83static inline int
Will Deacon49c006b2010-04-29 17:13:24 +010084init_pmu(enum arm_pmu_type device)
Jamie Iles0f4f0672010-02-02 20:23:15 +010085{
86 return -ENODEV;
87}
88
89#endif /* CONFIG_CPU_HAS_PMU */
90
91#endif /* __ARM_PMU_H__ */