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Jaecheol Leea125a172012-01-07 20:18:35 +09001/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
Jaecheol Leea125a172012-01-07 20:18:35 +090012#include <linux/kernel.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h>
19#include <linux/suspend.h>
Lukasz Majewskid568b6f2013-11-28 13:42:42 +010020#include <linux/platform_device.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090021
Jaecheol Lee6c523c62012-01-07 20:18:39 +090022#include <plat/cpu.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090023
Kukjin Kimc4aaa292012-12-28 16:29:10 -080024#include "exynos-cpufreq.h"
25
Jaecheol Leea125a172012-01-07 20:18:35 +090026static struct exynos_dvfs_info *exynos_info;
27
28static struct regulator *arm_regulator;
Jaecheol Leea125a172012-01-07 20:18:35 +090029
30static unsigned int locking_frequency;
31static bool frequency_locked;
32static DEFINE_MUTEX(cpufreq_lock);
33
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080034static int exynos_cpufreq_get_index(unsigned int freq)
Jaecheol Leea125a172012-01-07 20:18:35 +090035{
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080036 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
37 int index;
38
39 for (index = 0;
40 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
41 if (freq_table[index].frequency == freq)
42 break;
43
44 if (freq_table[index].frequency == CPUFREQ_TABLE_END)
45 return -EINVAL;
46
47 return index;
48}
49
50static int exynos_cpufreq_scale(unsigned int target_freq)
51{
Jaecheol Leea125a172012-01-07 20:18:35 +090052 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
53 unsigned int *volt_table = exynos_info->volt_table;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080054 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
55 unsigned int arm_volt, safe_arm_volt = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090056 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
Viresh Kumard4019f02013-08-14 19:38:24 +053057 unsigned int old_freq;
Sachin Kamatd271d072013-01-25 10:18:09 -080058 int index, old_index;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080059 int ret = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090060
Viresh Kumard4019f02013-08-14 19:38:24 +053061 old_freq = policy->cur;
Jaecheol Leea125a172012-01-07 20:18:35 +090062
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000063 /*
64 * The policy max have been changed so that we cannot get proper
65 * old_index with cpufreq_frequency_table_target(). Thus, ignore
LABBE Corentin05851232013-09-26 16:50:21 +020066 * policy and get the index from the raw frequency table.
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000067 */
Viresh Kumard4019f02013-08-14 19:38:24 +053068 old_index = exynos_cpufreq_get_index(old_freq);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080069 if (old_index < 0) {
70 ret = old_index;
Jaecheol Leea125a172012-01-07 20:18:35 +090071 goto out;
72 }
73
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080074 index = exynos_cpufreq_get_index(target_freq);
75 if (index < 0) {
76 ret = index;
Jaecheol Leea125a172012-01-07 20:18:35 +090077 goto out;
78 }
79
Jaecheol Leea125a172012-01-07 20:18:35 +090080 /*
81 * ARM clock source will be changed APLL to MPLL temporary
82 * To support this level, need to control regulator for
83 * required voltage level
84 */
85 if (exynos_info->need_apll_change != NULL) {
86 if (exynos_info->need_apll_change(old_index, index) &&
87 (freq_table[index].frequency < mpll_freq_khz) &&
88 (freq_table[old_index].frequency < mpll_freq_khz))
89 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
90 }
91 arm_volt = volt_table[index];
92
Jaecheol Leea125a172012-01-07 20:18:35 +090093 /* When the new frequency is higher than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053094 if ((target_freq > old_freq) && !safe_arm_volt) {
Jaecheol Leea125a172012-01-07 20:18:35 +090095 /* Firstly, voltage up to increase frequency */
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080096 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
97 if (ret) {
98 pr_err("%s: failed to set cpu voltage to %d\n",
99 __func__, arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +0530100 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800101 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900102 }
103
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800104 if (safe_arm_volt) {
105 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900106 safe_arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800107 if (ret) {
108 pr_err("%s: failed to set cpu voltage to %d\n",
109 __func__, safe_arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +0530110 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800111 }
112 }
Jonghwan Choi857d90f2012-12-23 15:57:39 -0800113
114 exynos_info->set_freq(old_index, index);
Jaecheol Leea125a172012-01-07 20:18:35 +0900115
Jaecheol Leea125a172012-01-07 20:18:35 +0900116 /* When the new frequency is lower than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530117 if ((target_freq < old_freq) ||
118 ((target_freq > old_freq) && safe_arm_volt)) {
Jaecheol Leea125a172012-01-07 20:18:35 +0900119 /* down the voltage after frequency change */
Manish Badarkhe006454a2013-10-09 20:43:37 +0530120 ret = regulator_set_voltage(arm_regulator, arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900121 arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800122 if (ret) {
123 pr_err("%s: failed to set cpu voltage to %d\n",
124 __func__, arm_volt);
125 goto out;
126 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900127 }
128
129out:
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800130 cpufreq_cpu_put(policy);
131
132 return ret;
133}
134
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530135static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800136{
137 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
Sachin Kamat229b21e2013-01-31 17:13:39 -0800138 int ret = 0;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800139
140 mutex_lock(&cpufreq_lock);
141
142 if (frequency_locked)
143 goto out;
144
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530145 ret = exynos_cpufreq_scale(freq_table[index].frequency);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800146
147out:
Jaecheol Leea125a172012-01-07 20:18:35 +0900148 mutex_unlock(&cpufreq_lock);
149
150 return ret;
151}
152
153#ifdef CONFIG_PM
154static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
155{
156 return 0;
157}
158
159static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
160{
161 return 0;
162}
163#endif
164
165/**
166 * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
167 * context
168 * @notifier
169 * @pm_event
170 * @v
171 *
172 * While frequency_locked == true, target() ignores every frequency but
173 * locking_frequency. The locking_frequency value is the initial frequency,
174 * which is set by the bootloader. In order to eliminate possible
175 * inconsistency in clock values, we save and restore frequencies during
176 * suspend and resume and block CPUFREQ activities. Note that the standard
177 * suspend/resume cannot be used as they are too deep (syscore_ops) for
178 * regulator actions.
179 */
180static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
181 unsigned long pm_event, void *v)
182{
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800183 int ret;
Jaecheol Leea125a172012-01-07 20:18:35 +0900184
Jaecheol Leea125a172012-01-07 20:18:35 +0900185 switch (pm_event) {
186 case PM_SUSPEND_PREPARE:
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800187 mutex_lock(&cpufreq_lock);
Jaecheol Leea125a172012-01-07 20:18:35 +0900188 frequency_locked = true;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800189 mutex_unlock(&cpufreq_lock);
Jaecheol Leea125a172012-01-07 20:18:35 +0900190
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800191 ret = exynos_cpufreq_scale(locking_frequency);
192 if (ret < 0)
193 return NOTIFY_BAD;
Jaecheol Leea125a172012-01-07 20:18:35 +0900194
Jaecheol Leea125a172012-01-07 20:18:35 +0900195 break;
196
197 case PM_POST_SUSPEND:
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800198 mutex_lock(&cpufreq_lock);
Jaecheol Leea125a172012-01-07 20:18:35 +0900199 frequency_locked = false;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800200 mutex_unlock(&cpufreq_lock);
Jaecheol Leea125a172012-01-07 20:18:35 +0900201 break;
202 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900203
204 return NOTIFY_OK;
205}
206
207static struct notifier_block exynos_cpufreq_nb = {
208 .notifier_call = exynos_cpufreq_pm_notifier,
209};
210
211static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
212{
Viresh Kumar652ed952014-01-09 20:38:43 +0530213 policy->clk = exynos_info->cpu_clk;
Viresh Kumarb249aba2013-10-03 20:29:13 +0530214 return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
Jaecheol Leea125a172012-01-07 20:18:35 +0900215}
216
217static struct cpufreq_driver exynos_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +0530218 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Viresh Kumareea61812013-10-03 20:28:06 +0530219 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530220 .target_index = exynos_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530221 .get = cpufreq_generic_get,
Jaecheol Leea125a172012-01-07 20:18:35 +0900222 .init = exynos_cpufreq_cpu_init,
Viresh Kumareea61812013-10-03 20:28:06 +0530223 .exit = cpufreq_generic_exit,
Jaecheol Leea125a172012-01-07 20:18:35 +0900224 .name = "exynos_cpufreq",
Viresh Kumareea61812013-10-03 20:28:06 +0530225 .attr = cpufreq_generic_attr,
Jaecheol Leea125a172012-01-07 20:18:35 +0900226#ifdef CONFIG_PM
227 .suspend = exynos_cpufreq_suspend,
228 .resume = exynos_cpufreq_resume,
229#endif
230};
231
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100232static int exynos_cpufreq_probe(struct platform_device *pdev)
Jaecheol Leea125a172012-01-07 20:18:35 +0900233{
234 int ret = -EINVAL;
235
Viresh Kumard5b73cd2013-08-06 22:53:06 +0530236 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
Jaecheol Leea125a172012-01-07 20:18:35 +0900237 if (!exynos_info)
238 return -ENOMEM;
239
240 if (soc_is_exynos4210())
241 ret = exynos4210_cpufreq_init(exynos_info);
Jaecheol Leea35c5052012-03-10 02:59:22 -0800242 else if (soc_is_exynos4212() || soc_is_exynos4412())
243 ret = exynos4x12_cpufreq_init(exynos_info);
Jaecheol Lee562a6cb2012-03-10 03:00:02 -0800244 else if (soc_is_exynos5250())
245 ret = exynos5250_cpufreq_init(exynos_info);
Jaecheol Leea125a172012-01-07 20:18:35 +0900246 else
Amit Daniel Kachhapc1585202013-04-08 08:17:36 +0000247 return 0;
Jaecheol Leea125a172012-01-07 20:18:35 +0900248
249 if (ret)
250 goto err_vdd_arm;
251
252 if (exynos_info->set_freq == NULL) {
253 pr_err("%s: No set_freq function (ERR)\n", __func__);
254 goto err_vdd_arm;
255 }
256
257 arm_regulator = regulator_get(NULL, "vdd_arm");
258 if (IS_ERR(arm_regulator)) {
259 pr_err("%s: failed to get resource vdd_arm\n", __func__);
260 goto err_vdd_arm;
261 }
262
Viresh Kumar652ed952014-01-09 20:38:43 +0530263 locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
Jonghwan Choi6e45eb12013-01-18 11:09:01 -0800264
Jaecheol Leea125a172012-01-07 20:18:35 +0900265 register_pm_notifier(&exynos_cpufreq_nb);
266
267 if (cpufreq_register_driver(&exynos_driver)) {
268 pr_err("%s: failed to register cpufreq driver\n", __func__);
269 goto err_cpufreq;
270 }
271
272 return 0;
273err_cpufreq:
274 unregister_pm_notifier(&exynos_cpufreq_nb);
275
Jonghwan Choi184cddd2012-12-23 15:51:40 -0800276 regulator_put(arm_regulator);
Jaecheol Leea125a172012-01-07 20:18:35 +0900277err_vdd_arm:
278 kfree(exynos_info);
Jaecheol Leea125a172012-01-07 20:18:35 +0900279 return -EINVAL;
280}
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100281
282static struct platform_driver exynos_cpufreq_platdrv = {
283 .driver = {
284 .name = "exynos-cpufreq",
285 .owner = THIS_MODULE,
286 },
287 .probe = exynos_cpufreq_probe,
288};
289module_platform_driver(exynos_cpufreq_platdrv);