blob: 2e5e405768649bd2b3790de96e6b41a00e48763a [file] [log] [blame]
James Smartda0436e2009-05-22 14:51:39 -04001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20
21#define LPFC_ACTIVE_MBOX_WAIT_CNT 100
22#define LPFC_RELEASE_NOTIFICATION_INTERVAL 32
23#define LPFC_GET_QE_REL_INT 32
24#define LPFC_RPI_LOW_WATER_MARK 10
25/* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
26#define LPFC_NEMBED_MBOX_SGL_CNT 254
27
28/* Multi-queue arrangement for fast-path FCP work queues */
29#define LPFC_FN_EQN_MAX 8
30#define LPFC_SP_EQN_DEF 1
James Smartdef9c7a2009-12-21 17:02:28 -050031#define LPFC_FP_EQN_DEF 4
James Smartda0436e2009-05-22 14:51:39 -040032#define LPFC_FP_EQN_MIN 1
33#define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)
34
35#define LPFC_FN_WQN_MAX 32
36#define LPFC_SP_WQN_DEF 1
37#define LPFC_FP_WQN_DEF 4
38#define LPFC_FP_WQN_MIN 1
39#define LPFC_FP_WQN_MAX (LPFC_FN_WQN_MAX - LPFC_SP_WQN_DEF)
40
41/*
42 * Provide the default FCF Record attributes used by the driver
43 * when nonFIP mode is configured and there is no other default
44 * FCF Record attributes.
45 */
46#define LPFC_FCOE_FCF_DEF_INDEX 0
47#define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
48#define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
49
50/* First 3 bytes of default FCF MAC is specified by FC_MAP */
51#define LPFC_FCOE_FCF_MAC3 0xFF
52#define LPFC_FCOE_FCF_MAC4 0xFF
53#define LPFC_FCOE_FCF_MAC5 0xFE
54#define LPFC_FCOE_FCF_MAP0 0x0E
55#define LPFC_FCOE_FCF_MAP1 0xFC
56#define LPFC_FCOE_FCF_MAP2 0x00
57#define LPFC_FCOE_MAX_RCV_SIZE 0x5AC
58#define LPFC_FCOE_FKA_ADV_PER 0
59#define LPFC_FCOE_FIP_PRIORITY 0x80
60
James Smart6669f9b2009-10-02 15:16:45 -040061#define sli4_sid_from_fc_hdr(fc_hdr) \
62 ((fc_hdr)->fh_s_id[0] << 16 | \
63 (fc_hdr)->fh_s_id[1] << 8 | \
64 (fc_hdr)->fh_s_id[2])
65
James Smart5ffc2662009-11-18 15:39:44 -050066#define sli4_fctl_from_fc_hdr(fc_hdr) \
67 ((fc_hdr)->fh_f_ctl[0] << 16 | \
68 (fc_hdr)->fh_f_ctl[1] << 8 | \
69 (fc_hdr)->fh_f_ctl[2])
70
James Smartda0436e2009-05-22 14:51:39 -040071enum lpfc_sli4_queue_type {
72 LPFC_EQ,
73 LPFC_GCQ,
74 LPFC_MCQ,
75 LPFC_WCQ,
76 LPFC_RCQ,
77 LPFC_MQ,
78 LPFC_WQ,
79 LPFC_HRQ,
80 LPFC_DRQ
81};
82
83/* The queue sub-type defines the functional purpose of the queue */
84enum lpfc_sli4_queue_subtype {
85 LPFC_NONE,
86 LPFC_MBOX,
87 LPFC_FCP,
88 LPFC_ELS,
89 LPFC_USOL
90};
91
92union sli4_qe {
93 void *address;
94 struct lpfc_eqe *eqe;
95 struct lpfc_cqe *cqe;
96 struct lpfc_mcqe *mcqe;
97 struct lpfc_wcqe_complete *wcqe_complete;
98 struct lpfc_wcqe_release *wcqe_release;
99 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
100 struct lpfc_rcqe_complete *rcqe_complete;
101 struct lpfc_mqe *mqe;
102 union lpfc_wqe *wqe;
103 struct lpfc_rqe *rqe;
104};
105
106struct lpfc_queue {
107 struct list_head list;
108 enum lpfc_sli4_queue_type type;
109 enum lpfc_sli4_queue_subtype subtype;
110 struct lpfc_hba *phba;
111 struct list_head child_list;
112 uint32_t entry_count; /* Number of entries to support on the queue */
113 uint32_t entry_size; /* Size of each queue entry. */
114 uint32_t queue_id; /* Queue ID assigned by the hardware */
115 struct list_head page_list;
116 uint32_t page_count; /* Number of pages allocated for this queue */
117
118 uint32_t host_index; /* The host's index for putting or getting */
119 uint32_t hba_index; /* The last known hba index for get or put */
120 union sli4_qe qe[1]; /* array to index entries (must be last) */
121};
122
James Smartda0436e2009-05-22 14:51:39 -0400123struct lpfc_sli4_link {
124 uint8_t speed;
125 uint8_t duplex;
126 uint8_t status;
127 uint8_t physical;
128 uint8_t fault;
James Smart65467b62010-01-26 23:08:29 -0500129 uint16_t logical_speed;
James Smartda0436e2009-05-22 14:51:39 -0400130};
131
132struct lpfc_fcf {
133 uint8_t fabric_name[8];
James Smart8fa38512009-07-19 10:01:03 -0400134 uint8_t switch_name[8];
James Smartda0436e2009-05-22 14:51:39 -0400135 uint8_t mac_addr[6];
136 uint16_t fcf_indx;
137 uint16_t fcfi;
138 uint32_t fcf_flag;
139#define FCF_AVAILABLE 0x01 /* FCF available for discovery */
140#define FCF_REGISTERED 0x02 /* FCF registered with FW */
141#define FCF_DISCOVERED 0x04 /* FCF discovery started */
142#define FCF_BOOT_ENABLE 0x08 /* Boot bios use this FCF */
143#define FCF_IN_USE 0x10 /* Atleast one discovery completed */
144#define FCF_VALID_VLAN 0x20 /* Use the vlan id specified */
145 uint32_t priority;
146 uint32_t addr_mode;
147 uint16_t vlan_id;
148};
149
150#define LPFC_REGION23_SIGNATURE "RG23"
151#define LPFC_REGION23_VERSION 1
152#define LPFC_REGION23_LAST_REC 0xff
James Smarta0c87cb2009-07-19 10:01:10 -0400153#define DRIVER_SPECIFIC_TYPE 0xA2
154#define LINUX_DRIVER_ID 0x20
155#define PORT_STE_TYPE 0x1
156
James Smartda0436e2009-05-22 14:51:39 -0400157struct lpfc_fip_param_hdr {
158 uint8_t type;
159#define FCOE_PARAM_TYPE 0xA0
160 uint8_t length;
161#define FCOE_PARAM_LENGTH 2
162 uint8_t parm_version;
163#define FIPP_VERSION 0x01
164 uint8_t parm_flags;
165#define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
166#define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
167#define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
James Smart6a9c52c2009-10-02 15:16:51 -0400168#define FIPP_MODE_ON 0x1
James Smartda0436e2009-05-22 14:51:39 -0400169#define FIPP_MODE_OFF 0x0
170#define FIPP_VLAN_VALID 0x1
171};
172
173struct lpfc_fcoe_params {
174 uint8_t fc_map[3];
175 uint8_t reserved1;
176 uint16_t vlan_tag;
177 uint8_t reserved[2];
178};
179
180struct lpfc_fcf_conn_hdr {
181 uint8_t type;
182#define FCOE_CONN_TBL_TYPE 0xA1
183 uint8_t length; /* words */
184 uint8_t reserved[2];
185};
186
187struct lpfc_fcf_conn_rec {
188 uint16_t flags;
189#define FCFCNCT_VALID 0x0001
190#define FCFCNCT_BOOT 0x0002
191#define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
192#define FCFCNCT_FBNM_VALID 0x0008
193#define FCFCNCT_SWNM_VALID 0x0010
194#define FCFCNCT_VLAN_VALID 0x0020
195#define FCFCNCT_AM_VALID 0x0040
196#define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
197#define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
198
199 uint16_t vlan_tag;
200 uint8_t fabric_name[8];
201 uint8_t switch_name[8];
202};
203
204struct lpfc_fcf_conn_entry {
205 struct list_head list;
206 struct lpfc_fcf_conn_rec conn_rec;
207};
208
209/*
210 * Define the host's bootstrap mailbox. This structure contains
211 * the member attributes needed to create, use, and destroy the
212 * bootstrap mailbox region.
213 *
214 * The macro definitions for the bmbx data structure are defined
215 * in lpfc_hw4.h with the register definition.
216 */
217struct lpfc_bmbx {
218 struct lpfc_dmabuf *dmabuf;
219 struct dma_address dma_address;
220 void *avirt;
221 dma_addr_t aphys;
222 uint32_t bmbx_size;
223};
224
225#define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
226
227#define LPFC_EQE_SIZE_4B 4
228#define LPFC_EQE_SIZE_16B 16
229#define LPFC_CQE_SIZE 16
230#define LPFC_WQE_SIZE 64
231#define LPFC_MQE_SIZE 256
232#define LPFC_RQE_SIZE 8
233
234#define LPFC_EQE_DEF_COUNT 1024
235#define LPFC_CQE_DEF_COUNT 256
James Smartf1126682009-06-10 17:22:44 -0400236#define LPFC_WQE_DEF_COUNT 256
James Smartda0436e2009-05-22 14:51:39 -0400237#define LPFC_MQE_DEF_COUNT 16
238#define LPFC_RQE_DEF_COUNT 512
239
240#define LPFC_QUEUE_NOARM false
241#define LPFC_QUEUE_REARM true
242
243
244/*
245 * SLI4 CT field defines
246 */
247#define SLI4_CT_RPI 0
248#define SLI4_CT_VPI 1
249#define SLI4_CT_VFI 2
250#define SLI4_CT_FCFI 3
251
252#define LPFC_SLI4_MAX_SEGMENT_SIZE 0x10000
253
254/*
255 * SLI4 specific data structures
256 */
257struct lpfc_max_cfg_param {
258 uint16_t max_xri;
259 uint16_t xri_base;
260 uint16_t xri_used;
261 uint16_t max_rpi;
262 uint16_t rpi_base;
263 uint16_t rpi_used;
264 uint16_t max_vpi;
265 uint16_t vpi_base;
266 uint16_t vpi_used;
267 uint16_t max_vfi;
268 uint16_t vfi_base;
269 uint16_t vfi_used;
270 uint16_t max_fcfi;
271 uint16_t fcfi_base;
272 uint16_t fcfi_used;
273 uint16_t max_eq;
274 uint16_t max_rq;
275 uint16_t max_cq;
276 uint16_t max_wq;
277};
278
279struct lpfc_hba;
280/* SLI4 HBA multi-fcp queue handler struct */
281struct lpfc_fcp_eq_hdl {
282 uint32_t idx;
283 struct lpfc_hba *phba;
284};
285
286/* SLI4 HBA data structure entries */
287struct lpfc_sli4_hba {
288 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
289 PCI BAR0, config space registers */
290 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
291 PCI BAR1, control registers */
292 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
293 PCI BAR2, doorbell registers */
294 /* BAR0 PCI config space register memory map */
295 void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */
296 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
James Smarta747c9c2009-11-18 15:41:10 -0500297 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
298 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
James Smartda0436e2009-05-22 14:51:39 -0400299 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */
300 /* BAR1 FCoE function CSR register memory map */
301 void __iomem *STAregaddr; /* Address to HST_STATE register */
302 void __iomem *ISRregaddr; /* Address to HST_ISR register */
303 void __iomem *IMRregaddr; /* Address to HST_IMR register */
304 void __iomem *ISCRregaddr; /* Address to HST_ISCR register */
305 /* BAR2 VF-0 doorbell register memory map */
306 void __iomem *RQDBregaddr; /* Address to RQ_DOORBELL register */
307 void __iomem *WQDBregaddr; /* Address to WQ_DOORBELL register */
308 void __iomem *EQCQDBregaddr; /* Address to EQCQ_DOORBELL register */
309 void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */
310 void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */
311
James Smarta747c9c2009-11-18 15:41:10 -0500312 uint32_t ue_mask_lo;
313 uint32_t ue_mask_hi;
James Smartda0436e2009-05-22 14:51:39 -0400314 struct msix_entry *msix_entries;
315 uint32_t cfg_eqn;
316 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
317 /* Pointers to the constructed SLI4 queues */
318 struct lpfc_queue **fp_eq; /* Fast-path event queue */
319 struct lpfc_queue *sp_eq; /* Slow-path event queue */
320 struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */
321 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
322 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
323 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
324 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
325 struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */
326 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
327 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
James Smartda0436e2009-05-22 14:51:39 -0400328
329 /* Setup information for various queue parameters */
330 int eq_esize;
331 int eq_ecount;
332 int cq_esize;
333 int cq_ecount;
334 int wq_esize;
335 int wq_ecount;
336 int mq_esize;
337 int mq_ecount;
338 int rq_esize;
339 int rq_ecount;
340#define LPFC_SP_EQ_MAX_INTR_SEC 10000
341#define LPFC_FP_EQ_MAX_INTR_SEC 10000
342
343 uint32_t intr_enable;
344 struct lpfc_bmbx bmbx;
345 struct lpfc_max_cfg_param max_cfg_param;
346 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
347 uint16_t next_rpi;
348 uint16_t scsi_xri_max;
349 uint16_t scsi_xri_cnt;
350 struct list_head lpfc_free_sgl_list;
351 struct list_head lpfc_sgl_list;
352 struct lpfc_sglq **lpfc_els_sgl_array;
353 struct list_head lpfc_abts_els_sgl_list;
354 struct lpfc_scsi_buf **lpfc_scsi_psb_array;
355 struct list_head lpfc_abts_scsi_buf_list;
356 uint32_t total_sglq_bufs;
357 struct lpfc_sglq **lpfc_sglq_active_list;
358 struct list_head lpfc_rpi_hdr_list;
359 unsigned long *rpi_bmask;
360 uint16_t rpi_count;
361 struct lpfc_sli4_flags sli4_flags;
James Smart45ed1192009-10-02 15:17:02 -0400362 struct list_head sp_queue_event;
James Smartda0436e2009-05-22 14:51:39 -0400363 struct list_head sp_cqe_event_pool;
364 struct list_head sp_asynce_work_queue;
365 struct list_head sp_fcp_xri_aborted_work_queue;
366 struct list_head sp_els_xri_aborted_work_queue;
367 struct list_head sp_unsol_work_queue;
368 struct lpfc_sli4_link link_state;
369 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
370 spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */
371};
372
373enum lpfc_sge_type {
374 GEN_BUFF_TYPE,
375 SCSI_BUFF_TYPE
376};
377
378struct lpfc_sglq {
379 /* lpfc_sglqs are used in double linked lists */
380 struct list_head list;
381 struct list_head clist;
382 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
383 uint16_t iotag; /* pre-assigned IO tag */
384 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
385 struct sli4_sge *sgl; /* pre-assigned SGL */
386 void *virt; /* virtual address. */
387 dma_addr_t phys; /* physical address */
388};
389
390struct lpfc_rpi_hdr {
391 struct list_head list;
392 uint32_t len;
393 struct lpfc_dmabuf *dmabuf;
394 uint32_t page_count;
395 uint32_t start_rpi;
396};
397
398/*
399 * SLI4 specific function prototypes
400 */
401int lpfc_pci_function_reset(struct lpfc_hba *);
402int lpfc_sli4_hba_setup(struct lpfc_hba *);
403int lpfc_sli4_hba_down(struct lpfc_hba *);
404int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
405 uint8_t, uint32_t, bool);
406void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
407void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
408void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
409 struct lpfc_mbx_sge *);
410
411void lpfc_sli4_hba_reset(struct lpfc_hba *);
412struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
413 uint32_t);
414void lpfc_sli4_queue_free(struct lpfc_queue *);
415uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint16_t);
416uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
417 struct lpfc_queue *, uint32_t, uint32_t);
418uint32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
419 struct lpfc_queue *, uint32_t);
420uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
421 struct lpfc_queue *, uint32_t);
422uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
423 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
424uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
425uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
426uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
427uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
428uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
429 struct lpfc_queue *);
430int lpfc_sli4_queue_setup(struct lpfc_hba *);
431void lpfc_sli4_queue_unset(struct lpfc_hba *);
432int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
433int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
434int lpfc_sli4_remove_all_sgl_pages(struct lpfc_hba *);
435uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
436int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
437int lpfc_sli4_post_sgl_list(struct lpfc_hba *phba);
438int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
439struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
440struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
441void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
442void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
443int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
444int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
445int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
446struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
447void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
448int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
449void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
450void lpfc_sli4_remove_rpis(struct lpfc_hba *);
451void lpfc_sli4_async_event_proc(struct lpfc_hba *);
452int lpfc_sli4_resume_rpi(struct lpfc_nodelist *);
453void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
454void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
455void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
456 struct sli4_wcqe_xri_aborted *);
457void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
458 struct sli4_wcqe_xri_aborted *);
459int lpfc_sli4_brdreset(struct lpfc_hba *);
460int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
461void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
462int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
463int lpfc_sli4_init_vpi(struct lpfc_hba *, uint16_t);
464uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
465uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
466void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
467int lpfc_sli4_read_fcf_record(struct lpfc_hba *, uint16_t);
468void lpfc_mbx_cmpl_read_fcf_record(struct lpfc_hba *, LPFC_MBOXQ_t *);
469int lpfc_sli4_post_status_check(struct lpfc_hba *);
470uint8_t lpfc_sli4_mbox_opcode_get(struct lpfc_hba *, struct lpfcMboxq *);
471