Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand/rtc_from4.c |
| 3 | * |
| 4 | * Copyright (C) 2004 Red Hat, Inc. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 5 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * Derived from drivers/mtd/nand/spia.c |
| 7 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
| 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * Overview: |
| 14 | * This is a device driver for the AG-AND flash device found on the |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 15 | * Renesas Technology Corp. Flash ROM 4-slot interface board (FROM_BOARD4), |
| 16 | * which utilizes the Renesas HN29V1G91T-30 part. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * This chip is a 1 GBibit (128MiB x 8 bits) AG-AND flash device. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/rslib.h> |
Adrian Bunk | 1605cd3 | 2006-11-22 05:38:11 +0100 | [diff] [blame] | 25 | #include <linux/bitrev.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <linux/mtd/mtd.h> |
| 28 | #include <linux/mtd/nand.h> |
| 29 | #include <linux/mtd/partitions.h> |
| 30 | #include <asm/io.h> |
| 31 | |
| 32 | /* |
| 33 | * MTD structure for Renesas board |
| 34 | */ |
| 35 | static struct mtd_info *rtc_from4_mtd = NULL; |
| 36 | |
| 37 | #define RTC_FROM4_MAX_CHIPS 2 |
| 38 | |
| 39 | /* HS77x9 processor register defines */ |
| 40 | #define SH77X9_BCR1 ((volatile unsigned short *)(0xFFFFFF60)) |
| 41 | #define SH77X9_BCR2 ((volatile unsigned short *)(0xFFFFFF62)) |
| 42 | #define SH77X9_WCR1 ((volatile unsigned short *)(0xFFFFFF64)) |
| 43 | #define SH77X9_WCR2 ((volatile unsigned short *)(0xFFFFFF66)) |
| 44 | #define SH77X9_MCR ((volatile unsigned short *)(0xFFFFFF68)) |
| 45 | #define SH77X9_PCR ((volatile unsigned short *)(0xFFFFFF6C)) |
| 46 | #define SH77X9_FRQCR ((volatile unsigned short *)(0xFFFFFF80)) |
| 47 | |
| 48 | /* |
| 49 | * Values specific to the Renesas Technology Corp. FROM_BOARD4 (used with HS77x9 processor) |
| 50 | */ |
| 51 | /* Address where flash is mapped */ |
| 52 | #define RTC_FROM4_FIO_BASE 0x14000000 |
| 53 | |
| 54 | /* CLE and ALE are tied to address lines 5 & 4, respectively */ |
| 55 | #define RTC_FROM4_CLE (1 << 5) |
| 56 | #define RTC_FROM4_ALE (1 << 4) |
| 57 | |
| 58 | /* address lines A24-A22 used for chip selection */ |
| 59 | #define RTC_FROM4_NAND_ADDR_SLOT3 (0x00800000) |
| 60 | #define RTC_FROM4_NAND_ADDR_SLOT4 (0x00C00000) |
| 61 | #define RTC_FROM4_NAND_ADDR_FPGA (0x01000000) |
| 62 | /* mask address lines A24-A22 used for chip selection */ |
| 63 | #define RTC_FROM4_NAND_ADDR_MASK (RTC_FROM4_NAND_ADDR_SLOT3 | RTC_FROM4_NAND_ADDR_SLOT4 | RTC_FROM4_NAND_ADDR_FPGA) |
| 64 | |
| 65 | /* FPGA status register for checking device ready (bit zero) */ |
| 66 | #define RTC_FROM4_FPGA_SR (RTC_FROM4_NAND_ADDR_FPGA | 0x00000002) |
| 67 | #define RTC_FROM4_DEVICE_READY 0x0001 |
| 68 | |
| 69 | /* FPGA Reed-Solomon ECC Control register */ |
| 70 | |
| 71 | #define RTC_FROM4_RS_ECC_CTL (RTC_FROM4_NAND_ADDR_FPGA | 0x00000050) |
| 72 | #define RTC_FROM4_RS_ECC_CTL_CLR (1 << 7) |
| 73 | #define RTC_FROM4_RS_ECC_CTL_GEN (1 << 6) |
| 74 | #define RTC_FROM4_RS_ECC_CTL_FD_E (1 << 5) |
| 75 | |
| 76 | /* FPGA Reed-Solomon ECC code base */ |
| 77 | #define RTC_FROM4_RS_ECC (RTC_FROM4_NAND_ADDR_FPGA | 0x00000060) |
| 78 | #define RTC_FROM4_RS_ECCN (RTC_FROM4_NAND_ADDR_FPGA | 0x00000080) |
| 79 | |
| 80 | /* FPGA Reed-Solomon ECC check register */ |
| 81 | #define RTC_FROM4_RS_ECC_CHK (RTC_FROM4_NAND_ADDR_FPGA | 0x00000070) |
| 82 | #define RTC_FROM4_RS_ECC_CHK_ERROR (1 << 7) |
| 83 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 84 | #define ERR_STAT_ECC_AVAILABLE 0x20 |
| 85 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | /* Undefine for software ECC */ |
| 87 | #define RTC_FROM4_HWECC 1 |
| 88 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 89 | /* Define as 1 for no virtual erase blocks (in JFFS2) */ |
| 90 | #define RTC_FROM4_NO_VIRTBLOCKS 0 |
| 91 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | /* |
| 93 | * Module stuff |
| 94 | */ |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 95 | static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | |
Jesper Juhl | 3c6bee1 | 2006-01-09 20:54:01 -0800 | [diff] [blame] | 97 | static const struct mtd_partition partition_info[] = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 98 | { |
| 99 | .name = "Renesas flash partition 1", |
| 100 | .offset = 0, |
| 101 | .size = MTDPART_SIZ_FULL}, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | }; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 103 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | #define NUM_PARTITIONS 1 |
| 105 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 106 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | * hardware specific flash bbt decriptors |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 108 | * Note: this is to allow debugging by disabling |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | * NAND_BBT_CREATE and/or NAND_BBT_WRITE |
| 110 | * |
| 111 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 112 | static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' }; |
| 113 | static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | |
| 115 | static struct nand_bbt_descr rtc_from4_bbt_main_descr = { |
| 116 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
| 117 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, |
| 118 | .offs = 40, |
| 119 | .len = 4, |
| 120 | .veroffs = 44, |
| 121 | .maxblocks = 4, |
| 122 | .pattern = bbt_pattern |
| 123 | }; |
| 124 | |
| 125 | static struct nand_bbt_descr rtc_from4_bbt_mirror_descr = { |
| 126 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
| 127 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, |
| 128 | .offs = 40, |
| 129 | .len = 4, |
| 130 | .veroffs = 44, |
| 131 | .maxblocks = 4, |
| 132 | .pattern = mirror_pattern |
| 133 | }; |
| 134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | #ifdef RTC_FROM4_HWECC |
| 136 | |
| 137 | /* the Reed Solomon control structure */ |
| 138 | static struct rs_control *rs_decoder; |
| 139 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 140 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | * hardware specific Out Of Band information |
| 142 | */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 143 | static struct nand_ecclayout rtc_from4_nand_oobinfo = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | .eccbytes = 32, |
| 145 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 146 | 0, 1, 2, 3, 4, 5, 6, 7, |
| 147 | 8, 9, 10, 11, 12, 13, 14, 15, |
| 148 | 16, 17, 18, 19, 20, 21, 22, 23, |
| 149 | 24, 25, 26, 27, 28, 29, 30, 31}, |
| 150 | .oobfree = {{32, 32}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | }; |
| 152 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | #endif |
| 154 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 155 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | * rtc_from4_hwcontrol - hardware specific access to control-lines |
| 157 | * @mtd: MTD device structure |
| 158 | * @cmd: hardware control command |
| 159 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 160 | * Address lines (A5 and A4) are used to control Command and Address Latch |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | * Enable on this board, so set the read/write address appropriately. |
| 162 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 163 | * Chip Enable is also controlled by the Chip Select (CS5) and |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | * Address lines (A24-A22), so no action is required here. |
| 165 | * |
| 166 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 167 | static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd, |
| 168 | unsigned int ctrl) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 170 | struct nand_chip *chip = (mtd->priv); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 171 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 172 | if (cmd == NAND_CMD_NONE) |
| 173 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 174 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 175 | if (ctrl & NAND_CLE) |
| 176 | writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_CLE); |
| 177 | else |
| 178 | writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | } |
| 180 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | /* |
| 182 | * rtc_from4_nand_select_chip - hardware specific chip select |
| 183 | * @mtd: MTD device structure |
| 184 | * @chip: Chip to select (0 == slot 3, 1 == slot 4) |
| 185 | * |
| 186 | * The chip select is based on address lines A24-A22. |
| 187 | * This driver uses flash slots 3 and 4 (A23-A22). |
| 188 | * |
| 189 | */ |
| 190 | static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip) |
| 191 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 192 | struct nand_chip *this = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | |
| 194 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK); |
| 195 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK); |
| 196 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 197 | switch (chip) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 199 | case 0: /* select slot 3 chip */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3); |
| 201 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 202 | break; |
| 203 | case 1: /* select slot 4 chip */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4); |
| 205 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 206 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 208 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | } |
| 210 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | /* |
| 212 | * rtc_from4_nand_device_ready - hardware specific ready/busy check |
| 213 | * @mtd: MTD device structure |
| 214 | * |
| 215 | * This board provides the Ready/Busy state in the status register |
| 216 | * of the FPGA. Bit zero indicates the RDY(1)/BSY(0) signal. |
| 217 | * |
| 218 | */ |
| 219 | static int rtc_from4_nand_device_ready(struct mtd_info *mtd) |
| 220 | { |
| 221 | unsigned short status; |
| 222 | |
| 223 | status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_FPGA_SR)); |
| 224 | |
| 225 | return (status & RTC_FROM4_DEVICE_READY); |
| 226 | |
| 227 | } |
| 228 | |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 229 | /* |
| 230 | * deplete - code to perform device recovery in case there was a power loss |
| 231 | * @mtd: MTD device structure |
| 232 | * @chip: Chip to select (0 == slot 3, 1 == slot 4) |
| 233 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 234 | * If there was a sudden loss of power during an erase operation, a |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 235 | * "device recovery" operation must be performed when power is restored |
| 236 | * to ensure correct operation. This routine performs the required steps |
| 237 | * for the requested chip. |
| 238 | * |
| 239 | * See page 86 of the data sheet for details. |
| 240 | * |
| 241 | */ |
| 242 | static void deplete(struct mtd_info *mtd, int chip) |
| 243 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 244 | struct nand_chip *this = mtd->priv; |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 245 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 246 | /* wait until device is ready */ |
| 247 | while (!this->dev_ready(mtd)) ; |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 248 | |
| 249 | this->select_chip(mtd, chip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 250 | |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 251 | /* Send the commands for device recovery, phase 1 */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 252 | this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000); |
| 253 | this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1); |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 254 | |
| 255 | /* Send the commands for device recovery, phase 2 */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 256 | this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004); |
| 257 | this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1); |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 258 | |
| 259 | } |
| 260 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | #ifdef RTC_FROM4_HWECC |
| 262 | /* |
| 263 | * rtc_from4_enable_hwecc - hardware specific hardware ECC enable function |
| 264 | * @mtd: MTD device structure |
| 265 | * @mode: I/O mode; read or write |
| 266 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 267 | * enable hardware ECC for data read or write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | * |
| 269 | */ |
| 270 | static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode) |
| 271 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 272 | volatile unsigned short *rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | unsigned short status; |
| 274 | |
| 275 | switch (mode) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 276 | case NAND_ECC_READ: |
| 277 | status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_FD_E; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | |
| 279 | *rs_ecc_ctl = status; |
| 280 | break; |
| 281 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 282 | case NAND_ECC_READSYN: |
| 283 | status = 0x00; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | |
| 285 | *rs_ecc_ctl = status; |
| 286 | break; |
| 287 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 288 | case NAND_ECC_WRITE: |
| 289 | status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_GEN | RTC_FROM4_RS_ECC_CTL_FD_E; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | |
| 291 | *rs_ecc_ctl = status; |
| 292 | break; |
| 293 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 294 | default: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | BUG(); |
| 296 | break; |
| 297 | } |
| 298 | |
| 299 | } |
| 300 | |
| 301 | /* |
| 302 | * rtc_from4_calculate_ecc - hardware specific code to read ECC code |
| 303 | * @mtd: MTD device structure |
| 304 | * @dat: buffer containing the data to generate ECC codes |
| 305 | * @ecc_code ECC codes calculated |
| 306 | * |
| 307 | * The ECC code is calculated by the FPGA. All we have to do is read the values |
| 308 | * from the FPGA registers. |
| 309 | * |
| 310 | * Note: We read from the inverted registers, since data is inverted before |
| 311 | * the code is calculated. So all 0xff data (blank page) results in all 0xff rs code |
| 312 | * |
| 313 | */ |
| 314 | static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
| 315 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 316 | volatile unsigned short *rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | unsigned short value; |
| 318 | int i; |
| 319 | |
| 320 | for (i = 0; i < 8; i++) { |
| 321 | value = *rs_eccn; |
| 322 | ecc_code[i] = (unsigned char)value; |
| 323 | rs_eccn++; |
| 324 | } |
| 325 | ecc_code[7] |= 0x0f; /* set the last four bits (not used) */ |
| 326 | } |
| 327 | |
| 328 | /* |
| 329 | * rtc_from4_correct_data - hardware specific code to correct data using ECC code |
| 330 | * @mtd: MTD device structure |
| 331 | * @buf: buffer containing the data to generate ECC codes |
| 332 | * @ecc1 ECC codes read |
| 333 | * @ecc2 ECC codes calculated |
| 334 | * |
| 335 | * The FPGA tells us fast, if there's an error or not. If no, we go back happy |
| 336 | * else we read the ecc results from the fpga and call the rs library to decode |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 337 | * and hopefully correct the error. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | */ |
| 340 | static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_char *ecc1, u_char *ecc2) |
| 341 | { |
| 342 | int i, j, res; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 343 | unsigned short status; |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 344 | uint16_t par[6], syn[6]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 345 | uint8_t ecc[8]; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 346 | volatile unsigned short *rs_ecc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | |
| 348 | status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK)); |
| 349 | |
| 350 | if (!(status & RTC_FROM4_RS_ECC_CHK_ERROR)) { |
| 351 | return 0; |
| 352 | } |
| 353 | |
| 354 | /* Read the syndrom pattern from the FPGA and correct the bitorder */ |
| 355 | rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 356 | for (i = 0; i < 8; i++) { |
Andrew Morton | ce10604 | 2006-11-29 00:19:14 +0000 | [diff] [blame] | 357 | ecc[i] = bitrev8(*rs_ecc); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 358 | rs_ecc++; |
| 359 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | |
| 361 | /* convert into 6 10bit syndrome fields */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 362 | par[5] = rs_decoder->index_of[(((uint16_t) ecc[0] >> 0) & 0x0ff) | (((uint16_t) ecc[1] << 8) & 0x300)]; |
| 363 | par[4] = rs_decoder->index_of[(((uint16_t) ecc[1] >> 2) & 0x03f) | (((uint16_t) ecc[2] << 6) & 0x3c0)]; |
| 364 | par[3] = rs_decoder->index_of[(((uint16_t) ecc[2] >> 4) & 0x00f) | (((uint16_t) ecc[3] << 4) & 0x3f0)]; |
| 365 | par[2] = rs_decoder->index_of[(((uint16_t) ecc[3] >> 6) & 0x003) | (((uint16_t) ecc[4] << 2) & 0x3fc)]; |
| 366 | par[1] = rs_decoder->index_of[(((uint16_t) ecc[5] >> 0) & 0x0ff) | (((uint16_t) ecc[6] << 8) & 0x300)]; |
| 367 | par[0] = (((uint16_t) ecc[6] >> 2) & 0x03f) | (((uint16_t) ecc[7] << 6) & 0x3c0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | |
| 369 | /* Convert to computable syndrome */ |
| 370 | for (i = 0; i < 6; i++) { |
| 371 | syn[i] = par[0]; |
| 372 | for (j = 1; j < 6; j++) |
| 373 | if (par[j] != rs_decoder->nn) |
| 374 | syn[i] ^= rs_decoder->alpha_to[rs_modnn(rs_decoder, par[j] + i * j)]; |
| 375 | |
| 376 | /* Convert to index form */ |
| 377 | syn[i] = rs_decoder->index_of[syn[i]]; |
| 378 | } |
| 379 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 380 | /* Let the library code do its magic. */ |
| 381 | res = decode_rs8(rs_decoder, (uint8_t *) buf, par, 512, syn, 0, NULL, 0xff, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 382 | if (res > 0) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 383 | DEBUG(MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " "ECC corrected %d errors on read\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | } |
| 385 | return res; |
| 386 | } |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 387 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 388 | /** |
| 389 | * rtc_from4_errstat - perform additional error status checks |
| 390 | * @mtd: MTD device structure |
| 391 | * @this: NAND chip structure |
| 392 | * @state: state or the operation |
| 393 | * @status: status code returned from read status |
| 394 | * @page: startpage inside the chip, must be called with (page & this->pagemask) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 395 | * |
| 396 | * Perform additional error status checks on erase and write failures |
| 397 | * to determine if errors are correctable. For this device, correctable |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 398 | * 1-bit errors on erase and write are considered acceptable. |
| 399 | * |
| 400 | * note: see pages 34..37 of data sheet for details. |
| 401 | * |
| 402 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 403 | static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, |
| 404 | int state, int status, int page) |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 405 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 406 | int er_stat = 0; |
| 407 | int rtn, retlen; |
| 408 | size_t len; |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 409 | uint8_t *buf; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 410 | int i; |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 411 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 412 | this->cmdfunc(mtd, NAND_CMD_STATUS_CLEAR, -1, -1); |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 413 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 414 | if (state == FL_ERASING) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 415 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 416 | for (i = 0; i < 4; i++) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 417 | if (!(status & 1 << (i + 1))) |
| 418 | continue; |
| 419 | this->cmdfunc(mtd, (NAND_CMD_STATUS_ERROR + i + 1), |
| 420 | -1, -1); |
| 421 | rtn = this->read_byte(mtd); |
| 422 | this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1); |
| 423 | |
| 424 | /* err_ecc_not_avail */ |
| 425 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) |
| 426 | er_stat |= 1 << (i + 1); |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 427 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 428 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 429 | } else if (state == FL_WRITING) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 430 | |
| 431 | unsigned long corrected = mtd->ecc_stats.corrected; |
| 432 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 433 | /* single bank write logic */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 434 | this->cmdfunc(mtd, NAND_CMD_STATUS_ERROR, -1, -1); |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 435 | rtn = this->read_byte(mtd); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 436 | this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 437 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 438 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 439 | /* err_ecc_not_avail */ |
| 440 | er_stat |= 1 << 1; |
| 441 | goto out; |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 442 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 443 | |
| 444 | len = mtd->writesize; |
| 445 | buf = kmalloc(len, GFP_KERNEL); |
| 446 | if (!buf) { |
| 447 | printk(KERN_ERR "rtc_from4_errstat: Out of memory!\n"); |
| 448 | er_stat = 1; |
| 449 | goto out; |
| 450 | } |
| 451 | |
| 452 | /* recovery read */ |
| 453 | rtn = nand_do_read(mtd, page, len, &retlen, buf); |
| 454 | |
| 455 | /* if read failed or > 1-bit error corrected */ |
Mariusz Kozlowski | 7dcb483 | 2006-12-01 09:59:49 +0000 | [diff] [blame] | 456 | if (rtn || (mtd->ecc_stats.corrected - corrected) > 1) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 457 | er_stat |= 1 << 1; |
| 458 | kfree(buf); |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 459 | } |
Sebastian Siewior | 6f5afae | 2008-03-28 14:15:47 -0700 | [diff] [blame] | 460 | out: |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 461 | rtn = status; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 462 | if (er_stat == 0) { /* if ECC is available */ |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 463 | rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */ |
| 464 | } |
| 465 | |
| 466 | return rtn; |
| 467 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | #endif |
| 469 | |
| 470 | /* |
| 471 | * Main initialization routine |
| 472 | */ |
David Woodhouse | cead4db | 2006-05-16 13:54:50 +0100 | [diff] [blame] | 473 | static int __init rtc_from4_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | { |
| 475 | struct nand_chip *this; |
| 476 | unsigned short bcr1, bcr2, wcr2; |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 477 | int i; |
Sebastian Siewior | c27e9b8 | 2008-04-18 13:44:24 -0700 | [diff] [blame] | 478 | int ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | |
| 480 | /* Allocate memory for MTD device structure and private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 481 | rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | if (!rtc_from4_mtd) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 483 | printk("Unable to allocate Renesas NAND MTD device structure.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | return -ENOMEM; |
| 485 | } |
| 486 | |
| 487 | /* Get pointer to private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 488 | this = (struct nand_chip *)(&rtc_from4_mtd[1]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | |
| 490 | /* Initialize structures */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 491 | memset(rtc_from4_mtd, 0, sizeof(struct mtd_info)); |
| 492 | memset(this, 0, sizeof(struct nand_chip)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | |
| 494 | /* Link the private data with the MTD structure */ |
| 495 | rtc_from4_mtd->priv = this; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 496 | rtc_from4_mtd->owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | |
| 498 | /* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */ |
| 499 | bcr1 = *SH77X9_BCR1 & ~0x0002; |
| 500 | bcr1 |= 0x0002; |
| 501 | *SH77X9_BCR1 = bcr1; |
| 502 | |
| 503 | /* set */ |
| 504 | bcr2 = *SH77X9_BCR2 & ~0x0c00; |
| 505 | bcr2 |= 0x0800; |
| 506 | *SH77X9_BCR2 = bcr2; |
| 507 | |
| 508 | /* set area 5 wait states */ |
| 509 | wcr2 = *SH77X9_WCR2 & ~0x1c00; |
| 510 | wcr2 |= 0x1c00; |
| 511 | *SH77X9_WCR2 = wcr2; |
| 512 | |
| 513 | /* Set address of NAND IO lines */ |
| 514 | this->IO_ADDR_R = rtc_from4_fio_base; |
| 515 | this->IO_ADDR_W = rtc_from4_fio_base; |
| 516 | /* Set address of hardware control function */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 517 | this->cmd_ctrl = rtc_from4_hwcontrol; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | /* Set address of chip select function */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 519 | this->select_chip = rtc_from4_nand_select_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | /* command delay time (in us) */ |
| 521 | this->chip_delay = 100; |
| 522 | /* return the status of the Ready/Busy line */ |
| 523 | this->dev_ready = rtc_from4_nand_device_ready; |
| 524 | |
| 525 | #ifdef RTC_FROM4_HWECC |
| 526 | printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n"); |
| 527 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 528 | this->ecc.mode = NAND_ECC_HW_SYNDROME; |
| 529 | this->ecc.size = 512; |
| 530 | this->ecc.bytes = 8; |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 531 | /* return the status of extra status and ECC checks */ |
| 532 | this->errstat = rtc_from4_errstat; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 533 | /* set the nand_oobinfo to support FPGA H/W error detection */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 534 | this->ecc.layout = &rtc_from4_nand_oobinfo; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 535 | this->ecc.hwctl = rtc_from4_enable_hwecc; |
| 536 | this->ecc.calculate = rtc_from4_calculate_ecc; |
| 537 | this->ecc.correct = rtc_from4_correct_data; |
Sebastian Siewior | c27e9b8 | 2008-04-18 13:44:24 -0700 | [diff] [blame] | 538 | |
| 539 | /* We could create the decoder on demand, if memory is a concern. |
| 540 | * This way we have it handy, if an error happens |
| 541 | * |
| 542 | * Symbolsize is 10 (bits) |
| 543 | * Primitve polynomial is x^10+x^3+1 |
| 544 | * first consecutive root is 0 |
| 545 | * primitve element to generate roots = 1 |
| 546 | * generator polinomial degree = 6 |
| 547 | */ |
| 548 | rs_decoder = init_rs(10, 0x409, 0, 1, 6); |
| 549 | if (!rs_decoder) { |
| 550 | printk(KERN_ERR "Could not create a RS decoder\n"); |
| 551 | ret = -ENOMEM; |
| 552 | goto err_1; |
| 553 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | #else |
| 555 | printk(KERN_INFO "rtc_from4_init: using software ECC detection.\n"); |
| 556 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 557 | this->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | #endif |
| 559 | |
| 560 | /* set the bad block tables to support debugging */ |
| 561 | this->bbt_td = &rtc_from4_bbt_main_descr; |
| 562 | this->bbt_md = &rtc_from4_bbt_mirror_descr; |
| 563 | |
| 564 | /* Scan to find existence of the device */ |
| 565 | if (nand_scan(rtc_from4_mtd, RTC_FROM4_MAX_CHIPS)) { |
Sebastian Siewior | c27e9b8 | 2008-04-18 13:44:24 -0700 | [diff] [blame] | 566 | ret = -ENXIO; |
| 567 | goto err_2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | } |
| 569 | |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 570 | /* Perform 'device recovery' for each chip in case there was a power loss. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 571 | for (i = 0; i < this->numchips; i++) { |
David A. Marlin | 97f1a08 | 2005-01-17 19:44:39 +0000 | [diff] [blame] | 572 | deplete(rtc_from4_mtd, i); |
| 573 | } |
| 574 | |
David A. Marlin | ed3786a | 2005-01-24 20:40:15 +0000 | [diff] [blame] | 575 | #if RTC_FROM4_NO_VIRTBLOCKS |
| 576 | /* use a smaller erase block to minimize wasted space when a block is bad */ |
| 577 | /* note: this uses eight times as much RAM as using the default and makes */ |
| 578 | /* mounts take four times as long. */ |
| 579 | rtc_from4_mtd->flags |= MTD_NO_VIRTBLOCKS; |
| 580 | #endif |
| 581 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | /* Register the partitions */ |
Jamie Iles | ee0e87b | 2011-05-23 10:23:40 +0100 | [diff] [blame] | 583 | ret = mtd_device_register(rtc_from4_mtd, partition_info, |
| 584 | NUM_PARTITIONS); |
Sebastian Siewior | c27e9b8 | 2008-04-18 13:44:24 -0700 | [diff] [blame] | 585 | if (ret) |
| 586 | goto err_3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | /* Return happy */ |
| 589 | return 0; |
Sebastian Siewior | c27e9b8 | 2008-04-18 13:44:24 -0700 | [diff] [blame] | 590 | err_3: |
| 591 | nand_release(rtc_from4_mtd); |
| 592 | err_2: |
| 593 | free_rs(rs_decoder); |
| 594 | err_1: |
| 595 | kfree(rtc_from4_mtd); |
| 596 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 599 | module_init(rtc_from4_init); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | |
| 601 | /* |
| 602 | * Clean up routine |
| 603 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 604 | static void __exit rtc_from4_cleanup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | { |
| 606 | /* Release resource, unregister partitions */ |
| 607 | nand_release(rtc_from4_mtd); |
| 608 | |
| 609 | /* Free the MTD device structure */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 610 | kfree(rtc_from4_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | |
| 612 | #ifdef RTC_FROM4_HWECC |
| 613 | /* Free the reed solomon resources */ |
| 614 | if (rs_decoder) { |
| 615 | free_rs(rs_decoder); |
| 616 | } |
| 617 | #endif |
| 618 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 619 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | module_exit(rtc_from4_cleanup); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | |
| 622 | MODULE_LICENSE("GPL"); |
| 623 | MODULE_AUTHOR("d.marlin <dmarlin@redhat.com"); |
| 624 | MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4"); |