| Ben Dooks | 65fa22b | 2008-12-12 00:24:10 +0000 | [diff] [blame^] | 1 | /* linux/arch/arm/plat-s3c24xx/irq-om.c |
| 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * |
| 7 | * S3C24XX - IRQ PM code |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/sysdev.h> |
| 18 | |
| 19 | #include <plat/cpu.h> |
| 20 | #include <plat/pm.h> |
| 21 | #include <plat/irq.h> |
| 22 | |
| 23 | /* state for IRQs over sleep */ |
| 24 | |
| 25 | /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources |
| 26 | * |
| 27 | * set bit to 1 in allow bitfield to enable the wakeup settings on it |
| 28 | */ |
| 29 | |
| 30 | unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; |
| 31 | unsigned long s3c_irqwake_intmask = 0xffffffffL; |
| 32 | unsigned long s3c_irqwake_eintallow = 0x0000fff0L; |
| 33 | unsigned long s3c_irqwake_eintmask = 0xffffffffL; |
| 34 | |
| 35 | int |
| 36 | s3c_irq_wake(unsigned int irqno, unsigned int state) |
| 37 | { |
| 38 | unsigned long irqbit = 1 << (irqno - IRQ_EINT0); |
| 39 | |
| 40 | if (!(s3c_irqwake_intallow & irqbit)) |
| 41 | return -ENOENT; |
| 42 | |
| 43 | printk(KERN_INFO "wake %s for irq %d\n", |
| 44 | state ? "enabled" : "disabled", irqno); |
| 45 | |
| 46 | if (!state) |
| 47 | s3c_irqwake_intmask |= irqbit; |
| 48 | else |
| 49 | s3c_irqwake_intmask &= ~irqbit; |
| 50 | |
| 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | int s3c_irqext_wake(unsigned int irqno, unsigned int state) |
| 55 | { |
| 56 | unsigned long bit = 1L << (irqno - EXTINT_OFF); |
| 57 | |
| 58 | if (!(s3c_irqwake_eintallow & bit)) |
| 59 | return -ENOENT; |
| 60 | |
| 61 | printk(KERN_INFO "wake %s for irq %d\n", |
| 62 | state ? "enabled" : "disabled", irqno); |
| 63 | |
| 64 | if (!state) |
| 65 | s3c_irqwake_eintmask |= bit; |
| 66 | else |
| 67 | s3c_irqwake_eintmask &= ~bit; |
| 68 | |
| 69 | return 0; |
| 70 | } |
| 71 | |
| 72 | static struct sleep_save irq_save[] = { |
| 73 | SAVE_ITEM(S3C2410_INTMSK), |
| 74 | SAVE_ITEM(S3C2410_INTSUBMSK), |
| 75 | }; |
| 76 | |
| 77 | /* the extint values move between the s3c2410/s3c2440 and the s3c2412 |
| 78 | * so we use an array to hold them, and to calculate the address of |
| 79 | * the register at run-time |
| 80 | */ |
| 81 | |
| 82 | static unsigned long save_extint[3]; |
| 83 | static unsigned long save_eintflt[4]; |
| 84 | static unsigned long save_eintmask; |
| 85 | |
| 86 | int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) |
| 87 | { |
| 88 | unsigned int i; |
| 89 | |
| 90 | for (i = 0; i < ARRAY_SIZE(save_extint); i++) |
| 91 | save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); |
| 92 | |
| 93 | for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) |
| 94 | save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); |
| 95 | |
| 96 | s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); |
| 97 | save_eintmask = __raw_readl(S3C24XX_EINTMASK); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | int s3c24xx_irq_resume(struct sys_device *dev) |
| 103 | { |
| 104 | unsigned int i; |
| 105 | |
| 106 | for (i = 0; i < ARRAY_SIZE(save_extint); i++) |
| 107 | __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); |
| 108 | |
| 109 | for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) |
| 110 | __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); |
| 111 | |
| 112 | s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); |
| 113 | __raw_writel(save_eintmask, S3C24XX_EINTMASK); |
| 114 | |
| 115 | return 0; |
| 116 | } |