Alexander Shishkin | f04e449 | 2015-09-22 15:47:17 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Intel(R) Trace Hub Software Trace Hub (STH) data structures |
| 3 | * |
| 4 | * Copyright (C) 2014-2015 Intel Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | */ |
| 15 | |
| 16 | #ifndef __INTEL_TH_STH_H__ |
| 17 | #define __INTEL_TH_STH_H__ |
| 18 | |
| 19 | enum { |
| 20 | REG_STH_STHCAP0 = 0x0000, /* capabilities pt1 */ |
| 21 | REG_STH_STHCAP1 = 0x0004, /* capabilities pt2 */ |
| 22 | REG_STH_TRIG = 0x0008, /* TRIG packet payload */ |
| 23 | REG_STH_TRIG_TS = 0x000c, /* TRIG_TS packet payload */ |
| 24 | REG_STH_XSYNC = 0x0010, /* XSYNC packet payload */ |
| 25 | REG_STH_XSYNC_TS = 0x0014, /* XSYNC_TS packet payload */ |
| 26 | REG_STH_GERR = 0x0018, /* GERR packet payload */ |
| 27 | }; |
| 28 | |
| 29 | struct intel_th_channel { |
| 30 | u64 Dn; |
| 31 | u64 DnM; |
| 32 | u64 DnTS; |
| 33 | u64 DnMTS; |
| 34 | u64 USER; |
| 35 | u64 USER_TS; |
| 36 | u32 FLAG; |
| 37 | u32 FLAG_TS; |
| 38 | u32 MERR; |
| 39 | u32 __unused; |
| 40 | } __packed; |
| 41 | |
| 42 | #endif /* __INTEL_TH_STH_H__ */ |