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Arnaud Ebalard389c74a2014-11-22 00:46:57 +01001/*
2 * Device Tree file for Synology DS414
3 *
4 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
5 *
Gregory CLEMENT3c21b5f2015-01-26 15:16:11 +01006 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
Arnaud Ebalard389c74a2014-11-22 00:46:57 +010043 *
44 * Note: this Device Tree assumes that the bootloader has remapped the
45 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
46 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
47 * bootloaders provided by Marvell. It is used in recent versions of
48 * DSM software provided by Synology. Nonetheless, some earlier boards
49 * were delivered with an older version of u-boot that left internal
50 * registers mapped at 0xd0000000. If you have such a device you will
51 * not be able to directly boot a kernel based on this Device Tree. In
52 * that case, the preferred solution is to update your bootloader (e.g.
53 * by upgrading to latest version of DSM, or building a new one and
54 * installing it from u-boot prompt) or adjust the Devive Tree
55 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
56 */
57
58/dts-v1/;
59
60#include <dt-bindings/input/input.h>
61#include <dt-bindings/gpio/gpio.h>
62#include "armada-xp-mv78230.dtsi"
63
64/ {
65 model = "Synology DS414";
66 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
67 "marvell,armadaxp", "marvell,armada-370-xp";
68
69 chosen {
70 bootargs = "console=ttyS0,115200 earlyprintk";
71 stdout-path = &uart0;
72 };
73
74 memory {
75 device_type = "memory";
76 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
77 };
78
79 soc {
80 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
81 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
82
83 pcie-controller {
84 status = "okay";
85
86 /*
87 * Connected to Marvell 88SX7042 SATA-II controller
88 * handling the four disks.
89 */
90 pcie@1,0 {
91 /* Port 0, Lane 0 */
92 status = "okay";
93 };
94
95 /*
96 * Connected to EtronTech EJ168A XHCI controller
97 * providing the two rear USB 3.0 ports.
98 */
99 pcie@5,0 {
100 /* Port 1, Lane 0 */
101 status = "okay";
102 };
103 };
104
105 internal-regs {
106
107 /* RTC is provided by Seiko S-35390A below */
108 rtc@10300 {
109 status = "disabled";
110 };
111
112 spi0: spi@10600 {
113 status = "okay";
114
115 spi-flash@0 {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 compatible = "micron,n25q064";
119 reg = <0>; /* Chip select 0 */
120 spi-max-frequency = <20000000>;
121
122 /*
123 * Warning!
124 *
125 * Synology u-boot uses its compiled-in environment
126 * and it seems Synology did not care to change u-boot
127 * default configuration in order to allow saving a
128 * modified environment at a sensible location. So,
129 * if you do a 'saveenv' under u-boot, your modified
130 * environment will be saved at 1MB after the start
131 * of the flash, i.e. in the middle of the uImage.
132 * For that reason, it is strongly advised not to
133 * change the default environment, unless you know
134 * what you are doing.
135 */
136 partition@00000000 { /* u-boot */
137 label = "RedBoot";
138 reg = <0x00000000 0x000d0000>; /* 832KB */
139 };
140
141 partition@000c0000 { /* uImage */
142 label = "zImage";
143 reg = <0x000d0000 0x002d0000>; /* 2880KB */
144 };
145
146 partition@003a0000 { /* uInitramfs */
147 label = "rd.gz";
148 reg = <0x003a0000 0x00430000>; /* 4250KB */
149 };
150
151 partition@007d0000 { /* MAC address and serial number */
152 label = "vendor";
153 reg = <0x007d0000 0x00010000>; /* 64KB */
154 };
155
156 partition@007e0000 {
157 label = "RedBoot config";
158 reg = <0x007e0000 0x00010000>; /* 64KB */
159 };
160
161 partition@007f0000 {
162 label = "FIS directory";
163 reg = <0x007f0000 0x00010000>; /* 64KB */
164 };
165 };
166 };
167
168 i2c@11000 {
169 clock-frequency = <400000>;
170 status = "okay";
171
172 s35390a: s35390a@30 {
173 compatible = "sii,s35390a";
174 reg = <0x30>;
175 };
176 };
177
178 /* Connected to a header on device's PCB. This
179 * provides the main console for the device.
180 *
181 * Warning: the device may not boot with a 3.3V
182 * USB-serial converter connected when the power
183 * button is pressed. The converter needs to be
184 * connected a few seconds after pressing the
185 * power button. This is possibly due to UART0_TXD
186 * pin being sampled at reset (bit 0 of SAR).
187 */
188 serial@12000 {
189 status = "okay";
190 };
191
192 /* Connected to a Microchip PIC16F883 for power control */
193 serial@12100 {
194 status = "okay";
195 };
196
197 poweroff@12100 {
198 compatible = "synology,power-off";
199 reg = <0x12100 0x100>;
200 clocks = <&coreclk 0>;
201 };
202
203 /* Front USB 2.0 port */
204 usb@50000 {
205 status = "okay";
206 };
207
208 mdio {
209 phy0: ethernet-phy@0 { /* Marvell 88E1512 */
210 reg = <0>;
211 };
212
213 phy1: ethernet-phy@1 { /* Marvell 88E1512 */
214 reg = <1>;
215 };
216 };
217
218 ethernet@70000 {
219 status = "okay";
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100220 pinctrl-0 = <&ge0_rgmii_pins>;
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100221 pinctrl-names = "default";
222 phy = <&phy1>;
223 phy-mode = "rgmii-id";
224 };
225
226 ethernet@74000 {
Arnaud Ebalard70ee4e92014-11-22 17:23:30 +0100227 pinctrl-0 = <&ge1_rgmii_pins>;
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100228 pinctrl-names = "default";
229 status = "okay";
230 phy = <&phy0>;
231 phy-mode = "rgmii-id";
232 };
233 };
234 };
235
236 regulators {
237 compatible = "simple-bus";
238 #address-cells = <1>;
239 #size-cells = <0>;
240 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
241 &sata3_pwr_pin &sata4_pwr_pin>;
242 pinctrl-names = "default";
243
244 sata1_regulator: sata1-regulator {
245 compatible = "regulator-fixed";
246 reg = <1>;
247 regulator-name = "SATA1 Power";
248 regulator-min-microvolt = <5000000>;
249 regulator-max-microvolt = <5000000>;
250 startup-delay-us = <2000000>;
251 enable-active-high;
252 regulator-always-on;
253 regulator-boot-on;
254 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
255 };
256
257 sata2_regulator: sata2-regulator {
258 compatible = "regulator-fixed";
259 reg = <2>;
260 regulator-name = "SATA2 Power";
261 regulator-min-microvolt = <5000000>;
262 regulator-max-microvolt = <5000000>;
263 startup-delay-us = <4000000>;
264 enable-active-high;
265 regulator-always-on;
266 regulator-boot-on;
267 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
268 };
269
270 sata3_regulator: sata3-regulator {
271 compatible = "regulator-fixed";
272 reg = <3>;
273 regulator-name = "SATA3 Power";
274 regulator-min-microvolt = <5000000>;
275 regulator-max-microvolt = <5000000>;
276 startup-delay-us = <6000000>;
277 enable-active-high;
278 regulator-always-on;
279 regulator-boot-on;
280 gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
281 };
282
283 sata4_regulator: sata4-regulator {
284 compatible = "regulator-fixed";
285 reg = <4>;
286 regulator-name = "SATA4 Power";
287 regulator-min-microvolt = <5000000>;
288 regulator-max-microvolt = <5000000>;
289 startup-delay-us = <8000000>;
290 enable-active-high;
291 regulator-always-on;
292 regulator-boot-on;
293 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
294 };
295 };
296};
297
298&pinctrl {
299 sata1_pwr_pin: sata1-pwr-pin {
300 marvell,pins = "mpp42";
301 marvell,function = "gpio";
302 };
303
304 sata2_pwr_pin: sata2-pwr-pin {
305 marvell,pins = "mpp44";
306 marvell,function = "gpio";
307 };
308
309 sata3_pwr_pin: sata3-pwr-pin {
310 marvell,pins = "mpp45";
311 marvell,function = "gpio";
312 };
313
314 sata4_pwr_pin: sata4-pwr-pin {
315 marvell,pins = "mpp46";
316 marvell,function = "gpio";
317 };
318
319 sata1_pres_pin: sata1-pres-pin {
320 marvell,pins = "mpp34";
321 marvell,function = "gpio";
322 };
323
324 sata2_pres_pin: sata2-pres-pin {
325 marvell,pins = "mpp35";
326 marvell,function = "gpio";
327 };
328
329 sata3_pres_pin: sata3-pres-pin {
330 marvell,pins = "mpp40";
331 marvell,function = "gpio";
332 };
333
334 sata4_pres_pin: sata4-pres-pin {
335 marvell,pins = "mpp41";
336 marvell,function = "gpio";
337 };
338
339 syno_id_bit0_pin: syno-id-bit0-pin {
340 marvell,pins = "mpp26";
341 marvell,function = "gpio";
342 };
343
Arnaud Ebalarda02fe642014-11-22 17:19:50 +0100344 syno_id_bit1_pin: syno-id-bit1-pin {
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100345 marvell,pins = "mpp28";
346 marvell,function = "gpio";
347 };
348
Arnaud Ebalarda02fe642014-11-22 17:19:50 +0100349 syno_id_bit2_pin: syno-id-bit2-pin {
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100350 marvell,pins = "mpp29";
351 marvell,function = "gpio";
352 };
353
Arnaud Ebalarda02fe642014-11-22 17:19:50 +0100354 fan1_alarm_pin: fan1-alarm-pin {
Arnaud Ebalard389c74a2014-11-22 00:46:57 +0100355 marvell,pins = "mpp33";
356 marvell,function = "gpio";
357 };
358
359 fan2_alarm_pin: fan2-alarm-pin {
360 marvell,pins = "mpp32";
361 marvell,function = "gpio";
362 };
363};