Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 1 | /* |
| 2 | * R-Car Generation 2 Power management support |
| 3 | * |
| 4 | * Copyright (C) 2013 - 2015 Renesas Electronics Corporation |
| 5 | * Copyright (C) 2011 Renesas Solutions Corp. |
| 6 | * Copyright (C) 2011 Magnus Damm |
| 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive |
| 10 | * for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/of.h> |
| 15 | #include <linux/smp.h> |
Geert Uytterhoeven | be32bcb | 2016-04-20 14:02:36 +0200 | [diff] [blame] | 16 | #include <linux/soc/renesas/rcar-sysc.h> |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 17 | #include <asm/io.h> |
| 18 | #include "common.h" |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 19 | #include "rcar-gen2.h" |
| 20 | |
| 21 | /* RST */ |
| 22 | #define RST 0xe6160000 |
| 23 | #define CA15BAR 0x0020 |
| 24 | #define CA7BAR 0x0030 |
| 25 | #define CA15RESCNT 0x0040 |
| 26 | #define CA7RESCNT 0x0044 |
| 27 | |
| 28 | /* On-chip RAM */ |
Geert Uytterhoeven | c94bc81 | 2016-05-17 17:15:33 +0200 | [diff] [blame] | 29 | #define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */ |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 30 | |
| 31 | /* SYSC */ |
| 32 | #define SYSCIER 0x0c |
| 33 | #define SYSCIMR 0x10 |
| 34 | |
| 35 | #if defined(CONFIG_SMP) |
| 36 | |
| 37 | static void __init rcar_gen2_sysc_init(u32 syscier) |
| 38 | { |
Geert Uytterhoeven | 0532399 | 2016-06-28 16:10:33 +0200 | [diff] [blame] | 39 | rcar_sysc_init(0xe6180000, syscier); |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 40 | } |
| 41 | |
| 42 | #else /* CONFIG_SMP */ |
| 43 | |
| 44 | static inline void rcar_gen2_sysc_init(u32 syscier) {} |
| 45 | |
| 46 | #endif /* CONFIG_SMP */ |
| 47 | |
| 48 | void __init rcar_gen2_pm_init(void) |
| 49 | { |
| 50 | void __iomem *p; |
| 51 | u32 bar; |
| 52 | static int once; |
| 53 | struct device_node *np, *cpus; |
| 54 | bool has_a7 = false; |
| 55 | bool has_a15 = false; |
Geert Uytterhoeven | c94bc81 | 2016-05-17 17:15:33 +0200 | [diff] [blame] | 56 | phys_addr_t boot_vector_addr = ICRAM1; |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 57 | u32 syscier = 0; |
| 58 | |
| 59 | if (once++) |
| 60 | return; |
| 61 | |
| 62 | cpus = of_find_node_by_path("/cpus"); |
| 63 | if (!cpus) |
| 64 | return; |
| 65 | |
| 66 | for_each_child_of_node(cpus, np) { |
| 67 | if (of_device_is_compatible(np, "arm,cortex-a15")) |
| 68 | has_a15 = true; |
| 69 | else if (of_device_is_compatible(np, "arm,cortex-a7")) |
| 70 | has_a7 = true; |
| 71 | } |
| 72 | |
Geert Uytterhoeven | c94bc81 | 2016-05-17 17:15:33 +0200 | [diff] [blame] | 73 | if (of_machine_is_compatible("renesas,r8a7790")) |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 74 | syscier = 0x013111ef; |
Geert Uytterhoeven | c94bc81 | 2016-05-17 17:15:33 +0200 | [diff] [blame] | 75 | else if (of_machine_is_compatible("renesas,r8a7791")) |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 76 | syscier = 0x00111003; |
Gaku Inami | a8caad6 | 2015-03-16 14:48:43 +0900 | [diff] [blame] | 77 | |
| 78 | /* RAM for jump stub, because BAR requires 256KB aligned address */ |
| 79 | p = ioremap_nocache(boot_vector_addr, shmobile_boot_size); |
| 80 | memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); |
| 81 | iounmap(p); |
| 82 | |
| 83 | /* setup reset vectors */ |
| 84 | p = ioremap_nocache(RST, 0x63); |
| 85 | bar = (boot_vector_addr >> 8) & 0xfffffc00; |
| 86 | if (has_a15) { |
| 87 | writel_relaxed(bar, p + CA15BAR); |
| 88 | writel_relaxed(bar | 0x10, p + CA15BAR); |
| 89 | |
| 90 | /* de-assert reset for CA15 CPUs */ |
| 91 | writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | |
| 92 | 0xa5a50000, p + CA15RESCNT); |
| 93 | } |
| 94 | if (has_a7) { |
| 95 | writel_relaxed(bar, p + CA7BAR); |
| 96 | writel_relaxed(bar | 0x10, p + CA7BAR); |
| 97 | |
| 98 | /* de-assert reset for CA7 CPUs */ |
| 99 | writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | |
| 100 | 0x5a5a0000, p + CA7RESCNT); |
| 101 | } |
| 102 | iounmap(p); |
| 103 | |
| 104 | rcar_gen2_sysc_init(syscier); |
| 105 | shmobile_smp_apmu_suspend_init(); |
| 106 | } |