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gerrit-public.fairphone.software / kernel / msm-4.9 / 67ae8b9b7898b4587922a973f4735e64b7271314 / . / arch / arm / boot / dts / pxa2xx.dtsi
blob: 5e5af078b9b5433bda69d25931c52a1eb5a94b24 [file] [log] [blame]
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]1/*
2 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
3 *
4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8
Robert Jarzmikd96672e2015-02-07 13:13:24 +0100[diff] [blame]9#include "skeleton.dtsi"
10#include "dt-bindings/clock/pxa-clock.h"
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]11
12/ {
13 model = "Marvell PXA2xx family SoC";
14 compatible = "marvell,pxa2xx";
15 interrupt-parent = <&pxairq>;
16
17 aliases {
18 serial0 = &ffuart;
19 serial1 = &btuart;
20 serial2 = &stuart;
21 serial3 = &hwuart;
22 i2c0 = &pwri2c;
23 i2c1 = &pxai2c1;
24 };
25
26 cpus {
Lorenzo Pieralisi03362042013-04-23 14:16:13 +0100[diff] [blame]27 #address-cells = <0>;
28 #size-cells = <0>;
29 cpu {
30 compatible = "marvell,xscale";
31 device_type = "cpu";
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]32 };
33 };
34
35 pxabus {
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges;
40
41 pxairq: interrupt-controller@40d00000 {
42 #interrupt-cells = <1>;
43 compatible = "marvell,pxa-intc";
44 interrupt-controller;
45 interrupt-parent;
46 marvell,intc-nr-irqs = <32>;
47 reg = <0x40d00000 0xd0>;
48 };
49
50 gpio: gpio@40e00000 {
51 compatible = "mrvl,pxa-gpio";
52 #address-cells = <0x1>;
53 #size-cells = <0x1>;
54 reg = <0x40e00000 0x10000>;
55 gpio-controller;
56 #gpio-cells = <0x2>;
57 interrupts = <10>;
58 interrupt-names = "gpio_mux";
59 interrupt-controller;
60 #interrupt-cells = <0x2>;
61 ranges;
62
63 gcb0: gpio@40e00000 {
64 reg = <0x40e00000 0x4>;
65 };
66
67 gcb1: gpio@40e00004 {
68 reg = <0x40e00004 0x4>;
69 };
70
71 gcb2: gpio@40e00008 {
72 reg = <0x40e00008 0x4>;
73 };
74 gcb3: gpio@40e0000c {
75 reg = <0x40e0000c 0x4>;
76 };
77 };
78
79 ffuart: uart@40100000 {
80 compatible = "mrvl,pxa-uart";
81 reg = <0x40100000 0x30>;
82 interrupts = <22>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +0100[diff] [blame]83 clocks = <&clks CLK_FFUART>;
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]84 status = "disabled";
85 };
86
87 btuart: uart@40200000 {
88 compatible = "mrvl,pxa-uart";
89 reg = <0x40200000 0x30>;
90 interrupts = <21>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +0100[diff] [blame]91 clocks = <&clks CLK_BTUART>;
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]92 status = "disabled";
93 };
94
95 stuart: uart@40700000 {
96 compatible = "mrvl,pxa-uart";
97 reg = <0x40700000 0x30>;
98 interrupts = <20>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +0100[diff] [blame]99 clocks = <&clks CLK_STUART>;
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]100 status = "disabled";
101 };
102
103 hwuart: uart@41100000 {
104 compatible = "mrvl,pxa-uart";
105 reg = <0x41100000 0x30>;
106 interrupts = <7>;
107 status = "disabled";
108 };
109
110 pxai2c1: i2c@40301680 {
111 compatible = "mrvl,pxa-i2c";
112 reg = <0x40301680 0x30>;
113 interrupts = <18>;
Robert Jarzmikd96672e2015-02-07 13:13:24 +0100[diff] [blame]114 clocks = <&clks CLK_I2C>;
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]115 #address-cells = <0x1>;
116 #size-cells = <0>;
117 status = "disabled";
118 };
119
120 usb0: ohci@4c000000 {
Daniel Mack7a08cf772014-08-14 11:46:13 +0200[diff] [blame]121 compatible = "marvell,pxa-ohci";
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]122 reg = <0x4c000000 0x10000>;
123 interrupts = <3>;
124 status = "disabled";
125 };
126
127 mmc0: mmc@41100000 {
Daniel Mack2bf172c2014-08-14 11:46:12 +0200[diff] [blame]128 compatible = "marvell,pxa-mmc";
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]129 reg = <0x41100000 0x1000>;
130 interrupts = <23>;
Robert Jarzmik316c9382015-06-20 10:17:28 +0200[diff] [blame]131 clocks = <&clks CLK_MMC>;
132 dmas = <&pdma 21 3
133 &pdma 22 3>;
134 dma-names = "rx", "tx";
Daniel Mackaff18a62012-07-25 17:56:48 +0200[diff] [blame]135 status = "disabled";
136 };
137
138 rtc@40900000 {
139 compatible = "marvell,pxa-rtc";
140 reg = <0x40900000 0x3c>;
141 interrupts = <30 31>;
142 };
143 };
144};