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Michael Buesch61e115a2007-09-18 15:12:50 -04001/*
2 * Sonics Silicon Backplane
3 * Bus scanning
4 *
5 * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
6 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
7 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
8 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (C) 2006 Broadcom Corporation.
11 *
12 * Licensed under the GNU/GPL. See COPYING for details.
13 */
14
15#include <linux/ssb/ssb.h>
16#include <linux/ssb/ssb_regs.h>
17#include <linux/pci.h>
18#include <linux/io.h>
19
Michael Buesch61e115a2007-09-18 15:12:50 -040020#include <pcmcia/cistpl.h>
21#include <pcmcia/ds.h>
22
23#include "ssb_private.h"
24
25
26const char *ssb_core_name(u16 coreid)
27{
28 switch (coreid) {
29 case SSB_DEV_CHIPCOMMON:
30 return "ChipCommon";
31 case SSB_DEV_ILINE20:
32 return "ILine 20";
33 case SSB_DEV_SDRAM:
34 return "SDRAM";
35 case SSB_DEV_PCI:
36 return "PCI";
37 case SSB_DEV_MIPS:
38 return "MIPS";
39 case SSB_DEV_ETHERNET:
40 return "Fast Ethernet";
41 case SSB_DEV_V90:
42 return "V90";
43 case SSB_DEV_USB11_HOSTDEV:
44 return "USB 1.1 Hostdev";
45 case SSB_DEV_ADSL:
46 return "ADSL";
47 case SSB_DEV_ILINE100:
48 return "ILine 100";
49 case SSB_DEV_IPSEC:
50 return "IPSEC";
51 case SSB_DEV_PCMCIA:
52 return "PCMCIA";
53 case SSB_DEV_INTERNAL_MEM:
54 return "Internal Memory";
55 case SSB_DEV_MEMC_SDRAM:
56 return "MEMC SDRAM";
57 case SSB_DEV_EXTIF:
58 return "EXTIF";
59 case SSB_DEV_80211:
60 return "IEEE 802.11";
61 case SSB_DEV_MIPS_3302:
62 return "MIPS 3302";
63 case SSB_DEV_USB11_HOST:
64 return "USB 1.1 Host";
65 case SSB_DEV_USB11_DEV:
66 return "USB 1.1 Device";
67 case SSB_DEV_USB20_HOST:
68 return "USB 2.0 Host";
69 case SSB_DEV_USB20_DEV:
70 return "USB 2.0 Device";
71 case SSB_DEV_SDIO_HOST:
72 return "SDIO Host";
73 case SSB_DEV_ROBOSWITCH:
74 return "Roboswitch";
75 case SSB_DEV_PARA_ATA:
76 return "PATA";
77 case SSB_DEV_SATA_XORDMA:
78 return "SATA XOR-DMA";
79 case SSB_DEV_ETHERNET_GBIT:
80 return "GBit Ethernet";
81 case SSB_DEV_PCIE:
82 return "PCI-E";
83 case SSB_DEV_MIMO_PHY:
84 return "MIMO PHY";
85 case SSB_DEV_SRAM_CTRLR:
86 return "SRAM Controller";
87 case SSB_DEV_MINI_MACPHY:
88 return "Mini MACPHY";
89 case SSB_DEV_ARM_1176:
90 return "ARM 1176";
91 case SSB_DEV_ARM_7TDMI:
92 return "ARM 7TDMI";
93 }
94 return "UNKNOWN";
95}
96
97static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
98{
99 u16 chipid_fallback = 0;
100
101 switch (pci_dev->device) {
102 case 0x4301:
103 chipid_fallback = 0x4301;
104 break;
105 case 0x4305 ... 0x4307:
106 chipid_fallback = 0x4307;
107 break;
108 case 0x4403:
109 chipid_fallback = 0x4402;
110 break;
111 case 0x4610 ... 0x4615:
112 chipid_fallback = 0x4610;
113 break;
114 case 0x4710 ... 0x4715:
115 chipid_fallback = 0x4710;
116 break;
117 case 0x4320 ... 0x4325:
118 chipid_fallback = 0x4309;
119 break;
120 case PCI_DEVICE_ID_BCM4401:
121 case PCI_DEVICE_ID_BCM4401B0:
122 case PCI_DEVICE_ID_BCM4401B1:
123 chipid_fallback = 0x4401;
124 break;
125 default:
126 ssb_printk(KERN_ERR PFX
127 "PCI-ID not in fallback list\n");
128 }
129
130 return chipid_fallback;
131}
132
133static u8 chipid_to_nrcores(u16 chipid)
134{
135 switch (chipid) {
136 case 0x5365:
137 return 7;
138 case 0x4306:
139 return 6;
140 case 0x4310:
141 return 8;
142 case 0x4307:
143 case 0x4301:
144 return 5;
145 case 0x4401:
146 case 0x4402:
147 return 3;
148 case 0x4710:
149 case 0x4610:
150 case 0x4704:
151 return 9;
152 default:
153 ssb_printk(KERN_ERR PFX
154 "CHIPID not in nrcores fallback list\n");
155 }
156
157 return 1;
158}
159
160static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
161 u16 offset)
162{
Martin Fuzzeyd8e23522009-11-06 21:21:27 +0100163 u32 lo, hi;
164
Michael Buesch61e115a2007-09-18 15:12:50 -0400165 switch (bus->bustype) {
166 case SSB_BUSTYPE_SSB:
167 offset += current_coreidx * SSB_CORE_SIZE;
168 break;
169 case SSB_BUSTYPE_PCI:
170 break;
171 case SSB_BUSTYPE_PCMCIA:
172 if (offset >= 0x800) {
173 ssb_pcmcia_switch_segment(bus, 1);
174 offset -= 0x800;
175 } else
176 ssb_pcmcia_switch_segment(bus, 0);
Martin Fuzzeyd8e23522009-11-06 21:21:27 +0100177 lo = readw(bus->mmio + offset);
178 hi = readw(bus->mmio + offset + 2);
179 return lo | (hi << 16);
Albert Herranz24ea6022009-09-08 19:30:12 +0200180 case SSB_BUSTYPE_SDIO:
181 offset += current_coreidx * SSB_CORE_SIZE;
182 return ssb_sdio_scan_read32(bus, offset);
Michael Buesch61e115a2007-09-18 15:12:50 -0400183 }
184 return readl(bus->mmio + offset);
185}
186
187static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
188{
189 switch (bus->bustype) {
190 case SSB_BUSTYPE_SSB:
191 break;
192 case SSB_BUSTYPE_PCI:
193 return ssb_pci_switch_coreidx(bus, coreidx);
194 case SSB_BUSTYPE_PCMCIA:
195 return ssb_pcmcia_switch_coreidx(bus, coreidx);
Albert Herranz24ea6022009-09-08 19:30:12 +0200196 case SSB_BUSTYPE_SDIO:
197 return ssb_sdio_scan_switch_coreidx(bus, coreidx);
Michael Buesch61e115a2007-09-18 15:12:50 -0400198 }
199 return 0;
200}
201
202void ssb_iounmap(struct ssb_bus *bus)
203{
204 switch (bus->bustype) {
205 case SSB_BUSTYPE_SSB:
206 case SSB_BUSTYPE_PCMCIA:
207 iounmap(bus->mmio);
208 break;
209 case SSB_BUSTYPE_PCI:
210#ifdef CONFIG_SSB_PCIHOST
211 pci_iounmap(bus->host_pci, bus->mmio);
212#else
213 SSB_BUG_ON(1); /* Can't reach this code. */
214#endif
215 break;
Albert Herranz24ea6022009-09-08 19:30:12 +0200216 case SSB_BUSTYPE_SDIO:
217 break;
Michael Buesch61e115a2007-09-18 15:12:50 -0400218 }
219 bus->mmio = NULL;
220 bus->mapped_device = NULL;
221}
222
223static void __iomem *ssb_ioremap(struct ssb_bus *bus,
224 unsigned long baseaddr)
225{
226 void __iomem *mmio = NULL;
227
228 switch (bus->bustype) {
229 case SSB_BUSTYPE_SSB:
230 /* Only map the first core for now. */
231 /* fallthrough... */
232 case SSB_BUSTYPE_PCMCIA:
233 mmio = ioremap(baseaddr, SSB_CORE_SIZE);
234 break;
235 case SSB_BUSTYPE_PCI:
236#ifdef CONFIG_SSB_PCIHOST
237 mmio = pci_iomap(bus->host_pci, 0, ~0UL);
238#else
239 SSB_BUG_ON(1); /* Can't reach this code. */
240#endif
241 break;
Albert Herranz24ea6022009-09-08 19:30:12 +0200242 case SSB_BUSTYPE_SDIO:
243 /* Nothing to ioremap in the SDIO case, just fake it */
244 mmio = (void __iomem *)baseaddr;
245 break;
Michael Buesch61e115a2007-09-18 15:12:50 -0400246 }
247
248 return mmio;
249}
250
251static int we_support_multiple_80211_cores(struct ssb_bus *bus)
252{
253 /* More than one 802.11 core is only supported by special chips.
254 * There are chips with two 802.11 cores, but with dangling
255 * pins on the second core. Be careful and reject them here.
256 */
257
258#ifdef CONFIG_SSB_PCIHOST
259 if (bus->bustype == SSB_BUSTYPE_PCI) {
260 if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
261 bus->host_pci->device == 0x4324)
262 return 1;
263 }
264#endif /* CONFIG_SSB_PCIHOST */
265 return 0;
266}
267
268int ssb_bus_scan(struct ssb_bus *bus,
269 unsigned long baseaddr)
270{
271 int err = -ENOMEM;
272 void __iomem *mmio;
273 u32 idhi, cc, rev, tmp;
274 int dev_i, i;
275 struct ssb_device *dev;
276 int nr_80211_cores = 0;
277
278 mmio = ssb_ioremap(bus, baseaddr);
279 if (!mmio)
280 goto out;
281 bus->mmio = mmio;
282
283 err = scan_switchcore(bus, 0); /* Switch to first core */
284 if (err)
285 goto err_unmap;
286
287 idhi = scan_read32(bus, 0, SSB_IDHIGH);
288 cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
289 rev = (idhi & SSB_IDHIGH_RCLO);
290 rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
291
292 bus->nr_devices = 0;
293 if (cc == SSB_DEV_CHIPCOMMON) {
294 tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
295
296 bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
297 bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
298 SSB_CHIPCO_REVSHIFT;
299 bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
300 SSB_CHIPCO_PACKSHIFT;
301 if (rev >= 4) {
302 bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
303 SSB_CHIPCO_NRCORESSHIFT;
304 }
305 tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
306 bus->chipco.capabilities = tmp;
307 } else {
308 if (bus->bustype == SSB_BUSTYPE_PCI) {
309 bus->chip_id = pcidev_to_chipid(bus->host_pci);
310 pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
311 &bus->chip_rev);
312 bus->chip_package = 0;
313 } else {
314 bus->chip_id = 0x4710;
315 bus->chip_rev = 0;
316 bus->chip_package = 0;
317 }
318 }
319 if (!bus->nr_devices)
320 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
321 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
322 ssb_printk(KERN_ERR PFX
323 "More than %d ssb cores found (%d)\n",
324 SSB_MAX_NR_CORES, bus->nr_devices);
325 goto err_unmap;
326 }
327 if (bus->bustype == SSB_BUSTYPE_SSB) {
328 /* Now that we know the number of cores,
329 * remap the whole IO space for all cores.
330 */
331 err = -ENOMEM;
332 iounmap(mmio);
333 mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
334 if (!mmio)
335 goto out;
336 bus->mmio = mmio;
337 }
338
339 /* Fetch basic information about each core/device */
340 for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
341 err = scan_switchcore(bus, i);
342 if (err)
343 goto err_unmap;
344 dev = &(bus->devices[dev_i]);
345
346 idhi = scan_read32(bus, i, SSB_IDHIGH);
347 dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
348 dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
349 dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
350 dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
351 dev->core_index = i;
352 dev->bus = bus;
353 dev->ops = bus->ops;
354
Larry Fingerac2752c2009-11-19 14:40:46 -0600355 printk(KERN_DEBUG PFX
Michael Buesch61e115a2007-09-18 15:12:50 -0400356 "Core %d found: %s "
357 "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
358 i, ssb_core_name(dev->id.coreid),
359 dev->id.coreid, dev->id.revision, dev->id.vendor);
360
361 switch (dev->id.coreid) {
362 case SSB_DEV_80211:
363 nr_80211_cores++;
364 if (nr_80211_cores > 1) {
365 if (!we_support_multiple_80211_cores(bus)) {
366 ssb_dprintk(KERN_INFO PFX "Ignoring additional "
367 "802.11 core\n");
368 continue;
369 }
370 }
371 break;
372 case SSB_DEV_EXTIF:
373#ifdef CONFIG_SSB_DRIVER_EXTIF
374 if (bus->extif.dev) {
375 ssb_printk(KERN_WARNING PFX
376 "WARNING: Multiple EXTIFs found\n");
377 break;
378 }
379 bus->extif.dev = dev;
380#endif /* CONFIG_SSB_DRIVER_EXTIF */
381 break;
382 case SSB_DEV_CHIPCOMMON:
383 if (bus->chipco.dev) {
384 ssb_printk(KERN_WARNING PFX
385 "WARNING: Multiple ChipCommon found\n");
386 break;
387 }
388 bus->chipco.dev = dev;
389 break;
390 case SSB_DEV_MIPS:
391 case SSB_DEV_MIPS_3302:
392#ifdef CONFIG_SSB_DRIVER_MIPS
393 if (bus->mipscore.dev) {
394 ssb_printk(KERN_WARNING PFX
395 "WARNING: Multiple MIPS cores found\n");
396 break;
397 }
398 bus->mipscore.dev = dev;
399#endif /* CONFIG_SSB_DRIVER_MIPS */
400 break;
401 case SSB_DEV_PCI:
402 case SSB_DEV_PCIE:
403#ifdef CONFIG_SSB_DRIVER_PCICORE
Michael Buesch87c4ac82008-01-03 18:59:25 +0100404 if (bus->bustype == SSB_BUSTYPE_PCI) {
405 /* Ignore PCI cores on PCI-E cards.
406 * Ignore PCI-E cores on PCI cards. */
407 if (dev->id.coreid == SSB_DEV_PCI) {
408 if (bus->host_pci->is_pcie)
409 continue;
410 } else {
411 if (!bus->host_pci->is_pcie)
412 continue;
413 }
414 }
Michael Buesch61e115a2007-09-18 15:12:50 -0400415 if (bus->pcicore.dev) {
416 ssb_printk(KERN_WARNING PFX
417 "WARNING: Multiple PCI(E) cores found\n");
418 break;
419 }
420 bus->pcicore.dev = dev;
421#endif /* CONFIG_SSB_DRIVER_PCICORE */
422 break;
423 default:
424 break;
425 }
426
427 dev_i++;
428 }
429 bus->nr_devices = dev_i;
430
431 err = 0;
432out:
433 return err;
434err_unmap:
435 ssb_iounmap(bus);
436 goto out;
437}