blob: bfeb25aaf9a2a7a48857a3896fb682d7d94568a8 [file] [log] [blame]
Shawn Guo12bb34402012-12-04 22:55:14 +08001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/cpuidle.h>
10#include <linux/module.h>
11#include <asm/cpuidle.h>
12
Ben Dooks47096102016-06-21 13:13:11 +010013#include <soc/imx/cpuidle.h>
14
Shawn Guoe5f9dec2012-12-04 22:55:15 +080015#include "common.h"
Shawn Guo12bb34402012-12-04 22:55:14 +080016#include "cpuidle.h"
Anson Huanga25d67a2014-06-20 13:44:05 +080017#include "hardware.h"
Shawn Guo12bb34402012-12-04 22:55:14 +080018
Shawn Guoe5f9dec2012-12-04 22:55:15 +080019static atomic_t master = ATOMIC_INIT(0);
20static DEFINE_SPINLOCK(master_lock);
21
22static int imx6q_enter_wait(struct cpuidle_device *dev,
23 struct cpuidle_driver *drv, int index)
24{
Shawn Guoe5f9dec2012-12-04 22:55:15 +080025 if (atomic_inc_return(&master) == num_online_cpus()) {
26 /*
27 * With this lock, we prevent other cpu to exit and enter
28 * this function again and become the master.
29 */
30 if (!spin_trylock(&master_lock))
31 goto idle;
Shawn Guo8fb76a02015-04-25 22:59:19 +080032 imx6_set_lpm(WAIT_UNCLOCKED);
Shawn Guoe5f9dec2012-12-04 22:55:15 +080033 cpu_do_idle();
Shawn Guo8fb76a02015-04-25 22:59:19 +080034 imx6_set_lpm(WAIT_CLOCKED);
Shawn Guoe5f9dec2012-12-04 22:55:15 +080035 spin_unlock(&master_lock);
36 goto done;
37 }
38
39idle:
40 cpu_do_idle();
41done:
42 atomic_dec(&master);
Shawn Guoe5f9dec2012-12-04 22:55:15 +080043
44 return index;
45}
46
Shawn Guo12bb34402012-12-04 22:55:14 +080047static struct cpuidle_driver imx6q_cpuidle_driver = {
48 .name = "imx6q_cpuidle",
49 .owner = THIS_MODULE,
Shawn Guoe5f9dec2012-12-04 22:55:15 +080050 .states = {
51 /* WFI */
52 ARM_CPUIDLE_WFI_STATE,
53 /* WAIT */
54 {
55 .exit_latency = 50,
56 .target_residency = 75,
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +010057 .flags = CPUIDLE_FLAG_TIMER_STOP,
Shawn Guoe5f9dec2012-12-04 22:55:15 +080058 .enter = imx6q_enter_wait,
59 .name = "WAIT",
60 .desc = "Clock off",
61 },
62 },
63 .state_count = 2,
64 .safe_state_index = 0,
Shawn Guo12bb34402012-12-04 22:55:14 +080065};
66
Lucas Stach29380902016-06-03 18:31:19 +020067/*
68 * i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from waking the
69 * CPUs when they are in wait(unclocked) state. As the hardware workaround isn't
70 * applicable to all boards, disable the deeper idle state when the workaround
71 * isn't present and the FEC is in use.
72 */
73void imx6q_cpuidle_fec_irqs_used(void)
74{
75 imx6q_cpuidle_driver.states[1].disabled = true;
76}
Shawn Guo2cb9caa2016-06-21 10:30:44 +080077EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_used);
Lucas Stach29380902016-06-03 18:31:19 +020078
79void imx6q_cpuidle_fec_irqs_unused(void)
80{
81 imx6q_cpuidle_driver.states[1].disabled = false;
82}
Shawn Guo2cb9caa2016-06-21 10:30:44 +080083EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_unused);
Lucas Stach29380902016-06-03 18:31:19 +020084
Shawn Guo12bb34402012-12-04 22:55:14 +080085int __init imx6q_cpuidle_init(void)
86{
Fabio Estevamfa6be652014-01-07 08:00:40 -020087 /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */
Anson Huang8765caa2016-08-29 21:49:56 +080088 imx6_set_int_mem_clk_lpm(true);
Shawn Guoe5f9dec2012-12-04 22:55:15 +080089
Daniel Lezcano54a46442013-04-23 08:54:45 +000090 return cpuidle_register(&imx6q_cpuidle_driver, NULL);
Shawn Guo12bb34402012-12-04 22:55:14 +080091}